Silicon carbide devices with compensation regions and their manufacturing methods

Abstract

A silicon carbide device with a compensation region and a method for manufacturing the same are disclosed. A silicon carbide substrate (700) is provided, comprising a drift layer (730) of a first conductivity type and a trench (770) extending from a main surface (701) of the silicon carbide substrate (700) into the drift layer (730). A first dopant is implanted through a first trench sidewall (771) of the trench (770). The first dopant has a second conductivity type and is implanted into the silicon carbide substrate (700) at a first implantation angle, wherein a channeling effect occurs at the first implantation angle. The first dopant forms a first compensation layer (181) extending parallel to the first trench sidewall (771).

Description

Technical Field

[0001] Examples of this disclosure relate to silicon carbide devices, and more particularly to silicon carbide devices with compensation structures and methods for manufacturing silicon carbide devices with compensation structures. Background Technology

[0002] The most significant difference between conventional power semiconductor devices and superjunction power devices lies in the series of lateral junctions between the n-doped and p-doped regions in the voltage sustaining layer of the superjunction power semiconductor device. The lateral depletion effect within the voltage sustaining layer contributes to high voltage blocking capability with relatively low on-state resistance. A prerequisite for high voltage blocking capability is sufficient charge balance between the n-doped and p-doped regions in the voltage sustaining layer. Fabrication of silicon superjunction devices typically involves multiple epitaxial / implantation processes per layer using masked p-type doping or a combination of masked p-type and masked n-type doping, multiple implantation processes at different implantation energies, or trench etching processes combined with epitaxial growth in the trench or with vapor phase doping of the trench walls. If the semiconductor material has a low diffusion coefficient, forming a compensation structure with adequately defined charge compensation becomes more challenging.

[0003] There is a need for silicon carbide devices that include compensation structures with well-defined charge compensation at a competitive cost. Summary of the Invention

[0004] Embodiments of this disclosure relate to a method of manufacturing a silicon carbide device. The method includes providing a silicon carbide substrate including a drift layer of a first conductivity type and a trench extending from a main surface of the silicon carbide substrate into the drift layer. A first dopant is implanted through a first trench sidewall. The first dopant has a second conductivity type and is implanted into the silicon carbide substrate at a first implantation angle, wherein channeling occurs at the first implantation angle. The first dopant forms a first compensation layer extending parallel to the first trench sidewall.

[0005] Another embodiment of this disclosure relates to a method of manufacturing a silicon carbide device. The method includes providing a silicon carbide substrate, the silicon carbide substrate including a drift layer of a first conductivity type and a trench extending from a main surface of the silicon carbide substrate into the drift layer. A first dopant is implanted through a first trench sidewall. The first dopant has a second conductivity type and forms a first compensation layer extending parallel to the first trench sidewall. A second dopant is implanted through the first trench sidewall. The second dopant has a first conductivity type and forms a second compensation layer. The first compensation layer and the second compensation layer form a pn junction.

[0006] Another embodiment of this disclosure relates to a silicon carbide device including a silicon carbide body. A gate structure extends from a first surface into the silicon carbide body. A fill structure is formed between the gate structure and a second surface of the silicon carbide body, wherein the second surface is opposite to the first surface. A compensation region of a first conductivity type is formed between the gate structure and the second surface. A first compensation layer of a second conductivity type is formed between a first sidewall of the fill structure and the compensation region. A second compensation layer of the first conductivity type extends parallel to the first sidewall. The first compensation layer and the second compensation layer form a pn junction.

[0007] Those skilled in the art will recognize the additional features and advantages when reading the following detailed description and when viewing the accompanying drawings. Attached Figure Description

[0008] The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of silicon carbide devices and methods of manufacturing silicon carbide devices, and together with the description serve to explain the principles of the embodiments. Further embodiments are described in the following detailed description and claims.

[0009] Figures 1A to 1C A simplified vertical cross-sectional view of a portion of a silicon carbide substrate is shown to illustrate a method for forming a silicon carbide device with a compensation structure according to an embodiment.

[0010] Figures 2A to 2C A simplified vertical cross-sectional view of a portion of a silicon carbide substrate is shown to illustrate a method for forming a silicon carbide device having a compensation layer formed on opposite sidewalls of a trench, according to an embodiment.

[0011] Figure 3 This is a schematic vertical cross-sectional view of a portion of a silicon carbide substrate having a directly adjacent n-type compensation layer formed by implantation through the sidewalls of a nearby trench.

[0012] Figure 4 It is a schematic vertical cross-sectional view of a portion of a silicon carbide substrate having a third compensation layer formed by implantation through the sidewalls of adjacent trenches.

[0013] Figures 5A to 5C A schematic vertical cross-sectional view of a portion of a silicon carbide substrate is shown to illustrate a method for fabricating a stacked silicon carbide device comprising trenches in different layers according to an embodiment.

[0014] Figure 6 This is a schematic diagram used to discuss embodiments, indicating the trench depth as a function of trench width and injection angle.

[0015] Figures 7A to 7HA schematic vertical cross-sectional view of a portion of a silicon carbide substrate is shown to illustrate a method for manufacturing a SiC SJ-T MOSFET with a single-sided channel according to an embodiment.

[0016] Figures 8A to 8F A schematic vertical cross-sectional view of a portion of a silicon carbide substrate is shown to illustrate a method for manufacturing a SiC SJ-T MOSFET having a gate electrode and a fill structure formed in the same trench according to an embodiment.

[0017] Figures 9A to 9B This is a schematic horizontal and vertical cross-sectional view of a portion of a SiC SJ-T MOSFET with a single-sided channel according to an embodiment.

[0018] Figures 10A to 10B This is a schematic horizontal and vertical cross-sectional view of a portion of a SiC SJ-T MOSFET with a single-sided channel according to another embodiment.

[0019] Figures 11A to 11B This is a schematic horizontal and vertical cross-sectional view of a portion of a SiC SJ-T MOSFET having a single-sided channel with a compensation structure orthogonal to the gate structure, according to an embodiment.

[0020] Figures 12A to 12B This is a schematic horizontal and vertical cross-sectional view of a portion of a SiC SJ-T MOSFET with dual-channel according to an embodiment.

[0021] Figures 13A to 13B This is a schematic horizontal and vertical cross-sectional view of a portion of a SiC SJ-T MOSFET with dual-channel according to another embodiment.

[0022] Figures 14A to 14B This is a schematic horizontal and vertical cross-sectional view of a portion of a SiC SJ-T MOSFET having a compensation structure including pairs of oppositely doped compensation layers according to an embodiment. Detailed Implementation

[0023] In the following detailed description, reference is made to the accompanying drawings, which form part of this document and illustrate, by way of illustration, specific embodiments in which silicon carbide devices and methods of manufacturing silicon carbide devices can be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of this disclosure. For example, features illustrated or described for one embodiment may be used in or in combination with other embodiments to produce yet another embodiment. It is intended that this disclosure include such modifications and variations. Examples are described using specific language, which should not be construed as limiting the scope of the appended claims. The drawings are not to scale and are for illustrative purposes only. Unless otherwise stated, corresponding elements are indicated by the same reference numerals in different drawings.

[0024] The terms “having,” “containing,” “including,” and “including” are open-ended, and the terms indicate the presence of the stated structure, element, or feature but do not exclude the presence of additional elements or features. The quantifiers “a,” “one,” and the pronoun “the” are intended to include both plural and singular forms unless the context clearly indicates otherwise.

[0025] The term "electrical connection" describes a permanent, low-resistance connection between electrically connected components, such as a direct contact between related components or a low-resistance connection via a metal and / or heavily doped semiconductor material. The term "electrical coupling" includes one or more intermediate elements adapted for signal and / or power transmission that can be connected between electrically coupled components, such as electrically decoupled elements that are controllable to temporarily provide a low-resistance connection in a first state and temporarily provide a high-resistance connection in a second state.

[0026] An ohmic contact is a non-rectified electrical junction with linear or nearly linear current-voltage characteristics.

[0027] Each graph illustrates the relative doping concentration by indicating "-" or "+" next to the doping type "n" or "p". For example, "n" indicates the doping concentration. - "This means a doping concentration lower than the doping concentration of the "n" doped region, while "n" + "Doped regions have a higher doping concentration than 'n' doped regions. Doped regions with the same relative doping concentration do not necessarily have the same absolute doping concentration. For example, two different 'n' doped regions can have the same or different absolute doping concentrations."

[0028] Two adjacent doped regions with the same conductivity type but different dopant concentrations form a unipolar junction, for example, along the n / n boundary between the two doped regions. + knot or p / p +Junction. At a unijunction, the dopant concentration distribution orthogonal to the unijunction can show a step point or inflection point, where the dopant concentration profile changes from concave to convex, or vice versa.

[0029] The range given for physical dimensions includes boundary values. For example, the range from a to b for parameter y is read as: a ≤ y ≤ b. This also applies to ranges with a boundary value (such as "at most" and "at least").

[0030] The main components of a layer or structure derived from a chemical compound or alloy are elements whose atoms form the chemical compound or alloy. For example, nickel and silicon are the main components of nickel silicide layers, and copper and aluminum are the main components of copper-aluminum alloys.

[0031] The term "on" is not interpreted as simply meaning "directly on". Rather, if an element is "on" another element (e.g., a layer is "on" another layer or "on" a substrate), then a further component (e.g., a further layer) may be located between the two elements (e.g., if a layer is "on" a substrate, then a further layer may be located between that layer and the substrate).

[0032] Regarding the structure and doped regions formed in the silicon carbide body, if the minimum distance between the second region and the first surface at the front side of the silicon carbide body is greater than the maximum distance between the first region and the first surface, then the second region is "below" the first region. The second region is directly "below" the first region, where the vertical projections of the first region and the second region onto the first surface overlap. The vertical projection is a projection orthogonal to the first surface. The "horizontal plane" is a plane parallel to the flat first surface or parallel to the average plane of the textured surface.

[0033] The term "power semiconductor device" refers to a semiconductor device having a high voltage blocking capability of at least 30V, such as 100V, 600V, 3.3kV or higher, and a nominal on-state current or forward current of at least 1A, such as 10A or higher.

[0034] According to an embodiment, a method of manufacturing a silicon carbide device may include providing a silicon carbide substrate.

[0035] A silicon carbide substrate may consist of or include silicon carbide disks or silicon carbide wafers cut from a single-crystal silicon carbide ingot. For example, a silicon carbide substrate may include an epitaxial layer and / or a substrate portion, wherein the substrate portion may be obtained, for example, by sawing from a single-crystal silicon carbide ingot. The diameter of the silicon carbide substrate may correspond to manufacturing standards for semiconductor wafers, and by way of example may be 2 inches (51 mm), 3 inches (76 mm), 4 inches (100 mm), 150 mm (6 inches), or 200 mm (8 inches).

[0036] By way of example, the silicon carbide substrate can be 15R-SiC (15R polytype silicon carbide), 2H-SiC, 4H-SiC, or 6H-SiC. In addition to the main components silicon and carbon, the silicon carbide substrate may include dopant atoms such as nitrogen (N), phosphorus (P), beryllium (Be), boron (B), aluminum (Al), and / or gallium (Ga). Furthermore, the silicon carbide substrate may include unwanted impurities such as hydrogen, fluorine, and / or oxygen.

[0037] A silicon carbide substrate may have two parallel, flat main surfaces of the same shape and size, and a side surface region connecting the edges of the two main surfaces. For example, a silicon carbide substrate may be a polygonal (e.g., rectangular or hexagonal) prism with or without rounded edges, or a straight cylinder with or without one or more flat faces or notches.

[0038] The silicon carbide substrate extends along a horizontal direction (hereinafter also referred to as the "lateral direction") and may have a thickness along a vertical direction orthogonal to the horizontal direction, wherein the thickness is small compared to the horizontal direction.

[0039] The silicon carbide substrate may include a drift layer of a first conductivity type and trenches extending from a first main surface into the drift layer. The drift layer may extend across the entire horizontal cross-sectional region of the silicon carbide substrate and may have a uniform vertical extension. The drift layer may be formed epitaxially and may have a range from 1 × 10⁻⁶. 15 cm -3 Up to 1×10 19 cm -3 For example, from 3×10 15 cm -3 Up to 3×10 18 cm -3 The average net dopant concentration can be within a range of 1 × 10⁻⁶. For example, the average net dopant concentration in a drift layer can range from 1 × 10⁻⁶. 15 cm -3 Up to 2×10 17 cm -3 Or from 3×10 15 cm -3 Up to 1×10 17 cm -3 The range is given by another example, where the average net dopant concentration in the drift layer can range from 1 × 10⁻⁶. 16 cm -3 Up to 1×10 19 cm -3 Within the range, for example, from 3×10 16 cm -3 Up to 3×10 18 cm -3 Within the range.

[0040] The groove can be a needle-like groove with two orthogonal lateral extensions of the same order of magnitude, or it can be a strip shape, wherein the first lateral extension is at least ten times larger than the orthogonal second lateral extension.

[0041] The first dopant can be implanted, for example, through ion beam implantation, through at least the first trench sidewall. The first dopant has a second conductivity type and forms a first compensation layer extending parallel to the first sidewall. The first compensation layer can have an approximately uniform lateral extension. The vertical extension of the first compensation layer in the drift layer can be at least 90% along the vertical extension of the trench. Within the first compensation layer, the dopant concentration can vary as a function of the distance along the horizontal direction to the first trench sidewall. For example, the lateral dopant profile in the first compensation layer can have one, two, or more local maxima. In a plane parallel to the first trench sidewall, the dopant concentration in the first compensation layer can be approximately uniform across at least 30%, at least 50%, or even at least 90% of the vertical extension of the trench. The first compensation layer can be directly adjacent to the first trench sidewall or can be formed at a distance from the first trench sidewall.

[0042] The first dopant can be implanted at a first implantation angle at which a channeling effect occurs in the silicon carbide substrate. The channeling effect occurs when the implantation axis is parallel to the crystal lattice along the principal crystal orientation that forms a continuous lattice channel. The channeling effect can also occur when the implantation axis deviates from the principal crystal orientation by no more than ±1.5°, typically no more than ±0.5°, in the case of a continuous lattice channel. Because dopant ions in the lattice channel encounter primarily small-angle scattering as they pass through several layers of crystal lattice atoms, dopant atoms can remain within the same lattice channel and penetrate significantly deeper into the substrate compared to outside the lattice channel.

[0043] For example, for 4H-SiC, the crystal orientation along which the channeling effect occurs is the <11-23> direction. For example, the axis of the ion implantation beam can be relative to... <0001> The lattice orientation is tilted at 17 degrees. Generally, for <11-23> lattice channels, there can be six relative to the lattice orientation. <0001> The ion implantation beam is oriented at a 17-degree angle. The sidewalls of the first trench can be, for example, (11-20) crystal planes. <0001> When the lattice orientation has an off-axis angle relative to the vertical direction, the ion implantation beam can be tilted by 17 degrees relative to the vertical direction plus or minus the off-axis angle (depending on the orientation of the ion implantation beam relative to the off-axis angle). For example, for an off-axis angle of 4 degrees, the ion implantation beam can be tilted by approximately 21 degrees (i.e., (17+4) degrees) or 13 degrees (i.e., (17-4) degrees) relative to the vertical direction. Furthermore, relative to... <0001> Other injection angles in the lattice orientation range from 6 degrees to 60 degrees are possible.

[0044] By forming multiple trenches and performing implantation (e.g., channelized implantation) through at least the first trench sidewall in each of the trenches, portions of the drift layer between the first compensation layers and the first compensation layer form a compensation structure that can benefit high voltage breakdown capability at low on-state resistance. The compensation structure with a relatively large vertical extension can be formed with relatively low implantation energy. The lower implantation energy of channelized implantation can facilitate the use of a relatively thin implantation mask, which can shield doped regions or structures outside the compensation structure from implantation. The trenches allow the vertical extension of the compensation layer to extend beyond the upper limit for high-energy implantation through the main surface. The first compensation layer can have a relatively narrow horizontal width so that adjacent first compensation layers can be provided with a relatively small center-to-center distance. In the case where only the first compensation layer is implemented, the doping of the epitaxially deposited drift band can be controlled in a manner to achieve sufficiently accurate drift band doping compensation. For example, the doping concentration of the epitaxially deposited drift band can be from 1 × 10⁻⁶. 16 cm -3 Up to 1×10 19 cm -3 Within the range, for example, from 3×10 16 cm -3 Up to 3×10 18 cm -3 It was selected from the range.

[0045] Channel implantation can significantly increase the extent of implanted dopant and significantly reduce the portion of ions reflected at the trench sidewalls. A larger portion of the ions is implanted along the target direction. The desired charge balance in the compensation structure can be achieved more accurately. This channeling technique can suppress or even substantially prevent potential outward diffusion of the implanted dopant during subsequent high-temperature steps.

[0046] According to an embodiment, a second dopant can be implanted through the first trench sidewall before or after the first dopant implantation. The second dopant has a first conductivity type and can form a second compensation layer. The first compensation layer and the second compensation layer can form a pn junction. For example, the first compensation layer can be formed along the first trench sidewall and can be formed between the first trench sidewall and the second compensation layer.

[0047] Alternatively, a second compensation layer can be formed between the trench sidewall and the first compensation layer. Attractive superjunction performance can be achieved even if the first compensation layer is wider than the second compensation layer. For example, in the case where the first conductivity type is n-type, a large implantation depth for aluminum ions can facilitate the formation of relatively narrow first and second compensation layers.

[0048] The dopant concentration in the second compensation layer can be significantly greater than the average dopant concentration in the drift layer. For example, the maximum dopant concentration in the second compensation layer can be at least ten times, or even at least one hundred times, the maximum dopant concentration in the drift layer. The larger the portion of the implanted dopant of the second conductivity type relative to the dopant in the drift layer, the more accurately the ratio between the two dopant types in the compensation structure can be adjusted.

[0049] According to at least one further embodiment, another silicon carbide substrate may be provided. The silicon carbide substrate may include a drift layer of a first conductivity type and trenches extending from the main surface of the silicon carbide substrate into the drift layer. A first dopant may be implanted through the first trench sidewalls. The first dopant may have a second conductivity type and may form a first compensation layer. The first compensation layer may extend parallel to the first trench sidewalls. A second dopant may be implanted through the first trench sidewalls. The second dopant may have a first conductivity type and may form a second compensation layer. The first compensation layer and the second compensation layer may form a pn junction.

[0050] For example, the first compensation layer may be formed along the sidewall of the first trench and may be formed between the first trench sidewall and the second compensation layer. Alternatively, the second compensation layer may be formed between the trench sidewall and the first compensation layer.

[0051] Compensation structures with relatively large vertical extension and relatively accurately defined charge balance can be formed with relatively low injection energy.

[0052] According to an embodiment, a first dopant can be implanted at a first implantation angle, where a channeling effect can occur in the silicon carbide substrate. Channelized implantation can significantly increase the extent of the implanted dopant and significantly reduce the portion of ions reflected at the trench sidewalls. A larger portion of the ions can be implanted along the target direction. The desired degree of charge balance in the compensation structure can be achieved more accurately. Possible outward diffusion of the implanted dopant during subsequent high-temperature steps can be suppressed or even substantially avoided.

[0053] According to an embodiment, a second dopant can be implanted at a second implantation angle at which a channeling effect occurs in the silicon carbide substrate. The second implantation angle can be the angle at which the channeling effect occurs. The first implantation angle at which the channeling effect occurs and the second implantation angle at which the channeling effect occurs can be the same angle or can be different angles. The implantation energy used to implant the second dopant can be significantly higher than the implantation energy used to implant the first dopant, such that the second dopant spatially overlaps with the first compensation layer to a low extent. The second compensation layer can be formed to be separated from the trench by the first compensation layer.

[0054] According to an embodiment, channelized implantation for the second dopant can be combined with non-channelized implantation for the first dopant to achieve a relatively small width of the first compensation layer in the lateral direction. The lateral width of the second dopant is defined by the shape of the implantation peak rather than by the implantation mask. Both the first and second compensation layers can have relatively narrow widths. If channelization is used for both the first and second dopant implantations, the second implantation angle can be equal to the first implantation angle.

[0055] According to an embodiment, a further first dopant can be implanted through a second trench sidewall, wherein the second trench sidewall is opposite to the first trench sidewall, and wherein the further first dopant forms a further first compensation layer parallel to the second sidewall. In this way, multiple doped regions of the compensation structure can be realized in each portion between adjacent trenches on the silicon carbide substrate.

[0056] According to an embodiment, a further second dopant may be implanted through the second trench sidewall. This further second dopant may form a further second compensation layer parallel to the second trench sidewall.

[0057] According to an embodiment, a further first dopant and / or a further second dopant may be implanted at an implantation angle at which a channel effect occurs in the silicon carbide substrate.

[0058] A further second compensation layer can be formed as a continuous, combined second compensation layer, wherein the portion of the silicon carbide substrate between adjacent trenches can be formed as a lightly doped portion without a drift layer.

[0059] According to an embodiment, a third dopant of a second conductivity type can be implanted through the sidewalls of the first trench at an implantation angle at which a channeling effect occurs in the silicon carbide substrate. The implantation energy can be higher than the implantation energy used to implant the first and second dopants. The third dopant can form a third compensation layer on the side of the second compensation layer that avoids the trench. In other words, the third compensation layer is formed on the side of the second compensation layer opposite to the sidewalls of the first trench through which the third dopant is implanted.

[0060] The first, second, and third dopants can also be implanted through the same or nearly identical implantation energy, implantation dose, and / or implantation angle of the second trench sidewalls adjacent to the first trench sidewalls for implanting the first, second, and third dopants through the first trench sidewalls. The two trenches can be formed with a sufficiently small distance between them such that the third dopant implanted through the first trench sidewall and the third dopant implanted through the second trench sidewall can form a combined, laterally continuous third compensation layer. The combined third compensation layer can be formed at the lateral center of the SiC region formed by the portion of the silicon carbide substrate between the two trenches.

[0061] The doping of the first, second, and third compensation layers can be individually adjusted to facilitate high charge compensation within the SiC region. According to other embodiments, one or more further implantations can be performed at implantation angles where a channel effect occurs, with increased energy and varying doping, to form a structure with multiple alternating doping types of vertical compensation layers. The compensation layers can have different widths, and the implantation dose can be individually selected to provide a desired charge balance ratio.

[0062] According to an embodiment, a filling structure can be formed in the trench. The filling structure can be formed after at least a first compensation layer has been formed. The filling structure can include semiconductor materials and / or insulating materials, such as insulating layers, insulating filler materials, intrinsic silicon carbide, and / or lightly doped silicon carbide.

[0063] A gate electrode can be formed between the main surface and the fill structure. The gate electrode can be part of a gate electrode structure including a gate electrode and a gate dielectric, wherein the gate dielectric at least separates the gate electrode from the body of a second conductivity type. Prior to forming the gate electrode structure, a silicon carbide substrate can be recessed on the front side and / or an epitaxial layer can be formed on the front side after forming a first compensation layer (and a second compensation layer, or a second and a third compensation layer, if applicable). The resulting device can be a SiC superjunction (SJ) trench MOSFET (TMOSFET) with a nominal breakdown voltage greater than 3 kV. For example, compared to a SiC TMOSFET with a lower breakdown voltage capability, the resistance of the silicon carbide portion between the transistor channel and the back electrode in a SiC SJ-TMOSFET with a nominal breakdown voltage greater than 3 kV contributes to the total on-state resistance to a significantly higher extent.

[0064] According to embodiments, a filling structure can be formed in the trench after the formation of the first compensation layer, after the formation of the first compensation layer and the second compensation layer, or after the formation of the first compensation layer, the second compensation layer, and the third compensation layer. An epitaxial layer can be formed, for example, on the main surface via epitaxy. Further trenches can be formed in the epitaxial layer and can expose the filling structure. A further first dopant can be implanted through a further first sidewall of a further trench in the epitaxial layer to form a compensation layer extension of the first compensation layer in the epitaxial layer.

[0065] In this way, the vertical extension of the superjunction structure can be increased compared to methods using energy filters combined with high or ultra-high energy injection to form compensation structures for superjunction structures in silicon carbide. The number of epitaxial layers can be significantly reduced compared to multiple epitaxial / multiple implantation processes. For example, for a silicon carbide device with a nominal breakdown voltage of 3.3 kV, multiple epitaxial / multiple implantation processes typically require five to six epitaxial layers at a maximum implantation energy of 20 MeV. By forming compensation layers along the sidewalls of the trench, it is possible to reduce the number of epitaxial layers to only three and / or significantly reduce the required implantation energy.

[0066] According to an embodiment, a first dopant or a first dopant and a second dopant may also be implanted through the main surface, and a horizontal portion of the first compensation layer or a horizontal portion of the first compensation layer and the second compensation layer may be formed at the main surface. After the formation of the first compensation layer or after the formation of the first compensation layer and the second compensation layer, the sacrificial layer including the horizontal portion may be removed.

[0067] Injection through the sidewalls can be performed without using any injection mask, as the unusable horizontal portions of the compensation layer can be removed at a low cost.

[0068] According to another embodiment, an injection mask may be formed on the main surface before the formation of the first compensation layer or before the formation of the first and second compensation layers. Openings in the injection mask can expose the trenches. The injection mask can shield portions of the main surface from tilted injection.

[0069] According to an embodiment, a fourth dopant of a second conductivity type can be implanted through the bottom of the trench. The implanted fourth dopant forms a first supplementary compensation region. Implanting the fourth dopant can include high-energy implantation through an energy filter, such that the implanted fourth dopant can have a nearly uniform energy distribution and be nearly uniformly distributed in the first supplementary compensation region. In other words, the vertical dopant profile of the first supplementary compensation region is nearly uniform ("box-shaped"). According to other embodiments, the implantation of the fourth dopant can include implantation with varying implantation energies or performed at varying implantation angles to achieve a nearly "box-shaped" dopant profile. In this way, the vertical extension of the superjunction structure can be further increased with only low additional effort.

[0070] According to at least another embodiment, the silicon carbide device may include a silicon carbide body. The silicon carbide device may be a power semiconductor device, such as a semiconductor diode, an MPS (merged pin Schottky) diode, a MOSFET (metal-oxide-semiconductor field-effect transistor), an insulated-gate bipolar transistor (IGBT), or an MGD (MOS gate-controlled diode). The silicon carbide body may include single-crystal SiC.

[0071] The gate structure can extend from a first surface of the silicon carbide body into the silicon carbide body. The gate structure can include at least a gate electrode and a gate dielectric, wherein the gate dielectric is formed between the gate electrode and the silicon carbide body. In addition to the gate dielectric and gate electrode, the gate structure may also include further conductive and dielectric structures.

[0072] A fill structure can be formed between the gate structure and the second surface of the silicon carbide body, wherein the second surface is opposite to the first surface. The fill structure can be formed in the portion of the silicon carbide body below the gate structure. The bottom surface of the gate structure, oriented to the second surface, can contact the top surface of the fill structure.

[0073] A compensation region of the first conductivity type can be formed in the silicon carbide body between the gate structure and the second surface. The compensation region can be formed horizontally relative to the fill structure. For example, the compensation region can be formed laterally between two adjacent fill structures. If the doping level of the fill structure is sufficiently high and well controlled, the fill structure can be part of the compensation structure.

[0074] A first compensation layer of the second conductivity type can be formed in the silicon carbide body between the first sidewall of the filling structure and the compensation region. The first compensation layer can be a vertical layer extending parallel to the first sidewall of the filling structure. The first compensation layer can be directly adjacent to the first sidewall, or it can be formed at a certain distance from the first sidewall. The first compensation layer can be in direct contact with the compensation region, or it can be formed at a certain distance from the compensation region.

[0075] The first compensation layer and compensation region can form part of a superjunction structure with relatively well-defined charge compensation and a small center-to-center distance between doped pillars of the same conductivity type. The superjunction structure can contribute to reducing on-state resistance without sacrificing voltage blocking capability.

[0076] A second compensation layer of the first conductivity type can be formed in the silicon carbide body. The second compensation layer can extend parallel to the first sidewall. The first and second compensation layers can form a pn junction. For example, the second compensation layer can be formed on the side of the first compensation layer that avoids the filling structure, such that the first compensation layer is between the filling structure and the second compensation layer. Alternatively, the second compensation layer is formed between the filling structure and the first compensation layer.

[0077] The second compensation layer may form part of, or may completely form, the compensation region of the first conductivity type. Alternatively, the second compensation layer may be laterally separated from the compensation region of the first conductivity type.

[0078] The maximum dopant concentration in the second compensation layer can be at least 10. 16 cm -3 Or at least 3×10 16 cm -3 At least 10 17 cm -3 Or even at least 1×10 18 cm -3 High dopant concentrations in both types of doped pillars of a superjunction structure can result in low on-state resistance in the current-carrying path.

[0079] According to an embodiment, the maximum dopant concentration in the first compensation layer may be, for example, at least 10. 16 cm -3 Or at least 3×10 16 cm -3 At least 10 17 cm -3 or even at least 1×10 18 cm -3 High dopant concentrations in doped pillars of a superjunction structure including multiple first compensation layers can contribute to low on-state resistance in the current-carrying path.

[0080] According to an embodiment, a doped horizontal layer can be formed in the silicon carbide body between the filling structure and the second surface. The doped horizontal layer can have a first conductivity type, or can include a first portion of the first conductivity type and a second portion of the second conductivity type alternating along at least one horizontal direction. The horizontal layer and the first compensation layer can form a first tilted junction, wherein the first tilted junction can extend in a first junction plane. The first tilt angle between the first tilted junction and the vertical direction deviates from the angle between the lattice direction along which the channeling effect occurs and the vertical direction by no more than ±5 degrees. For example, the tilted junction can extend in a plane parallel to the crystal orientation in which the channeling effect occurs. The crystal orientation in which the channeling effect occurs can be one of the crystal orientations described above.

[0081] The first tilted junction can be a unipolar junction or a pn junction. The first tilted junction can be defined by channelization implantation, wherein the implanted dopant ions stop at a relatively high distance from the first sidewall.

[0082] For example, the silicon carbide body may include 4H-SiC, wherein the first surface is for <0001> The lattice orientation has an off-axis angle of approximately 4°. The first tilted junction... <0001> The lattice orientation can have an angle of approximately 17°. The first tilted junction can be tilted approximately 21 degrees or approximately 13 degrees with respect to the vertical direction. The crystal orientation used for the channel effect can be the <11-23> orientation, where a relatively low injection energy is sufficient to form a relatively wide first compensation layer.

[0083] According to an embodiment, the horizontal layer and the second compensation layer can form a second tilted junction, wherein the second tilted junction can extend along the plane of the second junction. The second tilt angle between the second tilted junction and the vertical direction deviates from the angle between the lattice direction along which the channeling effect occurs and the vertical direction by no more than ±5 degrees. For example, the second tilted junction can extend in a plane parallel to the crystal orientation in which the channeling effect occurs. The crystal orientation in which the channeling effect occurs can be one of the crystal orientations described above.

[0084] The second tilt junction can be a unipolar junction or a pn junction. The second tilt junction can be defined by channelization implantation, wherein the implanted dopant ions stop at a relatively high distance from the first sidewall. The second tilt angle can be equal to the first tilt angle.

[0085] According to an embodiment, the silicon carbide body may include a shielding region of a second conductivity type, wherein at least a portion of the shielding region is formed between the gate structure and the second surface. The shielding region can reduce the electric field in the gate dielectric and can contribute to improving the reliability of the gate dielectric.

[0086] According to an embodiment, the shielding region may contact at least a portion of the bottom surface of the gate structure and the first compensation layer. The shielding region can effectively reduce the electric field in the gate dielectric and simultaneously contribute to the electrical connection of the first compensation layer to the first load electrode at the front side of the silicon carbide body.

[0087] According to an embodiment, a further first compensation layer of the second conductivity type may extend along the second sidewall of the filled structure. The second sidewall of the filled structure is opposite to the first sidewall. The compensation layer of the second conductivity type formed on the two opposite sidewalls allows for a smaller lateral center-to-center distance between adjacent doped pillars of the superjunction structure and can increase the efficiency of the superjunction structure.

[0088] According to an embodiment, a first supplementary compensation region of the second conductivity type can be formed in the silicon carbide body between the filler structure and the second surface. The first supplementary compensation region can contact the bottom surface of the filler structure and the first compensation layer. The vertical dopant profile of the first supplementary compensation region can be approximately uniform ("box-shaped").

[0089] The first supplementary compensation structure can increase the overall vertical extension of the superjunction structure, wherein the first compensation structure can be formed in an efficient manner by implanting ions through the bottom of a temporarily formed trench (in which a filling structure is formed in a later stage). Furthermore, the first compensation structure can effectively electrically connect to the first compensation layer formed on the opposite side of the filling structure.

[0090] According to an embodiment, the horizontal axis of the gate structure can be tilted relative to the horizontal axis of the fill structure. For example, the horizontal axis of the gate structure can be orthogonal to the horizontal axis of the fill structure. In other words, the gate structure can travel perpendicular to the fill structure. The center-to-center distance in the lateral direction between adjacent gate structures can be decoupled from the center-to-center distance in the lateral direction between adjacent gate structures. Decoupling the two center-to-center distances from each other can relax processing requirements.

[0091] According to embodiments, the filling structure may include a dielectric material. For example, the filling structure may include an insulating layer extending parallel to the sidewalls of the filling structure, wherein the insulating layer may include one or more dielectric materials. The filling structure may include a filling portion that fills the center of the filling structure, wherein the filling structure may include one or more dielectric materials. The filling structure may include a semiconductor structure, such as intrinsic silicon carbide and / or doped crystalline silicon carbide or other conductive structures, wherein the other conductive structures may be insulating to the silicon carbide body. The insulating material can improve the voltage breakdown capability of the filling structure.

[0092] Figures 1A to 1CA method for fabricating a silicon carbide device from a silicon carbide substrate 700 is disclosed. A main surface 701 on the front side of the silicon carbide substrate 700 may be flat or textured. In the case of a textured main surface 701, for simplicity, the flat average surface of the textured main surface is referred to below as the main surface 701, wherein the average surface has the minimum distance to all points on the textured surface. The main surface 701 extends along a horizontal direction (hereinafter also referred to as the "lateral" direction) and is orthogonal to the vertical direction 104.

[0093] The following embodiments relate to the fabrication of a silicon carbide device having an n-channel transistor cell (having an n-doped source region and a p-doped body region). Therefore, the conductivity type—or first conductivity type—of the source region is n-type, and the conductivity type—or second conductivity type—of the body region is p-type. Other embodiments may relate to SiC devices having a p-channel transistor cell (having a p-doped source region and an n-doped body region).

[0094] The silicon carbide substrate 700 includes a drift layer 730. The drift layer 730 has a first conductivity type and may be uniformly doped or may have a non-uniform vertical dopant profile. The drift layer 730 may be an epitaxial layer or may include epitaxially grown vertical segments. The maximum dopant concentration in the drift layer 730 may be up to 10⁻⁶. 17 cm -3 The vertical extension of the drift layer 730 can be at least 5 μm, at least 10 μm, or even at least 15 μm.

[0095] Trench 770 extends from main surface 701 into drift layer 730. Laterally separated portions of the silicon carbide substrate 700 from adjacent trenches 770 form SiC portions 190. Trench 770 may be strip-shaped, having a horizontal longitudinal extension orthogonal to the cross-sectional plane. The horizontal longitudinal extension of trench 770 may be at least ten times the trench width w1. Alternatively, trench 770 may have two orthogonal horizontal dimensions within the same order of magnitude, for example, having approximately equal orthogonal horizontal dimensions, wherein the horizontal cross-section of trench 770 may be circular or a regular polygon, such as a square.

[0096] The trench depth v1 can range from 1 μm to 10 μm (e.g., from 2 μm to 6 μm). The trench width w1 can range from 200 nm to 5 μm or from 500 nm to 2 μm. By way of example, the trench aspect ratio v1:w1 can range from 0.2 to 50, or from 0.3 to 25, or from 0.5 to 5. The trench aspect ratio can depend on the injection angle. For example, in some examples, especially for... <0001> With respect to the injection angle in the lattice orientation, the trench aspect ratio can be at least 3.0 and at most 3.6. The trench spacing p1 or center-to-center distance between adjacent trenches 770 can range from 0.5 μm to 20 μm or from 1 μm to 10 μm.

[0097] The first dopant is implanted through the first trench sidewall 771 via ion beam implantation. A first implantation angle γ1 between the ion beam axis 801 and the vertical direction 104 can be selected such that the ion beam axis 801 is parallel to, or deviates from, the lattice direction along which the trench effect occurs in the silicon carbide substrate 700 by no more than 2° (typically no more than 1.5°, 1°, or even 0.5°). The trench aspect ratio v1:w1 can be selected such that tilted implantation is uniformly effective across the entire trench depth v1.

[0098] As in Figure 1A As shown, the implanted first dopant forms a first compensation layer 181 of the second conductivity type. The first compensation layer 181 includes a vertical portion extending parallel to the first trench sidewall 771 and a horizontal portion extending parallel to the main surface 701.

[0099] A second dopant of the first conductivity type can be implanted through the first trench sidewall 771 before or after the first dopant. The implantation of the second dopant can be channelized implantation and / or can use a higher implantation energy compared to the implantation of the first dopant.

[0100] The second implantation angle γ2 between the ion beam axis 801 and the vertical direction 104 can be selected such that the ion beam axis 801 is parallel to or deviates from the lattice direction along which it generates a channeling effect in the silicon carbide substrate 700 by no more than 2° (typically no more than 1.5°, 1°, or even 0.5°). The second implantation angle γ2 may deviate from or be equal to the first implantation angle γ1.

[0101] according to Figure 1BA second dopant forms a second compensation layer 182b of a first conductivity type at a first distance d1 from the first trench sidewall 771. The lateral width w3 of the second compensation layer 182b can be less than, equal to, or greater than the first distance d1. The second compensation layer 182b may include a horizontal portion extending parallel to the main surface 701 and a vertical portion extending parallel to the first trench sidewall 771. In each SiC portion 190, the region unaffected by tilted implantation forms a second compensation portion 182a doped with the first conductivity type.

[0102] The horizontal portions of the first compensation layer 181 and the second compensation layer 182b can be removed, for example, by etching or by CMP (chemical mechanical polishing). The trench 770 can be filled before or after the removal of the horizontal portions.

[0103] Figure 1C The diagram shows a silicon carbide substrate 700 after the horizontal portions of the first compensation layer 181 and the second compensation layer 182b have been removed. Each SiC portion 190 includes two oppositely doped pillars of the compensation structure 180, wherein the compensation structure 180 forms a superjunction structure. For example, in each SiC portion 190, the second compensation layer 182b and the second compensation portion 182a may form an n-doped pillar of the superjunction structure, and the first compensation layer 181 may form a p-doped pillar of the superjunction structure.

[0104] When the trench 770 is filled with insulating material(s), the p-doped pillars and n-doped pillars of the compensation structure 180 in each SiC portion 190 can be charged balanced to a predetermined degree, wherein in the horizontal cross-sectional plane of the SiC portion 190, the donor surface integral from one trench 770 to an adjacent trench 770 deviates from the acceptor surface integral across the same distance by no more than ±20% (or no more than ±10% or even no more than ±5%; optionally at least 2%).

[0105] When trench 770 is filled with doped semiconductor material, the doped semiconductor material in trench 770 can form part of the p-type pillars or further n-type pillars of compensation structure 180. The filling structure can be part of the compensation structure; this may require the doping level of the filling structure to be sufficiently high and well controlled. In the case of an n-doped filling structure, the filling structure can contribute to the flow of load current.

[0106] In the horizontal cross-sectional plane, the donor surface integral from the first trench sidewall 771 of the trench 770 to the adjacent first trench sidewall 771 of the trench 770 deviates from the acceptor surface integral across the same distance by no more than ±20% (or no more than ±10% or even no more than ±5%).

[0107] Figures 2A to 2CThe diagram illustrates channeling implantation of a second dopant of a first conductivity type into two opposing first trench sidewalls 771 and second trench sidewalls 772, wherein the channeling implantation precedes two channeling or non-channeling implantations of the first dopant of the second conductivity type into the two trench sidewalls 771, 772.

[0108] like Figure 2A As shown in the diagram, the second dopant forms a second compensation layer 182b at a distance d1 from the first trench sidewall 771 and from the second trench sidewall 772.

[0109] Figure 2B The first compensation layer 181 is shown being formed between the second compensation layer 182b and the first trench sidewall 771, and between the second compensation layer 182b and the second trench sidewall 772.

[0110] Figure 2C The diagram shows a silicon carbide substrate 700 after the horizontal portions of the first compensation layer 181 and the second compensation layer 182b have been removed. Each SiC portion 190 includes three doped pillars of the compensation structure 180. For example, in each SiC portion 190, the first compensation layer 181 forms two p-doped pillars of the compensation structure 180, and the second compensation layer 182b and the second compensation portion 182a form a laterally continuous n-doped pillar of the compensation structure 180.

[0111] In the horizontal cross-sectional plane, the donor surface integral from the first trench sidewall 771 of trench 770 to the adjacent first trench sidewall 771 of trench 770 deviates from the acceptor surface integral from the first trench sidewall 771 of trench 770 to the adjacent first trench sidewall 771 of trench 770 by no more than ±20% (or no more than ±10% or even no more than ±5%; optionally at least 2%).

[0112] exist Figure 3 In this process, the trench spacing p1 and the trench aspect ratio v1:w1 are selected such that the second compensation layer 182b formed by ion implantation through the first trench sidewall 771 of the left trench 770 and the second compensation layer 182b formed by ion implantation through the second trench sidewall 772 of the right trench 770 are directly adjacent to each other or overlap each other, forming a horizontally continuous n-type second compensation region 182 with a high dopant concentration.

[0113] also, Figure 3An implantation mask 430 is shown formed on a first main surface 701. For implantation energy used for sidewall implantation, the implantation mask 430 blocks the implantation of dopant through the main surface 701. The implantation mask 430 completely covers the SiC portion 190 between trenches 770 and can be formed by at least a vertical portion of a trench etching mask used to form the trenches 770. By way of example, forming the trenches 770 can include reactive ion beam etching.

[0114] exist Figure 4 In this structure, a third compensation layer 181b of the second conductivity type is formed between two second compensation layers 182b, which are formed in the same SiC portion 190. Channelization implantation can form the third compensation layer 181b. The implantation for the second compensation layers 182b and the third compensation layer 181b can use the same implantation angle.

[0115] With the increase in the lateral density of the n-type and p-type pillars, the dopant concentration of each pillar can be further increased, where the higher dopant concentration in the n-type second compensation region can contribute to a further reduction in the on-state resistance.

[0116] Figures 5A to 5C The diagram illustrates the multiple epitaxial / multiple injection processes used to form the compensation structure 180.

[0117] Figure 5A A silicon carbide substrate 700 is shown having a first compensation layer 181 and a second compensation layer 182b formed on opposing first trench sidewalls 771 and second trench sidewalls 772, as shown in the figure. Figures 2A to 2C As described. It can fill groove 770, and can be in... Figure 5A An epitaxial layer 780 is formed on the main surface 701 of the silicon carbide substrate 700.

[0118] Figure 5B Epitaxial layer 780 is shown, wherein the top surface of epitaxial layer 780 forms the main surface 701 of silicon carbide substrate 700. Filling Figure 5A The filling structure 170 of the trench 770 may or may not include epitaxial silicon carbide.

[0119] Further trenches 785 are formed in the epitaxial layer 780, wherein each further trench 785 exposes one of the fill structures 170. A first compensation layer extension 181d of a first compensation layer 181 and a second compensation layer extension 182d of a second compensation layer 182b are formed by inclined injection of the exposed first sidewalls 781 and second sidewalls 782 of the further trenches 785. The further trenches 785 can be filled using further fill structures. The fill structures 170 and the further fill structures in the further trenches 785 can be made of the same material or different materials; for example, the fill structure 170 can be SiC and the further fill structure in the further trenches 785 can be an isolation layer.

[0120] The injection dose and injection energy used to form the compensation layer extensions 181d and 182d can be equal to those used to form... Figure 5A The injection dose and injection energy of the first compensation layer 181 and the second compensation layer 182b may be different. For example, the injection dose for at least one injection may be different to vary the degree of compensation along the vertical direction in a predetermined manner.

[0121] For example, the section with compensation layer extensions 181d and 182d can be more p-rich than the section with the first compensation layer 181 and the second compensation layer 182b. In other words, in the horizontal plane intersecting the compensation layer extensions 181d and 182d, the integral p-doping along the horizontal line can be greater than, and even greater than, the integral n-doping in the horizontal plane intersecting the first compensation layer 181 and the second compensation layer 182b. In the horizontal plane intersecting the first compensation layer 181 and the second compensation layer 182b, the integral p-doping along the horizontal line can be less than the integral n-doping ("n-rich"), the integral p-doping can be equal to the integral n-doping ("perfectly balanced"), or the integral p-doping can be greater than the integral n-doping ("p-rich").

[0122] exist Figure 6 In the middle, line 401 shows the target for... <0001> The maximum vertical extension v1 of the trench as a function of the trench width w1 is calculated for an injection angle of 17° in the lattice direction (e.g., at an off-axis angle of 4°, or 21° or 13° for the vertical direction). Line 402 shows the maximum vertical extension v1 of the trench for an injection angle of 25°, and line 403 shows the maximum trench width w1 for an injection angle of 30°.

[0123] Figures 7A to 7H This relates to the fabrication of SiC SJ-TMOSFETs (SiC Superjunction Trench MOSFETs) with a single-sided channel.

[0124] The silicon carbide substrate 700 may include a drift layer 730 having a main drift portion 731 of a first conductivity type and a base portion 710 between the drift layer 730 and the back surface 702. At least a portion of the drift layer 730 may be formed epitaxially. The base portion 710 may include a portion obtained from a crystal ingot by sawing or may be formed by epitaxial processing. At least a portion of the base portion 710 may have a higher dopant concentration than the drift layer 730. The drift layer 730 may be uniformly doped or may show a dopant profile that varies vertically. For example, the drift layer 730 may include a main drift portion 731 and a doped horizontal layer 735, wherein the horizontal layer 735 is between the main drift portion 731 and the base portion 710. The average dopant concentration in the horizontal layer 735 may be equal to or higher than the average dopant concentration in the main drift portion 731. The horizontal layer 735 may be a buffer layer or a drain zone or a combination of both.

[0125] A first mask layer may be deposited on the main surface 701 of the front side of a silicon carbide substrate 700. A second mask layer may be deposited on the first mask layer. Each of the first and second mask layers may be a homogeneous layer or may include two or more sublayers. By way of example, each of the first and second mask layers may include silicon nitride, silicon oxide, and / or carbon.

[0126] A photosensitive layer can be deposited on a second mask layer. The photosensitive layer can be patterned by lithography to form a resist mask 410 with openings exposing sections of the second mask layer. The resist mask 410 can be used to pattern the first and second mask layers.

[0127] Figure 7A A mask opening 470 is shown extending through the first and second mask layers and exposing the main surface 701. The remainder of the first mask layer forms the injection mask 430. The remainder of the second mask layer forms the second mask 420.

[0128] The remainder of the resist mask 410 can be removed. The trench 770 can be formed in the exposed section of the main surface 701, for example, by ion beam etching.

[0129] Figure 7BA trench 770 is shown extending into the drift layer 730, for example, into the main drift portion 731. The trench 770 may expose a horizontal layer 735, wherein the vertical extension v1 of the trench 770 may be at least 50% or at least 70% of the thickness of the main drift portion 731, or may even be equal to the thickness of the main drift portion 731. The trench 770 may have a vertical or near-vertical first trench sidewall 771 and a second trench sidewall 772. For example, the trench 770 may be tapered, wherein the first trench sidewall 771 and the second trench sidewall 772 may have a taper angle of up to 10° relative to the vertical direction 104. A portion of the silicon carbide substrate 700 in the lateral direction between adjacent trenches 770 forms a SiC portion 190.

[0130] Implanting a dopant of the second conductivity type into the horizontal layer 735 through the bottom of trench 770 or into the unstructured bottom portion of the main drift portion 731 (the latter not shown in the figures), including a mask stack of implantation mask 430 and second mask 420 sufficiently thick to completely shield the SiC portion 190 from implantation. Implantation of the dopant of the second conductivity type can include an implantation process that forms a doped region in silicon carbide with a relatively uniform vertical dopant profile. For example, the implantation process can include high-energy implantation using an energy filter that flattens the energy distribution in the implantation beam. Alternatively, implantation can use a steadily varying implantation energy and / or a steadily varying implantation angle.

[0131] Figure 7C A first supplementary compensation region 281 is shown formed in a horizontal layer 735 below trench 770. A second supplementary compensation region 282 is formed in the portion of the doped horizontal layer 735 between the first supplementary compensation regions 281. The implantation parameters used to form the first supplementary compensation regions 281 are selected such that a desired degree of charge balance is achieved in the horizontal plane passing through the first and second supplementary compensation regions 281 and 282. For example, in each horizontal plane of the doped horizontal layer 735, the donor concentration integrated laterally across the compensation region 282 deviates from the acceptor concentration integrated laterally in the first supplementary compensation region 281 by no more than ±20%, or preferably no more than ±10%, for example, no more than ±5%.

[0132] The second mask 420 can be removed. One or more tilt injections (e.g., channelized injections as described above) can form a first compensation layer 181 along the second trench sidewall 772. The tilt injections may or may not use the channeling effect.

[0133] according to Figure 7DThe thickness of the injection mask 430 is sufficient to block dopant from entering the silicon carbide substrate 700 through the main surface 701. Below the trench 770, the first compensation layer 181 and the first supplementary compensation region 281 of the doped horizontal layer 735 form a first tilted junction 291 adjacent to the bottom of the trench. The first tilt angle φ1 between the first tilted junction 291 and the vertical direction 104 deviates from the angle between the vertical direction 104 and the lattice direction along which the channeling effect occurs by no more than ±5 degrees.

[0134] One or more further inclined injections, as described above, can form a first compensation layer 181 along the first trench sidewall 771. The further inclined injections can be symmetrical or asymmetrical with respect to the vertical center plane of the trench 770 and the first inclined injection, wherein the vertical center plane extends orthogonally to the cross-sectional plane. For example, when <0001> The lattice orientation is not tilted relative to the vertical direction 104 or when <0001> When the lattice orientation is tilted with respect to the vertical direction in a plane orthogonal to the cross-sectional plane, the first tilt injection and further tilt injections can be symmetrical with respect to the vertical central plane (i.e., the same angle magnitude but different angle signs). For example, when <0001> When the lattice orientation is tilted relative to the vertical direction 104 in the cross-sectional plane, the first tilt injection and further tilt injections can be asymmetric (i.e., different angle sizes and different angle signs). The injection mask 430 can be removed.

[0135] Figure 7E A first compensation layer 181 is shown formed along the first trench sidewall 771 and the second trench sidewall 772. Below the trench 770, the first compensation layer 181 and the horizontal layer 735 and / or the unstructured bottom portion of the first compensation layer 181 and the main drift portion 731 can form a first tilted junction 291. The first tilted junction 291 can extend from the bottom of the trench toward the rear surface 702 of the silicon carbide substrate 700, where the rear surface 702 is opposite the main surface 701. The first tilt angle φ1 between the vertical extension 104 and the first tilted junction 291 can be greater than the injection angle. The two first tilted junctions 291 below the bottom of the trench can be symmetrical with respect to the vertical extension 104, or the first tilt angle φ1 can be asymmetrical with respect to the vertical center plane of the trench 770. For example, the first tilt angle φ1 below the two trench sidewalls 771, 772 can be relative to... <0001> The crystal lattice is symmetrical.

[0136] The trench 770 is filled. A first dopant is injected through the main surface 701 to form a deep shielding portion 168 in the main drift portion 731.

[0137] Figure 7E It shows that it is completely filled. Figure 7EThe trench 770 illustrated in the figure has a filling structure 170. The filling structure 170 may include an insulating material. For example, the filling structure 170 may be formed entirely of silicon oxide, or it may include at least one dielectric material different from silicon oxide, wherein the overall temperature coefficient of the filling structure 170 may be closer to the temperature coefficient of single-crystal silicon carbide than that of silicon oxide. For example, the filling structure 170 may include at least one of silicon nitride and silicon oxide, such as silicon oxide formed using TEOS (tetraethyl n-silane) as a precursor material, HDP (high-density plasma) silicon oxide, and / or a densified oxide after deposition. According to a further example, the filling structure 170 may include or be composed of doped or undoped crystalline silicon carbide. For example, a first vertical section of the filling structure 170 may include or be composed of silicon carbide, and a second vertical section of the filling structure 170 may include or be composed of a dielectric material. The second vertical section may be between the first vertical section and the main surface 701.

[0138] The deep shielding portion 168 extends along the main surface 701. Each deep shielding portion 168 is laterally adjacent to or overlaps with one of the first compensation layers 181.

[0139] The epitaxial top layer 790 can be formed in Figure 7E The doped regions are formed on the main surface 701 of the silicon carbide substrate 700. Formation of the doped regions may include ion implantation.

[0140] Figure 7G The epitaxial top layer 790 is shown. After epitaxy, the exposed top surface of the epitaxial top layer 790 forms the main surface 701 of the silicon carbide substrate 700. In the epitaxial top layer 790, a main shielding portion 165 extends downward from the main surface 701 to a deep shielding portion 168. Each pair of main shielding portions 165 and deep shielding portions 168 forms a continuous shielding region 160. Between adjacent shielding regions 160, the epitaxial top layer 790 includes a source region 110 of a first conductivity type, a body region 120 of a second conductivity type, and a current spreading region 132 of a first conductivity type. The source region 110 is formed along the main surface 701. The current spreading region 132 is formed along a main drift portion 731. Each body region 120 contacts the shielding region 160 laterally and separates the source region 110 from the current spreading region 132 vertically.

[0141] Gate trenches can be etched from the main surface 701 into the silicon carbide substrate 700, wherein the gate trenches can be strip-shaped or needle-shaped. Needle-shaped gate trenches have two orthogonal lateral dimensions within the same order of magnitude. Needle-shaped gate trenches can be combined with needle-shaped fill structures 170. Strip-shaped gate structures can be combined with needle-shaped fill structures 170. Alternatively, strip-shaped gate structures can be combined with strip-shaped fill structures 170, wherein the horizontal axis of the strip-shaped gate structure 150 can be parallel to the horizontal axis of the fill structure 170, or can be tilted relative to the horizontal axis of the fill structure 170. For example, the horizontal axis of the strip-shaped gate structure 150 can travel orthogonally to the horizontal axis of the fill structure 170.

[0142] A gate dielectric 159 can be formed to pad the gate trench. A conductive material can be deposited to form a gate electrode 155 in the gate trench.

[0143] Figure 7H A strip-shaped gate structure 150 and a strip-shaped fill structure 170 are shown. The gate structure 150 is formed directly on the fill structure 170. The gate structure 150 includes a gate electrode 155 and a gate dielectric 159 between the gate electrode 155 and the silicon carbide substrate 700. For example, the gate dielectric 159 can completely separate the gate electrode 155 from the silicon carbide substrate 700.

[0144] Body region 120 contacts the active first gate sidewall 151 of gate structure 150. Shielding region 160 contacts the opposing non-active second gate sidewall 152 of gate structure 150. In the on-state of the silicon carbide device obtained from silicon carbide substrate 700, an inversion channel is formed along the gate dielectric 159 passing through body region 120. The inversion channel may be formed parallel to a lattice direction (e.g., a <11-20> plane) having high charge carrier mobility. Deep shielding portion 168 connects the first compensation layer 181 and the main shielding portion 165.

[0145] The compensation structure 180 between the gate structure 150 and the substrate portion 710 includes a first vertical segment in the main drift portion 731 and a second vertical segment in the horizontal layer 735. In the SiC portion 190 between adjacent fill structures 170, the first vertical portion includes a p-type pillar (which includes a first compensation layer 181) and an n-type pillar (which includes a second compensation portion 182a). The second vertical portion includes a first supplementary compensation region 281 directly below the fill structure 170 as a p-type pillar, and includes a second supplementary compensation region 282 directly below the second compensation portion 182a in the main drift portion 731 as an n-type pillar.

[0146] Figures 8A to 8F The illustration shows an embodiment of a transistor cell with a single-sided channel, wherein a gate structure is formed in a trench, and the trench is used for tilting injection to form a compensation structure.

[0147] For reference Figure 7A As described, a shielding region 160 and a source region 110 are formed by implantation of the main surface 701 of a silicon carbide substrate 700 having a drift layer 730 and a base portion 710, and a body region 120 is defined.

[0148] Figure 8A A p-doped shielding region 160 is shown extending from the main surface 701 into the silicon carbide substrate 700. The shielding region 160 may be strip-shaped, with its horizontal vertical axis orthogonal to the cross-sectional plane. The shielding regions 160 may form a regular strip pattern of strips with equal widths and at equal distances. Between the shielding regions 160, an n-doped source region 110 extends along the main surface 701. A p-doped body region 120 extends from one adjacent shielding region 160 to an adjacent shielding region 160, wherein each body region 120 separates the source region 110 from the main drift portion 731. The vertical extension of the shielding region 160 may be greater than the distance between the main surface 701 and the edges of the body regions 120 oriented towards the rear surface 702. The maximum dopant concentration in the shielding region 160 may be higher than the maximum dopant concentration in the body region 120.

[0149] For reference Figure 7A As described, a mask stack can be formed on the main surface 701. (See reference...) Figure 7B The trench 770 is formed as described, wherein the first trench sidewall 771 exposes the body region 120 and the source region 110 in the lateral direction, and wherein the second trench sidewall 772 exposes the shielding region 160 in the lateral direction. The n-doped first compensation layer 181, the p-doped first supplementary compensation region 281, and the n-doped second supplementary compensation region 282 of the compensation structure 180 are as described with reference to... Figures 7C to 7E The formation of the first compensation layer 181 may include channelization injection.

[0150] Figure 8B A trench 770 is shown extending downwards from the main surface 701 to the horizontal layer 735 or downwards to the main drift portion 731, representing an unstructured bottom portion. The compensation structure 180 includes a first compensation layer 181, a second compensation portion 182a, a first supplementary compensation area 281, and a second supplementary compensation area 282, as shown in reference. Figure 7EAs described. The first compensation layer 181 along the first trench sidewall 771 contacts the source region 110, the body region 120, and the first supplementary compensation region 281. The first compensation layer 181 along the second trench sidewall 772 contacts the shielding region 160 and the first supplementary compensation region 281.

[0151] The filler structure 170 may be formed in the bottom portion of the trench 770. Forming the filler structure 170 may include epitaxial growth and / or deposition of one or more filler materials and / or filler layers.

[0152] Figure 8C Show filling Figure 8B The bottom portion of the groove 770 is filled with the structure 170. Figure 8B The top portion of the trench 770 forms the gate trench 750. The gate trench 750 can be reconfigured. Reconfiguration may include removing or modifying the portion of the first compensation layer 181 between the main surface 701 and the fill structure 170.

[0153] Figure 8D The reconfigured gate trench 750 is shown. The reconfigured gate trench 750 can taper with increasing distance from the main surface 701. The first gate trench sidewall 751 of the gate trench 750 exposes the body region 120, the source region 110, and the main drift portion 731 laterally. The second gate trench sidewall 752 of the gate trench 750 exposes the shielding region 160 and / or the first compensation layer 181 laterally. The vertical extension of the gate trench 750 is less than the vertical extension of the shielding region 160 and greater than the distance between the lower edge of the body region 120 and the main surface 701.

[0154] The gate dielectric 159 may be formed at least along the first gate trench sidewall 751 of the gate trench 750. The formation of the gate dielectric 159 may include oxidation and / or deposition processes.

[0155] Figure 8E A gate dielectric 159, formed at least partially by deposition or exclusively by thermal oxidation, is shown, wherein the fill structure 170 comprises silicon carbide. Conductive material may be deposited in the gate trench 750.

[0156] Figure 8F Shown by in Figure 8E The gate electrode 155 is formed from the remainder of the conductive material deposited in the gate trench 750. By way of example, the gate electrode 155 may comprise doped polysilicon.

[0157] Figure 9A and Figure 9BA silicon carbide device 500 is shown, including a transistor unit TC and a compensation structure 180. The silicon carbide device 500 includes a silicon carbide body 100, which can be constructed as described above regarding... Figures 1A to 1C , Figures 2A to 2C , Figure 3 , Figure 4 , Figures 5A to 5C , Figures 7A to 7H or Figures 8A to 8F A portion of the described silicon carbide substrate 700 is formed, wherein a portion of the main surface 701 of the silicon carbide substrate 700 forms a first surface 101 on the front side of the silicon carbide body 100. The first surface 101 is parallel to a second surface 102 of the silicon carbide body 100 on the rear side of the silicon carbide body 100. The thickness of the silicon carbide body 100 is given along the vertical direction 104.

[0158] The transistor cell TC is formed along a strip-shaped trench gate structure 150 extending from the first surface 101 into the silicon carbide body 100. The gate structure 150 may be a long strip extending through the active region of the silicon carbide device 500 in a longitudinal direction in the lateral direction. In other embodiments, the lateral cross-section of the gate structure 150 may be, for example, hexagonal or square.

[0159] The gate structure 150 includes a conductive gate electrode 155, which may include a heavily doped polysilicon layer and / or a metal-containing layer, or may be composed of a heavily doped polysilicon layer and / or a metal-containing layer. A gate dielectric 159 separates the gate electrode 155 from the silicon carbide body 100 along at least one side of the gate structure 150. The gate dielectric 159 may include thermally grown or deposited silicon oxide, silicon nitride, silicon oxynitride, additional deposited dielectric materials, or any combination thereof, or may be composed of the foregoing. The thickness of the gate dielectric 159 can be selected to obtain a transistor cell TC having a threshold voltage in the range of 1.0V to 8V. The gate structure 150 may exclusively include the gate electrode 155 and the gate dielectric 159, or may include further conductive and / or dielectric structures in addition to the gate electrode 155 and the gate dielectric 159.

[0160] The gate structure 150 is strip-shaped. That is, the length of the gate structure 150 along the first transverse direction is greater than the width of the gate structure 150 along the second transverse direction orthogonal to the first direction.

[0161] Gate structures 150 may be equally spaced, have equal widths, and form a regular stripe pattern, wherein the center-to-center distance between gate structures 150 may range from 1 μm to 10 μm (e.g., from 2 μm to 5 μm). The length of gate structures 150 may reach several millimeters. The vertical extension of gate structures 150 may range from 0.3 μm to 5 μm, for example, from 0.5 μm to 2 μm. At the bottom, gate structures 150 may have rounded corners.

[0162] The opposing first gate sidewall 151 and second gate sidewall 152 of each gate structure 150 may substantially travel along the vertical direction 104 or may be tilted at a tapering angle relative to the vertical direction 104. In the latter case, the gate structure 150 may taper with increasing distance from the first surface 101. The tapering angle at the first surface 101 between the first gate sidewall 151, the second gate sidewall 152, and the vertical direction 104 may be selected based on crystal axis alignment and / or based on off-axis angle.

[0163] For example, the absolute value of the taper angle between the first gate sidewall 151 and the vertical direction 104 can deviate from the absolute value of the off-axis angle by no more than ±1° (e.g., in the case of 4H-SiC, the taper angle can range from at least 3° to at most 5°). However, the taper angle can be oriented differently from the off-axis angle. The taper angle between the second gate sidewall 152, opposite the first gate sidewall 151, and the vertical direction can be oriented opposite to the taper angle of the first gate sidewall 151. The larger the taper angle, the narrower the gate structure 150 becomes from the first surface 101.

[0164] Generally, at least the first gate sidewall 151 may substantially travel along a crystal plane of the silicon carbide body 100 where the charge carrier mobility is high (e.g., one of the {11-20} or {1-100} crystal planes). The first gate sidewall 151 may be an active sidewall, meaning that the channel region may travel along the first gate sidewall 151. In some embodiments, the second gate sidewall 152 may also be an active sidewall (e.g., in the case of the vertical trench gate structure 150). In other embodiments (e.g., in the case of the tapered trench gate structure 150), the second gate sidewall 152 may be an active sidewall.

[0165] The silicon carbide body 100 may include a doped drift structure 130, wherein the drift structure 130 is formed between the gate structure 150 and the second surface 102 of the silicon carbide body 100. The drift structure 130 includes a first compensation layer 181, a second compensation region 182, a fill structure 170, a doped horizontal layer 135, and a heavily doped contact portion 139. The contact portion 139 is formed between the horizontal layer 135 and the second surface 102. The doped horizontal layer 135 is formed between the fill structure 170 and the contact portion 139.

[0166] The contact portion 139 has a first conductivity type and may be or may include a substrate portion obtained from a crystalline ingot and / or may include a heavily doped portion of a layer formed by epitaxy. Along the second surface 102, the dopant concentration in the contact portion 139 is sufficiently high to ensure a low-resistance ohmic contact between the contact portion 139 and the second load electrode 320.

[0167] Horizontal layer 135, first compensation layer 181, and second compensation portion 182a can be formed in layers grown epitaxially. Horizontal layer 135 can include doped regions of two conductivity types. The doped regions of horizontal layer 135 can include a first supplementary compensation region 281 of the second conductivity type and a second supplementary compensation region 282 of the first conductivity type. Regions doped in opposite directions can form n-type pillar segments and p-type pillar segments of compensation structure 180.

[0168] The horizontal layer 135 may be directly adjacent to the contact portion 139. Alternatively, a buffer layer 138 may separate the horizontal layer 135 from the contact portion 139. The buffer layer 138 has a first conductivity type and may include a lightly doped drift layer and / or a more heavily doped buffer layer and / or a more heavily doped drain layer, by way of example, wherein the vertical extension of the buffer layer 138 may be approximately 1 μm, and wherein the average dopant concentration in the buffer layer 138 may be from 3 × 10⁻⁶. 17 cm -3 Up to 5×10 18 cm -3 Within the range.

[0169] The fill structure 170 can be formed directly below the gate structure 150. The gate bottom surface 157 of the gate structure 150 can be in direct contact with the top surface of at least one of the fill structures 170. The fill structure 170 can have a vertical or near-vertical first sidewall 171 and a second sidewall 172. The fill structure 170 can be a homogeneous structure or a layered structure comprising two or more sublayers from different materials. The fill structure 170 can exclusively comprise a dielectric material, wherein the gate electrode 155 can be in direct contact with the fill structure 170. Alternatively, the fill structure 170 can exclusively comprise an undoped or doped semiconductor material, such as single-crystal SiC, or comprise at least one undoped semiconductor material and at least one dielectric material.

[0170] The first compensation layer 181 has a second conductivity type and extends with a uniform thickness along and parallel to the first sidewall 171 and the second sidewall 172 of the filled structure 170. The second compensation region 182 is a portion of the in-situ doped epitaxial growth layer of the first conductivity type. Each second compensation region 182 is formed between two adjacent first compensation layers 181. The second compensation region 182 and the adjacent first compensation layer 181 form a vertical or near-vertical pn junction. The first compensation layer 181 may form a p-doped pillar segment of the compensation structure 180 and the second compensation region 182 may form an n-doped pillar segment, wherein in the blocking mode of the silicon carbide device 500, the charge in the p-doped pillar and the charge in the n-doped pillar are balanced to a predetermined degree.

[0171] The first supplementary compensation region 281 can be formed directly below one of the filling structures 170 and can be directly adjacent to the two first compensation layers 181 formed along the first sidewall 171 and the second sidewall 172 of the filling structure 170. The first supplementary compensation region 281 and the first compensation layer 181 can have the same dopant concentration or can form a unipolar junction.

[0172] The first supplementary compensation area 281 and the first compensation layer 181 can form a first inclined knot 291, which has a first inclination angle φ1 between the first inclined knot 291 and the vertical direction 104.

[0173] Each second supplementary compensation region 282 can be formed directly below and adjacent to one of the second compensation regions 182. The second supplementary compensation region 282 and the second compensation region 182 can have the same dopant concentration or can form a unipolar junction.

[0174] The portion of the silicon carbide body 100 in the lateral direction between two adjacent gate structures 150 includes at least a portion of a source region 110 of a first conductivity type, a body region 120 of a second conductivity type, a current propagation region 132 of a first conductivity type, and a shielding region 160 of a second conductivity type.

[0175] The source region 110 is located between the first surface 101 and the body region 120. The body region 120 separates the source region 110 from the current propagation region 132. The body region 120 and the current propagation region 132 form a pn junction.

[0176] The current spreading region 132 is directly adjacent to the second compensation portion 182a. The current spreading region 132 and the second compensation portion 182a may have the same dopant concentration or may form a unipolar junction.

[0177] Body region 120 and source region 110 are directly adjacent to the active first gate sidewall 151 of the first gate structure. The vertical extension of body region 120 corresponds to the channel length of transistor cell TC and can range from 0.2 μm to 1.5 μm. Source region 110 can extend uninterruptedly along the entire lateral length of the first gate structure in a lateral direction orthogonal to the cross-sectional plane.

[0178] A shielding region 160 is formed between the body region 120 and the adjacent non-active second gate sidewall 152 of the second gate structure, and extends from the first surface 101 into the silicon carbide body 100 along the non-active second gate sidewall 152 of the second gate structure. The vertical extension of the shielding region 160 is greater than the vertical extension of the gate structure 150. The shielding region 160 is in direct contact with a first compensation layer 181 formed along the second sidewall 172 of the filling structure 170.

[0179] The maximum dopant concentration in shielding region 160 can be higher than the maximum dopant concentration in body region 120. The vertical dopant concentration profile in shielding region 160 can have a local maximum at a location below trench gate structure 150. Along the non-active second gate sidewall 152, the dopant concentration in shielding region 160 can be higher than the dopant concentration along the active first gate sidewall 151 in body region 120, i.e., at least two times, at least five times, or even at least ten times the dopant concentration along the active first gate sidewall 151 in body region 120. Shielding region 160 can extend uninterruptedly along the entire horizontal length of gate structure 150 in a transverse direction orthogonal to the cross-sectional plane. Shielding region 160 and the adjacent second compensation portion 182a form a pn junction.

[0180] The compensation structure 180 includes a first vertical section and a second vertical section. The first vertical section includes a p-shaped column (which includes a first compensation layer 181) and an n-shaped column (which includes a second compensation area 182). The second vertical section includes a first supplementary compensation area 281 as a p-shaped column and a second supplementary compensation area 282 as an n-shaped column.

[0181] A first load electrode 310 at the front side of the silicon carbide body 100 is electrically connected to the source region 110, the body region 120, and the shield region 160. A gate electrode 155 may be electrically connected to a gate metallization at the front side of the silicon carbide body 100. The gate metallization is formed or electrically connected or coupled to a gate terminal.

[0182] The strip-shaped portion of the interlayer dielectric 210 separates the first load electrode 310 from the gate electrode 155 in the gate structure 150. The first load electrode 310 may form a first load terminal or may be electrically connected to or coupled to a first load terminal. The first load terminal may be the anode terminal of an MCD or the source terminal of a MOSFET.

[0183] The second load electrode 320, which forms a low-resistance ohmic contact with the contact portion 139, can form a second load terminal or can be electrically connected to or coupled to the second load terminal. The second load terminal can be the cathode terminal of an MCD or the drain terminal of a MOSFET.

[0184] The illustrated silicon carbide device 500 is an n-channel SiC-T MOSFET, wherein a first load electrode 310 forms or is electrically connected to or coupled to the source terminal S, and wherein a second load electrode 320 forms or is electrically connected to or coupled to the drain terminal D. (As shown in...) Figures 9A to 9B As shown in the diagram, the silicon carbide device 500 includes multiple transistor units TC and multiple gate structures 150, wherein the transistor units TC are electrically connected in parallel.

[0185] exist Figures 10A to 10B In the design, the shielding region 160 includes a lateral shielding extension 162 that interrupts the source region 110 in a first lateral direction parallel to the strip-shaped gate structure 150. The lateral shielding extension 162 directly connects the first compensation layer 181, formed on one side of the first gate sidewall 151, to the first load electrode 310 and improves the shielding of the gate dielectric 159 along the active first gate sidewall 151. The filling structure 170 is formed of undoped or doped single-crystal SiC. The first compensation layer 181 and the second supplementary compensation region 282 form a first tilted junction 291, which may include a pn junction.

[0186] Figures 11A to 11BA silicon carbide device 500 is shown having a fill structure 170 that travels orthogonally to a strip-shaped gate structure 150.

[0187] Figures 12A to 12B A transistor cell TC is shown based on a gate structure 150 having dual-sided channels and active first gate sidewall 151 and active second gate sidewall 152. A source region 110, a body region 120, a current propagation region 132, and a shielding region 160 extend from the first gate sidewall 151 of the first gate structure to the second gate sidewall 152 of the second gate structure, wherein a metal source contact structure can extend from the first surface 101 through the source region 110 into the body region 120. The portion including the source region 110, body region 120, and current propagation region 132 may alternate with the shielding region 160 along a lateral direction parallel to the longitudinal extension of the gate structure 150 in the lateral direction.

[0188] exist Figures 13A to 13B In this configuration, the shielding region 160 includes a deep shielding portion 168 directly beneath the gate structure 150. The deep shielding portion 168 may directly abut the first sidewall 171 and the second sidewall 172 of the fill structure 170. The deep shielding portion 168 may contact the bottom surface 157 of the gate. The lateral edge of the deep shielding portion 168 on the side avoiding the fill structure 170 may be flush with the first gate sidewall 151 and the second gate sidewall 152. Alternatively, the deep shielding portion 168 may extend laterally beyond the first gate sidewall 151 and the second gate sidewall 152.

[0189] The filling structure 170 includes a dielectric pad portion 179 and a filling portion 175. The dielectric pad portion 179 extends along a first sidewall 171 and a second sidewall 172 and along the bottom surface of the filling structure 170. The filling portion 175 is separated from the silicon carbide body 100 and may include a doped or undoped semiconductor material or a dielectric material different from the material of the dielectric pad portion 179.

[0190] exist Figures 14A to 14B In the compensation structure 180, each n-type pillar includes a second compensation region 182, wherein the second compensation region 182 includes a second compensation portion 182a of an in-situ doped epitaxial layer and two second compensation layers 182b. The second compensation layers 182b are more heavily doped than the second compensation portion 182a. The second compensation layers 182b and the second compensation portion 182a form a vertical unipolar junction.

[0191] The second supplementary compensation region 282 and the second compensation layer 182b can form a second tilted junction 292. The second tilt angle φ2 between the second tilted junction 292 and the vertical extension 104 can deviate from the angle between the lattice direction along which the channeling effect occurs and the vertical direction 104 by a maximum of ±5 degrees.

[0192] Another embodiment may relate to a silicon carbide device comprising:

[0193] A silicon carbide body; a gate structure extending from a first surface into the silicon carbide body; a filling structure formed between the gate structure and a second surface of the silicon carbide body, wherein the second surface is opposite to the first surface; a compensation region of a first conductivity type, wherein the compensation region is formed in the silicon carbide body between the gate structure and the second surface; and

[0194] The first compensation layer of the second conductivity type is formed between the first sidewall of the filled structure and the compensation region, and the distribution of the dopant of the second conductivity type in the silicon carbide body along a reference line from the filled structure to the second surface along the lattice direction (where a channeling effect occurs) includes a tail portion.

[0195] The reference line is parallel to the crystal orientation along which the channeling effect occurs. The tail portion has a distance to the filled structure that is at least twice the distance from the maximum dopant distribution along the reference line to the filled structure. In the tail portion, the dopant concentration is significantly higher compared to a relatively ideal Gaussian distribution. The relatively ideal Gaussian distribution and the distribution of dopant of the second conductivity type have the same dose, range, and dispersion.

Claims

1. A method for manufacturing a silicon carbide device, comprising: A silicon carbide substrate is provided, the silicon carbide substrate including a drift layer of a first conductivity type and trenches extending from the main surface of the silicon carbide substrate into the drift layer; The first dopant is injected through the first trench sidewall, wherein: The first dopant has a second conductivity type and is implanted into the silicon carbide substrate at a first implantation angle; A channel effect occurs in the silicon carbide substrate at the first implantation angle; and The first dopant forms a first compensation layer extending parallel to the sidewall of the first trench; and The epitaxial layer is on the main surface. A further first dopant is implanted through a further first sidewall of a further trench in the epitaxial layer on the main surface to form a compensation layer extension of the first compensation layer in the epitaxial layer.

2. The method according to claim 1, further comprising: A third dopant of the second conductivity type is implanted through the sidewall of the first trench, wherein the third dopant forms a third compensation layer on the side of the second compensation layer that avoids the trench.

3. The method according to claim 1, comprising: A second dopant of a first conductivity type is implanted through the sidewall of the first trench, wherein the second dopant forms a second compensation layer.

4. The method according to claim 1, comprising: Remove the sacrificial layer, which includes one or more portions of one or more compensation layers formed by implanting one or more dopants through the main surface of the silicon carbide substrate.

5. The method according to claim 1, An injection mask is formed on the main surface prior to the formation of at least one of the first or second compensation layers, wherein an opening in the injection mask exposes the trench.

6. The method according to claim 1, comprising: A third dopant of the second conductivity type is injected through the bottom of the trench, wherein the third dopant forms a first supplementary compensation region.

7. A method for manufacturing a silicon carbide device, comprising: A silicon carbide substrate is provided, the silicon carbide substrate including a drift layer of a first conductivity type and trenches extending from the main surface of the silicon carbide substrate into the drift layer; A first dopant is implanted through the first trench sidewall of the trench, wherein the first dopant has a second conductivity type and forms a first compensation layer extending parallel to the first trench sidewall; The second dopant is implanted through the sidewall of the first trench, wherein: The second dopant has a first conductivity type and forms a second compensation layer; and The first and second compensation layers form a pn junction, and Perform at least one of the following: A further first dopant is implanted through a further first sidewall of a further trench in the epitaxial layer on the main surface to form a compensation layer extension of the first compensation layer in the epitaxial layer. or Remove the sacrificial layer, which includes one or more portions of one or more compensation layers formed by implanting one or more dopants through the main surface of the silicon carbide substrate.

8. The method according to claim 7, wherein The first dopant is implanted at a first implantation angle, wherein a channel effect occurs in the silicon carbide substrate at the first implantation angle.

9. The method of claim 7, wherein The second dopant is implanted at a second implantation angle, at which a channel effect occurs in the silicon carbide substrate.

10. The method of claim 7, further comprising: A further first dopant is implanted through the second trench sidewall, wherein the second trench sidewall is opposite to the first trench sidewall, and wherein the further first dopant forms a further first compensation layer parallel to the second trench sidewall.

11. The method of claim 10, comprising: A further second dopant is implanted through the second trench sidewall, wherein the further second dopant forms a further second compensation layer parallel to the second trench sidewall.

12. The method of claim 11, wherein At least one of the further first dopant or the further second dopant is implanted at an implantation angle at which a channel effect occurs in the silicon carbide substrate.

13. The method of claim 7, comprising: A third dopant of the second conductivity type is injected through the sidewall of the first trench at an injection angle at which a channel effect occurs in the silicon carbide substrate, wherein the third dopant forms a third compensation layer on the side of the second compensation layer that avoids the trench.

14. The method of claim 7, comprising: A filling structure is formed in the trench; as well as A gate electrode is formed between the main surface and the filling structure.

15. The method of claim 7, comprising: A filling structure is formed in the trench. An epitaxial layer is formed on the main surface. Further trenches are formed in the epitaxial layer, exposing the filling structure, and A further first dopant is implanted through a further first sidewall of a further trench to extend the compensation layer in the epitaxial layer to form a first compensation layer.

16. The method of claim 7, comprising: At least one of a first dopant or a second dopant is implanted through the main surface to form a sacrificial layer at the main surface, wherein the sacrificial layer includes at least one of a horizontal portion of a first compensation layer or a horizontal portion of a second compensation layer. After forming at least one of the first compensation layer or the second compensation layer, the sacrificial layer at the main surface of the silicon carbide substrate is removed.

17. The method of claim 7, comprising: Before forming at least one of the first compensation layer or the second compensation layer, an injection mask is formed on the main surface, wherein an opening in the injection mask exposes the trench.

18. The method of claim 7, comprising: A fourth dopant of the second conductivity type is injected through the bottom of the trench, wherein the fourth dopant forms a first supplementary compensation region.

19. A method for manufacturing a silicon carbide device, comprising: A silicon carbide substrate is provided, the silicon carbide substrate including a drift layer of a first conductivity type and trenches extending from the main surface of the silicon carbide substrate into the drift layer; The first dopant is injected through the first trench sidewall, wherein: The first dopant has a second conductivity type and is implanted into the silicon carbide substrate at a first implantation angle; A channel effect occurs in the silicon carbide substrate at the first implantation angle; and The first dopant forms a first compensation layer extending parallel to the sidewall of the first trench; and Remove the sacrificial layer, which includes one or more portions of one or more compensation layers formed by implanting one or more dopants through the main surface of the silicon carbide substrate.

20. A silicon carbide device manufactured according to the method of any one of claims 7 to 18, comprising: Silicon carbide body; A gate structure that extends from the first surface into the silicon carbide body; A filling structure is formed between the gate structure and the second surface of the silicon carbide body, wherein the second surface is opposite to the first surface; A compensation region of a first conductivity type, wherein the compensation region is formed in the silicon carbide body between the gate structure and the second surface; A first compensation layer of a second conductivity type, wherein the first compensation layer is formed between the first sidewall of the filling structure and the compensation region, and A second compensation layer of a first conductivity type, wherein the second compensation layer extends parallel to the first sidewall, and wherein the first compensation layer and the second compensation layer form a pn junction. The silicon carbide device further includes an epitaxial layer on the first surface, wherein at least the compensation layer of the first compensation layer extends into a further first sidewall of a further trench formed in the epitaxial layer.

21. The silicon carbide device according to claim 20, The dopant concentration in the first compensation layer is at least 10. 16 cm -3 .

22. The silicon carbide device according to any one of claims 20 to 21, further comprising: The shielding region of the second conductivity type is formed between the gate structure and the second surface, wherein at least a portion of the shielding region is formed between the gate structure and the second surface.

23. The silicon carbide device according to claim 22, wherein... The shielding region is in contact with at least a portion of the bottom surface of the gate structure and with the first compensation layer.

24. The silicon carbide device according to any one of claims 20 to 21, further comprising: A further first compensation layer of the second conductivity type, wherein the further first compensation layer extends along the second sidewall of the filling structure.

25. The silicon carbide device according to any one of claims 20 to 21, further comprising: A first supplementary compensation region of a second conductivity type is located between the filling structure and the second surface, wherein the first supplementary compensation region is in contact with the filling structure and with the first compensation layer.

26. The silicon carbide device according to any one of claims 20 to 21, The horizontal axis of the gate structure is inclined relative to the horizontal axis of the fill structure.

27. The silicon carbide device according to any one of claims 20 to 21, The filling structure includes dielectric material.

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