Modification of secure microprocessor memory

Abstract

The present disclosure relates to modification of a memory of a secure microprocessor. A method is provided, comprising receiving, by a first microprocessor, a request to modify the contents of a first memory of the first microprocessor, the first memory being accessible only by the first microprocessor. The method comprises accessing, by the first microprocessor, first data associated with the request and a signature generated using an asymmetric encryption algorithm based on the first data. The first data and the signature are available in a second memory of the second microprocessor, and the first data represents a modification to be applied to the contents of the first memory. The modification represents a modification of a set of services exposed by the first microprocessor. The method comprises: verifying, by the first microprocessor, the authenticity of the first data based on the signature; and modifying the contents of the first memory based on the first data, the modification being conditional on the verification.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to French application No. 19 / 07125, filed on June 28, 2019, which is incorporated herein by reference. Technical Field

[0003] The present disclosure relates generally to electronic systems, and more particularly to electronic systems including multiple microprocessors. Background Art

[0004] Electronic systems including multiple microprocessors are known. Among such systems, this document more particularly contemplates the situation of a system including at least one microprocessor that behaves as a black box to other microprocessors of the system. Such a microprocessor implements a set of functions or services that are usually critical to the security of the system, such as encryption / decryption services (also referred to as encoding services). This set of services can be used for other microprocessors of the system, or in other words, are exposed to other microprocessors of the system.

[0005] The software code of the service exposed by the microprocessor that behaves as a black box is stored in a non-volatile memory, that is to say a memory that is not deleted when it is no longer powered, and which has a content that is set at the time of manufacture or at the first programming of the memory. In other words, the content of the memory storing the software code of the service cannot be modified.

[0006] Therefore, in order to modify the set of services exposed by such a microprocessor, especially after the failure of one of the exposed services is discovered, or at the request of a user using the microprocessor, a new non-volatile memory storing the software code of the modified set of services should be provided. Since the microprocessor is usually provided in the form of a single integrated circuit, this is actually equivalent to providing a new microprocessor including a new non-volatile memory. The time, manpower and / or hardware resources and costs required for designing and manufacturing such a new microprocessor may be significant, which poses a problem. Summary of the invention

[0007] In one embodiment, a method includes: receiving, by a first microprocessor, a request to modify the contents of a first memory of the first microprocessor, the first memory being accessible only by the first microprocessor. The method includes accessing, by the first microprocessor, first data associated with the request, and a signature generated based on the first data using an asymmetric encryption algorithm. The first data and the signature are available in a second memory of the second microprocessor, and the first data represents a modification to be applied to the contents of the first memory. The modification represents a modification of a set of services exposed by the first microprocessor. The method includes: verifying, by the first microprocessor, the authenticity of the first data based on the signature; and modifying the contents of the first memory based on the first data, the modification being conditional on the verification.

[0008] In one embodiment, a first microprocessor includes a processor and a non-volatile memory having set contents. The non-volatile memory includes a program having instructions that, when read by the processor, cause the processor to receive a request to modify the contents of a first memory of the first microprocessor, the first memory being accessible only by the first microprocessor. The instructions also cause the processor to access first data associated with the request, and a signature generated based on the first data using an asymmetric encryption algorithm. The first data and the signature are available in a second memory of the second microprocessor, and the first data represents a modification to be applied to the contents of the first memory. The modification represents a modification of a set of services exposed by the first microprocessor. The instructions also cause the processor to verify the authenticity of the first data based on the signature; and modify the contents of the first memory based on the first data, the modification being conditional on the verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The foregoing and other features and advantages will be discussed in detail in the following non-limiting description of specific embodiments in conjunction with the accompanying drawings, in which:

[0010] Figure 1 An example of an embodiment of an electronic system is shown very schematically in the form of a block diagram, and the described memory modification embodiments apply to electronic systems of the type;

[0011] Figure 2 Schematically shows the Figure 1 An example of data used in a system for requesting Figure 1 Implementation of services exposed by the system's microprocessor;

[0012] Figure 3 Schematically shows the Figure 1 An embodiment of data for use in a system for implementing modification of a memory of a microprocessor of the system;

[0013] Figure 4 The update process is schematically shown in the form of a block diagram. Figure 1 Embodiments of the method of a microprocessor memory of a system;

[0014] Figure 5 In more detail and in the form of a block diagram Figure 4 Methods;

[0015] Figure 6 Schematically shows Figure 3 An alternative embodiment of the data of;

[0016] Figure 7 The block diagram shows Figure 5 An alternative embodiment of the method of;

[0017] Figure 8 The block diagram shows Figure 5 and Figure 7 Yet another alternative embodiment of the method; and

[0018] Fig. 9 Three simplified views A, B and C are shown, which illustrate the Figure 5 , Figure 7 or Figure 8 During the implementation of the method, management Figure 1 Embodiments of a method for storing space in a memory of a microprocessor of a system. DETAILED DESCRIPTION

[0019] There is a need to overcome all or some of the disadvantages of systems including multiple microprocessors, particularly systems including microprocessors that expose a set of services stored on a non-volatile memory of the microprocessor having set contents.

[0020] Embodiments overcome all or part of the disadvantages of known systems including multiple microprocessors, particularly systems including a microprocessor that exposes a set of services stored in a non-volatile memory of the microprocessor, the non-volatile memory having set contents.

[0021] An embodiment provides a method comprising the following steps: a) receiving, by a first microprocessor, a request for modifying the contents of a first memory of the first microprocessor, the request being accessible only by the first microprocessor; b) accessing, with the aid of the first microprocessor, first data associated with the request and a signature generated based on the first data and based on an asymmetric encryption algorithm, the first data and the signature being available in a second memory of the second microprocessor, and the first data representing modifications to be applied to the contents of the first memory, the modifications representing modifications to a set of services exposed by the first microprocessor; c) verifying, by the first microprocessor, the authenticity of the first data based on the signature; and d) modifying the contents of the first memory based on the first data, the implementation of step d) being conditional on step c).

[0022] According to an embodiment: a first indirect table is stored in a first memory, the first table includes one or more first indexes, each of the first indexes points to a different exposed service or an unsupported service; the first data includes second data representing at least a target index and a parameter, the parameter having a value selected from at least a first value and a second value; and step d) includes: when the parameter is at the first value, modifying the first table so that the first index equal to the target index points to an unsupported service; or, when the parameter is at the second value, modifying the first table so that the first index equal to the target index points to another service that has not yet been exposed.

[0023] According to an embodiment, the value of the parameter is selected from at least a first value, a second value and a third value, and step d) includes: when the parameter is at the third value, a step of recording the software code of the new service into the first memory, and a step of modifying the first table so that the first index equal to the target index points to the new service.

[0024] According to an embodiment: a second indirect table is stored in a first memory, the second table includes one or more second indexes, each of the second indexes points to an area of ​​the first memory, which contains or does not contain an update of a service of the exposed service; and the value of the parameter is selected from at least the first value, the second value and the fourth value, step d) includes: when the parameter is at the fourth value, suppressing the update contained in the area of ​​the first memory pointed to by the second index that is equal to the target index.

[0025] According to an embodiment, the value of the parameter is selected from at least a first value, a second value, a fourth value and a fifth value, and step d) includes the following steps: when the parameter is at the fifth value, recording the updated software code of one of the exposed services in an area of ​​the first memory pointed to by the second index equal to the target index.

[0026] According to an embodiment, the first data comprises third data representing the software code recorded into the first memory at step d).

[0027] According to an embodiment, the second data are data encrypted by a symmetric encryption algorithm, and step d) comprises a step d1) of decrypting the second data by the first microprocessor.

[0028] According to an embodiment, the third data are data encrypted by another symmetric encryption algorithm, and step d) comprises a step d2) of decrypting the third data by the first microprocessor after step d1).

[0029] According to an embodiment, the second data also represent a first integrity code generated when encrypting the third data, step d2) also includes comparing the first integrity code with a second integrity code generated when decrypting the third data, the modification of the content of the first memory according to the first data being conditioned by the comparison.

[0030] According to an embodiment, the set of services initially exposed by the first microprocessor is determined by the content of a third non-volatile memory (preferably a ROM) of the first microprocessor, the content of the third memory being set and accessible only by the first microprocessor.

[0031] According to an embodiment, said further service which has not yet been exposed is determined by the content of the third memory.

[0032] According to an embodiment, the update data also includes fourth non-encrypted data, which indicates: the asymmetric encryption algorithm used; and / or the initialization vector of the symmetric encryption; and / or the size of the first data; and / or the version of the third memory and its content.

[0033] According to an embodiment, the first memory is a volatile memory (preferably RAM).

[0034] Another embodiment provides a microprocessor comprising a processor and a non-volatile memory having set contents, the non-volatile memory comprising instructions which, when read by the processor, result in the implementation of the method defined above.

[0035] In different drawings, the same elements are designated by the same reference numerals. In particular, structural and / or functional elements common to different embodiments may be designated by the same reference numerals and may have the same structure, size and material properties.

[0036] For the sake of clarity, only those steps and elements useful for understanding the described embodiments are shown and described in detail. In particular, a device including a system having multiple microprocessors, one of which behaves as a black box and which exposes a set of services, has not been described in detail, and the described embodiments are compatible with such conventional devices. In addition, services that can be exposed to other microprocessors by such a microprocessor that behaves as a black box have not been described in detail, and the described embodiments are compatible with conventional services exposed by such a microprocessor.

[0037] Throughout this disclosure, the term "connected" is used to specify a direct electrical connection between circuit elements without intermediate elements other than conductors, while the term "coupled" is used to specify an electrical connection between circuit elements, which may be a direct connection or a connection via one or more intermediate elements.

[0038] In the following description, when referring to terms that modify absolute positions such as terms "front", "back", "top", "bottom", "left", "right", or terms that modify relative positions such as terms "above", "below", "upper", "lower", or terms that modify directions such as terms "horizontal", "vertical", etc., unless otherwise specified, reference is made to the orientation of the accompanying drawings.

[0039] The terms "about," "substantially," and "approximately" are used herein to designate a tolerance of plus or minus 10% (preferably plus or minus 5%) of the value in question.

[0040] Figure 1 An embodiment of an electronic system 1 is shown very schematically in the form of a block diagram, to which type of electronic system 1 the described embodiments of the modification of the memory of a microprocessor of the system apply.

[0041] The electronic system 1 includes a plurality of microprocessors, in this example, two microprocessors 2 and 3. The microprocessor 3 behaves as a black box. In other words, the microprocessor 3 makes a set of services or functions available to the other microprocessors of the system without requiring the other microprocessors of the system to have access to the contents of the microprocessor 3. More specifically, the other microprocessors of the system 1 cannot access the software code or hardware that implements the services exposed by the microprocessor 3, nor can the other microprocessors access the data used and / or generated inside the microprocessor 3 for the implementation of the services.

[0042] In this embodiment, the microprocessor 3 is a secure microprocessor, or in other words, the microprocessor 3 is a hardware security module (HSM).

[0043] The term microprocessor here means an electronic device comprising in the same integrated circuit a central processing unit and at least one non-volatile memory storing instructions which, when read by the central unit, lead to the performance of functions.

[0044] More particularly, in this example, the microprocessor 2 includes: a processing unit 21 (PU) (e.g., a state machine, a programmable logic circuit, etc.); one or more volatile storage areas, such as a RAM-type memory 22, for example, to temporarily store information (instructions, addresses, data) during processing; one or more non-volatile storage areas, such as a flash memory 23 (FLASH), to permanently store information (especially when the microprocessor 2 is no longer powered); one or more data, address and / or control buses (not shown) between different elements inside the microprocessor 2; and an input / output interface 24 (I / O) (e.g., of the serial bus type) for communicating with the outside of the microprocessor, for example, in order to program functions and / or record data in the microprocessor 2.

[0045] Furthermore, depending on the application, the microprocessor 2 may integrate other functions symbolized by the block 25 (FCT), such as coprocessors, other interfaces, other memories, etc.

[0046] In this example, the microprocessor 3 includes: a processing unit 31 (PU) (e.g., a state machine, a programmable logic circuit, etc.); one or more volatile storage areas 32, such as RAM-type memory 32, for example, to temporarily store information (instructions, addresses, data) during processing; one or more non-volatile storage areas 33, such as ROM-type memory 33, to permanently store information (especially when the microprocessor 3 is no longer powered); one or more data, address and / or control buses (not shown) between different elements inside the microprocessor 3.

[0047] Furthermore, according to the present application, the microprocessor 3 generally integrates other functions symbolized by the block 34 (FCT), (e.g. a cryptographic processor, other interfaces, other memories, etc.) Preferably, the microprocessor 3 integrates at least one coding circuit or cryptographic processor to encrypt / decrypt data, for example according to the AES GCM algorithm, the AES CBC algorithm or the RSA algorithm.

[0048] So that microprocessor 3 can expose services to microprocessor 2 and microprocessor 2 can request access to one of the services, microprocessors 2 and 3 share a security interface 4 .

[0049] The interface 4 comprises, for example, a memory or storage space 42 (REG) forming part of the microprocessor 2, and a memory or storage space 43 (REG) forming part of the microprocessor 3. The storage spaces 42 and 43 are preferably registers.

[0050] When the microprocessor 2 wishes to access a service exposed by the microprocessor 3 , it informs the microprocessor 3 by means of a request by modifying one or more bits of the register 43 .

[0051] The microprocessor 3 detects the request and reads from a specific memory area of ​​the memory space of the microprocessor 2, for example, which is predetermined, such as the memory 22, and in which the request descriptor is recorded. In fact, the request descriptor corresponds to data indicating which service of the microprocessor 3 the microprocessor 2 desires to access, and may correspond to parameters indicating how the called service should be implemented.

[0052] The microprocessor 3 then verifies, based on the indirection table, whether the called service is a service of the service group it exposes. As an example, the indirection table comprises a plurality of service indexes or service identifiers, each of which points to a service in the exposed service group or to an unsupported service. As an example, an unsupported service corresponds to a function indicating that the required service is not available. More specifically, the service indexes of the indirection table each point to an address of a memory of the microprocessor 3, in which the software code of the requested service is stored, that is, instructions that cause the microprocessor 3 to implement a service when the service index is read by the unit 31, which service may be an unsupported service.

[0053] When the request is valid and the indirection table stored in the microprocessor 3 includes a service index pointing to the requested service, the service is implemented by the microprocessor 3. As an example, the implementation of the requested service includes the following steps: the microprocessor 3 reads the data to be processed when implementing the service from the memory space of the microprocessor 2, for example, the data to be encrypted when the called service is a data encryption service. As an example, the address of the data to be processed and the size of the data recorded therein are represented by the parameters of the request descriptor previously read by the microprocessor 3.

[0054] Then, the microprocessor 3 provides the result of implementing the called service to the microprocessor 2. As an example, the microprocessor 3 records the data obtained by implementing the service (for example, encrypted data when the service is a cryptographic service) in a memory area (for example, the memory 22) of the microprocessor 2. The address of the recorded data is indicated by, for example, a parameter of the request descriptor previously read by the microprocessor 3.

[0055] Preferably, the microprocessor 3 also indicates the end of the processing, that is to say the end of the implementation of the called service, for example by modifying one or more bits of a register 42 of the microprocessor 2 .

[0056] Therefore, microprocessor 2 does not access the contents of microprocessor 3 , that is, the contents of memories 32 and 33 of microprocessor 3 (instructions and data).

[0057] Although a system 1 comprising a single secure microprocessor 3 and a single non-secure microprocessor 2 capable of invoking services exposed by the microprocessor 3 has been described herein, the system may include other secure microprocessors and / or other non-secure microprocessors. In such a system, whenever a secure microprocessor exposes a set of services to another microprocessor of the system, an interface of the type of interface 4 is provided between the two microprocessors, and the above description of Figure 1 The described operations are implemented. This enables the contents of the secure microprocessor to be inaccessible to the microprocessor of the system. In addition, although not described in detail herein, the same secure microprocessor of the system can expose its service group to multiple other microprocessors of the system.

[0058] Figure 2 Schematically shows the Figure 1 An embodiment of data 200 used in a system of the present invention and, more particularly, an embodiment of a request descriptor 200 is shown.

[0059] Data 200 represents an identifier 201 (CMD) of a called service, such as a binary code identifying the called service.

[0060] Data 200 also represents parameters 202, in this example, five parameters P1, P2, P3, P4 and P5 represent the way in which the called service should be implemented. Depending on the called service, some of these parameters can be zero, that is, unused. As an example, when the called service is a service for data encryption through the AES ECB algorithm: parameter P1 represents the key to be used for encryption, for example, an identifier of the key stored in the microprocessor 3; parameter P2 represents the starting address of the area of ​​the memory space of the microprocessor 2 where the data to be encrypted is stored, such as the address of the memory 22; parameter P3 represents the starting address of the area of ​​the memory space of the microprocessor 2 where the data encrypted by the microprocessor 3 will be recorded, such as the address of the memory 22; parameter P4 represents the size of the data to be encrypted; and parameter P5 is not used.

[0061] Since the microprocessor 2 transmits a request to access a service exposed by the microprocessor 3 via the interface 4, the data 200 is read by the microprocessor 3 from a predetermined memory address of the memory space of the microprocessor 2 (e.g., from a predetermined address of the memory 22). The predetermined address is preferably independent of the service called, that is, it is the same for each request transmitted from the microprocessor 2 to the microprocessor 3 via the interface 4. Preferably, this address is defined when designing the system 1, more particularly when designing the microprocessor 3. Then, the microprocessor 2 is designed or programmed to record a corresponding request descriptor at this predetermined address of the memory space of the microprocessor 2, for example, each time it transmits a request to access a service exposed by the microprocessor 3.

[0062] Although the request descriptor 200 has been described herein as including five parameters P1 to P5, in alternative embodiments, the request descriptor 200 includes any non-zero number of parameters, preferably at least two parameters, namely the memory address where the data is stored and the size of the stored data.

[0063] In the following description, a case is considered where the software code of the service exposed by the microprocessor 3 is recorded in the memory 33 of the microprocessor 3 with set contents. It is also considered that an indirection table between a service index and a corresponding (supported or unsupported) service corresponding to such a service index is initialized based on the contents of the non-volatile memory 33, and the indirection table is recorded in the volatile memory 32.

[0064] In system 1, it is possible to design to modify the set of services exposed by microprocessor 3 by modifying the content of memory 33 of microprocessor 3. However, this is not possible due to the fact that the content of memory 33 is set, ie the content can no longer be modified.

[0065] By way of example, when the memory 33 is a memory with contents that can be reprogrammed (e.g. a flash type memory), the microprocessor 3 does not include an interface allowing such reprogramming of its contents. In practice, by reprogramming part of the contents of the memory 33, individuals with malicious intent may access confidential data stored in the memory 33, in particular information relating to the operation of the services exposed by the microprocessor 3.

[0066] Still as an example, when the memory 33 is a ROM, for example, the content of the memory 33 cannot be modified due to a mask used to manufacture the memory, and the content of the memory 33 is determined when the memory 33 is manufactured.

[0067] In order to modify or change the set of services exposed by the microprocessor 3, a new memory 33 with a new set of contents corresponding to the modified set of services can be provided, which in practice implies the provision of a new microprocessor 3. This leads to various disadvantages, in particular in terms of design time, resources and costs associated with providing a new microprocessor 3.

[0068] The inventors herein provide methods for securely changing the set of services exposed by a microprocessor 3 by securely modifying the memory 32 of the microprocessor 3. More particularly, the inventors provide methods for modifying in the memory 32 an indirection table between a service index and the corresponding (supported or unsupported) service pointed to by the index.

[0069] More specifically, in order to avoid exposing the contents of the microprocessor 3 to individuals with malicious intent, the inventors provide for a modification of the memory 32 of the microprocessor 3 to be performed as a response to a request for access by the microprocessor 2 via the secure interface 4 to a service for modifying the memory 32. Preferably, the software code corresponding to this service for modifying the memory 32 is recorded into the non-volatile memory 33 of the microprocessor 3. For example, the modification to be applied to the memory 32 is programmed in the microprocessor 2, preferably in the non-volatile memory of the microprocessor 2, by an authorized person, for example by the manufacturer of the microprocessor 3 or a person authorized by the manufacturer. Due to the fact that the memory 32 is a volatile memory, this modification of the memory 32 is preferably implemented for each power-on or start-up of the system 1.

[0070] Here, the inventors have exploited the operation of the microprocessor 3 , and more generally the operation of the system 1 , to enable the microprocessor 2 to securely invoke services exposed by the microprocessor 3 via the interface 4 .

[0071] Figure 3 Schematically shows the Figure 1 Modification of the memory used to implement the secure microprocessor in the system (in this example, Figure 1 An embodiment of data 300 of the memory 32 of the microprocessor 3).

[0072] In the present embodiment, the memory 33 of the microprocessor 3 includes software codes for services exposed by the microprocessor 3 to other microprocessors of the system 1, each of the exposed services being pointed to by a corresponding service index of the indirection table. It is also considered that the memory 33 of the microprocessor 3 includes one or more software codes corresponding to one or more corresponding services not exposed by the microprocessor 3. In other words, additional services are provided when designing the microprocessor 3, and more particularly, when designing its memory 33, which may become services exposed by the microprocessor 3 if necessary.

[0073] Data 300 are stored in the microprocessor 2 .

[0074] According to an embodiment, the memory address or memory location where the data 300 is recorded is preferably determined by the parameters ( Figure 2 ) indicates that the parameter is, for example, parameter P1 read by microprocessor 3 from microprocessor 2 due to a request received via interface 4 to access a service exposed by microprocessor 3 .

[0075] According to one embodiment, another parameter of the request descriptor, for example parameter P2 , indicates the size of the data 300 .

[0076] As an example, data 300 is recorded in the memory 22. The recording of data 300 in the memory 22 is, for example, caused by copying data recorded in the memory 23 of the microprocessor 2 to the memory 22. For example, the data recorded in the memory 23 has been generated by an authorized person and then programmed in the memory 23 of the microprocessor 2.

[0077] Data 300 includes data 302 representing modifications to be performed in memory 32 of microprocessor 3. Data 300 also includes signature 304 ("Signature").

[0078] The signature 304 has been generated by a person who is authorized to request modification of the memory 32 of the microprocessor 3 .

[0079] By means of an asymmetric encryption algorithm (preferably an RSA encryption algorithm), signature 304 has been generated based on all or part of data 302, preferably based on all data 302. In particular, the authorized person holds the private key and the corresponding public key is known by microprocessor 3 (e.g. stored in microprocessor 3).

[0080] Data 302 represents target indexes 3020 ("target indexes") having modifications of memory 302 applied thereto. In this embodiment, target indexes 3020 correspond to service indexes of an indirection table between service indexes and their corresponding software code.

[0081] The data 302 also represents a parameter 3022 (“change type”) having a value that determines the type of modification to be implemented in the memory 32 .

[0082] In this embodiment, the value of parameter 3022 is selected from a first value RS and a second value IR. When parameter 3020 is at the value RS, this means that the exposed service pointed to by the service index equal to the target index 3020 should be suppressed from the exposed service group by making the service index point to an unsupported service (i.e., for example, a function indicating that the required service is not available). When parameter 3020 is at the value IR, this means that the exposed service pointed to by the service index equal to the target index 3020 should be replaced by a pre-existing service recorded in the memory 33, preferably a pre-existing service that has not yet been exposed. In fact, one or another of the above modifications corresponds to a modification of an indirect table, which is between a service index and a service index having a pointer to a corresponding service (supported or unsupported). Therefore, this corresponds to a modification of the memory 32 in which the indirect table is stored.

[0083] Data 302 also represents variable data 3024 (“variable data”). The content of variable data 3024 depends in particular on the value of parameter 3022, or in other words, variable data 3024 represents different information depending on the value of parameter 3022.

[0084] According to one embodiment, when parameter 3022 is at value IR, variable data 3024 includes an address 3025 ("address") of a service not yet exposed in memory 33, which, after modification of memory 32, will have a service index pointing to the service, equal to target index 3020. Preferably, variable data 3024 has a fixed size and may include padding data 3026 ("random value"). When parameter 3022 is at value RS, variable data 3024 includes only padding data 3026. Preferably, padding data 3026 is randomly generated, which makes attacks by malicious individuals more difficult, especially when signature 304 has been generated based on at least variable data 3024.

[0085] Data 302 may represent many other information.

[0086] Preferably, data 302 represent in particular the type 3027 of the algorithm used to generate signature 304 (“signature type”).

[0087] Preferably, data 302 specifically represents a total size 3028 (“data size”) of data 302 , ie, the size of data 300 without key 304 .

[0088] Preferably, the data 302 represent in particular a version 3029 ("rom version") of the non-volatile memory 33 of the microprocessor 3. In practice, the set contents of the memory 33 may differ from one version to another of the memory 33. In particular, this may make it possible to identify, when the parameter 3022 is at the value IR, that the address 3025 does not correspond to the address of the service recorded in the memory 33.

[0089] According to a preferred embodiment, as in Figure 3 As illustrated in FIG. 3 , data 302 includes non-encrypted data 302-1 and encrypted data 302-2. Preferably, data 302-2 has been encrypted by a symmetric encryption algorithm, such as an AES type (preferably an AES CBC type). Preferably, the AES type algorithm uses a randomly generated initialization vector 3030 (“IV”). The non-encrypted data 302-1 then represents the initialization vector 3030. According to one embodiment, the AES type algorithm uses the entire non-encrypted data 302-1 as an initialization vector.

[0090] This makes an attack by malicious individuals more difficult due to the fact that the key data or parameters of the modifications to be applied to the memory 32, namely the type of modification to be implemented 3022, the target index 3020 involved by the modification and (if necessary) the address 3025 of a pre-existing service recorded in the memory 33, are encrypted.

[0091] Preferably, regardless of the requested modification of the memory 32, the sizes of the data 302-1 and 302-2 are set and are the same.

[0092] Figure 4 An embodiment of a modification of a memory of a microprocessor, in the present example a modification of the memory 32 of the microprocessor 3 , is schematically shown in the form of a block diagram.

[0093] At step 401 (block “read data”), as a response to the data transmitted via interface 4 ( Figure 1 ) receives a response to a request to access a secure service, the microprocessor 3 will send a request from the address indicated by the request descriptor, (e.g., Figure 2 The address indicated by parameter P1 of the request descriptor 200 of the memory 32 is read from the memory 32 to read data representing the modification to be implemented in the memory 32 (for example, Figure 3In addition, at step 401, the microprocessor 3 reads a signature associated with the data representing the modification to be implemented in the memory 32 (e.g., the signature 304 associated with the data 302). The signature associated with the data representing the modification to be implemented in the memory 32 has been generated by an authorized person based on the following items: an asymmetric encryption algorithm, all or part of the data and a private key request held by the authorized person.

[0094] At the next step 402 (block “Signature OK?”), the microprocessor 3 verifies, based on the data 302 and the signature 304, whether the modification request of its memory 32 is genuine, ie whether the data 302 has been validly generated by an authorized person.

[0095] For this purpose, the microprocessor 3 generates intermediate data, currently referred to as hash, from the data 302. The microprocessor 3 generates the intermediate data, currently referred to as hash, for example by means of an adapted decryption circuit ( Figure 1 34), decrypting the signature 304 using the public key of the microprocessor 3. The microprocessor 3 then verifies that the decrypted signature is the same as the generated hash.

[0096] If not identical (block 402 output "No"), the method proceeds to the next step 404 marking the end of the method (block "Return Error"), and the memory 32 is not modified. Preferably, at step 404, the microprocessor 3 informs the microprocessor 2, for example via the interface 4, that the requested modification of the memory 32 has not yet been performed, for example by modifying one or more bits of the register 42 of the microprocessor 2.

[0097] If they are the same (output "yes" of box 402), the data 302 are authentic. In addition, the data 302 are unchanged, that is, the data 302 have not been modified since the signature has been generated by an authorized person. The method then proceeds to the next step 403 (box "Modify memory"), where the microprocessor 3 implements the modification of the memory 32 according to the data 302. For example, the microprocessor 3 modifies the indirect table between the service index and the corresponding (supported or unsupported) services with these indexes pointing to the service by modifying the service with the service index involved by the modification pointing to the service. Preferably, once the memory 32 has been modified, the microprocessor 3 notifies the microprocessor 2, for example via the interface 4, for example by modifying one or more bits of the register 42 of the microprocessor 2.

[0098] According to an embodiment, in which the data 302 comprises encrypted data 302-2, step 403 comprises, for example, by means of an adapted decryption circuit ( Figure 1 Box 34 of ) is a step of decrypting data 302-2.

[0099] According to an embodiment in which the data represent in particular a version 3029 (“rom version”) of the non-volatile memory 33 of the microprocessor 3, step 401 comprises a step of verifying that the version 3029 indicated by the data 302 corresponds to the version of the non-volatile memory 33 of the microprocessor. If this is not the case, the method can be interrupted.

[0100] According to one embodiment, step 401 may comprise a verification that the signature has the expected size. If this is not the case, the method may be interrupted.

[0101] The method described above enables the modification of the set of services exposed by the microprocessor 3 without having to modify the content of the memory 33 (which is not possible due to the fact that this content is set).

[0102] Furthermore, such modification is implemented securely due to the fact that only an authorized person holding a private key can generate a signature associated with the data representing the modification to be implemented in the memory 32. The signature and the data associated therewith are then recorded in the microprocessor 2 and the microprocessor 2 is programmed to transmit the corresponding data of the modification of the memory 32.

[0103] Furthermore, such modification of the memory 32 , representing a modification of the set of services exposed by the microprocessor 3 , uses a secure method of calling the modified services of the memory 32 , ie a method of securely calling any of the services exposed by the microprocessor 3 .

[0104] Figure 5 The block diagram shows in more detail Figure 4 More specifically, Figure 5 Based on about Figure 3 The data 300 described, in more detail, shows Figure 4 In this embodiment, it is considered that data 300 includes encrypted data 302-2 and non-encrypted data 302-1.

[0105] At step 401, as described in relation to Figure 4 As described above, microprocessor 3 reads data 300 from microprocessor 2 .

[0106] In step 401, according to one embodiment, data 302-1 represents the size 3028 of data 300 ( Figure 3 ), preferably, the microprocessor 3 verifies the size of the data 300. For example, the microprocessor compares the data size 3028 with the size of the data in the request descriptor (e.g. Figure 2 The size of the data 300 indicated in the request descriptor 200 of the request descriptor 200 (for example, the size indicated by the parameter P2 of the descriptor 200) is compared. If the data sizes are not equal to each other, similar to the Figure 4The method described in step 404 is that the microprocessor 3 interrupts and modifies its memory 32 .

[0107] At step 401, according to one embodiment, data 302-1 represents the size 3028 of data 300 ( Figure 3 ), preferably, the microprocessor 3 verifies that it has sufficient available storage space in the memory 32 to manipulate the data 300, ie, for example, to record the data 302 therein. If not, similarly to the case with respect to Figure 4 The described step 404 has already been described, in which the microprocessor 3 interrupts the method of modifying its memory 32 .

[0108] At step 401, in addition to reading data 302, according to one embodiment, wherein data 302-1 represents version 3029 of memory 33, preferably microprocessor 3 verifies that data 302-1 comprises the correct version 3029 of memory 33. If not, similar to the Figure 4 The described step 404 has already been described, in which the microprocessor 3 interrupts the method of modifying its memory 32 .

[0109] At step 401, preferably, the microprocessor verifies that the signature 304 has the expected size. If not, similar to Figure 4 The described step 404 has already been described, in which the microprocessor 3 interrupts the method of modifying its memory 32 .

[0110] At step 401, microprocessor 3 may implement steps including importing data 300, in particular data 302-1 and 302-2, into its memory 32. The steps of importing data 302-1 and 302-2 are conditioned by steps such as verifying the size of data 300 and / or the size of the signature as described above.

[0111] The microprocessor then implements the Figure 4 Preferably, the manner of implementing step 402 is determined by the type of asymmetric encryption algorithm used to generate signature 304, and then the non-encrypted data 302-1 represents the type 3027 of the algorithm.

[0112] Here, step 403 begins with step 500 of decrypting the encrypted data 302-2 (block "decrypt data"), for example by means of an adapted decryption circuit of the microprocessor 3 (block 34, Figure 1 ).

[0113] According to an embodiment, where the data 302-2 has been encrypted by a symmetric encryption algorithm using an initialization vector, the microprocessor 3 decrypts the data 302-2 by using the same initialization vector, and the unencrypted data 302-1 represents the initialization vector 3030. Preferably, the microprocessor 3 uses the entire data 302-1 as the initialization vector to decrypt the data 302-2.

[0114] Step 403 also comprises a next step 501 (box "Change Type =?"), in which, based on the data 302-2 decrypted at step 500, the microprocessor 3 determines what type of modification of the memory 32 should be implemented. To this end, the microprocessor 3 checks what value the parameter 3022 is equal to (in the present embodiment, the parameter 3022 is equal to IR or RS).

[0115] If the parameter 3022 is at the value RS (output RS of the block 501), the method proceeds to the next step 502 of step 403 (block "Remove service"). At step 502, the microprocessor 3 modifies the indirection table between the service index and the corresponding (supported or unsupported) service pointed to by the index, that is, it modifies the content of the memory 32 in which the indirection table is stored. More precisely, the microprocessor 3 searches the indirection table for a service index equal to the target index 3020 and modifies the address with the service index pointing to it so that the service index points to the address of an unsupported service, that is, for example, an address indicating a function for which the requested service is not available. In other words, the microprocessor 3 makes the service index equal to the target index 3020 point to an unsupported service. This is equivalent to suppressing a service from the group of services exposed by the microprocessor 3.

[0116] If the parameter 3022 is at the value IR (output IR of the block 501), the method proceeds to the next step 503 of the step 403 (block "Internal Replacement"). At step 503, the microprocessor 3 modifies the indirection table between the service index and the corresponding (supported or unsupported) service pointed to by the index, that is, it modifies the content of the memory 32 in which the indirection table is stored. More precisely, the microprocessor 3 searches the indirection table for a service index equal to the target index 3020 and modifies the address of the service index with the service index pointing to this address so that the address of the service index points to the address 3025 of the software code of the service recorded in the memory 33 but not yet exposed by the microprocessor 3. In other words, the microprocessor 3 makes the service index equal to the target index 3020 point to a service pre-existing in the memory 33 but not yet exposed by the microprocessor 3. If, before modifying the indirection table, the service index points to an unsupported service, this is equivalent to adding the service to the set of services exposed by the microprocessor 3. If, before modifying the indirection table, the service index points to a service in the service group exposed by the microprocessor 3, this is equivalent to replacing this service with another service.

[0117] Steps 502 and 503 mark the end of the memory modification method, which steps are as described with respect to Figure 4 The process ends as described in step 403.

[0118] According to an alternative embodiment, it is provided that services not pre-existing in the memory 33 of the microprocessor 3 can be added to the set of services exposed by the microprocessor 3 .

[0119] To this end, the inventor provides data 300 to include (in addition to Figure 3 The software code corresponding to the new service is provided in addition to what has been described, and the software code to be imported into the memory 32 is also provided. The indirection table between the service index and the software code of the corresponding service is then modified so that an index of the index points to the imported software code, that is, to the address of the memory 32 in which the software code is stored.

[0120] In particular, in this variant, the parameter 3022 indicating what type of modification of the memory 32 should be implemented is provided to be able to take the values ​​RS, IR and IS. When the parameter is at the value IS, this means that the modification to be implemented in the memory 32 consists of recording therein the software code of the new service and correspondingly modifying the indirection table between the service index and the software code of the corresponding service so that the new service is exposed by the microprocessor 3.

[0121] Now about Figure 6 and Figure 7 This variation is described in more detail.

[0122] Figure 6 It shows that when parameter 3022 is at value IS, Figure 3 The data described is 300. Only the Figure 3 The data 300 and Figure 6 The difference between the data 300.

[0123] exist Figure 6 In addition to the non-encrypted data 302-1 and the encrypted data 302-2, the data 300 (and more particularly the data 302) also includes data 302-3 representing the software code of the new service.

[0124] According to a preferred embodiment, the data 302-3 has been encrypted, for example by a symmetric encryption algorithm (for example of the AES type), preferably by using the initialization vector 3030 or all the data in the data 302-1 (including the initialization vector 3030) as an initialization vector.

[0125] The encryption of the software code providing the new service makes it possible to prevent it from being read out by malicious individuals, for example in order to deduce therefrom information relating to the internal operation of the microprocessor 3 and / or the operation of the new service.

[0126] According to an even more preferred embodiment, before the data 302-2, the data 302-3 has been encrypted, and when the data 302-3 is encrypted, for example, by means of an AES GCM type algorithm, an integrity code 3032 ("tag") has been generated. The variable data 3024 then represents the integrity code 3032 and possibly the padding data 3026.

[0127] Providing such an integrity code 3032 makes it possible to ensure that the software code of the new service has not been modified by a malicious individual (for example, a malicious individual wishes to import malware code into the microprocessor 3 to obtain information related to the internal operation of the microprocessor 3 when the malware is executed).

[0128] According to one embodiment, when data 302 includes data 302-3, signature 304 has been generated from data 302-1, 302-2 and 302-3. It can then be considered that providing the integrity of integrity code 3032 (in particular the software code of the new service) is redundant in the case of providing signature 304 obtained by asymmetric encryption. However, integrity code 3032 makes it possible to avoid the introduction of malware code into microprocessor 3 even in the case where a malicious individual has successfully forged signature 304.

[0129] exist Figure 6 In the alternative embodiment illustrated in FIG. 1 , in the case where parameter 3022 has a value of IR or RS, data 300 does not include data 302-3, and similarly to Figure 3 The data 300 is described.

[0130] Figure 7 The block diagram shows Figure 5 Here only the alternative embodiments of the method are highlighted. Figure 5 Methods and Figure 7 differences between the methods.

[0131] Steps 401, 402, 404 and about Figure 5 The steps described are similar or identical.

[0132] like Figure 5 As shown, step 403 starts from step 500, during which the microprocessor 3 decrypts the data 302-2.

[0133] Step 403 comprises a next step 501 in which the microprocessor 3 determines what type of modification of the memory 32 should be effected. To this end, the microprocessor 3 checks what value the parameter 3022 is equal to (IR, RS or IS in this alternative embodiment).

[0134] If parameter 3022 is at value RS (output RS of block 501), then as with respect to Figure 5 As described, step 403 proceeds to step 502 (not shown). In this alternative embodiment, at step 502, if the software code of the service pointed to by the service index equal to the target index 3020 is recorded in the memory 32, preferably, the microprocessor 3 commands to suppress the software code from the memory 32 to free up storage space in the memory 32.

[0135] If parameter 3022 is at value IR (output IR of block 501), then Figure 5 As described, step 403 proceeds to step 503 (not shown).

[0136] If the parameter 3022 is at the value IS (output IS of block 501), step 403 proceeds to step 700 (block "decryption code"). At step 700, the microprocessor 3 imports the data 302-3 representing the software code to be implanted into the memory 32 and preferably, while it imports the data 302-3, decrypts the data 302-3, for example with the aid of an adapted decryption circuit ( Figure 1 Then, the decrypted data 302-3, that is, the software code of the new service, is recorded in the memory 32.

[0137] According to an embodiment, where the data 302-3 has been encrypted by a symmetric encryption algorithm using an initialization vector, the microprocessor 3 decrypts the data 302-2 by using the same initialization vector, and the unencrypted data 302-1 represents the initialization vector.

[0138] According to one embodiment, in which integrity code 3032 is generated when the software code of the new service is encrypted to generate data 302-3, another integrity code is generated when data 302-3 is decrypted by microprocessor 3. In this embodiment, after step 700, step 403 then proceeds to step 701 (box "Is the tag qualified?"), in which the microprocessor verifies that the integrity code 3032 recovered by decrypting data 302-3 is the same as the integrity code generated when decrypting data 302-3. If yes (box 701 outputs "yes"), step 403 proceeds to step 702 (box "Implant service"). If no (box 701 outputs "no"), similar to step 404, step 403 proceeds to step 703 (box "Return tag error").

[0139] Preferably, at step 703, microprocessor 3 informs microprocessor 2 (eg via interface 4) that the required modification of memory 32 has not yet been performed (eg by modifying one or more bits of register 42 of microprocessor 2).

[0140] Furthermore, at step 703 , preferably, the microprocessor 3 deletes the software code that has been recorded in the memory 32 at step 700 .

[0141] According to an embodiment, in which integrity code 3032 has not yet been generated when the software code of the new service is encrypted to obtain data 302-3, no other integrity code is generated when data 302-3 is decrypted by microprocessor 3. In this embodiment, after step 700, step 403 then proceeds directly to step 702.

[0142] At step 702, the microprocessor 3 adds, in its exposed service group, the service whose software code has been recorded in the memory 32 in step 700. To this end, the microprocessor 3 modifies the indirection table between the service index and the software code of the service (supported or not) pointed to by the service index. More specifically, the microprocessor 3 makes the service index equal to the target index 3020 point to the address of the memory 32 where the software code of the new service has been recorded. In other words, the microprocessor 3 makes the service index equal to the target index 3020 point to the new service. This is equivalent to adding the new service to the service group exposed by the microprocessor 3.

[0143] Step 702 marks the end of the method of modifying the memory 32 and is as described with respect to Figure 4 The process ends as described in step 403.

[0144] In addition to what has been described above, it can also be considered that a service having its software code recorded in the memory 33 of the microprocessor 3 (or possibly in the memory 32 of the microprocessor 3) can include an indirection point. Therefore, when the software code is executed by the microprocessor 3, the execution is interrupted at the indirection point. At the indirection point, the service includes a test to verify whether the software code corresponding to the update of the service (that is, the software patch) is available in the memory 32 and whether it should be executed from the indirection point.

[0145] In this variant, the microprocessor 3 comprises an indirection table comprising update indices, each of which points to an update or not, that is, to a software code corresponding to an update. Note that an update can correspond to a software code stored in a non-volatile memory 32 of the microprocessor 3, such an update then corresponding to an initial part of the code of a service stored in the memory 32 and allowing the implementation of the service. When an update index points to not an update, the index points, for example, to a function (that is, software code) indicating that no update is available for the index. The indirection table between the update index and the corresponding update is initialized based on the content of the non-volatile memory 33. The indirection table is recorded in the volatile memory 32.

[0146] Thus, when executing a service including an indirection point, when the microprocessor 3 reaches the indirection point, it verifies in the indirection table between update indexes and updates whether the update index corresponding to the indirection point points to an update. If the update index points to an update (that is, the software code of the update), the microprocessor 3 will carry out the update. At the end of executing the update, the execution of the service can be resumed after the indirection point. If the update index points to no update, the execution of the service continues.

[0147] Providing one or more indirection points in the software code of a service makes it possible to modify only a part of the execution of a service, since the update of the code will be carried out when the microprocessor reaches the indirection point. This makes it possible in particular to anticipate modifications to the service, for example to correct a possible malfunction of the service, or to satisfy a request from a user of the microprocessor 3.

[0148] In this alternative embodiment, the inventor provides an update that can suppress the service by making the corresponding update index point to not update. In this variant, the inventor also provides a new update that can be imported into the memory 32 by recording the software code of the new update and by making the corresponding update index point to the software code and therefore point to the new update.

[0149] Therefore, in this variation, parameter 3022 ( Figure 3 and Figure 6 ) can adopt two additional values, namely, the values ​​RP and IP.

[0150] When parameter 3022 is at value RP, this means that the update index pointing to the corresponding updated indirect table should be modified so that the update index equal to target index 3020 points to no update. In this case, data 300 is about Figure 3 The data 3020 is of the type described above, with the difference that the target index 3020 corresponds to an update index rather than a service index. The data 302 does not include the data 302-3. Furthermore, in this case, the variable data 3024 includes only padding data 3026.

[0151] When parameter 3022 is at value IS, this means that the modification to be implemented in memory 32 consists in recording the software code of the new service therein and in modifying the indirection table between the service index and the software code of the corresponding service accordingly, so that the new service is exposed by microprocessor 3.

[0152] When parameter 3022 is at the value IP, this means that the modification to be implemented in memory 32 consists of recording therein the software code of the new update and modifying accordingly the indirection table between the update index and the update pointed to by this index. More specifically, the indirection table is modified so that the update index equal to target index 3020 points to the new update (that is, the software code of the new update), more precisely, to the address of memory 32 where the software code is recorded. In this case, data 300 is about Figure 6 The type of data described is different in that the target index 3020 corresponds to an update index instead of a service index. Then, data 302-3 represents the newly updated software code.

[0153] In the case where data 302-3 represents software code for a new service, Figure 6 The advantages already described with respect to data 302, and in particular data 302, also apply when data 302-3 represents newly updated software code.

[0154] Figure 8 In block diagram form, it is shown that in the case where parameter 3022 can take the values ​​IP and RP, Figure 5 and Figure 7 More specifically, in this variant, parameter 3022 may take the value RS, the value IR, the value IS, the value IP or the value RP.

[0155] Only the Figure 7 Methods and Figure 8 differences between the methods.

[0156] Steps 401, 402, 404 and about Figure 7 The steps described are the same.

[0157] As in Figure 7 As shown in FIG. 4 , step 403 starts from step 500 , during which the microprocessor 3 decrypts the data 302 - 2 .

[0158] Step 403 comprises a next step 501 in which the microprocessor 3 determines what type of modification of the memory 32 should be effected. To this end, the microprocessor 3 checks what value the parameter 3022 is equal to (IR, RS, IS, IP or RP in this alternative embodiment).

[0159] If parameter 3022 is at value RS (output RS of block 501), then as with respect to Figure 5 As described, step 403 proceeds to step 502 (not shown).

[0160] If parameter 3022 is at value IR (output IR of block 501), then Figure 5 As described, step 403 proceeds to step 503 (not shown).

[0161] If parameter 3022 is at value IS (output IS of block 501), then as with respect to Figure 7 As described, step 403 proceeds to step 700 (not shown).

[0162] If the parameter is at the value RP (output RP of box 501), step 403 proceeds to step 800 (box "Remove Patch"). At step 800, the microprocessor 3 modifies the indirection table between the update index and the corresponding update, that is, modifies the content of the memory 32 of the microprocessor 3 storing the indirection table. More precisely, the microprocessor 3 makes the update index equal to the target index 3020 point to an address that does not correspond to any update, for example to an address indicating that there is no update available for this index. This is equivalent to the update index pointing to no update and therefore suppressing the update to which it previously pointed. Preferably, at step 800, before the modification of the indirection table, the microprocessor 3 deletes the updated software code to which the update index, equal to the target index 3020, once pointed. Then, step 800, and more generally, the method of modifying the memory 32 is as described with respect to Figure 4 The process ends as described in step 403.

[0163] If the parameter is at value IP (output IP of block 501), step 403 proceeds to step 802 (block "decryption code"). Step 802 is related to Figure 7 The steps 700 described are similar or even identical.

[0164] According to an embodiment, where the data 302 - 3 has been encrypted by a symmetric encryption algorithm using an initialization vector 3030 , the microprocessor 3 decrypts the data 302 - 2 by using the same initialization vector, and the unencrypted data 302 - 1 represents the initialization vector 3030 .

[0165] According to an embodiment, in which integrity code 3032 has been generated when the newly updated software code is encrypted to obtain data 302-3, another integrity code is generated when the data 302-3 is decrypted by the microprocessor 3. In this embodiment, after step 802, step 403 then proceeds to step 804 (step "Is the label qualified?"), which is the same as the step about Figure 7 801 described above. More specifically, at step 804, the microprocessor verifies that the integrity code 3032 contained in the decrypted data 302-2 is the same as the integrity code generated when decrypting the data 302-3. If they are the same (the output of block 804 is "yes"), step 403 proceeds to step 808 (block "implant patch"). If they are not the same (the output of block 804 is "no"), step 403 proceeds to step 806 (block "return tag error"), which is similar to step 703 ( Figure 7 ).

[0166] Preferably, at step 806 , the microprocessor 3 deletes the software code that has been recorded in the memory 32 at step 802 .

[0167] According to an embodiment, wherein the integrity code 3032 has not yet been generated when the newly updated software code is encrypted to obtain the data 302-3, no other integrity code has yet been generated when the data 302-3 is decrypted by the microprocessor 3. In this embodiment, after step 802, step 403 then proceeds directly to step 808.

[0168] At step 808, the microprocessor 3 modifies the indirection table between the update index and the updates pointed to by at least some of the indices. More specifically, at step 802, the microprocessor 3 makes the update index equal to the target index 3020 point to the new update, that is, to the address of the memory 32 in which the software code of the new update is recorded at step 802. If, before the modification of the indirection table, the update index points to no update, this is equivalent to adding an update to the relevant service. If, before the modification of the indirection table, the update index points to an update, this is equivalent to replacing this update with the new update.

[0169] Step 808, and more generally, methods of modifying memory 32, such as with respect to Figure 4 The process ends as described in step 403.

[0170] exist Figure 8In an alternative embodiment of the method not shown, after step 501, if parameter 3022 is at value IS or IP, step 403 proceeds to Figure 7 Step 700.

[0171] In this variation (not shown), if integrity code 3032 has already been generated when encrypting data 302-3, step 700 includes generating another integrity code when decrypting data 302-3, and the step proceeds to Figure 7 If, at step 701, the integrity codes are the same, then step 701 proceeds to a new step of testing the value of parameter 3022. If parameter 3022 is at value IP, then this new test step is followed by Figure 8 Step 808 of , and if the parameter is at value IS, a new test step is followed by Figure 7 Step 702.

[0172] In this variation (not shown), if no integrity code has been generated when encrypting data 302-3, step 700 proceeds directly to a new step of testing the value of parameter 3022, and the method then continues as described in the previous paragraph.

[0173] Already about Figure 8 A method is described in which parameter 3022 can take any value among the values ​​RS, RP, IS, IP, and IR. It will be within the ability of a skilled person to adapt the method to the case in which parameter 3022 can take any value only among certain values ​​among the values ​​RS, RP, IS, IP, and IR (e.g., only among the values ​​RS, RP, IP, and IR).

[0174] In addition, the inventors optionally provide an embodiment of a method for managing a reserved storage space in the memory 32, so that the software code is recorded in the storage space each time step 702 or step 808 is implemented. The reserved space corresponds to a series of consecutive memory addresses of the memory 32. When implementing step 800 and step 502, if the implementation corresponds to the suppression of the service whose software code is recorded in the reserved storage space, the reserved space can also be modified when implementing step 800 and step 502.

[0175] Now about Fig. 9 Describe the method. Fig. 9Three views A, B and C are included, which respectively illustrate the reserved storage space in an initial state, after implementing step 808, and after implementing step 702. It is considered here that a series of consecutive addresses of the memory 32 corresponding to the reserved storage space starts at address X and ends at address X+Y, each address corresponding to a storage word of the memory 32. In other words, the reserved storage space includes storage words of the number Y+1, each storage word is identified by an address.

[0176] In this method, as in Fig. 9 As illustrated in view A of , initially, the reserved storage space does not contain software code. In addition, the reserved storage space includes a storage word 900, which includes four fields C1, C2, C3 and C4, which represent: the type of modification of the memory 32, the service or update index involved in the modification, the size of the software code corresponding to the service or update pointed to by the involved index, and the memory address of the reserved storage space in which the software code is stored. More specifically, in the storage word 900, the field C1 is a default value indicating an invalid type of modification of the memory 32, the field C2 is a default value indicating an invalid index, the field C3 is a default value indicating, for example, a value indicating that the software code size is zero, and the field C4 is a default value indicating the address of the first free storage word in the reserved storage space, which starts from the end of the reserved space (here, address X+Y).

[0177] In the initial state, the storage word 900 is at the starting address X of the reserved storage space.

[0178] exist Fig. 9 In view B of FIG. 8 , when step 808 is implemented, the software code Code1 corresponding to the update in this example has been recorded in the reserved storage space illustrated in view A.

[0179] To this end, the code Code1 has been recorded in the reserved storage space so that a range of a series of consecutive addresses of the code Code1 extends from the address indicated in the field C4 of the word 900 of view A (here, address X+Y).

[0180] Additionally, field C4 of word 900 has been set to a value indicating the address of the first free memory word of the reserved memory space starting from the end of the reserved space, in this example address @Code1-1.

[0181] Word 900 has then been shifted one address towards the end of the reserved storage space (here address X+1).

[0182] Then, word 901 including four fields C1, C2, C3 and C4 has been recorded at the starting address (here address X) of the reserved storage space. Field C1 of word 901 is a value indicating the type of memory modification involving adding updated software code. Field C2 of word 901 is a value indicating an update index pointing to code Code1. Field C3 is a value indicating the size of code Code1. Field C4 is a value indicating the starting address of the address range of code Code1, which is address @Code1 in this example.

[0183] exist Fig. 9 In view C of FIG. 7 , as a result of the implementation of step 702 , the software code Code2 corresponding to the new service has been recorded into the reserved storage space illustrated by view B.

[0184] To this end, code Code2 has been recorded into the reserved storage space so that the range of a series of consecutive addresses of code Code2 extends from the address indicated in field C4 of word 900 of view B (address @Code1-1 in this example). More specifically, the range of a series of consecutive addresses of code Code2 ends at address @Code1-1.

[0185] Additionally, field C4 of word 900 is set to a value indicating the address of the first free memory word of the reserved memory space, starting from the end of the reserved space, here address @Code2-1.

[0186] Words 900 and 901, that is, words containing fields C1, C2, C3 and C4, respectively, have been shifted one address towards the end of the reserved storage space. Thus, in this example, word 900 is shifted to address X+2 and word 901 is shifted to address X+1.

[0187] Then, word 902 including four fields C1, C2, C3 and C4 has been recorded at the starting address (here address X) of the reserved storage space. Field C1 of word 902 is a value indicating the type of memory modification involving software code for adding a new service. Field C2 of word 902 is a value indicating a service index pointing to code Code2. Field C3 of word 902 is a value indicating the size of code Code2. Field C4 of word 902 is a value indicating the starting address of the address range of code Code2, in this example, address @Code2.

[0188] More generally, each time software code is added to the reserved storage space, it includes: shifting one address toward the end of the reserved storage space, recording the storage word representing the software code in the reserved storage space, and the initial storage word 900 represents the address of the first free storage word, which starts from the end of the reserved storage space, or in other words, the word shift including fields C1 to C4; recording the software code to be added in a range of a series of consecutive addresses, the last address of the series of consecutive addresses corresponds to the address indicated by field C4 of the initial word 900; at the starting address of the reserved storage space, recording the storage word representing the new software code, or in other words, recording the storage word including fields C1 to C4; and, updating the initial storage word 900 so that the address indicated by its field C4 corresponds to the address of the first free storage word, which starts from the end of the reserved storage space.

[0189] Furthermore, although not illustrated, preferably, when suppressing software code from the reserved memory space, Fig. 9 The described method further comprises the following steps:

[0190] - suppressing the software code; before the suppressed software code is recorded in the reserved storage space, shifting the possible software code recorded in the reserved storage space towards the end of the reserved storage space (that is, on the side of the beginning of the reserved storage space relative to the suppressed software code) by an address corresponding to the size of the suppressed software code; suppressing the storage word representing the suppressed software code; and updating the storage words representing the software code stored in the reserved storage space, in particular their field C4; and shifting an address towards the beginning of the reserved storage space, the storage word representing the software code stored in the reserved storage space.

[0191] The above method enables to maintain a continuous free storage space for recording new software code therein, which continuous free storage space is as large as possible in view of the size of the reserved storage space and the size of the software code already recorded therein.

[0192] In the above description, it has been considered that addresses X and X+Y are the start and end addresses of the reserved storage space, respectively. However, this is only a convention, and it is within the ability of those skilled in the art to adapt the above method to the case where addresses X and X+Y are considered to be the end and start addresses of the reserved storage space, respectively, according to the convention.

[0193] Although not described in detail in this article, Fig. 9 The method described is adapted for parameter 3022 ( Figure 3 and Figure 6 ) The situation where only some of the values ​​IR, RS, RP, IP and IS can be used is within the capabilities of a technician in this field.

[0194] Various embodiments and variants have been described. It will be appreciated by those skilled in the art that certain features of these various embodiments and variants may be combined and that other variants will occur to those skilled in the art. In particular, the case of a ROM-type memory 33 has been described above, that is, a read-only memory having its contents set when the memory is manufactured. In an alternative embodiment, the memory 33 corresponds to a memory of the flash type, for example, whose contents are not set when manufactured, but are set, for example, by a fuse that destroys the configuration of the memory 33, explicitly prohibiting any write access to the memory 33 once the memory 33 has been programmed.

[0195] Embodiments and variations of modifying the service group exposed by the microprocessor 3 by modifying the memory 32 of the microprocessor 3 have been described above, wherein the service group initially exposed by the microprocessor 3 is determined by the set contents of another memory 33 of the microprocessor when the microprocessor 3 is powered on, and the initial contents of the memory 32 are also determined by the set contents of the memory 33. Such embodiments and variations are not limited to the case where the microprocessor 3 is a secure microprocessor (hardware security module).

[0196] Finally, based on the functional indications given above, the actual implementation of the described embodiments and variants is within the capabilities of a person skilled in the art. In particular, with regard to programming of data 300 in microprocessor 2 by authorized personnel, the following items are within the capabilities of a person skilled in the art: generating data 300, recording it in a non-volatile memory of microprocessor 2 and programming the microprocessor so that the microprocessor records data 300 in a given memory location, and generating a request to modify the content of memory 32 of microprocessor 3, the request in particular indicating the memory bits in which data 300 can be accessed by microprocessor 3.

Claims

1. A method comprising: receiving, by a first microprocessor, a request to modify the contents of a first memory of the first microprocessor, the first memory being accessible only by the first microprocessor; accessing, by the first microprocessor, first data associated with the request and a signature generated from the first data using an asymmetric encryption algorithm, the first data and the signature being available in a second memory of the second microprocessor, and the first data representing modifications applied to the contents of the first memory, the modifications representing modifications to a set of services exposed by the first microprocessor; verifying, by the first microprocessor, the authenticity of the first data based on the signature; as well as The content of the first memory is modified according to the first data, the modification being conditional on the verification.

2. The method according to claim 1, wherein: A first indirection table is stored in the first memory, the first indirection table comprising one or more first indexes, each of the first indexes pointing to a different exposed service or unsupported service; The first data includes second data representing at least a target index and a parameter, the parameter having a value selected from at least a first value and a second value; And wherein modifying the content of the first memory comprises: when the parameter is at the first value, modifying the first indirection table so that an index from the first index that is equal to the target index points to an unsupported service, or When the parameter is at the second value, the first indirection table is modified so that an index from the first index that is equal to the target index points to another service that has not been exposed.

3. The method according to claim 1, wherein: A first indirection table is stored in the first memory, the first indirection table comprising one or more first indexes, each of the first indexes pointing to a different exposed service or unsupported service; The first data includes second data representing at least a target index and a parameter, the parameter having a value selected from at least a first value and a second value; And wherein modifying the content of the first memory comprises: when the parameter is at the first value, modifying the first indirection table so that an index from the first index that is equal to the target index points to an unsupported service, and When the parameter is at the second value, the first indirection table is modified so that an index from the first index that is equal to the target index points to another service that has not been exposed.

4. The method of claim 3, wherein the value of the parameter is selected from at least the first value, the second value, and a third value, and wherein modifying the content of the first memory comprises: When the parameter is at the third value, software code of a new service is recorded into the first memory, and the first indirection table is modified so that an index from the first index that is equal to the target index points to the new service.

5. The method according to claim 4, wherein: A second indirection table is stored in the first memory, the second indirection table comprising one or more second indexes, each of the second indexes pointing to a region of the first memory, the region containing or not containing an update of one of the exposed services; and The value of the parameter is selected from at least the first value, the second value and a fourth value, and wherein modifying the content of the first memory includes: when the parameter is at the fourth value, suppressing the update contained in the area of ​​the first memory pointed to by a second index from the second index that is equal to the target index.

6. The method according to claim 5, wherein the value of the parameter is selected from at least the first value, the second value, the fourth value and the fifth value, and wherein, Modifying the content of the first memory includes recording updated software code of one of the exposed services in the area of ​​the first memory pointed to by the second index equal to the target index when the parameter is at the fifth value. 7 . The method according to claim 6 , wherein the first data includes third data representing the software code recorded when the content of the first memory is modified.

8. The method of claim 7, wherein the second data is data encrypted by a symmetric encryption algorithm, and wherein modifying the contents of the first memory comprises decrypting, by the first microprocessor, the second data.

9. The method of claim 8, wherein the third data is data encrypted by another symmetric encryption algorithm, and wherein modifying the content of the first memory comprises: After said decrypting said second data, said third data is decrypted by said first microprocessor.

10. The method of claim 9, wherein the second data further represents a first integrity code generated when encrypting the third data, wherein the decrypting the third data further comprises comparing the first integrity code with a second integrity code generated when decrypting the third data, the modification of the contents of the first memory of the first data being conditional on the comparison.

11. The method of claim 5, wherein the set of services initially exposed by the first microprocessor is determined by the contents of a third non-volatile memory of the first microprocessor, the contents of the third non-volatile memory being set and accessible only by the first microprocessor.

12. The method of claim 11, wherein the third non-volatile memory is a read-only memory.

13. The method of claim 11, wherein the another service that is not exposed is determined by the content of the third non-volatile memory.

14. The method of claim 11, wherein the update further comprises fourth non-encrypted data, the fourth non-encrypted data indicating: the asymmetric encryption algorithm used; An initialization vector for the symmetric encryption; The size of the first data; and A version of the third non-volatile memory and its contents.

15. The method of claim 11, wherein the update further comprises fourth non-encrypted data, the fourth non-encrypted data indicating: the asymmetric encryption algorithm used; An initialization vector for the symmetric encryption; The size of the first data; or A version of the third non-volatile memory and its contents.

16. The method of claim 1, wherein the first memory is a volatile memory.

17. A first microprocessor comprising: A processor and a non-volatile memory having set contents, the non-volatile memory including a program having instructions that, when read by the processor, cause the processor to receiving a request to modify the contents of a first memory of the first microprocessor, the first memory being accessible only by the first microprocessor, accessing first data associated with the request and a signature generated from the first data using an asymmetric encryption algorithm, the first data and the signature being available in a second memory of a second microprocessor, and the first data representing a modification to be applied to the content of the first memory, the modification representing a modification of a set of services exposed by the first microprocessor, verifying, by the first microprocessor, the authenticity of the first data based on the signature, and The content of the first memory is modified according to the first data, the modification being conditional on the verification.

18. The first microprocessor of claim 17, wherein a first indirection table is stored in the first memory, the first indirection table comprising one or more first indexes, each of the first indexes pointing to a different exposed service or unsupported service; The first data includes second data representing at least a target index and a parameter, the parameter having a value selected from at least a first value and a second value; and The instruction for modifying the content of the first memory includes: when the parameter is at the first value, modifying the first indirection table so that an index from the first index that is equal to the target index points to an unsupported service, and When the parameter is at the second value, the first indirection table is modified so that an index from the first index that is equal to the target index points to another service that is not exposed.

19. The first microprocessor of claim 18, wherein the value of the parameter is selected from at least the first value, the second value, and a third value, and wherein the instruction for modifying the contents of the first memory comprises: When the parameter is at the third value, software code of a new service is recorded into the first memory, and the first indirection table is modified so that an index from the first index that is equal to the target index points to the new service.

20. The first microprocessor of claim 19, wherein: A second indirection table is stored in the first memory, the second indirection table comprising one or more second indexes, each of the second indexes pointing to a region of the first memory, the region containing or not containing an update of a service of the exposed service; and The value of the parameter is selected from at least the first value, the second value and a fourth value, and wherein the instruction for modifying the content of the first memory comprises: when the parameter is at the fourth value, suppressing the update contained in the area of ​​the first memory pointed to by the second index from the second index, the second index being equal to the target index.

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