Chip-on-board optoelectronic device

Abstract

Embodiments of the present invention disclose a chip-on-board optoelectronic device, for example, including: a packaging substrate provided with a chip mounting area, a first electrode, and a second electrode, wherein the first and second electrodes are spaced apart and disposed on the periphery of the chip mounting area; a plurality of first optoelectronic chips disposed in the chip mounting area to form a plurality of mutually spaced concave strip patterns to respectively serve as a plurality of first color temperature zones, wherein the plurality of first optoelectronic chips are electrically connected between the first and second electrodes to form at least one first optoelectronic chip string; and a plurality of second optoelectronic chips disposed in the chip mounting area to form a plurality of second color temperature zones, wherein the light-emitting color temperature of the second color temperature zones is higher than that of the first color temperature zones, and the plurality of second optoelectronic chips are electrically connected between the first and second electrodes to form a plurality of second optoelectronic chip strings. Embodiments of the present invention can achieve better mixing light uniformity.

Description

Technical Field

[0001] The present invention relates to the field of optoelectronic technology, and in particular to a chip on board (COB) type optoelectronic device. Background Art

[0002] COB dimming products integrate two light-emitting diodes with different color temperature channels in the same COB optoelectronic device. The luminous intensity of the two groups of light-emitting diodes is changed by adjusting the input current to achieve the purpose of color temperature / brightness adjustment.

[0003] In an existing COB dimming product, both color temperature channels use flip-chip CSP (Chip Scale Package) LEDs, or one color temperature channel uses flip-chip CSP LEDs and the other color temperature channel uses flip-chip + fluorescent glue coating. The advantage of this structure is that the flip chip surface does not need wire bonding, and the placement of flip chips of different color temperature channels is more flexible.

[0004] In another existing COB dimming product, a mirror aluminum substrate + a positive chip + a fluorescent glue coating is used. Compared with the aforementioned flip chip structure, this structure is adopted in more and more dimming products because the positive chip has high optical efficiency and low cost, and the reflectivity of the mirror aluminum substrate is relatively high. On the other hand, the positive chips of the same color temperature channel in the dimming product need to be wired and connected to form a chip string to be driven together. Therefore, the chips in the same chip string must be arranged adjacent to each other and cannot cross with different chip strings to ensure that the connection lines of different chip strings do not cross. This design requirement causes the chip string of one color temperature channel in the dimming product to be unable to cross with the chip string of another color temperature channel, making it difficult to form a complex arrangement of uniform interlaced mixing of different color temperature channels. However, if the chip arrangement of a certain color temperature channel is too concentrated, it will inevitably cause uneven light mixing effect. This problem is more prominent in DW (Dim-to-Warm or Warm Dimming) dimming products.

[0005] As mentioned above, the characteristic of DW dimming products is to simulate the luminous state of traditional incandescent lamps, that is, low color temperature and low brightness (usually 1800K / <5% brightness) when small current is input, and warm color temperature and high brightness (usually 2700K or 3000K) when large current is input. In order to achieve the above dimming and color adjustment functions, DW dimming products have several design differences compared to other types of dimming products: (1) Multiple chip strings need to be connected in parallel during circuit design, but the voltage of one or more of the strings must be lower than that of other parallel chip strings when small current is input; (2) Fluorescent glue is used to separately coat the chip string with low voltage when small current is input to achieve the required low color temperature; and (3) The number of low color temperature chip strings should not be too many, otherwise it will reduce the overall luminous efficiency of the product. Since the number of chips in a low color temperature chip string is much lower than the number of chips in a warm color temperature chip string, such as Figure 1 As shown, general DW dimming products use a straight strip area located on the center line of the COB optoelectronic device as the low color temperature zone, and have a low color temperature chip string and three warm color temperature chip strings. The low color temperature chip string includes ten chips 13 connected in series, and the three warm color temperature chip strings include eleven chips 15 connected in series, twelve chips 15 connected in series, and twelve chips 15 connected in series, respectively. The circuit connection of this design is simple and intuitive, and the different color temperature partitions have central symmetry. If the external optical lens is not used to converge the luminous angle, its far-field distribution uniformity can be accepted by most users, but more applications of DW dimming products require the use of external optical lenses to achieve specific luminous angles. The design in which the low color temperature chips are concentrated on the center line can easily highlight the problem of uneven light color mixing after passing through the optical lens. Therefore, how to solve the uneven light color mixing of DW dimming products under the external optical lens is a technical problem that needs to be solved urgently. Summary of the invention

[0006] Therefore, the embodiment of the present invention provides a chip-on-board optoelectronic device, which can achieve better light mixing uniformity.

[0007] Specifically, an on-board chip optoelectronic device proposed in an embodiment of the present invention includes: a packaging substrate provided with a chip installation area, a first electrode, and a second electrode, wherein the first electrode and the second electrode are spaced apart and arranged on the periphery of the chip installation area; a plurality of first optoelectronic chips arranged in the chip installation area to form a plurality of mutually spaced concave strip patterns to respectively serve as a plurality of first color temperature zones, wherein a plurality of the first optoelectronic chips included in each of the first color temperature zones are connected in series in sequence, the plurality of first optoelectronic chips are electrically connected between the first electrode and the second electrode to form at least one first optoelectronic chip string, and each of the first optoelectronic chip strings includes a plurality of the first optoelectronic chips connected in series; and a plurality of second optoelectronic chips arranged in the chip installation area to form a plurality of second color temperature zones, wherein the plurality of second color temperature zones are separated by the plurality of first color temperature zones in the chip installation area, the light-emitting color temperature of each of the second color temperature zones is higher than the light-emitting color temperature of each of the first color temperature zones, the plurality of second optoelectronic chips are electrically connected between the first electrode and the second electrode to form a plurality of second optoelectronic chip strings, and each of the second optoelectronic chip strings includes a plurality of the second optoelectronic chips connected in series.

[0008] In an embodiment of the present invention, a plurality of the first optoelectronic chips included in each of the first color temperature zones are arranged in sequence from opposite ends of the first color temperature zone in a manner of gradually approaching the center of the chip installation area to the middle of the first color temperature zone, and the opposite ends are respectively adjacent to the boundary of the chip installation area; and the plurality of second color temperature zones include areas located between the plurality of first color temperature zones and areas located on the side of each of the first color temperature zones away from the center.

[0009] In an embodiment of the present invention, each of the concave strip patterns is an arc pattern.

[0010] In an embodiment of the present invention, each of the concave strip patterns is a broken line pattern.

[0011] In an embodiment of the present invention, the plurality of first color temperature zones respectively include the same number or different numbers of the first optoelectronic chips.

[0012] In an embodiment of the present invention, the quantity ratio of the at least one first optoelectronic chip string to the plurality of second optoelectronic chip strings is 1:2 to 1:7, and the number of the plurality of second optoelectronic chip strings is greater than or equal to 3.

[0013] In an embodiment of the present invention, each of the first optoelectronic chip strings is connected in series with a resistor arranged on the packaging substrate between the first electrode and the second electrode.

[0014] In one embodiment of the present invention, the number of the first optoelectronic chips included in each of the first optoelectronic chip strings is less than the number of the second optoelectronic chips included in each of the second optoelectronic chip strings.

[0015] In one embodiment of the present invention, within five virtual blocks formed by equally dividing the chip mounting area, the ratio of the light-emitting area of the first optoelectronic chips included in each virtual block to the total light-emitting area of the multiple first optoelectronic chips is 15% - 25%, and the five virtual blocks include a central block and four equal division blocks of the annular area formed by the boundary of the central block and the boundary of the chip mounting area.

[0016] In one embodiment of the present invention, the first optoelectronic chip and the second optoelectronic chip are respectively a flip-chip LED chip.

[0017] The above technical solutions may have one or more of the following advantages: In the chip-on-board optoelectronic device of this embodiment, multiple first optoelectronic chips are reasonably arranged within the chip mounting area to form multiple concave belt-shaped patterns respectively as multiple first color temperature zones. In this way, the concave shapes of each first color temperature zone can ensure that a certain number of first optoelectronic chips extend to the central area of the light-emitting surface (or the central area of the chip mounting area), which makes the light color of the emitted light spot of the chip-on-board optoelectronic device tend to be uniform in all directions. Furthermore, the design that the relative two ends of each first color temperature zone are adjacent to the boundary of the chip mounting area facilitates the electrical connection between the first optoelectronic chip and the first electrode and the second electrode. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present invention or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments or related technologies. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0019] Figure 1 It is a schematic structural diagram of a DW dimming product in related technologies.

[0020] Figure 2 It is a schematic structural diagram of a chip-on-board optoelectronic device according to the first embodiment of the present invention.

[0021] Figure 3 For Figure 2 The equivalent circuit diagram of the shown chip-on-board optoelectronic device.

[0022] Figure 4A AndFigure 4B respectively Figure 1 the DW dimming product shown Figure 2 and the light emission effect diagram of the chip - on - board optoelectronic device shown.

[0023] Figure 5 It is a schematic diagram of an evaluation model for the luminous area distribution of a first optoelectronic chip according to the first embodiment of the present invention.

[0024] Figure 6A and Figure 6B For applying Figure 5 the evaluation model shown Figure 1 to the DW dimming product shown Figure 2 and the schematic diagram of the luminous area distribution of the first optoelectronic chip after applying it to the chip - on - board optoelectronic device shown.

[0025] Figure 7 It is a schematic diagram of the structure of a chip - on - board optoelectronic device according to the second embodiment of the present invention.

[0026] Figure 8 It is a schematic diagram of an evaluation model for the luminous area distribution of a first optoelectronic chip according to the second embodiment of the present invention.

[0027] Figure 9 For applying Figure 8 the evaluation model shown Figure 7 to the chip - on - board optoelectronic device shown

[0028] Figure 10 It is a schematic diagram of the structure of a chip - on - board optoelectronic device according to the third embodiment of the present invention.

[0029] Figure 11 It is a schematic diagram of the structure of a chip - on - board optoelectronic device according to the fourth embodiment of the present invention. Detailed implementation manners

[0030] The specific structures and functional details disclosed herein are merely representative and are for the purpose of describing exemplary embodiments of the present invention. However, the present invention can be embodied in many alternative forms and should not be construed as being limited only to the embodiments set forth herein.

[0031] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "center", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, unless otherwise stated, the meaning of "a plurality" is two or more. Additionally, the term "comprising" and any variations thereof are intended to cover non-exclusive inclusion.

[0032] In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, the terms "mounted", "connected", and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0033] The terms used herein are merely for the purpose of describing specific embodiments and are not intended to limit the exemplary embodiments. Unless the context clearly dictates otherwise, the singular forms "a", "an" are also intended to include the plural. It should also be understood that the terms "comprising" and / or "including" specify the presence of the stated features, integers, steps, operations, units, and / or components, and do not preclude the presence or addition of one or more other features, integers, steps, operations, units, components, and / or combinations thereof.

[0034]

First Embodiment

[0035] See Figure 2 and Figure 3 A chip - on - board optoelectronic device 10 provided by the first embodiment of the present invention, for example, includes: a packaging substrate 11, a plurality of first optoelectronic chips 13, and a plurality of second optoelectronic chips 15.

[0036] Among them, the encapsulation substrate 11 is provided with a chip mounting area 110, a first electrode 112, and a second electrode 114. The first electrode 112 and the second electrode 114 are arranged at intervals around the chip mounting area 110. For example, the encapsulation substrate 11 is, for example, a mirror aluminum substrate, the chip mounting area 110 is, for example, a circular area surrounded by dam glue (such as commercially available KER2020 milky white silica gel), the first electrode 112 and the second electrode 114 are, for example, a positive electrode (+) and a negative electrode (-) respectively, but the embodiments of the present invention are not limited thereto.

[0037] The multiple first optoelectronic chips 13 are arranged in the chip mounting area 110 to form two concave strip patterns spaced apart from each other to respectively serve as two first color temperature zones 130L and 130R. As Figure 2 and Figure 3 shown, the total number of the multiple first optoelectronic chips 13 is ten. The five first optoelectronic chips 13 included in the first color temperature zone 130L are connected in series in sequence. The five first optoelectronic chips 13 included in the first color temperature zone 130R are connected in series in sequence. The ten first optoelectronic chips 13 are electrically connected between the first electrode 112 and the second electrode 114 to form a first optoelectronic chip string, and the first optoelectronic chip string includes ten first optoelectronic chips 13 connected in series. Furthermore, the two concave strip patterns are respectively two arc patterns. The five first optoelectronic chips 13 included in the first color temperature zone 130L are arranged in sequence from the opposite ends of the first color temperature zone 130L in a manner of gradually approaching the center (such as the geometric center Gc) of the chip mounting area 110 to the middle of the first color temperature zone 130L, and the opposite ends of the first color temperature zone 130L are respectively adjacent to the boundary of the chip mounting area 110. Similarly, the five first optoelectronic chips 13 included in the first color temperature zone 130R are arranged in sequence from the opposite ends of the first color temperature zone 130R in a manner of gradually approaching the center (such as the geometric center Gc) of the chip mounting area 110 to the middle of the first color temperature zone 130R, and the opposite ends of the first color temperature zone 130R are respectively adjacent to the boundary of the chip mounting area 110.

[0038] The multiple second optoelectronic chips 15 are disposed within the chip mounting area 110 to form three second color temperature zones 150L, 150M, and 150R. Among them, the three second color temperature zones 150L, 150M, and 150R are separated by the two first color temperature zones 130L and 130R within the chip mounting area 110, such that the two first color temperature zones 130L and 130R and the three second color temperature zones 150L, 150M, and 150R are alternately arranged in the horizontal radial direction of the chip mounting area 110. Furthermore, the light-emitting color temperature of each of the three second color temperature zones 150L, 150M, and 150R is higher than the light-emitting color temperature of each of the two first color temperature zones 130L and 130R. For example, the light-emitting color temperature of each of the first color temperature zones 130L and 130R is a low color temperature such as 1800K, and the light-emitting color temperature of each of the second color temperature zones 150L, 150M, and 150R is a warm color temperature such as 2700K or 3000K, but the embodiments of the present invention are not limited thereto. As Figure 2 and Figure 3 shown, the total number of the multiple second optoelectronic chips 15 is thirty-five. The thirty-five second optoelectronic chips 15 are electrically connected between the first electrode 112 and the second electrode 114 to form three second optoelectronic chip strings. One second optoelectronic chip string includes eleven second optoelectronic chips 15, and the other two second optoelectronic chip strings each include twelve second optoelectronic chips 15. Typically, the number of second optoelectronic chips 15 in each of the second optoelectronic chip strings is greater than the number of first optoelectronic chips 13 in each of the first optoelectronic chip strings. In addition, the three second color temperature zones 150L, 150M, and 150R include a region 150M located between the two first color temperature zones 130L and 130R, a region 150L located on the side of the first color temperature zone 130L away from the geometric center Gc (i.e., Figure 2 the left side shown), and a region 150R located on the side of the first color temperature zone 130R away from the geometric center Gc (i.e., Figure 2 the right side shown).

[0039] Continuing from the above, from Figure 2 and Figure 3 it can also be known that resistors R11, R12, R21, and R22 are further disposed on the packaging substrate 11 of the chip-on-board optoelectronic device 10 of this embodiment. The resistors R11 and R12 are connected in parallel and then connected in series with the first optoelectronic chip string including ten first optoelectronic chips 13 between the first electrode 112 and the second electrode 114. The resistors R21 and R22 are connected in parallel and then connected in series with the second optoelectronic chip string including eleven second optoelectronic chips 15 between the first electrode 112 and the second electrode 114. Additionally, in combination with Figure 2 andFigure 3 It can be seen that five of the eleven second optoelectronic chips 15 in the second optoelectronic chip string are located within the second color temperature zone 150L, and the other six second optoelectronic chips 15 are located within the second color temperature zone 150R. As for the twelve second optoelectronic chips 15 in each of the other two second optoelectronic chip strings, they are all distributed within the second color temperature zone 150M.

[0040] In addition, by coating different fluorescent gels with different stimulated emission light colors on the two first color temperature zones 130L and 130R and the three second color temperature zones 150L, 150M, and 150R respectively. For example, coating a fluorescent gel that emits red or orange-red light after stimulation (such as a mixture of red or orange-red fluorescent powder and silica gel, or a mixture of KSF red fluorescent powder that is yellow in itself but emits red light after stimulation and silica gel) on the two first color temperature zones 130L and 130R, and coating a fluorescent gel that emits yellow light after stimulation (such as a mixture of yellow fluorescent powder and silica gel) on the three second color temperature zones 150L, 150M, and 150R, it makes the light color temperatures of the two first color temperature zones 130L and 130R different from those of the three second color temperature zones 150L, 150M, and 150R. It is worth mentioning that different fluorescent gels coated on the two first color temperature zones 130L and 130R and the three second color temperature zones 150L, 150M, and 150R can also use the same multiple (such as two) fluorescent powders but with different ratios to achieve different stimulated emission light colors. In addition, taking advantage of the characteristics that the first and second optoelectronic chips 13 and 15 have different I-V characteristic curves of resistors, the turn-on voltage thresholds of each of the first and second optoelectronic chips 13 and 15 are about 2.2V. When a small current is input, since the turn-on voltage of the first optoelectronic chip string is lower than that of each second optoelectronic chip string, the first optoelectronic chip string will be preferentially lit. When the current gradually increases, the voltages across the resistors R11 and R12 in the branch where the first optoelectronic chip string is located increase, and the current will shunt to the branches where each second optoelectronic chip string is located, causing the second optoelectronic chip string to light up, and the color temperature begins to change to the color temperature of the second color temperature zones 150L, 150M, and 150R.

[0041] See Figure 4A And Figure 4B , which are respectively Figure 1 the light emission effect diagrams of the DW dimming product shown in Figure 2 and the chip-on-board optoelectronic device 10 shown in Figure 4A And Figure 4B It can be seen that the light color mixing uniformity of the chip-on-board optoelectronic device 10 in this embodiment is better, that is, the mixed light uniformity is improved.

[0042] The basic design concept for improving the mixing light uniformity in this embodiment is to make the first optoelectronic chips 13 corresponding to the low color temperature be distributed as evenly as possible. To further quantitatively evaluate the design, an evaluation model is proposed in an embodiment of the present invention. As Figure 5 shown, the chip installation area 110 is equally divided into a plurality of virtual blocks, such as five virtual blocks, to analyze the distribution of the plurality of first optoelectronic chips 13 of the chip-on-board optoelectronic device 10. For example, analyze whether the ratio of the light-emitting area of the first optoelectronic chips 13 in each virtual block to the total light-emitting area of the plurality of first optoelectronic chips 13 is consistent. The more consistent the ratios of each virtual block are, the better the color mixing uniformity of the chip-on-board optoelectronic device 10 is. Herein, the light-emitting area of the first optoelectronic chip 13 can be the product of the length and width of the first optoelectronic chip 13.

[0043] In Figure 5 , the five virtual blocks include a central block 1 and four equal division blocks 2-5 of the annular region jointly surrounded by the boundary of the central block and the boundary of the chip installation area 110. Herein, the annular region is divided into four equal division blocks 2-5 by four axial dividing lines that intersect both the horizontal direction and the vertical direction (that is, neither parallel to the horizontal direction nor parallel to the vertical direction). The central block 1 is circular and its diameter is times the diameter of the chip installation area 110 (or the light-emitting surface).

[0044] Refer to Figure 6A and Figure 6B , which are respectively schematic diagrams of the light-emitting area distribution of the first optoelectronic chips 13 after applying the evaluation model shown in Figure 5 to the DW dimming product shown in Figure 1 and the chip-on-board optoelectronic device 10 shown in Figure 2 . In Figure 6A , four of the ten first optoelectronic chips 13 are concentrated in the central block 1, three first optoelectronic chips 13 are distributed in each of the equal division blocks 2 and 4, and the other two equal division blocks 3 and 5 do not have first optoelectronic chips 13. On the contrary, as shown in Figure 6B , the central area 1 and the four equal division blocks 2-5 each roughly contain the light-emitting area of two first optoelectronic chips 13, that is, the light-emitting area of the first optoelectronic chips 13 contained in each of them roughly accounts for 20% of the total light-emitting area of the ten first optoelectronic chips 13. Thus, the ratios of the light-emitting areas of the first optoelectronic chips 13 in the five virtual blocks 1-5 are close, indicating that the arrangement of the first optoelectronic chips 13 in the chip-on-board optoelectronic device 10 is well optimized. In addition, it is worth mentioning that through the experiments of the inventor, it is proved that when the ratios of the light-emitting areas of the first optoelectronic chips 13 in the five virtual blocks 1-5 are within the range of 15% - 25%, good color mixing uniformity can be obtained.

[0045] In summary, for the chip - on - board optoelectronic device 10 of this embodiment, in the chip installation area 10, a plurality of first optoelectronic chips 13 are reasonably arranged to form a plurality of concave belt - shaped patterns as a plurality of first color temperature zones (such as a low - color - temperature zone) respectively. The concave belt - shaped patterns of each first color temperature zone 130L, 130R are axisymmetric figures or approximately axisymmetric figures, and the axis of symmetry points to the center of the light - emitting surface. In this way, the concave shapes of each first color temperature zone 130L, 130R can ensure that a certain number of first optoelectronic chips 13 extend to the central area of the light - emitting surface (the central area of the chip installation area 110), which makes the central circular area of the outgoing light spot of the chip - on - board optoelectronic device 10 and the light color along the concentric - circle axis tend to be uniform. Moreover, the design that the opposite ends of each first color temperature zone 130L, 130R are adjacent to the boundary of the chip installation area 110 facilitates the electrical connection (such as wire bonding) between the first optoelectronic chip 13, the first electrode 112 and the second electrode 114.

[0046]

Second Embodiment

[0047] See Figure 7 , a chip - on - board optoelectronic device 30 provided by the second embodiment of the present invention includes, for example: a packaging substrate 11, a plurality of first optoelectronic chips 13 and a plurality of second optoelectronic chips 15.

[0048] Among them, the packaging substrate 11 is provided with a chip installation area 110, a first electrode 112 and a second electrode 114. The first electrode 112 and the second electrode 114 are arranged at intervals on the periphery of the chip installation area 110. For example, the packaging substrate 11 is, for example, a mirror - finished aluminum substrate, the chip installation area 110 is, for example, a circular area surrounded by dam glue (such as commercially available KER2020 milky white silica gel), and the first electrode 112 and the second electrode 114 are, for example, a positive electrode and a negative electrode respectively, but the embodiments of the present invention are not limited thereto.

[0049] The plurality of first optoelectronic chips 13 are arranged in the chip installation area 110 to form four mutually - spaced concave belt - shaped patterns as four first color temperature zones 130 respectively. As Figure 7As shown, the total number of the multiple first optoelectronic chips 13 is twenty. Four first color temperature zones 130 arranged at intervals from left to right respectively include three first optoelectronic chips 13, seven first optoelectronic chips 13, seven first optoelectronic chips 13, and three first optoelectronic chips 13, and the respective first optoelectronic chips 13 in each first color temperature zone 130 are connected in series in sequence. Moreover, the twenty first optoelectronic chips 13 are electrically connected between the first electrode 112 and the second electrode 114 to form two first optoelectronic chip strings, and each of the two first optoelectronic chip strings includes ten first optoelectronic chips 13 connected in series; for example, the ten first optoelectronic chips 13 included in the two first color temperature zones 130 on the left side form a first optoelectronic chip string, and the ten first optoelectronic chips 13 included in the two first color temperature zones 130 on the right side form another first optoelectronic chip string. Moreover, the four concave belt-shaped patterns are respectively four arc-shaped patterns, and the multiple first optoelectronic chips 13 included in each first color temperature zone 130 are arranged in sequence from the opposite ends of the first color temperature zone 130 to the middle of the first color temperature zone 130 in a manner of gradually approaching the center of the chip mounting area 110, and the opposite ends of the first color temperature zone 130 are respectively adjacent to the boundaries of the chip mounting area 110.

[0050] The multiple second optoelectronic chips 15 are arranged in the chip mounting area 110 to form five second color temperature zones 150. Among them, the five second color temperature zones 150 are separated by the four first color temperature zones 130 in the chip mounting area 110, so that the four first color temperature zones 130 and the five second color temperature zones 150 are arranged alternately in the horizontal radial direction of the chip mounting area 110. Moreover, the light-emitting color temperature of each of the five second color temperature zones 150 is higher than the light-emitting color temperature of each of the four first color temperature zones 130. For example, the light-emitting color temperature of each first color temperature zone 130 is a low color temperature such as 1800K, and the light-emitting color temperature of each second color temperature zone 150 is a warm color temperature such as 2700K or 3000K, but the embodiments of the present invention are not limited thereto. As Figure 7As shown, the total number of the multiple second optoelectronic chips 15 is fifty-nine. The fifty-nine second optoelectronic chips 15 are electrically connected between the first electrode 112 and the second electrode 114 to form five second optoelectronic chip strings. Among them, thirty-one second optoelectronic chips 15 located in the middle second color temperature zone 150 and four second optoelectronic chips 15 located in the leftmost and rightmost second color temperature zones 150 form three second optoelectronic chip strings (having eleven, twelve, and twelve second optoelectronic chips 15 respectively), and the twelve second optoelectronic chips 15 in each of the remaining two second color temperature zones 150 form two second optoelectronic chip strings. Typically, the number of second optoelectronic chips 15 in each of the second optoelectronic chip strings is greater than the number of first optoelectronic chips 13 in each of the first optoelectronic chip strings. In addition, the five second color temperature zones 150 include three regions between the four first color temperature zones 130, one region on the side of the leftmost first color temperature zone 130 far from the center of the chip mounting area 110, and one region on the side of the rightmost first color temperature zone 130 far from the center of the chip mounting area 110.

[0051] In addition, it is worth noting that the number ratio of the first optoelectronic chip strings to the second optoelectronic chip strings in this embodiment is 2:5, which is different from 1:3 in the aforementioned first embodiment. Furthermore, similar to the aforementioned first embodiment, the concave belt-shaped pattern in each of the first color temperature zones 130 in this embodiment is also an axisymmetric figure or an approximately axisymmetric figure, and the axis of symmetry points to the center of the light-emitting surface (such as the geometric center of the chip mounting area 110).

[0052] See Figure 8 and Figure 9 , where Figure 8 Another evaluation model including five virtual blocks is provided. Figure 9 For Figure 7 the schematic diagram of the light-emitting area distribution of the first optoelectronic chip 13 after the board-mounted chip type optoelectronic device 30 shown Figure 8 is applied to the evaluation model shown. In Figure 8 , the five virtual blocks include a central block 1 and four equal division blocks 2-5 of the annular area formed by the boundary of the central block and the boundary of the chip mounting area 110. Here, the annular area is divided into four equal division blocks 2-5 by four axial dividing lines parallel to the horizontal or vertical direction. The central block 1 is circular and its diameter is times the diameter of the chip mounting area 110 (or the light-emitting surface).

[0053] Combined with Figure 8 and Figure 9It can be seen that the central region 1 and the four quartered blocks 2-5 each approximately contain the light-emitting areas of four first optoelectronic chips 13, that is, the light-emitting areas of the first optoelectronic chips 13 contained in each of them approximately account for 20% of the total light-emitting areas of the twenty first optoelectronic chips 13. Thus, the ratios of the light-emitting areas of the first optoelectronic chips 13 in these five virtual blocks 1-5 are close, indicating that the arrangement of the first optoelectronic chips 13 in the on-board chip-type optoelectronic device 30 is well optimized. In addition, it is worth mentioning that through the inventor's experiments, it is proved that when the ratios of the light-emitting areas of the first optoelectronic chips 13 in these five virtual blocks 1-5 are within the range of 15% - 25%, good color mixing uniformity can be obtained. In addition, it is worth mentioning that if Figure 5 the evaluation model shown is adopted, the light-emitting areas of the first optoelectronic chips 13 contained in the central region 1 and the four quartered blocks 2-5 are also approximately close, that is, each approximately contains the light-emitting areas of four first optoelectronic chips 13.

[0054]

Third Embodiment

[0055] Refer to Figure 10 , an on-board chip-type optoelectronic device 50 provided by the third embodiment of the present invention, for example, includes: a packaging substrate 11, a plurality of first optoelectronic chips 13, and a plurality of second optoelectronic chips 15.

[0056] Among them, the packaging substrate 11 is provided with a chip mounting area 110, a first electrode 112, and a second electrode 114. The first electrode 112 and the second electrode 114 are arranged at intervals on the periphery of the chip mounting area 110. For example, the packaging substrate 11 is, for example, a mirror aluminum substrate, the chip mounting area 110 is, for example, a circular area surrounded by dam glue (such as commercially available KER2020 milky white silica gel), and the first electrode 112 and the second electrode 114 are, for example, a positive electrode and a negative electrode respectively, but the embodiments of the present invention are not limited thereto.

[0057] The plurality of first optoelectronic chips 13 are arranged in the chip mounting area 110 to form four mutually spaced concave belt-shaped patterns to respectively serve as four first color temperature zones 130. As Figure 10As shown, the four first color temperature zones 130 are respectively located at the four corners of the chip mounting area 110. The total number of the multiple first optoelectronic chips 13 is twenty. Each first color temperature zone 130 includes five first optoelectronic chips 13, and the five first optoelectronic chips 13 in each first color temperature zone 130 are connected in series in sequence. Moreover, the twenty first optoelectronic chips 13 are electrically connected between the first electrode 112 and the second electrode 114 to form two first optoelectronic chip strings, and each of the two first optoelectronic chip strings includes ten first optoelectronic chips 13 connected in series; for example, the ten first optoelectronic chips 13 included in the two first color temperature zones 130 on the left form a first optoelectronic chip string, and the ten first optoelectronic chips 13 included in the two first color temperature zones 130 on the right form another first optoelectronic chip string. Moreover, the four concave belt-shaped patterns are respectively four arc-shaped patterns. The multiple first optoelectronic chips 13 included in each first color temperature zone 130 are arranged in sequence from the opposite ends of the first color temperature zone 130 to the middle of the first color temperature zone 130 in a manner of gradually approaching the center of the chip mounting area 110, and the opposite ends of the first color temperature zone 130 are respectively adjacent to the boundary of the chip mounting area 110.

[0058] The multiple second optoelectronic chips 15 are arranged in the chip mounting area 110 to form five second color temperature zones 150. Among them, the five second color temperature zones 150 are spaced apart by the four first color temperature zones 130 in the chip mounting area 110, or in other words, a second color temperature zone 150 is spaced between two adjacent first color temperature zones 130. Moreover, the light-emitting color temperature of each of the five second color temperature zones 150 is higher than the light-emitting color temperature of each of the four first color temperature zones 130. For example, the light-emitting color temperature of each first color temperature zone 130 is a low color temperature such as 1800K, and the light-emitting color temperature of each second color temperature zone 150 is a warm color temperature such as 2700K or 3000K, but the embodiments of the present invention are not limited thereto. As Figure 10As shown, the total number of the multiple second optoelectronic chips 15 is fifty-nine. The fifty-nine second optoelectronic chips 15 are electrically connected between the first electrode 112 and the second electrode 114 to form five second optoelectronic chip strings. Among them, thirty-five second optoelectronic chips 15 located in the middle second color temperature zone 150 form three second optoelectronic chip strings (having twelve, eleven, and twelve second optoelectronic chips 15 respectively), twelve second optoelectronic chips 15 in the two second color temperature zones 150 outside the two first color temperature zones 130 on the left form one second optoelectronic chip string, and twelve second optoelectronic chips 15 in the two second color temperature zones 150 outside the two first color temperature zones 130 on the right form one second optoelectronic chip string. Typically, the number of second optoelectronic chips 15 in each of the second optoelectronic chip strings is greater than the number of first optoelectronic chips 13 in each of the first optoelectronic chip strings. In addition, the five second color temperature zones 150 include one area located between the four first color temperature zones 130 and four areas located on one side of each of the four first color temperature zones 130 away from the center of the chip mounting area 110.

[0059] In addition, it is worth noting that the number ratio of the first optoelectronic chip string to the second optoelectronic chip string in this embodiment is 2:5, which is different from 1:3 in the aforementioned first embodiment. Furthermore, similar to the aforementioned first embodiment, the concave belt-shaped pattern in each of the first color temperature zones 130 in this embodiment is also an axisymmetric figure or an approximately axisymmetric figure, and the axis of symmetry points to the center of the light-emitting surface (such as the geometric center of the chip mounting area 110).

[0060]

Fourth Embodiment

[0061] See Figure 11 , an on-chip optoelectronic device 70 provided by the fourth embodiment of the present invention, for example, includes: a packaging substrate 11, a plurality of first optoelectronic chips 13, and a plurality of second optoelectronic chips 15.

[0062] Among them, the packaging substrate 11 is provided with a chip mounting area 110, a first electrode 112, and a second electrode 114. The first electrode 112 and the second electrode 114 are spaced apart and arranged on the periphery of the chip mounting area 110. For example, the packaging substrate 11 is, for example, a mirror aluminum substrate, the chip mounting area 110 is, for example, a circular area surrounded by dam glue (such as commercially available KER2020 milky white silica gel), and the first electrode 112 and the second electrode 114 are, for example, a positive electrode and a negative electrode respectively, but the embodiments of the present invention are not limited thereto.

[0063] The plurality of first optoelectronic chips 13 are arranged in the chip mounting area 110 to form three mutually spaced concave belt-shaped patterns to respectively serve as three first color temperature zones 130. AsFigure 11 As shown, the total number of the multiple first optoelectronic chips 13 is twenty-one. Each first color temperature zone 130 includes seven first optoelectronic chips 13, and the seven first optoelectronic chips 13 in each first color temperature zone 130 are connected in series in sequence. Furthermore, the twenty-one first optoelectronic chips 13 are electrically connected between the first electrode 112 and the second electrode 114 to form three first optoelectronic chip strings, and each of the three first optoelectronic chip strings includes seven first optoelectronic chips 13 connected in series. Furthermore, the three concave belt-shaped patterns are respectively three broken line patterns. The multiple first optoelectronic chips 13 included in each first color temperature zone 130 are arranged in sequence from the opposite ends of the first color temperature zone 130 to the middle of the first color temperature zone 130 in a manner of gradually approaching the center of the chip mounting area 110, and the opposite ends of the first color temperature zone 130 are respectively adjacent to the boundaries of the chip mounting area 110.

[0064] The multiple second optoelectronic chips 15 are arranged in the chip mounting area 110 to form four second color temperature zones 150. Among them, the four second color temperature zones 150 are separated by the three first color temperature zones 130 in the chip mounting area 110, or in other words, a second color temperature zone 150 is spaced between two adjacent first color temperature zones 130. Furthermore, the light-emitting color temperature of each of the four second color temperature zones 150 is higher than the light-emitting color temperature of each of the three first color temperature zones 130. For example, the light-emitting color temperature of each first color temperature zone 130 is a low color temperature such as 1800K, and the light-emitting color temperature of each second color temperature zone 150 is a warm color temperature such as 2700K or 3000K, but the embodiments of the present invention are not limited thereto. As Figure 11 shown, the total number of the multiple second optoelectronic chips 15 is fifty-eight. The fifty-eight second optoelectronic chips 15 are electrically connected between the first electrode 112 and the second electrode 114 to form six second optoelectronic chip strings. Among them, the twenty-eight second optoelectronic chips 15 in the middle second color temperature zone 150 form three second optoelectronic chip strings (respectively having ten, eight, and ten second optoelectronic chips 15), and the ten second optoelectronic chips 15 in each of the other three second color temperature zones 150 form the other three second optoelectronic chip strings. Typically, the number of second optoelectronic chips 15 in each second optoelectronic chip string is greater than the number of first optoelectronic chips 13 in each first optoelectronic chip string. In addition, the four second color temperature zones 150 include a region located between the three first color temperature zones 130 and three regions located on the side of each of the three first color temperature zones 130 away from the center of the chip mounting area 110.

[0065] In addition, it is worth noting that the quantity ratio of the first optoelectronic chip string to the second optoelectronic chip string in this embodiment is 3:6, which is different from 1:3 described in the foregoing first embodiment. Moreover, different from the arc pattern described in the foregoing first embodiment, the concave belt-shaped pattern in each first color temperature zone 130 of this embodiment is a broken line pattern. As for this kind of broken line pattern, it is an axisymmetric figure or an approximately axisymmetric figure, and the axis of symmetry points to the center of the light-emitting surface (such as the geometric center of the chip mounting area 110).

[0066] It is worth noting that the first optoelectronic chips 13 and the second optoelectronic chips 15 in each embodiment of the present invention can be surface-mounted LED chips of the same color, such as surface-mounted blue LED chips, but the present invention is not limited thereto. In addition, the quantity ratio of the first optoelectronic chip string to the second optoelectronic chip string of the chip-on-board optoelectronic device in each embodiment of the present invention is not limited to the values listed in the foregoing first to fourth embodiments, and can also be other values, and preferably satisfies the condition that the quantity ratio of the first optoelectronic chip string to the second optoelectronic chip string is 1:2 to 1:7, and the quantity of the second optoelectronic chip string is greater than or equal to 3 to ensure the overall luminous efficiency of the chip-on-board optoelectronic device. In addition, the quantity of the first optoelectronic chips 13 in each first color temperature zone 130 (or 130L and 130R) can be the same or different; the concave belt-shaped patterns in the chip mounting area 110 can be centrosymmetric, axisymmetric or asymmetric. In addition, the quantity of the first color temperature zones 130 (or 130L and 130R) in the chip mounting area 110 is not limited to two, three and four listed in the foregoing first to fourth embodiments, and can also be flexibly designed based on the size of the light-emitting surface (or the size of the chip mounting area 110) and the quantity of chips.

[0067] In addition, it can be understood that the foregoing embodiments are only exemplary descriptions of the present invention. On the premise that the technical features do not conflict, the structure is not contradictory, and the invention purpose of the present invention is not violated, the technical solutions of each embodiment can be arbitrarily combined and used.

[0068] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of each embodiment of the present invention.

Claims

1. A chip - on - board optoelectronic device, characterized in that, Comprising: A packaging substrate, provided with a chip mounting area, a first electrode, and a second electrode, wherein the first electrode and the second electrode are spaced apart and arranged on the periphery of the chip mounting area; A plurality of first optoelectronic chips, arranged in the chip mounting area to form a plurality of mutually spaced concave strip patterns to respectively serve as a plurality of first color temperature zones, wherein a plurality of the first optoelectronic chips included in each of the first color temperature zones are connected in series in sequence, the plurality of first optoelectronic chips are electrically connected between the first electrode and the second electrode to form at least one first optoelectronic chip string, and each of the first optoelectronic chip strings includes a plurality of the first optoelectronic chips connected in series; A plurality of second optoelectronic chips, arranged in the chip mounting area to form a plurality of second color temperature zones, wherein the plurality of second color temperature zones are separated by the plurality of first color temperature zones in the chip mounting area, the light-emitting color temperature of each of the second color temperature zones is higher than the light-emitting color temperature of each of the first color temperature zones, the plurality of second optoelectronic chips are electrically connected between the first electrode and the second electrode to form a plurality of second optoelectronic chip strings, and each of the second optoelectronic chip strings includes a plurality of the second optoelectronic chips connected in series; Wherein, a plurality of the first optoelectronic chips included in each of the first color temperature zones are arranged in sequence from opposite ends of the first color temperature zone in a manner of gradually approaching the center of the chip mounting area to the middle of the first color temperature zone, and the opposite ends are respectively adjacent to the boundary of the chip mounting area; wherein, the first optoelectronic chips and the second optoelectronic chips are respectively flip-chip LED chips.

2. The chip - on - board optoelectronic device according to claim 1, characterized in that, The plurality of second color temperature zones include an area located between the plurality of first color temperature zones and an area located on a side of each of the first color temperature zones away from the center.

3. The chip - on - board optoelectronic device according to claim 2, characterized in that, Each of the concave strip patterns is an arc pattern.

4. The chip - on - board optoelectronic device according to claim 2, characterized in that, Each of the concave strip patterns is a broken line pattern.

5. The chip - on - board optoelectronic device according to claim 3 or 4, characterized in that, The plurality of first color temperature zones respectively include the same number or different numbers of the first optoelectronic chips.

6. The chip - on - board optoelectronic device according to claim 1, characterized in that, The quantity ratio of the at least one first optoelectronic chip string to the plurality of second optoelectronic chip strings is 1:2 to 1:7, and the number of the plurality of second optoelectronic chip strings is greater than or equal to 3.

7. The chip - on - board optoelectronic device according to claim 1, characterized in that, Each of the first optoelectronic chip strings is connected in series with a resistor arranged on the packaging substrate between the first electrode and the second electrode.

8. The chip - on - board optoelectronic device according to claim 7, characterized in that, The number of the first optoelectronic chips included in each of the first optoelectronic chip strings is less than the number of the second optoelectronic chips included in each of the second optoelectronic chip strings.

9. The chip - on - board optoelectronic device according to claim 1, characterized in that, In five virtual blocks obtained by equally dividing the chip mounting area in terms of area, the ratio of the light-emitting area of the first optoelectronic chips included in each of the virtual blocks to the total light-emitting area of the plurality of first optoelectronic chips is 15% to 25%, and the five virtual blocks include a central block and four equal-divided blocks of an annular area formed by the boundary of the central block and the boundary of the chip mounting area.

Images