Interface adaptive power supply circuit, device and PD equipment

Abstract

An interface adaptive power supply circuit, device and PD equipment, wherein a first detection circuit detects an external device connected to a first network interface to generate a first enable signal and a third enable signal; a second detection circuit detects an external device connected to a second network interface to generate a second enable signal and a fourth enable signal; a logic processing circuit generates a voltage transformation enable signal according to the first enable signal and the second enable signal; a voltage conversion circuit generates a power supply voltage according to the voltage transformation enable signal and the power supply voltage; a power supply management circuit controls the on and off of a rectified voltage according to the connected external device and the power supply voltage; a first switching circuit switches the connection between the first network interface and the first detection circuit and the power supply management circuit according to the fourth enable signal; and a second switching circuit switches the connection between the second network interface and the second detection circuit and the power supply management circuit according to the third enable signal; the interface function is adaptively adjusted through a pure hardware circuit, thereby improving the stability, reliability and practicality of the equipment.

Description

Technical Field

[0001] The present application belongs to the technical field of Ethernet power supply, and in particular, relates to an interface adaptive power supply circuit, device and PD equipment. Background Art

[0002] PoE (Power Over Ethernet) refers to a technology that can provide DC power to some IP-based terminals (such as IP phones, wireless LAN access points AP, network cameras, etc.) while transmitting data signals without any changes to the existing Ethernet cabling infrastructure. Currently used PoE devices can be simply divided into two categories: PSE (power-sourcing equipment) and PD (Powered Device), where PSE is the power supply equipment in PoE power supply, and PD is the powered device in PoE power supply.

[0003] At present, all the devices on the market are single PSE and PD devices. In this case, multiple power supply methods are required for some devices that need to be used together, such as CPE+IPC (customer front-end equipment + inter-process communication equipment, and IPC in the monitoring system refers to the network camera, that is, the front-end monitoring equipment). This combination requires two power supply links to power the CPE and IPC respectively. Traditional devices have both the function of receiving power from external PSE devices as PD devices and the function of supplying power to external PD devices as PSE devices. They are connected to the PSE power supply device through the first Ethernet port to obtain power, and connected to other PD powered devices through the second Ethernet port. After the internal switch control module is turned on, the external PD powered device can be powered through Ethernet port 2. However, the above technical solution has two limitations. First, the functions of the PoE power supply end network port and the power receiving end network port are fixed and cannot be adaptive, which causes inconvenience to users and may cause system damage due to misoperation. Second, the switch control depends on the data processing system, that is, the switch that controls the PSE to supply power to the external PD device requires a data processing module or a minimum CPU (Central Processing Unit) system to control it. The system and circuit are relatively complex, and when turning the machine on and off, the signal of the software-controlled switch is prone to abnormality, resulting in uncontrollable switch and system failure to work properly.

[0004] Therefore, the traditional technical solutions have the problem that the functions of the PoE power supply end network port and the power receiving end network port are fixedly designed and cannot be adapted and adjusted, and the port power supply and power receiving control system has a complex structure and poor control stability and reliability. Summary of the invention

[0005] The purpose of the present application is to provide an interface adaptive power supply circuit, device and PD equipment, aiming to solve the problems in traditional technical solutions that the functions of the PoE power supply end network port and the powered end network port are fixedly designed, cannot be adaptive and adjusted, and the port power supply and power receiving control system has a complex structure and poor control stability and reliability.

[0006] A first aspect of an embodiment of the present application provides an interface adaptive power supply circuit, which is connected to a first network interface and a second network interface, and the interface adaptive power supply circuit includes:

[0007] a first switching circuit, wherein a common end of the first switching circuit is connected to the first network interface;

[0008] a second switching circuit, wherein a common end of the second switching circuit is connected to the second network interface;

[0009] a first detection circuit, connected to the first switch end of the first switching switch circuit, configured to detect the state of the first network interface and the type of the first external device connected to the first network interface to generate a first enable signal and a third enable signal, and generate a first rectified voltage according to the power supply voltage provided by the first external device;

[0010] a second detection circuit, connected to the first switch end of the second switching switch circuit, configured to detect the state of the second network interface and the type of the second external device connected to the second network interface to generate a second enable signal and a fourth enable signal, and generate a second rectified voltage according to the power supply voltage provided by the second external device;

[0011] a logic processing circuit connected to the first detection circuit and the second detection circuit, and configured to generate a voltage transformation enable signal according to the first enable signal and the second enable signal;

[0012] a voltage conversion circuit connected to the logic processing circuit, the first switch end of the first switching circuit, and the first switch end of the second switching circuit, and configured to perform voltage conversion processing on the power supply voltage provided by the first external device and / or the second external device according to the voltage conversion enable signal to generate a supply voltage;

[0013] a power supply management circuit connected to the voltage conversion circuit, the second switch end of the first switching switch circuit, the second switch end of the second switching switch circuit, the first detection circuit, and the second detection circuit, and configured to control the on-off state of the first rectified voltage and the second rectified voltage according to the type of the first external device, the type of the second external device, and the supply voltage;

[0014] The first switching circuit is configured to switch the first network interface to be connected to the first detection circuit or to switch the first network interface to be connected to the power supply management circuit according to the fourth enable signal;

[0015] The second switching circuit is configured to switch the second network interface to be connected to the second detection circuit or to switch the second network interface to be connected to the power supply management circuit according to the third enable signal.

[0016] In one embodiment, the logic processing circuit is a logic circuit.

[0017] In one embodiment, the logic circuit is an OR gate circuit.

[0018] In one embodiment, the first detection circuit comprises:

[0019] a first rectifying unit connected to the first switch terminal of the first switching circuit and configured to generate a first rectified voltage according to a power supply voltage provided by the first external device;

[0020] a first backfeed protection unit, connected to the first rectifier unit and the power supply management circuit, and configured to perform backfeed protection on the first rectified voltage;

[0021] A first detection control unit, connected to the first rectifier unit, configured to generate an original first enable signal according to the first rectified voltage before backfeed protection;

[0022] a first amplifying unit connected to the control unit and the logic processing circuit, and configured to amplify the original first enabling signal to generate the first enabling signal;

[0023] The first driving unit is connected to the first amplifying unit and the second switching circuit, and is configured to generate the third enabling signal according to the first enabling signal.

[0024] In one embodiment, the first switching switch circuit includes: a first relay; wherein the first common end of the first relay and the second common end of the first relay are connected to the first network interface, the coil of the first relay is connected to the second detection circuit, the second end of the coil of the first relay is connected to the power ground, the first end of the normally closed switch of the first relay and the second end of the normally closed switch of the first relay are connected to the first detection circuit, and the first end of the normally open switch of the first relay and the second end of the normally open switch of the first relay are connected to the power supply management circuit.

[0025] In one embodiment, the first detection control unit includes: a PD control chip, a first voltage-stabilizing diode, a first capacitor, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor; wherein, the detection end of the PD control chip is connected to the first end of the third resistor R11, the grading end of the PD control chip is connected to the first end of the fourth resistor, the limiting current end of the PD control chip 1 is connected to the first end of the fifth resistor, the negative power supply end of the powered device of the PD control chip is connected to the power ground, the power indication end of the PD control chip is connected to the first end of the sixth resistor and the first amplification unit, the negative power supply end of the PD control chip, the anode of the first voltage-stabilizing diode, the first end of the first capacitor, the second end of the fourth resistor and the second end of the fifth resistor are commonly connected to the negative output end of the first rectifier unit, and the positive power supply end of the PD control chip, the cathode of the first voltage-stabilizing diode, the second end of the first capacitor, the second end of the third resistor and the second end of the sixth resistor are commonly connected to the positive output end of the first rectifier unit.

[0026] In one embodiment, the power supply management circuit includes: a power supply management chip, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a first field effect transistor, a second field effect transistor, a first fuse, a second fuse, a first diode and a second diode; wherein the positive voltage end of the power supply management chip and the first end of the third capacitor are connected to the first power supply voltage end, the second end of the third capacitor is connected to the power ground, the reset end of the power supply management chip is connected to the first power supply voltage end, the interrupt end of the power supply management chip is connected to the first power supply voltage end, the clock end of the power supply management chip, the input data end of the power supply management chip, The output data terminal of the power management chip, the data ground terminal of the power management chip, the third current detection input terminal of the power management chip, the third output voltage monitoring terminal of the power management chip, the second detection connection terminal of the power management chip, the fourth current detection input terminal of the power management chip and the fourth output voltage monitoring terminal of the power management chip are connected to the power ground, the analog power supply terminal of the power management chip and the first terminal of the fourth capacitor are connected to the rectifier voltage terminal, the second terminal of the fourth capacitor is connected to the power ground, the bus programming terminal of the power management chip, the low priority terminal of the power management chip, the total The line address end and the analog ground end of the power supply management chip are connected to the power supply ground, the second gate drive output end of the power supply management chip is connected to the gate of the second field effect transistor, the second output voltage monitoring end of the power supply management chip is connected to the drain of the second field effect transistor and the first end of the second fuse, the second end of the second fuse, the anode of the second diode, and the first end of the sixth capacitor are connected to the second network interface, the cathode of the second diode and the second end of the sixth capacitor are connected to the power supply voltage end and the second network interface, the second current detection input end of the power supply management chip, the source of the second field effect transistor, the first detection connection end of the power supply management chip, the source of the first field effect transistor and the first current detection input end of the power supply management chip are connected to the power supply ground, the first gate drive output end of the power supply management chip is connected to the gate of the first field effect transistor, the first output voltage monitoring end of the power supply management chip is connected to the drain of the first field effect transistor and the first end of the first fuse, the second end of the first fuse, the anode of the first diode, and the first end of the fifth capacitor are connected to the first network interface, and the cathode of the first diode and the second end of the fifth capacitor are connected to the power supply voltage end and the first network interface.

[0027] The second aspect of the present application provides an interface adaptive power supply circuit, which includes: multiple network interfaces, multiple switching switch circuits, multiple detection circuits, and a power supply management circuit as described in any one of the above items, the voltage conversion circuit, and the logic processing circuit; wherein the multiple network interfaces are connected to the multiple switching switch circuits one-to-one, and the multiple switching switch circuits are connected to the multiple detection circuits one-to-one; the multiple switching switch circuits are all connected to the power supply management circuit, the voltage conversion circuit, and the logic processing circuit; the multiple detection circuits are all connected to the logic processing circuit; the multiple detection circuits detect the status of the multiple network interfaces and the type of access devices one-to-one to generate an enable signal; the logic processing circuit generates a voltage transformation enable signal and a switching enable signal according to the multiple enable signals generated by the multiple detection circuits, and the switching switch circuit switches the corresponding network interface to the corresponding detection circuit or switches the corresponding network interface to the power supply management circuit according to the switching enable signal.

[0028] A third aspect of the present application provides an interface adaptive power supply device, wherein the interface adaptive power supply device comprises an interface adaptive power supply circuit as described in any one of the above items.

[0029] A fourth aspect of the present application provides a PD device, which includes the interface adaptive power supply circuit as described in any one of the above items or the interface adaptive power supply device as described in the above items.

[0030] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: the interface adaptive power supply circuit detects the state of the first network interface and the type of the first external device connected to the first network interface through the first detection circuit to generate a first enable signal and a third enable signal, and generates a first rectified voltage according to the power supply voltage provided by the first external device; the second detection circuit detects the state of the second network interface and the type of the second external device connected to the second network interface to generate a second enable signal and a fourth enable signal, and generates a second rectified voltage according to the power supply voltage provided by the second external device; the logic processing circuit generates a voltage conversion enable signal according to the first enable signal and the second enable signal; the voltage conversion circuit performs voltage conversion processing on the power supply voltage provided by the first external device and / or the second external device according to the voltage conversion enable signal to generate a power supply voltage; the power supply management circuit performs voltage conversion processing on the power supply voltage provided by the first external device and / or the second external device according to the type of the first external device and the second external device The on-off state of the first rectified voltage and the second rectified voltage is controlled according to the type of equipment and the power supply voltage; the first switching switch circuit is switched to the first network interface connected to the first detection circuit or switched to the first network interface connected to the power supply management circuit according to the fourth enable signal; the second switching switch circuit is switched to the second network interface connected to the second detection circuit or switched to the second network interface connected to the power supply management circuit according to the third enable signal; the multi-port (i.e., interface) adaptive adjustment interface function can be realized through a pure hardware circuit, that is, the adaptive adjustment interface is a powered interface or a power supply interface to perform PoE power supply, so as to achieve the purpose of being powered by an external PSE device connected as a powered device, and being powered by an external PD device connected as a power supply device, without the need for software control, the circuit structure is simple, the response speed is fast, the cost is reduced, and the stability, reliability and practicality of the interface adaptive power supply circuit are improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 A schematic diagram of a structure of an interface adaptive power supply circuit provided in an embodiment of the present application;

[0032] Figure 2 Another structural schematic diagram of an interface adaptive power supply circuit provided in an embodiment of the present application;

[0033] Figure 3 An exemplary circuit schematic diagram of a first switching circuit, a second switching circuit, a first detection circuit, a second detection circuit, and a logic processing circuit in an interface adaptive power supply circuit provided in an embodiment of the present application;

[0034] Figure 4 An exemplary circuit schematic diagram of a power supply management circuit in an interface adaptive power supply circuit provided in an embodiment of the present application;

[0035] Figure 5Another exemplary circuit schematic diagram of a power supply management circuit in an interface adaptive power supply circuit provided in an embodiment of the present application;

[0036] Figure 6 Another structural schematic diagram of an interface adaptive power supply circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0037] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0038] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0039] It should be understood that the orientation or position relationship indicated by terms such as "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0040] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0041] Figure 1 The structure diagram of the interface adaptive power supply circuit provided in the first embodiment of the present application is shown. For the convenience of description, only the part related to the present embodiment is shown, which is described in detail as follows:

[0042] See also Figure 1 , an interface adaptive power supply circuit is connected to a first network interface 01 and a second network interface 02, and the interface adaptive power supply circuit includes: a first switching switch circuit 11, a second switching switch circuit 21, a first detection circuit 12, a second detection circuit 22, a logic processing circuit 30, a voltage conversion circuit 40 and a power supply management circuit 50.

[0043] A first switching switch circuit 11, wherein the common end of the first switching switch circuit 11 is connected to the first network interface 01; a second switching switch circuit 21, wherein the common end of the second switching switch circuit 21 is connected to the second network interface 02; a first detection circuit 12, connected to the first switch end of the first switching switch circuit 11, configured to detect the state of the first network interface 01 and the type of the first external device connected to the first network interface 01, so as to generate a first enable signal and a third enable signal, and generate a first rectified voltage according to the power supply voltage provided by the first external device; a second detection circuit 22, connected to the first switch end of the second switching switch circuit 21, configured to detect the state of the second network interface 02 and the type of the second external device connected to the second network interface 02, so as to generate a second enable signal and a fourth enable signal, and generate a second rectified voltage according to the power supply voltage provided by the second external device; a logic processing circuit 30, connected to the first detection circuit 12 and the second detection circuit 22, configured to generate a voltage transformation enable signal according to the first enable signal and the second enable signal; a voltage conversion circuit 40 , connected to the logic processing circuit 30, the first switch end of the first switching switch circuit 11 and the first switch end of the second switching switch circuit 21, and configured to perform voltage conversion processing on the power supply voltage provided by the first external device and / or the second external device according to the voltage transformation enable signal to generate a power supply voltage; the power supply management circuit 50, connected to the voltage conversion circuit 40, the second switch end of the first switching switch circuit 11, the second switch end of the second switching switch circuit 21, the first detection circuit 12 and the second detection circuit 22, and configured to control the on-off state of the first rectified voltage and the second rectified voltage according to the type of the first external device, the type of the second external device and the power supply voltage; the first switching switch circuit 11 is configured to switch to the first network interface 01 connected to the first detection circuit 12 or to the first network interface 01 connected to the power supply management circuit 50 according to the fourth enable signal; the second switching switch circuit 21 is configured to switch to the second network interface 02 connected to the second detection circuit 22 or to the second network interface 02 connected to the power supply management circuit 50 according to the third enable signal.

[0044] In the specific implementation, the first network interface 01 and the second network interface 02 are both Ethernet network interfaces, including RJ45 plugs, of which two groups of taps, 1 and 2 taps, 3 and 6 taps, 4 and 5 taps, and 7 and 8 taps, have POE feeding, so there are two feeding modes: 1236 taps and 4578 taps.

[0045] When no external PSE device is connected, that is, both the first network interface 01 and the second network interface 02 are not connected to the PSE device, including the first network interface 01 connected to the first external device but the first external device is not a PSE device and the second network interface 02 connected to the second external device but the second external device is not a PSE device, the first network interface 01 connected to the first external device but the first external device is not a PSE device and the second network interface 02 is vacant (the second external device is not connected), the first network interface 01 is vacant (the first external device is not connected) and the second network interface 02 is connected to the second external device but the second external device is not a PSE device. In this case, the interface adaptive power supply circuit is not connected to the power supply voltage, and the first detection circuit 12 generates the first detection circuit 12 correspondingly. A first enable signal of a first level and a third enable signal of a low level, the second detection circuit 22 generates a second enable signal of a first level and a fourth enable signal of a low level accordingly, the first switching switch circuit 11 switches to the first network interface 01 connected to the first detection circuit 12 according to the fourth enable signal of the first level, the second switching switch circuit 21 switches to the second network interface 02 connected to the second detection circuit 22 according to the third enable signal of the first level, the logic processing circuit 30 generates a first-level voltage transformation enable signal according to the first enable signal of the first level and the second enable signal of the first level, the first-level voltage transformation enable signal does not enable the voltage conversion circuit 40 to work, so the voltage conversion circuit 40 does not generate a power supply voltage and does not supply power to internal and external power loads.

[0046] When the first external device connected to the first network interface 01 is a PSE device, the second network interface 02 is not connected to the second external device or the second external device connected to the second network interface 02 is an external PD device (i.e., an external powered device), the interface adaptive power supply circuit is connected to the power supply voltage, and the power supply voltage is provided by the first external device. The first detection circuit 12 generates a first enable signal of a second level and a third enable signal of a second level, and the second detection circuit 22 generates a second enable signal of a first level and a fourth enable signal of a first level. The first switching switch circuit 11 switches to connect the first network interface 01 to the first detection circuit 12 according to the fourth enable signal of the first level, and the second switching switch circuit 21 switches to connect the second network interface 02 to the power supply management circuit according to the third enable signal of the second level. 50 is connected, the logic processing circuit 30 generates a second-level voltage transformation enable signal according to the first enable signal of the second level and the second enable signal of the first level, the second-level voltage transformation enable signal enables the voltage conversion circuit 40 to perform voltage conversion and other processing on the power supply voltage provided by the first external device connected to the first network interface 01 to generate a power supply voltage, and the power supply management circuit 50 and the internal powered load are powered by the power supply voltage. The power supply management circuit 50 controls the conduction of the first rectified voltage to the second network interface 02 for the external PD device according to the first power supply voltage and the second external device, so as to power the second external device (external PD device) connected to the second network interface 02; wherein the power supply voltage includes the first power supply voltage, and the internal powered load is other powered devices or circuits in the interface adaptive power supply circuit.

[0047] Similarly, when the second external device connected to the second network interface 02 is a PSE device, and the first network interface 01 is not connected to the first external device or the first external device connected is an external PD device (i.e., an external powered device), the interface adaptive power supply circuit is connected to the power supply voltage, and the power supply voltage is provided by the second external device. The first detection circuit 12 generates a first enable signal of a first level and a third enable signal of a first level, and the second detection circuit 22 generates a second enable signal of a second level and a fourth enable signal of a second level. The first switching switch circuit 11 switches to connect the first network interface 01 to the power supply management circuit 50 according to the fourth enable signal of the second level, and the second switching switch circuit 21 switches to connect the first network interface 01 to the power supply management circuit 50 according to the third enable signal of the first level. The signal is switched to connect the second network interface 02 with the second detection circuit 22, and the logic processing circuit 30 generates a second-level voltage transformation enable signal according to the first-level first enable signal and the second-level second enable signal. The second-level voltage transformation enable signal enables the voltage conversion circuit 40 to perform voltage conversion and other processing on the power supply voltage provided by the second external device connected to the second network interface 02 to generate a power supply voltage, and the power supply management circuit 50 and the internal powered load are powered by the power supply voltage, so that the power supply management circuit 50 controls the conduction of the second rectified voltage to the first network interface 01 for the external PD device according to the first supply voltage and the first external device, so as to power the first external device (external PD device) connected to the first network interface 01.

[0048] When the first network interface 01 and the second network interface 02 are both connected to external PSE devices, that is, the first external device connected to the first network interface 01 and the second external device connected to the second network interface 02 are both external PSE devices, at this time, the interface adaptive power supply circuit is connected to the power supply voltage, and the power supply voltage is jointly provided by the first external device and the second external device, the first detection circuit 12 generates a first enable signal of the second level and a third enable signal of the second level, and the second detection circuit 22 generates a second enable signal of the second level and a fourth enable signal of the second level, the first switching switch circuit 11 switches to connect the first network interface 01 to the power supply management circuit 50 according to the fourth enable signal of the second level, and the second switching switch circuit 21 switches to connect the first network interface 01 to the power supply management circuit 50 according to the third enable signal of the second level. The second network interface 02 is switched to be connected to the power supply management circuit 50, and the logic processing circuit 30 generates a second-level voltage transformation enable signal according to the first enable signal of the second level and the second enable signal of the second level. The second-level voltage transformation enable signal enables the voltage conversion circuit 40 to perform voltage conversion and other processing on the power supply voltage connected to the two network interfaces to generate a power supply voltage, and the power supply management circuit 50 and the internal powered load are powered by the power supply voltage. The power supply management circuit 50 controls the disconnection of the first rectified voltage and the second rectified voltage according to the failure to detect that the network interface (i.e., the first network interface 01 and the second network interface 02) is connected to the external PD device, that is, the power supply management circuit 50 controls the disconnection of the first external device and the second external device as PSE devices, thereby disconnecting the power supply to the external device.

[0049] Optionally, the first level is a low level, and the second level is a high level, which is not limited here.

[0050] In the specific implementation, when an external PSE device is connected, the external PSE device will detect the opposite device in the link through at least two low-voltage and current-limiting levels, and analyze and calculate the characteristic impedance of the opposite device through the voltage and current values ​​obtained by the link reply to see if the match meets the requirements of the PoE power supply protocol, thereby determining whether there is a PD device connected to the connected opposite end. After the detection is passed, the external PSE device first outputs a voltage pulse on the data line or the backup line to the PD device at the opposite end. After the PD device at the opposite end obtains the voltage, it responds with a current that can represent its own power level. The external PSE device can determine the power level of the PD device based on this current. During the grading process, the PD device adopts the highest grading, so that sufficient power supply capacity is reserved when powering the external PD device. Among them, the PD device includes the interface adaptive power supply circuit itself.

[0051] The present application can realize the adaptive adjustment of multiple ports (i.e., network interfaces) to powered ports or power supply ports according to the type of port access devices through pure hardware circuits, so as to perform PoE power supply. That is, it can be powered by an external PSE device connected to the network interface as a powered device, and it can also be powered by an external PD device connected to the network interface as a power supply device. No software control is required, the interface function can be switched quickly and adaptively, the circuit structure is simple, the cost is reduced, and the reliability and practicality of the interface adaptive power supply circuit are improved.

[0052] In one embodiment, the logic processing circuit 30 is a logic circuit.

[0053] In one embodiment, the logic circuit is an OR gate circuit. Optionally, the logic circuit can also be a combinational logic circuit or a NOR gate circuit.

[0054] Through the logic circuit, according to the different level states of the first enable signal and the second enable signal, the voltage conversion circuit 40 is enabled to perform voltage conversion processing on the power supply voltage, thereby controlling the power supply to the internal power-receiving load and the power supply management circuit 50. There is no need to rely on complex data processing modules or microcontroller units (MCU) or central processing units (CPU) for software configuration for control. The circuit structure is simple, the response is fast, and the cost is saved.

[0055] See also Figure 2 In one embodiment, the first detection circuit 12 includes: a first rectifying unit 121 , a first detection control unit 122 , a first amplifying unit 123 , a first driving unit 124 and a first backfeed protection unit 125 .

[0056] The first rectifier unit 121 is connected to the first switch end of the first switching switch circuit 11, and is configured to generate a first rectified voltage according to the power supply voltage provided by the first external device; the first backfeed protection unit 125 is connected to the first rectifier unit 121 and the power supply management circuit 50, and is configured to perform backfeed protection on the first rectified voltage; the first detection control unit 122 is connected to the first rectifier unit 121, and is configured to generate an original first enable signal according to the first rectified voltage before backfeed protection; the first amplifying unit 123 is connected to the control unit and the logic processing circuit 30, and is configured to amplify the original first enable signal to generate a first enable signal; the first driving unit 124 is connected to the first amplifying unit 123 and the second switching switch circuit 21, and is configured to generate a third enable signal according to the first enable signal.

[0057] In a specific implementation, when the first external device connected to the first network interface 01 is an external PSE device, the first power supply voltage provided by the first external device is used as the power supply voltage. The first rectifier unit 121 rectifies the first power supply voltage to generate a first rectified voltage, and the first rectifier unit 121 can rectify the alternating current to generate direct current. The first backfeed protection unit 125 has the characteristics of forward conduction and reverse cutoff, and can forward conduct the first rectified voltage to the second switching switch circuit 21, preventing the rectified voltage generated by other network interfaces and detection circuits from backflowing to the first detection circuit 11 to cause damage to the circuit. The first detection control unit 122 detects, identifies, analyzes and determines the first rectified voltage before the backfeed protection to generate an original first enable signal; the first amplification unit 123 amplifies and enhances the original first enable signal to generate a corresponding first enable signal; the first drive unit 124 isolates and drives the first enable signal to generate a third enable signal and transmits it to the second switch end of the second switching switch circuit 21, and switches the connection state between the second network interface 02 and the second detection circuit 22 and the power supply management circuit 50 through the third enable signal, that is, the second switching switch circuit 21 switches to connect the second network interface 02 with the second detection circuit 22 according to the third enable signal, or switches to connect the second network interface 02 with the power supply management circuit 50; and the first enable signal is logically processed by the logic processing circuit 30 to generate a transformer enable signal, so as to enable the voltage conversion circuit 40 to perform voltage conversion and other processing on the first power supply voltage to generate power supply voltages of various voltage values, thereby supplying power to the power supply management circuit 50 and internal power receiving loads. In the embodiment of the present application, the first rectifier unit 121, the first detection control unit 122 and the first amplification unit 123 can realize stable and reliable detection and judgment of the state of the first network interface 01 and the type of the first external device connected to the first network interface 01, and then combine with the first drive unit 125 to realize accurate and reliable switching control of the connection between the second network interface 02 and the second detection circuit 22 and the power supply management circuit 50, and the first drive unit 125 can effectively prevent the second switching switch circuit 21 from affecting the first enable signal, thereby preventing the second switching switch circuit 21 from affecting the accuracy and reliability of the logic processing circuit 30 performing logical processing and judgment on the first enable signal and the second enable signal, so that when the external PSE device connected to the first network interface 01 is connected, it can not only supply power to the internal powered load through the voltage conversion circuit 40, but also supply power to the external PD device connected to the second network interface 02 through the second network interface 02, so as to realize stable and reliable adaptive adjustment of the power supply port and the powered port; and no complex and high-cost software control system is required to control and manage the interface adaptive power supply, which saves costs and improves the practicality of the interface adaptive power supply circuit.

[0058] In a specific implementation, the first amplifying unit 123 may be a Darlington enhancement tube composed of a transistor pair to enhance and amplify the original first enable signal, thereby improving the accuracy and reliability of the logic processing circuit 30 performing logic processing on the first enable signal and the second enable signal.

[0059] Optionally, the composition structure of the second detection circuit 22 is the same as that of the first detection circuit 12, and also includes a corresponding second rectifier unit 221, a second detection control unit 222, a second amplifying unit 223, a second drive unit 224 and a second backfeed protection unit 225. For details, please refer to the composition structure description and working principle description of the above-mentioned rectifier unit 121, the first detection control unit 122, the first amplifying unit 123, the first drive unit 124 and the first backfeed protection unit 125, so as to achieve accurate and reliable detection of the state of the second network interface 02 and the type of the second external device connected to the second network interface 02, and then perform stable and reliable adaptive adjustment of the interface function of the second network interface 02.

[0060] See also Figure 3 In one embodiment, the first switching switch circuit 11 includes: a first relay SW1; wherein, the first common terminal 4 of the first relay SW1 and the second common terminal 9 of the first relay SW1 are connected to the first network interface 01, the first terminal 1 of the coil of the first relay SW1 is connected to the second detection circuit 22, the second terminal 12 of the coil of the first relay SW1 is connected to the power ground, the first terminal 3 of the normally closed switch of the first relay SW1 and the second terminal 10 of the normally closed switch of the first relay SW1 are connected to the first detection circuit 12, and the first terminal 5 of the normally open switch of the first relay SW1 and the second terminal 8 of the normally open switch of the first relay SW1 are connected to the power supply management circuit 50.

[0061] Optionally, the first switching switch circuit 11 also includes: a first resistor R01 and a second resistor R02; wherein, the first common end 4 of the first relay SW1 and the second common end 9 of the first relay SW1 are connected to the first network interface 01, the first end 1 of the coil of the first relay SW1 is connected to the first end of the second resistor R02, the second end of the second resistor R02 and the first end of the first resistor R01 are commonly connected to the second detection circuit 22, the second end of the first resistor R01 is connected to the power ground, the second end 12 of the coil of the first relay SW1 is connected to the power ground, the first end 3 of the normally closed switch of the first relay SW1 and the second end 10 of the normally closed switch of the first relay SW1 are commonly connected to the first detection circuit 12, and the first end 5 of the normally open switch of the first relay SW1 and the second end 8 of the normally open switch of the first relay SW1 are commonly connected to the power supply management circuit 50.

[0062] In a specific implementation, the normally closed switch of the first relay SW1 remains in a closed state when the coil of the first relay SW1 is not powered; when the coil of the first relay SW1 is powered, the normally closed switch of the first relay SW1 is switched to open, and the normally open switch of the first relay SW1 is switched to close. The second end of the second resistor R02 and the first end of the first resistor R01 are connected to the second output end of the first detection circuit 12, the first output end of the first detection circuit 12 is connected to the logic processing circuit 30, the first end 3 of the normally closed switch of the first relay SW1 and the second end 10 of the normally closed switch of the first relay SW1 are connected to the input end of the first detection circuit 12, and the coil of the first relay SW1 can be protected by current limiting through the first resistor R01 and the second resistor R02, thereby improving the safety and reliability of the first switching switch circuit 11. When the second network interface 02 is not connected to an external PSE device, the second detection circuit 22 outputs a low-level second enable signal and a low-level fourth enable signal, so that the coil of the first relay SW1 is powered off (that is, the coil of the first relay SW1 is not powered), and the first relay SW1 is connected to the first detection circuit 12 via the first end 3 of the normally closed switch of the first relay SW1 and the second end 10 of the normally closed switch of the first relay SW1; when the second external device connected to the second network interface 02 is an external PSE device, the second detection circuit 22 outputs a high-level second enable signal and a high-level fourth enable signal, and the high-level fourth enable signal The coil of the first relay SW1 is energized, so that the first relay SW1 is switched to be connected to the rectified voltage output end of the power supply management circuit 50 and the first detection circuit 12 through the first end 5 of the normally open switch of the first relay SW1 and the second end 8 of the normally open switch of the first relay SW1, and the first network interface 01 and the power supply management circuit 50 are connected through the first relay SW1. At this time, the first network interface 01 serves as a power supply interface, has the function of supplying power to the external PD device, and outputs the rectified voltage to supply power to the connected external PD device, so that the system can receive power from the external PSE device while also having the ability to supply power to the external PD device.

[0063] For specific implementation, please refer to Figure 5The structure and function of the second switching switch circuit 21 are the same as those of the first switching switch circuit 11. Please refer to the above description and will not be repeated here. When the first network interface 01 is not connected to an external PSE device, the first detection circuit 12 outputs a low-level first enable signal and a low-level third enable signal, and the low-level third enable signal causes the coil of the second relay SW2 to lose power (that is, the coil of the second relay SW2 must not be powered), and the second relay SW2 is connected to the second detection circuit 22 through the first end 3 of the normally closed switch of the second relay SW2 and the second end 10 of the normally closed switch of the second relay SW2; when the first external device connected to the first network interface 01 is an external PSE device, the first detection circuit 12 outputs a high-level first enable signal and a high-level third enable signal, and the high-level third enable signal causes the coil of the second relay SW2 to be powered, so that the second relay SW2 is switched to be connected to the rectified voltage output end of the power supply management circuit 50 and the second detection circuit 22 through the first end 5 of the normally open switch of the second relay SW2 and the second end 8 of the normally open switch of the second relay SW2, and the second network interface 02 and the power supply management circuit 50 are connected through the second relay SW2. At this time, the second network interface 02 serves as a power supply interface and has the function of supplying power to the external PD device.

[0064] In one embodiment, see Figure 3 The first rectifying unit 121 includes a rectifying bridge BR1. The rectifying bridge BR1 can rectify the first external power supply voltage connected to the first network interface 01 through the first relay SW1 to generate a first rectified voltage.

[0065] In one embodiment, see Figure 3 The first backfeed protection unit 125 includes a first anti-backfeed diode D1. The first anti-backfeed diode D1 has the characteristics of forward conduction and reverse cutoff, which can effectively prevent the rectified voltage of other ports from backfeeding to the first detection circuit 12, thereby realizing the backfeed protection function of the circuit. In one embodiment, please refer to Figure 3 , the first driving unit 124 includes: a third field effect transistor Q3; wherein the gate of the third field effect transistor Q3 is connected to the first switch unit 123 and the logic processing circuit 30, the drain of the third field effect transistor Q3 is connected to the third power supply voltage terminal, and the source of the third field effect transistor Q3 is connected to the second switching switch circuit 21. In a specific implementation, the diode D01 is a parasitic diode of the third field effect transistor Q3. The third power supply voltage terminal outputs a third power supply voltage, which can be obtained by the voltage conversion circuit 40 performing voltage conversion and voltage stabilization on the power supply voltage; optionally, the voltage value of the third power supply voltage is 3.3VD.

[0066] See also Figure 3In one embodiment, the first detection control unit 122 includes: a PD control chip U1, a first voltage zener diode Z1, a first capacitor C11, a third resistor R11, a fourth resistor R12, a fifth resistor R13 and a sixth resistor R14; wherein the detection terminal DTE of the PD control chip U1 is connected to the first end of the third resistor R11, the classification terminal CLASS of the PD control chip U1 is connected to the first end of the fourth resistor R12, the limiting current terminal ILIM of the PD control chip U1 is connected to the first end of the fifth resistor R13, and the negative power supply terminal RTN of the PD control chip U1 is connected to the power ground The power indication terminal PG of the PD control chip U1 is connected to the first end of the sixth resistor R14 and the first amplifying unit 123, the negative power supply terminal VSS of the PD control chip U1, the anode of the first voltage zener diode Z1, the first end of the first capacitor C11, the second end of the fourth resistor R12 and the second end of the fifth resistor R13 are commonly connected to the negative output end of the first rectifier unit 121, and the positive power supply terminal VDD of the PD control chip U1, the cathode of the first voltage zener diode Z1, the second end of the first capacitor C11, the second end of the third resistor R11 and the second end of the sixth resistor R14 are commonly connected to the positive output end of the first rectifier unit 121.

[0067] See also Figure 3 In one embodiment, the first amplifying unit 123 includes: a second capacitor C12, a first transistor Q1, a seventh resistor R15, an eighth resistor R16, a ninth resistor R17 and a tenth resistor R18; wherein a first end of the seventh resistor R15 is connected to the first detection control unit 122, a second end of the tenth resistor R18 is connected to the positive output end of the first rectifying unit 121, a second end of the seventh resistor R15 is connected to a first end of the eighth resistor R16 and a base of the first transistor Q1, a collector of the first transistor Q1, a first end of the ninth resistor R17, a first end of the tenth resistor R18 and a first end of the second capacitor C12 are commonly connected to the first driving unit 124 and the logic processing circuit 30, and a second end of the eighth resistor R16, an emitter of the first transistor Q1, a second end of the ninth resistor R17 and a second end of the second capacitor C12 are commonly connected to a power ground.

[0068] In a specific implementation, the power indication terminal PG of the PD control chip U1 is connected to the first end of the seventh resistor R15, and the original first enable signal is output to the first end of the seventh resistor R15. After the PD control chip U1 detects, identifies and classifies the first rectified voltage output after rectification by the first rectifier unit 121, when it is determined that the first external device connected to the corresponding first network interface 01 is an external PSE device, a high-level original first enable signal is generated. The high-level original first enable signal is amplified and enhanced by the first transistor Q1 in the first amplifying unit 123 and outputs a high-level first enable signal; the high-level first enable signal is isolated and driven by the third field effect transistor Q3 in the first driving unit 124 to generate a high-level third enable signal, and the high-level third enable signal is output to the first end 1 of the coil of the second relay SW2 through the resistor R04, so that the coil of the second relay SW2 is energized, and the second relay SW2 is controlled to switch to connect the second network interface 02 and the power supply management circuit 50, and the second network interface 02 is switched to a power supply interface for external power supply.

[0069] In one embodiment, see Figure 3 The structural composition and functional role of the second detection control unit 222 corresponding to the second detection circuit 22 are the same as those of the first detection control unit 122. Please refer to the above description for the specific working principle. When the second network interface 02 is connected to the external PSE device, the first network interface 01 is switched to connect the first network interface 01 and the power supply management circuit 50, so that the first network interface 01 has the interface function of external power supply.

[0070] In one embodiment, see Figure 3 The logic processing circuit 30 is a common cathode diode pair (i.e., a Zener diode D11 and a Zener diode D21), also called a common cathode pair, which can generate a high-level voltage transformation enable signal when at least one of the first enable signal and the second enable signal is at a high level, so as to enable the voltage conversion circuit 40 to convert the power supply voltage provided by the first external device and / or the second external device to generate a power supply voltage to power the power supply management circuit 50 and the powered load in the interface adaptive power supply circuit.

[0071] In one embodiment, the voltage conversion circuit 40 uses a voltage conversion chip, such as a DC-DC chip LMR35520, which can meet the application requirements of DC to DC voltage conversion to generate the power supply voltage required by each power load.

[0072] See also Figure 4In one embodiment, the power management circuit 50 includes: a power management chip U3, a third capacitor C01, a fourth capacitor C02, a fifth capacitor C03, a sixth capacitor C04, a first field effect transistor Q01, a second field effect transistor Q02, a first fuse F01, a second fuse F02, a first diode D01 and a second diode D02;Among them, the positive voltage terminal VDD of the power supply management chip U3 and the first end of the third capacitor C01 are connected to the first power supply voltage terminal, the second end of the third capacitor C01 is connected to the power ground, the reset terminal RESET of the power supply management chip U3 is connected to the first power supply voltage terminal, the interrupt terminal INT of the power supply management chip U3 is connected to the first power supply voltage terminal, the clock terminal SCL of the power supply management chip U3, the input data terminal SDAI of the power supply management chip U3, the output data terminal SDAO of the power supply management chip U3, the data ground terminal DGND of the power supply management chip U3, the third current detection input terminal SEN3 of the power supply management chip U3, and the third output voltage monitoring terminal DGND of the power supply management chip U3 RAIN3, the second detection connection terminal KSENEB of the power supply management chip U3, the fourth current detection input terminal SEN4 of the power supply management chip U3 and the fourth output voltage monitoring terminal DRAIN4 of the power supply management chip U3 are connected to the power ground, the analog power supply terminal VPWR of the power supply management chip U3 and the first end of the fourth capacitor C02 are connected to the rectifier voltage terminal, the second end of the fourth capacitor C02 is connected to the power ground, the bus programming terminal AIN of the power supply management chip U3, the low priority terminal SHTDWN of the power supply management chip U3, the bus address terminal A3 of the power supply management chip U3 and the analog ground terminal AGND of the power supply management chip U3 are connected to the power ground, and the power supply management chip U The second gate drive output terminal GATE2 of the power supply management chip U3 is connected to the gate of the second field effect transistor Q02, the second output voltage monitoring terminal DRAIN2 of the power supply management chip U3 is connected to the drain of the second field effect transistor Q02 and the first end of the second fuse F02, the second end of the second fuse F02, the anode of the second diode D02, and the first end of the sixth capacitor C04 are connected to the second network interface 02, the cathode of the second diode D02, the second end of the sixth capacitor C04 are connected to the power supply voltage end and the second network interface 02, the second current detection input terminal SEN2 of the power supply management chip U3, the source of the second field effect transistor Q02, and the first detection connection terminal KS of the power supply management chip U3 ENEA, the source of the first field effect transistor Q01 and the first current detection input terminal SEN1 of the power supply management chip U3 are connected to the power ground, the first gate drive output terminal GATE1 of the power supply management chip U3 is connected to the gate of the first field effect transistor Q01, the first output voltage monitoring terminal DRAIN1 of the power supply management chip U3 is connected to the drain of the first field effect transistor Q01 and the first end of the first fuse F01, the second end of the first fuse F01, the anode of the first diode D01, and the first end of the fifth capacitor C03 are connected to the first network interface 01, and the cathode of the first diode D01 and the second end of the fifth capacitor C05 are connected to the power supply voltage terminal and the first network interface 01.;

[0073] For specific implementation, please refer to Figure 5, the reset terminal RESET of the power supply management chip U3 is connected in series with the resistor R05 and then connected to the first power supply voltage terminal, the interrupt terminal INT of the power supply management chip U3 is connected in series with the resistor R06 and then connected to the first power supply voltage terminal, the bus programming terminal AIN of the power supply management chip U3 is connected in series with the resistor R07, the low priority terminal SHTDWN of the power supply management chip U3 is connected in series with the resistor R08, and the bus address terminal A3 of the power supply management chip U3 is connected in series with the resistor R09 and then connected to the power ground, a resistor R010 is connected in series between the second gate drive output terminal GATE2 of the power supply management chip U3 and the gate of the second field effect transistor Q02, a resistor R011 is connected in series between the second output voltage monitoring terminal DRAIN2 of the power supply management chip U3 and the drain of the second field effect transistor Q02, and the second A resistor R012 is connected in series between the current detection input terminal SEN2 and the source of the second field effect transistor Q02, a resistor R017 is connected in series between the source of the second field effect transistor Q02 and the power ground, a resistor R015 is connected in series between the first current detection input terminal SEN1 of the power supply management chip U3 and the source of the first field effect transistor Q01, a resistor R016 is connected in series between the source of the first field effect transistor Q01 and the power ground, a resistor R013 is connected in series between the first gate drive output terminal GATE1 of the power supply management chip U3 and the gate of the first field effect transistor Q01, a resistor R014 is connected in series between the first output voltage monitoring terminal DRAIN1 of the power supply management chip U3 and the drain of the first field effect transistor Q01, and current limiting protection is performed on the corresponding ports of the power supply management chip U3 through the series resistors.

[0074] In a specific implementation, the first power supply voltage terminal provides a first power supply voltage, and the first power supply voltage is used to power the power supply management chip U3. Optionally, the voltage value of the first power supply voltage is PSE_3V3, which is generated by the voltage conversion circuit 40 performing voltage conversion and voltage stabilization on the power supply voltage. The second power supply voltage and the third power supply voltage for powering the internal power receiving load may be the same as the first power supply voltage, or may be different; the power supply voltage includes the first power supply voltage, the second power supply voltage and the third power supply voltage. The rectifier voltage terminal provides a rectified voltage, such as PWR_53V5; wherein the rectified voltage may be obtained by rectifying the first power supply voltage provided by the first rectifier unit 121 to the first external device, or by rectifying the second power supply voltage provided by the second rectifier circuit 221 to the second external device, or by the first rectifier unit 121 and the second rectifier circuit 221. Provided jointly. When the first external device connected to the first network interface 01 is an external PSE device or the second external device connected to the second network interface 02 is an external PSE device, the first power supply voltage or the second power supply voltage provided by the external PSE device is the power supply voltage; when the first network interface 01 and the second network interface 02 are both connected to external PSE devices, the power supply voltage is provided by two external PSE devices, and the corresponding total power supply voltage is within the operating voltage range of the voltage conversion circuit 40 and the power supply management chip U3, and will not cause overvoltage damage to the voltage conversion circuit 40 and the power supply management chip U3.

[0075] The power management chip U3 can send test current and voltage pulses through a group of current detection input terminals, detection connection terminals, output voltage monitoring terminals and gate drive output terminals corresponding to the network interface (for example, the first current detection input terminal SEN1 of the power management chip U3, the first detection connection terminal KSENEA of the power management chip U3, the first output voltage monitoring terminal DRAIN1 of the power management chip U3 and the first gate drive output terminal GATE1 of the power management chip U3) to test and obtain the state of the corresponding network interface and the type of external device connected to the network interface, including whether the external device is a powered device, and which power supply protocol type and power level of the powered device it is, so as to control the field effect transistor (for example, the first field effect transistor Q01 and the second field effect transistor Q02) corresponding to the network interface to be turned on or off, and then control the corresponding network interface to be a power supply interface, so as to realize power supply to the external PD device connected to the network interface, for example, when the second external device connected to the second network interface 02 is a PSE device, and the power management chip U3 detects after testing that the first network interface is powered. When the PoE power supply protocol connected to port 01 is a PD device with a PoE power supply protocol of 802.3at protocol standard and a power supply power of 15.4W, a high-level control signal from the first gate drive output terminal GATE1 of the power supply management chip U3 controls the first field effect transistor Q01 to be turned on, and the power supply voltage (VDD_53V5) provided by the external PSE device connected to the second network interface 02 is rectified through the first network interface 01 to generate a rectified voltage (for example, PWR_53V5) and output to the PD device to power the connected external PD device; similarly, when the first external device connected to the first network interface 01 is a PSE device, and the power supply management chip U3 detects and recognizes that the second network interface 02 is connected to an external PD device, the second field effect transistor Q02 is controlled to be turned on, and the connected external PD device is powered through the second network interface 02; in the above two cases, the interface adaptive power supply circuit can adaptively adjust the network interface to a power supply port (to supply power to the outside) and a power receiving port (to receive external power) according to the network interface status and the type of external device connected to the network interface. When it is identified that both the first network interface 01 and the second network interface 02 are connected to an external PSE device, the first field effect transistor Q01 and the second field effect transistor Q02 are controlled to be cut off, the rectifier voltage is disconnected, and no external power is supplied. At this time, the interface adaptive power supply circuit as a whole only serves as a powered device and receives power from an external PSE device; when it is identified that both the first network interface 01 and the second network interface 02 are connected to an external PD device, the voltage conversion circuit 40 is not enabled to work because the power supply voltage is not connected, so that the power supply management chip U3 does not work and no external power is supplied. Optionally, when both the first network interface 01 and the second network interface 02 are not connected to an external PSE device, the voltage conversion circuit 40 can generate a power supply voltage based on the voltage provided by other power sources (such as a power adapter) to power the internal powered load.

[0076] The embodiment of the present application can realize multi-port adaptive adjustment to support PoE power supply, and can realize multi-port adaptive adjustment interface function for PoE power supply only through components such as relays and OR gates (common cathode pair), without software control, simple circuit structure and implementation logic, fast response speed, high network interface function switching efficiency, reduced cost, and improved reliability and practicality of the interface adaptive power supply circuit.

[0077] The second aspect of the present application provides an interface adaptation circuit. Figure 6 The interface adaptive power supply circuit includes: multiple network interfaces, multiple switching switch circuits, and multiple detection circuits; wherein, the multiple network interfaces are connected to the multiple switching switch circuits one-to-one, and the multiple switching switch circuits are connected to the multiple detection circuits one-to-one; the multiple switching switch circuits are all connected to the power supply management circuit 50, the voltage conversion circuit 40 and the logic processing circuit 30; the multiple detection circuits are all connected to the logic processing circuit 30; the multiple detection circuits detect the status of the multiple network interfaces and the type of access devices one-to-one to generate enable signals; the logic processing circuit 30 generates a voltage transformation enable signal and a switching enable signal according to the multiple enable signals generated by the multiple detection circuits, and the switching switch circuit switches the corresponding network interface to the corresponding detection circuit or switches the corresponding network interface to the power supply management circuit 50 according to the switching enable signal.

[0078] In a specific implementation, the plurality is N, where N is a positive integer greater than or equal to 2. Optionally, the network interface includes a first network interface 01 and a second network interface 02, the switching circuit includes a first switching circuit 11 and a second switching circuit 21, the detection circuit includes a first detection circuit 12 and a second detection circuit 22, and the enable signal includes a first enable signal, a second enable signal, a third enable signal, and a fourth enable signal. Optionally, in one embodiment, N is equal to four, and the interface adaptive power supply circuit includes four network interfaces (a first network interface 01, a second network interface 02, a third network interface 03, and a fourth network interface 04), four switching circuits (a first switching circuit 11, a second switching circuit 21, a third switching circuit 31, and a fourth switching circuit 41), four detection circuits (a first detection circuit 12, a second detection circuit 22, a third detection circuit 32, and a fourth detection circuit 42), and a logic processing circuit 30, a voltage conversion circuit 40, and a power supply management circuit 50. Wherein. The four network interfaces are connected to the four switching circuits in a one-to-one correspondence, and the four switching circuits are connected to the four detection circuits in a one-to-one correspondence; the four switching circuits are all connected to the power supply management circuit 50, the voltage conversion circuit 40 and the logic processing circuit 30; the four detection circuits are all connected to the logic processing circuit 30. One network interface corresponds to one switching circuit and one detection circuit, and the detection circuit detects whether the corresponding network interface is connected to an external device and the type of the connected external device, thereby generating a corresponding enable signal; the enable signal is transmitted to the logic processing circuit 30, and the logic processing circuit 30 generates a voltage conversion enable signal and a switching enable signal according to the four enable signals generated by the four detection circuits, enabling the switching circuit to switch the connection between the network interface and the corresponding detection circuit and the power supply management circuit, that is, the switching circuit can be switched to the connection between the network interface and the corresponding detection circuit, or the connection between the network interface and the power supply management circuit 50.For example, when one of the four network interfaces is connected to an external PSE device, a first-level enable signal is generated by the detection circuit corresponding to the network interface, and the power supply voltage provided by the external PSE device is rectified to generate a rectified voltage. The logic processing circuit 30 generates a valid (i.e., second-level) voltage transformation enable signal and a second-level switching enable signal according to the high-level enable signal. The second-level voltage transformation enable signal enables the voltage transformation conversion circuit 40 to perform voltage conversion and other processing on the power supply voltage provided by the external PSE device to generate a power supply voltage, and the power supply management circuit 50 and the internal powered load are powered by the power supply voltage; the second-level enable signal enables the switching switch circuits corresponding to other network interfaces other than the network interface to switch to connect the corresponding network interface and the power supply management circuit 50, and switches the other network interfaces other than the network interface corresponding to the external PSE device to the power supply interface. The power supply management circuit 50 controls the conduction of the rectified voltage to the external PD device according to the external device connected to the other network interfaces as a PD device, so as to power the external PD device. Adaptive adjustment of the network interface to a power supply port or a power receiving port is achieved according to the state of the network interface and the type of access device, thereby improving the practicality and compatibility of the interface adaptive power supply circuit. It does not require the control of a complex software control system, has a simple circuit structure, fast interface function switching and external power supply response speed, high efficiency, and reduces costs.

[0079] A third aspect of the present application provides an interface adaptive power supply device, which includes the interface adaptive power supply circuit as described above.

[0080] In a specific implementation, the interface adaptive power supply device also includes a first network interface 01 and a second network interface 02, and an external device can be connected through the first network interface 01 and the second network interface 02, and the external device connected can be a PSE device or a PD device. By detecting the state of the first network interface 01 and the type of the first external device connected to the first network interface 01, as well as the state of the second network interface 02 and the type of the second external device connected to the second network interface 02, the interface functions of the first network interface 01 and the second network interface 02 can be adaptively adjusted, so that when the first network interface 01 and the second network interface 02 are not connected to an external PSE device, the detection function of the network interface is maintained. After the first network interface 01 is connected to an external PSE device, the second network interface 02 is adaptively adjusted to be an external power supply port; or after the second network interface 02 is connected to an external PSE device, the first network interface 01 is adaptively adjusted to be an external power supply port, so that the interface adaptive power supply device can receive power from an external PSE device and also have the ability to supply power to an external PD device. When the first network interface 01 and the second network interface 02 are both connected to an external PSE device, the control disconnects the external power supply. At this time, the first network interface 01 and the second network interface 02 are both powered ports, and the interface adaptive power supply device only serves as a powered device.

[0081] The interface adaptive power supply device of the embodiment of the present application can be used as a powered device to be powered by an external PSE device connected to a network interface, and can also be used as a power supply device to power a PD device connected to a network interface. It does not require the control of a complex software control system, has a simple circuit structure, and has fast and efficient interface function switching and external power supply response speeds, thereby reducing costs and improving the reliability and practicality of the interface adaptive power supply circuit.

[0082] A fourth aspect of the present application provides a PD device, the PD device comprising the interface adaptive power supply circuit as described in any one of the above items or the interface adaptive power supply device as described in the above items.

[0083] In a specific implementation, the PD device includes two or more first network interfaces 01 and second network interfaces 02, through which external devices can be connected, and the interface functions of the first network interface 01 and the second network interface 02 can be adaptively adjusted according to the type of the external device connected, so as to realize the adaptive adjustment of multiple interfaces of the PD device to the power supply port to power the external PD device and the adaptive adjustment to the power receiving port to receive power from the external PSE device through pure hardware circuit control, without the need for complex software control system control, the circuit structure and implementation are simple, the cost is reduced, and the stability, reliability and practicality of the PD device are improved.

[0084] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units, modules, and circuits is used as an example. In actual applications, the above-mentioned function distribution can be completed by different functional units, modules, and circuits as needed, that is, the internal structure of the device can be divided into different functional units or modules or circuits to complete all or part of the functions described above. The functional units, modules, and circuits in the embodiments can be integrated into a processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units, modules, and circuits are only for the convenience of distinguishing from each other, and are not used to limit the scope of protection of this application. In the above embodiments, the description of each embodiment has its own emphasis. For the part that is not described or recorded in detail in a certain embodiment, refer to the relevant description of other embodiments. Another point is that the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0085] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. An interface adaptive power supply circuit, connected to a first network interface and a second network interface, characterized in that: The first network interface and the second network interface are both Ethernet network interfaces, and the interface adaptive power supply circuit includes: A first switching circuit, wherein a common end of the first switching circuit is connected to the first network interface; a second switching circuit, wherein a common end of the second switching circuit is connected to the second network interface; a first detection circuit, connected to the first switch end of the first switching switch circuit, configured to detect the state of the first network interface and the type of the first external device connected to the first network interface to generate a first enable signal and a third enable signal, and generate a first rectified voltage according to the power supply voltage provided by the first external device; a second detection circuit, connected to the first switch end of the second switching switch circuit, configured to detect the state of the second network interface and the type of the second external device connected to the second network interface to generate a second enable signal and a fourth enable signal, and generate a second rectified voltage according to the power supply voltage provided by the second external device; a logic processing circuit connected to the first detection circuit and the second detection circuit, and configured to generate a voltage transformation enable signal according to the first enable signal and the second enable signal; a voltage conversion circuit connected to the logic processing circuit, the first switch end of the first switching circuit, and the first switch end of the second switching circuit, and configured to perform voltage conversion processing on the power supply voltage provided by the first external device and / or the second external device according to the voltage conversion enable signal to generate a supply voltage; a power supply management circuit connected to the voltage conversion circuit, the second switch end of the first switching switch circuit, the second switch end of the second switching switch circuit, the first detection circuit, and the second detection circuit, and configured to control the on-off state of the first rectified voltage and the second rectified voltage according to the type of the first external device, the type of the second external device, and the supply voltage; The first switching circuit is configured to switch the first network interface to be connected to the first detection circuit or to switch the first network interface to be connected to the power supply management circuit according to the fourth enable signal; The second switching circuit is configured to switch the second network interface to be connected to the second detection circuit or to switch the second network interface to be connected to the power supply management circuit according to the third enable signal.

2. The interface adaptive power supply circuit according to claim 1, characterized in that: The logic processing circuit is a logic circuit.

3. The interface adaptive power supply circuit according to claim 2, characterized in that: The logic circuit is an OR gate circuit.

4. The interface adaptive power supply circuit according to claim 1, characterized in that: The first detection circuit comprises: a first rectifying unit connected to the first switch terminal of the first switching circuit and configured to generate a first rectified voltage according to a power supply voltage provided by the first external device; a first backfeed protection unit, connected to the first rectifier unit and the power supply management circuit, and configured to perform backfeed protection on the first rectified voltage; A first detection control unit, connected to the first rectifier unit, configured to generate an original first enable signal according to the first rectified voltage before backfeed protection; a first amplifying unit connected to the control unit and the logic processing circuit, and configured to amplify the original first enabling signal to generate the first enabling signal; The first driving unit is connected to the first amplifying unit and the second switching circuit, and is configured to generate the third enabling signal according to the first enabling signal.

5. The interface adaptive power supply circuit according to claim 1, characterized in that: The first switching switch circuit includes: a first relay; wherein the first common end of the first relay and the second common end of the first relay are connected to the first network interface, the coil of the first relay is connected to the second detection circuit, the second end of the coil of the first relay is connected to the power ground, the first end of the normally closed switch of the first relay and the second end of the normally closed switch of the first relay are connected to the first detection circuit, and the first end of the normally open switch of the first relay and the second end of the normally open switch of the first relay are connected to the power supply management circuit.

6. The interface adaptive power supply circuit according to claim 4, characterized in that: The first detection control unit includes: a PD control chip, a first voltage-stabilizing diode, a first capacitor, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor; wherein, the detection end of the PD control chip is connected to the first end of the third resistor R11, the grading end of the PD control chip is connected to the first end of the fourth resistor, the limiting current end of the PD control chip 1 is connected to the first end of the fifth resistor, the negative power supply end of the powered device of the PD control chip is connected to the power ground, the power indication end of the PD control chip is connected to the first end of the sixth resistor and the first amplification unit, the negative power supply end of the PD control chip, the anode of the first voltage-stabilizing diode, the first end of the first capacitor, the second end of the fourth resistor and the second end of the fifth resistor are connected to the negative output end of the first rectifier unit, and the positive power supply end of the PD control chip, the cathode of the first voltage-stabilizing diode, the second end of the first capacitor, the second end of the third resistor and the second end of the sixth resistor are connected to the positive output end of the first rectifier unit.

7. The interface adaptive power supply circuit according to claim 1, characterized in that: The power supply management circuit includes: a power supply management chip, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a first field effect transistor, a second field effect transistor, a first fuse, a second fuse, a first diode and a second diode; wherein the positive voltage end of the power supply management chip and the first end of the third capacitor are connected to the first power supply voltage end, the second end of the third capacitor is connected to the power ground, the reset end of the power supply management chip is connected to the first power supply voltage end, the interrupt end of the power supply management chip is connected to the first power supply voltage end, the clock end of the power supply management chip, the input data end of the power supply management chip, the The output data terminal of the chip, the data ground terminal of the power supply management chip, the third current detection input terminal of the power supply management chip, the third output voltage monitoring terminal of the power supply management chip, the second detection connection terminal of the power supply management chip, the fourth current detection input terminal of the power supply management chip and the fourth output voltage monitoring terminal of the power supply management chip are connected to the power ground, the analog power supply terminal of the power supply management chip and the first terminal of the fourth capacitor are connected to the rectifier voltage terminal, the second terminal of the fourth capacitor is connected to the power ground, the bus programming terminal of the power supply management chip, the low priority terminal of the power supply management chip, the bus address terminal of the power supply management chip are connected to the power ground. and the analog ground end of the power supply management chip is connected to the power supply ground, the second gate drive output end of the power supply management chip is connected to the gate of the second field effect transistor, the second output voltage monitoring end of the power supply management chip is connected to the drain of the second field effect transistor and the first end of the second fuse, the second end of the second fuse, the anode of the second diode, and the first end of the sixth capacitor are connected to the second network interface, the cathode of the second diode and the second end of the sixth capacitor are connected to the power supply voltage end and the second network interface, the second current detection input end of the power supply management chip, the source of the second field effect transistor, the first detection connection end of the power supply management chip, the source of the first field effect transistor and the first current detection input end of the power supply management chip are connected to the power supply ground, the first gate drive output end of the power supply management chip is connected to the gate of the first field effect transistor, the first output voltage monitoring end of the power supply management chip is connected to the drain of the first field effect transistor and the first end of the first fuse, the second end of the first fuse, the anode of the first diode, and the first end of the fifth capacitor are connected to the first network interface, and the cathode of the first diode and the second end of the fifth capacitor are connected to the power supply voltage end and the first network interface.

8. An interface adaptive power supply circuit, characterized in that: The interface adaptive power supply circuit includes: multiple network interfaces, multiple switching circuits, multiple detection circuits, and the power supply management circuit, the voltage conversion circuit, and the logic processing circuit as described in any one of claims 1 to 7; wherein, the multiple network interfaces are connected to the multiple switching switch circuits one-to-one, and the multiple switching switch circuits are connected to the multiple detection circuits one-to-one; the multiple switching switch circuits are all connected to the power supply management circuit, the voltage conversion circuit, and the logic processing circuit; the multiple detection circuits are all connected to the logic processing circuit; the multiple detection circuits detect the status of the multiple network interfaces and the type of access devices one-to-one to generate enable signals; the logic processing circuit generates a voltage transformation enable signal and a switching enable signal according to the multiple enable signals generated by the multiple detection circuits, and the switching switch circuit switches the corresponding network interface to be connected to the corresponding detection circuit or switches the corresponding network interface to be connected to the power supply management circuit according to the switching enable signal.

9. An interface adaptive power supply device, characterized in that: The interface adaptive power supply device comprises the interface adaptive power supply circuit according to any one of claims 1 to 7; or the interface adaptive power supply circuit according to claim 8.

10. A PD device, characterized in that: The PD device includes the interface adaptive power supply circuit according to any one of claims 1 to 8 or the interface adaptive power supply device according to claim 9.

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