Driver assisted by charge sharing
By using variable capacitors of multiple capacitance elements activated by programmable signals in the photoelectric system, the charge transfer rate is adjusted to improve the slewing rate, and the problem of high bit error rate in existing photoelectric systems at high data rates is solved, achieving higher signal integrity and energy efficiency.
Patent Information
- Application Number
- CN201980037535.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-04-27
- Filing Date
- 2019-04-26
- Publication Date
- 2025-05-02
- Estimated Expiration
- 2039-04-26
AI Technical Summary
Existing photoelectric systems have low slewing rates and asymmetric rising and falling edges at high data rates, resulting in improved bit error rates and poor signal integrity and energy efficiency.
Using a variable capacitor including a plurality of capacitance elements activated by a programmable signal, the charge transfer rate is adjusted to increase the slewing rate and reduce the bit error rate by coupling to the current source in parallel at the source terminal of the switch.
It improves the slew rate and signal integrity of the photoelectric data link, reduces the bit error rate, and improves the energy efficiency at high data rates.
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Figure CN112219353B_ABST
Abstract
Description
Technical Field
[0001] Embodiments described herein relate generally to the field of optoelectronic device transducers. More specifically, embodiments described herein relate to compact and efficient current sources for optoelectronic data conversion. Background Art
[0002] Current optoelectronic systems are expected to operate at high data rates, which imposes stringent conditions on the capacitive response of the driver termination. Optical transducers involve light emitting diode devices that have lower than ideal slew rates, and which ultimately produce reduced bit error rates (BER) in the optoelectronic data conversion. Furthermore, the lower than ideal slew rate behavior is asymmetric for signal rise and signal fall, further degrading the BER performance of the device.
[0003] The description provided in the Background section should not be considered prior art merely because it is mentioned in or associated with the Background section.The Background section may include information describing one or more aspects of the subject technology. Summary of the invention
[0004] In certain aspects, an apparatus disclosed herein includes a switch configured to couple a current source to an output terminal upon receiving a data signal. The apparatus also includes a first variable capacitor coupled in parallel to the current source at a common node on a source terminal of the switch, wherein the first variable capacitor includes a plurality of capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to increase a charge transfer rate from the output terminal coupled to a load when the switch is turned on.
[0005] In certain aspects, a system disclosed herein includes a light emitting device, a data channel configured to provide a data signal, and a switch configured to couple a current source to the light emitting device upon receiving the data signal. The system also includes a first variable capacitor coupled in parallel to the current source at a common mode node on a source terminal of the switch, wherein the first variable capacitor includes a plurality of capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to increase a slew rate from the light emitting device when the switch is turned on and when the switch is turned off.
[0006] In certain aspects, a serial interface includes an optoelectronic data link. The optoelectronic data link includes a light emitting device configured to convert an electrical input signal into an optical output signal; a data channel configured to provide the electrical input signal; and a switch configured to couple a current source to the light emitting device upon receiving the electrical input signal. The optoelectronic data link also includes a variable capacitor coupled in parallel to the current source at a common node on a source terminal of the switch. The variable capacitor includes a plurality of capacitive elements coupled in parallel and configured to be activated by a programmable signal, wherein the programmable signal is selected to reduce a bit error rate between the electrical input signal and the optical output signal.
[0007] In certain aspects, a system is described that includes a device for coupling a current source to an output terminal upon receiving a data signal. The system also includes a device for generating an optical signal from the data signal. The device for coupling the current source to the output terminal includes a switch configured to couple the current source to the output terminal upon receiving the data signal. The device for coupling the current source to the output terminal also includes a first variable capacitor coupled in parallel to the current source at a common node on a source terminal of the switch, wherein the first variable capacitor includes a plurality of capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to increase a charge transfer rate from the output terminal coupled to a load when the switch is turned on. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 An optoelectronic system including a charge sharing element is shown according to some embodiments.
[0009] Figure 2A An optoelectronic system including a charge sharing element to assist with falling edge signal transduction is shown in accordance with some embodiments.
[0010] Figure 2B An optoelectronic system including a charge sharing element to assist in rising edge signal transduction is shown in accordance with some embodiments.
[0011] Figure 3 Variable capacitors for charge sharing in a photovoltaic system are shown in accordance with some embodiments.
[0012] Figure 4 A variable capacitance table of an output node in an optoelectronic system including a charge sharing element is shown according to some embodiments.
[0013] Figure 5 A serial interface for converting electrical signals from a transmitter into optical signals for a receiver is shown in accordance with some embodiments.
[0014] Figure 6A-6BA multi-level eye diagram for a serial interface assisted by a charge sharing element is shown in accordance with some embodiments.
[0015] In the drawings, elements and steps denoted by the same or similar reference numerals are associated with the same or similar elements and steps unless otherwise noted. DETAILED DESCRIPTION
[0016] The specific description set forth below is intended as a description of various embodiments, and is not intended to represent the only embodiments in which the subject technology can be practiced. Those skilled in the art will recognize that the embodiments described can be modified in various different ways without departing from the scope of the present disclosure. Therefore, the drawings and descriptions will be considered to be illustrative rather than restrictive in nature.
[0017] General Overview
[0018] Electrical and optical link migration uses serial interfaces that operate at increased data rates. Low bandwidth is a strict constraint at high bit rates or with high input / output (IO) capacitive loads. This may be the case for drivers of typical vertical cavity light emitting diodes (VCSELs). In some cases, the serial interface includes an equalization step to eliminate VCSEL ringing and high impedance problems. To address the low bandwidth constraint at high bit rates, embodiments disclosed herein include a push-pull driver (e.g., for VCSELs) with auxiliary charge sharing for bandwidth enhancement.
[0019] Although some serial interfaces still use non-return-to-zero (NRZ) schemes, for practical signal integrity constraints, especially for some interconnect applications and low-loss situations, it is desirable to modulate the light emitting device directly. The high-speed transmitter for serial interfaces disclosed herein can improve the "eye opening" in the BER diagram for transitions between non-adjacent levels, including wide bandwidth and tight timing constraints. Therefore, the embodiments disclosed herein provide high data rates while maintaining signal integrity and energy efficiency, for example, 4-tap feed-forward equalization (FFE) at 56 gigabits per second (Gb / s) data rates.
[0020] Figure 1An optoelectronic data link 10 including a charge sharing element 100 is shown according to some embodiments. The optoelectronic data link 10 may be part of a serial interface including a light emitting device 120 configured to convert an electrical input signal 131 into an optical output signal 132. The data channel 50 provides the electrical input signal 131 to trigger a switch 105, which couples a current source 150 to the light emitting device 120 upon receiving the electrical input signal 131. The current source 150 may include an auxiliary current source 101 coupled to a main current source 102 to modulate the current to the light emitting device 120 above and below the bias current provided by the first current source 110. The current is provided to the light emitting device 120 through an output node 163.
[0021] The optical-to-electrical data link 10 also includes a variable capacitor 100 coupled in parallel to a current source 150 at a common node 165 on the source terminal of the switch 105. In some embodiments, the variable capacitor 100 is adjusted to reduce the bit error rate between the electrical input signal 131 and the optical output signal 132. Power to the current source 150 is provided by a high voltage source 111 (Vdd) and a low voltage source 112 or sink (Vss, e.g., ground).
[0022] Figure 2A An optoelectronic data link 20a is shown that includes a charge sharing element 200a to assist in signal transduction of a falling edge portion according to some embodiments. The optoelectronic data link 20a includes a main current source having a source terminal 201a, and a switch 203a. The switch 203a is controlled by an electrical input signal 231a. In addition, in some embodiments, the switch 203a is a positive channel FET (PFET). The optoelectronic data link 20a also includes a switch 205b, which is configured to couple a sink terminal 202b of the auxiliary current source to an output node 263 when the electrical input signal 231b is received. In some embodiments, the switch 205b includes a negative channel field effect transistor (NFET) that is turned on by a rising edge in the electrical input signal 231b. In some embodiments, the electrical input signals 231a and 231b (hereinafter collectively referred to as "electrical input signal 231") are complementary to each other. Therefore, when the electrical input signal 231a is high, the electrical input signal 231b is low. When the electrical input signal 231a is low, the electrical input signal 231b is high. When the switches 203a and 205b are turned on (e.g., when the electrical input signal 231a is low), current flows from the output node 263 to the node 261 through the resistor 230 (e.g., the terminating resistor), increasing the voltage of the output node 263 and reducing the current through the load 220 to below the bias current value provided by the bias current source 210.
[0023] The optical data link 20a also includes a variable capacitor 200a coupled in parallel to the current source 201a at a common node 265a on the source terminal of the switch 203a, and coupled to a regulator 214. The variable capacitor 200a is selected by the programmable signal 275a to increase the rate of charge transfer from the output node 263 coupled to the load 220 when the switch 203a is turned on. Therefore, the falling slew rate of the load 220 can be increased by increasing the capacitance value in the variable capacitor 200a to enable charge sharing at the node 263, thereby speeding up the time when the voltage at the node 263 is pulled up.
[0024] In some embodiments, load 220 may include a VCSEL and a transmission line. Drivers for load 220 may include a voltage regulator, a pre-driver, a T-coil, and a push-pull driver. Voltage regulator 214 acts as voltage protection for a high voltage source (Vdd). Capacitor 250 couples resistor 230 to ground for a correct common mode termination voltage (V cm ) and stabilization. Embodiments consistent with the optical data link 20a provide a driving current to the load 220 at a high slew rate at a falling edge of a bit transmission on the optical data link 20a (e.g., a falling edge of the electrical input signal 231a). For example, the variable capacitor 200a can increase the falling slew rate of the current driving the load 220 because it increases the charge transfer rate when the switch 203a is turned on by the falling edge of the electrical input 231a (e.g., the falling edge of the electrical input 231a).
[0025] When switch 203a is turned on, common node 265a is coupled to node 261, and a large amount of excess charge from variable capacitor 200a ("charge sharing") charges common node 265a to a steady-state voltage value (V cm ). Generally, the larger the capacitance of variable capacitor 200a, the more extra charge will be available for sharing to increase V cm to a steady state value, thereby improving the falling slew rate of the driver for the load 220.
[0026] In some embodiments, the optoelectronic data link 20a is configured such that when the switch 203a is off, the capacitance of the variable capacitor 200a is effectively decoupled from the output node 263 and is therefore not visible for the purpose of rising slew rate of the load 220. In addition, when the switch 203a is on, the capacitance of the variable capacitor 200a is coupled in series with the inherent capacitance of the switch 203a (which is a low capacitance PEFT), so the net capacitive effect on the output node 263 remains low. In addition, when the switch 203a is on, the common node 265a is coupled to the biased FETS (e.g., PEFT in the switch 203a and NFET in the switch 205b), which maintain V after reaching a steady state value. cm Almost constant. In this case, the voltage change at output node 263 (modulating the optical signal from load 220) causes a limited charge displacement from variable capacitor 200a. The net result is that the equivalent capacitance introduced by variable capacitor 200a as seen from output node 263 is relatively small even when switch 203a is on.
[0027] Figure 2B An optoelectronic system 20b is shown that includes a charge sharing element to assist in the rising edge of signal transduction according to some embodiments. The optoelectronic data link 20b includes a switch 205a, which is configured to couple the source terminal 202a of the auxiliary current source to the output node 263 when receiving the electrical input signal 231b. In some embodiments, the switch 205a includes a PFET, which is turned on by the falling edge in the electrical input signal 231b. The optoelectronic data link 20b also includes a sink terminal 201b of the main current source, and a switch 203b. The switch 203b is controlled by the electrical input signal 231a. In addition, in some embodiments, the switch 203b is an NFET. When the switches 203b and 205a are turned on (for example, when the electrical input signal 231a is high), the current flows from the node 261 through the resistor 230 to the output node 263, reducing the voltage of the output node 263 and increasing the current through the load 220 to above the bias current value provided by the bias current source 210.
[0028] The optical data link 20b also includes a variable capacitor 200b coupled in parallel to the sink terminal 201b at a common node 265b, and to the source terminal of the switch 203b. In some embodiments, the variable capacitor 200b is coupled to the sink voltage Vss 212 (e.g., ground). The variable capacitor 200b is selected by the programmable signal 275b to increase the charge transfer rate from the common node 265b to the node 261 when the switch 203b is turned on. Therefore, the rising slew rate of the load 220 can be increased by increasing the capacitance value in the variable capacitor 200b to enable sharing of charge at the node 263 and speeding up the time when the voltage at the node 263 is pulled down.
[0029] Figure 3 A variable capacitor 300 for charge sharing in an optoelectronic system (e.g., optoelectronic systems 10, 20a, and 20b) according to some embodiments is shown. The variable capacitor 300 includes a plurality of capacitive elements 330-1, 330-2 to 330-n (hereinafter, collectively referred to as "capacitive elements 330") coupled in parallel between a common node 365 and a Vss sink terminal 312 (e.g., ground) and configured to be activated by a programmable signal 375. The programmable signal 375 controls the strength of the charge sharing effect by adjusting the capacitance of the variable capacitor 300. In some embodiments, the common node 365 can be the source terminal of a switch in the sink terminal of the auxiliary current source (e.g., the common node 265a, and the switch 205b in the sink terminal 202b). The programmable signal may include bits 310-1, 310-2 to 310-n (hereinafter, collectively referred to as "bits 310"), which respectively activate the gates of transistors 320-1, 320-2 to 320-n (hereinafter, collectively referred to as "transistors 320"). When transistor 320 is an NFET, then the high bit 310 adds the capacitance of a corresponding one of the capacitive elements 330 to the capacitance value of the variable capacitor 300.
[0030] In some embodiments, capacitor 310 may be classified as a most significant bit (MSB) or a least significant bit (LSB) based on the value of capacitor 330. In some embodiments, the value of capacitor 330 for the MSB is twice the value of capacitor 330 for the LSB. Thus, one MSB "finger" and one LSB "finger" may allow for 0, 1, 2, and 3 different capacitance value strengths. In some embodiments, for a serial link using an optoelectronic system coupled to variable capacitor 300, each of the different capacitance value strengths may be associated with a strength level in an eye diagram of a BER curve diagram.
[0031] Figure 4A graph 400 of variable capacitance of an output node (e.g., output nodes 163 and 263) in an optoelectronic system including a charge sharing element (e.g., variable capacitors 100, 200a, and 300 in optoelectronic systems 10, 20a, and 20b) according to some embodiments is shown. Graph 400 shows capacitance in the ordinate (Y-axis, arbitrary units) as a function of voltage (at the output node) in the abscissa (X-axis, arbitrary units). Curve 401 corresponds to the variable capacitor at its lowest capacitance value (e.g., all bits 310 are set to low, reference 402). Figure 3 ). Curve 402 corresponds to the switched capacitors at their highest capacitance value (eg, all bits 310 are set high).
[0032] The operating voltage region 410 for the VCSEL (e.g., the light emitting device 120 or the load 220) can span from the voltage Vo to the voltage Vm. It can be seen that in the high output voltage region, the difference between the curves 401 and 402 is very small. In addition, compared with the voltage region below Vo, the value of the capacitance in the curves 401 and 402 is also relatively small.
[0033] Figure 5 Serial interface 500 is shown for converting electrical input signal 531 from transmitter 501 into optical output signal for receiver 502 according to some embodiments. Serial interface 500 includes optical-electrical data link 510 to convert electrical signal 531 into optical signal 532 (eg, optical-electrical data links 10, 20a, and 20b).
[0034] In some embodiments, serial interface 500 includes processor 575 configured to provide programmable signals to increase the switching rate of light emitting devices in optoelectronic data link 510 (eg, programmable signals 275a and 375 and light emitting device 120 or 220 -a VCSEL-).
[0035] In some embodiments, the serial interface 500, wherein the light emitting device comprises a load having a slew rate that defines an eye opening pattern in a bit error rate graph.
[0036] In some embodiments, the optical-to-electrical data link 510 includes a first variable capacitor whose capacitance can be adjusted based on a slew rate of a load coupled to a current source driving the load and based on a bit error rate between the electrical input signal 531 and the optical output signal 532 .
[0037] Figure 6A-6B According to some embodiments, for a serial interface assisted by a charge sharing element (eg, serial interface 500, see Figure 5) show multi-level eye diagrams 600A and 600B (hereinafter collectively referred to as “eye diagrams 600”). Eye diagram 600 shows the BER for electrical-optical data conversion using a VCSEL as a load (reference light emitting diode 120 or load 220) of a serial interface. The ordinate (Y-axis, arbitrary units) of eye diagram 600 indicates the optical signal (e.g., optical signal 132, referenced to Figure 1 ), and the abscissa (X-axis, arbitrary unit) of the eye diagram 600 indicates time.
[0038] Eye diagram 600A corresponds to a charge sharing element having a low capacitance value (eg, all bits 310 are set to low, reference Figure 3 , as shown in curve 401, reference Figure 4 ). Eye diagram 600B corresponds to a charge sharing element with a high capacitance value (eg, all bits 310 are set high, see Figure 3 , as shown in curve 402, reference Figure 4 ). Thus, the addition of the charge sharing element enhances the BER performance because the eye diagram 600B shows a wider "eye opening" at all signal levels (four different signal levels) and less jitter on the abscissa relative to the eye diagram 600A.
[0039] In one aspect, a method may be an operation, an instruction or a function, and vice versa. In one aspect, a clause or claim may be modified to include some or all of the words (e.g., instructions, operations, functions or components) recorded in one or more other clauses, one or more words, one or more sentences, one or more phrases, one or more paragraphs and / or one or more claims.
[0040] To illustrate the interchangeability of hardware and software, items such as various exemplary blocks, modules, components, methods, operations, instructions, and algorithms have been generally described in terms of functionality. Whether such functionality is implemented as hardware, software, or a combination of hardware and software depends on the specific application and the design constraints imposed on the overall system. Technicians can implement the described functionality in various ways for each specific application.
[0041] As used herein, the phrase "at least one of ..." preceding a series of items (with any of the items separated by the terms "and" or "or") modifies the entire list rather than each member of the list (i.e., each item). The phrase "at least one of ..." does not require selection of at least one item; rather, the phrase allows for the inclusion of at least one of: at least one of the items, and / or at least one of any combination of the items, and / or at least one of each of the items. For example, the phrase "at least one of A, B, and C" or "at least one of A, B, or C" all mean: only A, only B, or only C; any combination of A, B, and C; and / or at least one of each of A, B, and C.
[0042] In one aspect, the term field effect transistor (FET) may refer to any of a variety of multi-terminal transistors that generally operate on the principle of controlling an electric field to control the channel shape of one type of carrier in a semiconductor material and thereby control the conductivity, including but not limited to metal oxide semiconductor field effect transistor (MOSFET), junction FET (JFET), metal semiconductor FET (MESFET), high electron mobility transistor (HEMT), modulation doped FET (MODFET), insulated gate bipolar transistor (IGBT), fast reverse epitaxial diode FET (FREDFET) and ion sensitive FET (ISFET).
[0043] To the extent the terms "including," "having," etc. are used in the specification or claims, such terms are intended to be inclusive in a manner similar to how the term "comprising" is interpreted when used as a transitional word in a claim.
[0044] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration". Any embodiment described herein as "exemplary" is not necessarily to be understood as being preferred or advantageous over other embodiments. Words such as aspect, this aspect, another aspect, some aspects, one or more aspects, implementation, this implementation, another implementation, some implementations, one or more implementations, embodiment, this embodiment, another embodiment, some embodiments, one or more embodiments, configuration, this configuration, another configuration, some configurations, one or more configurations, subject technology, disclosure, the present disclosure, other variations, etc. are for convenience and do not mean that the disclosure involving such one or more words is essential to the subject technology, or that such disclosure applies to all configurations of the subject technology. Disclosure involving such words may apply to all configurations or one or more configurations. Disclosure involving such one or more words may provide one or more examples. Words such as one aspect or some aspects may refer to one or more aspects, and vice versa, and this situation similarly applies to other aforementioned words.
[0045] Unless specifically indicated, elements in the singular form do not necessarily mean "one and only one", but "one or more". The term "some" means one or more. Underlined and / or italicized headings and subheadings are used only for convenience, do not limit the subject technology, and are not cited in conjunction with the interpretation of the description of the subject technology. Relational terms, such as first and second, etc., can be used to distinguish one entity or action from another, without necessarily requiring or implying any actual such relationship or order between such entities or actions. All structural and functional equivalents of the elements of the various configurations described throughout this specification that are known or will be known to a person of ordinary skill in the art are expressly incorporated herein by reference and are intended to be covered by the subject technology. In addition, nothing described herein is intended to be dedicated to the public, regardless of whether such disclosure is explicitly stated in the above description. No claim element is to be interpreted in accordance with the provisions of 35 USC§112, paragraph 6, unless the element is explicitly stated using the phrase "device for..." or in a method claim, the element is stated using the phrase "step for..."
[0046] Although this specification contains many details, these details should not be interpreted as limiting the scope of the claims, but should be regarded as descriptions of specific embodiments of this theme. Certain features described in this specification in the context of independent embodiments may also be implemented in combinations in a single embodiment. Conversely, the various features described in the context of a single embodiment may also be implemented in multiple embodiments individually or in the form of any suitable sub-combination. In addition, although features may be described above as acting in certain combinations and even initially claiming protection for them, one or more features from the claimed combination may be removed from the combination in some cases, and the claimed combination may involve a sub-combination or a variation of the sub-combination.
[0047] The subject matter of this specification has been described with reference to specific aspects, but other aspects may be implemented and are within the scope of the following claims. For example, although the operations are shown in a specific order in the drawings, this should not be understood as requiring such operations to be performed in a sequential order or a specific number of times shown, or requiring all the operations shown to be performed to achieve the desired result. The actions described in the claims can be performed in different orders and still achieve the desired results. As an example, the processes shown in the drawings do not necessarily require the specific order or sequential order shown to achieve the desired results. In some cases, multitasking and parallel processing may be advantageous. In addition, the division of each system component in the above-mentioned aspects should not be understood as requiring such division in all aspects, and it should be understood that the program components and systems can be generally integrated together in a single software product or packaged into multiple software products.
[0048] The title of the invention, background technology, description of the figures, abstract, and drawings are incorporated herein into the disclosure and are provided as illustrative examples of the present disclosure rather than as limiting descriptions. It is understood that they will not be used to limit the scope or meaning of the claims. In addition, in the specific description, it can be seen that the specification provides illustrative examples, and various features are grouped together in various embodiments for the purpose of making the present disclosure simple. This method of the present disclosure should not be interpreted as reflecting the following intention: the subject matter of the claims requires more features than those expressly recited in each claim. On the contrary, as reflected in the claims, the creative subject matter lies in less than all the features of a single disclosed configuration or operation. The claims are incorporated herein into the specific embodiments, wherein each claim itself represents a subject matter that is individually claimed for protection.
[0049] The claims are not intended to be limited to the aspects described herein, but are to be consistent with the full scope of the language of the claims and to encompass all legal equivalents. Nevertheless, no claims are intended to encompass subject matter that would not satisfy applicable patent law requirements, nor should they be interpreted in such a manner.
Claims
1. An optoelectronic system including a charge sharing element, comprising: a switch configured to couple the current source to the output terminal upon receiving a data signal; as well as a first variable capacitor coupled in parallel to the current source at a common node on a source terminal of the switch, wherein the first variable capacitor comprises a plurality of capacitive elements coupled in parallel and configured to be activated by a programmable signal, wherein the programmable signal is selected to increase a rate of charge transfer from an output terminal coupled to a load when the switch is turned on, and wherein said selecting said programmable signal to increase a charge transfer rate from an output terminal coupled to a load when said switch is turned on comprises: The falling slew rate of the load is increased by increasing the capacitance value in the first variable capacitor to enable sharing of charges at the output terminal, thereby accelerating the time for the voltage at the output terminal to be pulled up.
2. The photovoltaic system according to claim 1, wherein: The switch includes at least one of a negative channel field effect transistor or a positive channel field effect transistor.
3. The photovoltaic system according to claim 1, wherein: The plurality of capacitive elements include at least one field effect transistor coupled in series with a capacitor, and the programmable signal includes a bit signal to a gate of the field effect transistor.
4. The photovoltaic system according to claim 1, wherein: The current source includes a sink terminal of an auxiliary current source configured to maintain a voltage of the common node at a fixed value when a current lower than a bias current is provided to a load.
5. The photovoltaic system according to claim 1, wherein: The current source includes a source terminal of a main current source configured to provide a current through a resistor having a first terminal at the output node and a second terminal at the common node, the current flowing from the first terminal to the second terminal to induce a current lower than a bias current through a load coupled in parallel with the source terminal.
6. The photovoltaic system according to claim 1, wherein: The current source includes a source terminal of an auxiliary current source configured to maintain a voltage of the common node at a fixed value when a current higher than a bias current is supplied to a load.
7. The photovoltaic system according to claim 1, wherein: The current source includes a sink terminal of a main current source configured to provide a current through a resistor having a first terminal at the common node and a second terminal at the output node, the current flowing from the first terminal to the second terminal being configured to induce a current through the load that is higher than the bias current.
8. The photovoltaic system of claim 1, further comprising a second variable capacitor coupled in parallel to a source terminal of the main current source, wherein The second variable capacitor includes a plurality of capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to increase a charge transfer rate from the output terminal when a second switch activates the source terminal of the main current source.
9. The photovoltaic system according to claim 1, wherein: The capacitance of the first variable capacitor is adjusted based on a slew rate of a load coupled to the current source.
10. The photovoltaic system according to claim 1, wherein: The capacitance of the first variable capacitor is adjusted based on a rising slew rate of a load coupled to the current source and based on a falling slew rate of the load.
11. An optoelectronic data link comprising: Light emitting device; a data channel configured to provide a data signal; a switch configured to couple a current source to the light emitting device upon receiving the data signal; as well as a first variable capacitor coupled in parallel to the current source at a common mode node on a source terminal of the switch, wherein the first variable capacitor comprises a plurality of capacitive elements coupled in parallel and configured to be activated by a programmable signal, wherein the programmable signal is selected to increase a slew rate from the light emitting device when the switch is turned on and when the switch is turned off, and wherein said selecting said programmable signal to increase a slew rate from said light emitting device when said switch is turned on and when said switch is turned off comprises: The load falling slew rate is increased by increasing the capacitance value in the first variable capacitor to enable charge sharing at the output terminal, thereby accelerating the time for the voltage at the output terminal to be pulled up.
12. The optoelectronic data link of claim 11, further comprising a processor configured to provide the programmable signal to increase a switching rate of the light emitting device.
13. The optoelectronic data link according to claim 11, wherein: The light emitting device includes a load having a slew rate that defines an open eye pattern in a bit error rate map.
14. The optoelectronic data link of claim 11, wherein: The capacitance of the first variable capacitor is adjusted based on a slew rate of a load coupled to the current source and a bit error rate of an output signal from a light emitting diode.
15. A serial interface comprising: Optical-electronic data links, including: a light emitting device configured to convert an electrical input signal into an optical output signal; a data channel configured to provide the electrical input signal; a switch configured to couple a current source to the light emitting device upon receiving the electrical input signal; and a variable capacitor coupled in parallel to the current source at a common node on a source terminal of the switch, wherein the variable capacitor comprises a plurality of capacitive elements coupled in parallel and configured to be activated by a programmable signal, wherein the programmable signal is selected to reduce a bit error rate between the electrical input signal and the optical output signal, Wherein, selecting the programmable signal to reduce the bit error rate between the electrical input signal and the optical output signal comprises: The capacitance of the variable capacitor is adjusted based on a slew rate of a load and based on a bit error rate between the electrical input signal and the optical output signal.
16. The serial interface of claim 15, further comprising a processor configured to provide the programmable signal based on a bit error rate measured for the optical output signal.
17. The serial interface according to claim 15, wherein: The switch includes at least one of a negative channel field effect transistor or a positive channel field effect transistor.
18. The serial interface of claim 15, further comprising a second variable capacitor coupled in parallel to a source terminal of the main current source, wherein The second variable capacitor includes a plurality of capacitive elements coupled in parallel and configured to be activated by a programmable signal, and wherein the programmable signal is selected to differentially increase a rising slew rate and a falling slew rate of a light signal from a light emitting diode.
19. The serial interface according to claim 15, wherein: The plurality of capacitive elements include at least one field effect transistor coupled in series with a capacitor, and the programmable signal includes a bit signal to a gate of the field effect transistor.
20. The serial interface according to claim 15, wherein: The current source includes a sink terminal of an auxiliary current source configured to maintain a voltage of the common node at a fixed value when a current lower than a bias current is provided to a load.
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