Power factor correction with active damping

Abstract

Various embodiments relate to a circuit for power factor correction ("PFC") comprising: a power filter and rectifier configured to generate an input voltage for power factor correction and transmit the input voltage to a PFC controller and a load block; a voltage regulator configured to regulate the output voltage and output a control signal to a summer; a supply voltage sensor configured to sense a supply voltage and output a sensed supply voltage; a band pass filter configured to filter out frequencies within a range of a resonant frequency of the sensed supply voltage and output an extra signal; and a summer configured to add the extra signal to the control signal and output a required input current to the PFC controller.

Description

Technical Field

[0001] This disclosure generally relates to power factor correction, and more specifically, but not exclusively, to the fabrication of an active damping resistor in an EMI filter for damped resonance, while not dissipating power in the damping resistor. Background Technology

[0002] Switch-mode power supplies (“SMPS”) with power levels above 75 watts require power factor correction (“PFC”). However, for SMPS with power levels above 300 watts, continuous conduction mode (“CCM”) operation can be used because CCM operation allows the use of a smaller EMI filter.

[0003] PFC uses a fixed frequency in CCM operation. CCM operation near the power supply zero crossing may not be sustainable, and when it is not sustainable, it may transition to boundary conduction mode (“BCM”) or discontinuous conduction mode (“DCM”) operation as the frequency increases, resulting in lower efficiency near the power supply zero crossing. Summary of the Invention

[0004] The following is a brief overview of various embodiments. These embodiments address the need to create power factor correction with active damping.

[0005] To overcome these and other drawbacks of the prior art, and in view of the need to create power factor correction with active damping, a brief overview of various exemplary embodiments is presented. Some simplifications and omissions may be made in the following overview, which is intended to highlight and describe some aspects of various exemplary embodiments, but does not limit the scope of the invention.

[0006] Preferred exemplary embodiments sufficient to allow those skilled in the art to make and use the concepts of the present invention will be described in detail in the following sections.

[0007] Various embodiments relate to a circuit for power factor correction (“PFC”), the circuit comprising: a power supply filter and a rectifier configured to generate an input voltage for power factor correction and transmit the input voltage to a PFC controller and a load block; a voltage regulator configured to regulate an output voltage and output a control signal to an adder; a power supply voltage sensor configured to sense a power supply voltage and output the sensed power supply voltage; a bandpass filter configured to filter out frequencies within the resonant frequency range of the sensed power supply voltage and output an additional signal; and an adder configured to add the additional signal to the control signal and output a desired input current to the PFC controller.

[0008] Various embodiments are described, in which the control signal sets the instantaneous input current level.

[0009] Various embodiments are described, in which the voltage regulator verifies that the instantaneous input current level is proportional to the input voltage.

[0010] Various embodiments are described, in which an additional signal provides active damping.

[0011] Various embodiments are described in which the power supply voltage is sensed at the input of the power supply filter and rectifier.

[0012] Various embodiments are described in which the power supply voltage is sensed at the output of the power supply filter and rectifier.

[0013] Various embodiments are described, in which the PFC stage includes transferring power from the input voltage to the load.

[0014] Other embodiments relate to a method for power factor correction (“PFC”), the method comprising the steps of: generating an input voltage for power factor correction via a power supply filter and a rectifier, and transferring power from the input voltage to a PFC controller and a load block; regulating the input voltage via a voltage regulator and outputting a control signal to an adder; sensing the power supply voltage via a power supply voltage sensor; filtering out frequencies in the resonant frequency range via a bandpass filter and outputting an additional signal; and adding the additional signal to the control signal via an adder and outputting a desired input current to the PFC controller.

[0015] Various embodiments are described, in which the control signal sets the instantaneous input current level.

[0016] Various embodiments are described, in which the voltage regulator verifies that the instantaneous input current level is proportional to the input voltage.

[0017] Various embodiments are described, in which an additional signal provides active damping.

[0018] Various embodiments are described in which the power supply voltage is sensed at the input of the power supply filter and rectifier.

[0019] Various embodiments are described in which the power supply voltage is sensed at the output of the power filter and rectifier, which generate an input voltage for power factor correction and transfer power from the input voltage to the PFC and load block.

[0020] Various embodiments are described, in which the PFC stage includes transferring power from the input voltage to the load. Attached Figure Description

[0021] The accompanying drawings and the following detailed description are incorporated in and form part of this specification, wherein similar reference numerals throughout the various views denote the same or functionally similar elements. The drawings and the following detailed description are used to further illustrate embodiments including the claimed inventive concepts, and to explain the various principles and advantages of those embodiments.

[0022] In the following description, these and other more detailed and specific features will be disclosed more fully with reference to the accompanying drawings, in which:

[0023] Figure 1 The circuit diagram of the basic converter stage is shown;

[0024] Figure 2 A circuit diagram of the degraded resistor of the current embodiment is shown; and

[0025] Figure 3 A circuit diagram of Vmains sensing behind the power filter in the current embodiment is shown. Detailed Implementation

[0026] It should be understood that the accompanying drawings are schematic only and not drawn to scale. It should also be understood that the same reference numerals are used throughout the drawings to indicate the same or similar parts.

[0027] The description and accompanying drawings illustrate the principles of various exemplary embodiments. Therefore, it will be understood that those skilled in the art will be able to design various arrangements, which, although not explicitly described or shown herein, embody the principles of the invention and are included within its scope. Furthermore, all examples described herein are primarily intended for educational purposes to aid the reader in understanding the principles of the invention and the concepts provided by the inventors to deepen the understanding of the art, and should be construed as not being limited to such specifically described examples and conditions. Moreover, unless otherwise indicated (e.g., “or” or “or alternatively”), the term “or” as used herein refers to a non-exclusive or (i.e., and / or). Furthermore, the various embodiments described herein are not necessarily mutually exclusive, as some embodiments may be combined with one or more other embodiments to form new embodiments. Descriptive terms such as “first,” “second,” “third,” etc., are not intended to limit the order of the elements discussed, but are used to distinguish one element from the next, and are generally interchangeable.

[0028] Therefore, in order to generate a high power factor and low total harmonic distortion (“THD”), the input current Iin drawn by the PFC needs to be proportional to the instantaneous supply voltage, as defined by the factor k2, where:

[0029] Iin=k2·Vmains

[0030] Pin=Vmains·Iin

[0031] Pin = Vmains·(k2·Vmains)

[0032] Pin = Vmains 2 ·k2

[0033] Therefore, the instantaneous input current equals the instantaneous supply voltage multiplied by the factor k2, and the instantaneous input power is proportional to the square of the instantaneous input voltage. For the average power Pin_av(k2, Vmainspeak) over half a power supply cycle, the average power Pin_av is half the peak value Vmainspeak of the square of the sine wave.

[0034]

[0035] Therefore, since the value of k2 is fixed, the power level is proportional to the square of the power supply voltage amplitude Vmainspeak, and the closed-loop gain is proportional to the square of the power supply voltage amplitude Vmainspeak.

[0036] However, since a constant gain prevents the 0dB loop gain frequency of a closed loop from shifting, it may be necessary to have a fixed gain for the entire control loop, and therefore the general supply voltage may have a dynamic response while maintaining loop stability.

[0037] The value of k2 includes 1 / Vmains 2 The power supply voltage compensation compensates for the gain from control to output power by the power supply voltage amplitude.

[0038] By making the required input current proportional to the supply voltage, dynamic behavior may occur, which could potentially cause undesirable resonance in the power supply filter.

[0039] Figure 1 A circuit diagram 100 of a basic converter stage of a PFC controller 101, including a power supply filter 102, is shown.

[0040] Circuit diagram 100 includes power supply voltage, power supply -L 105 and power supply -N 106, resistor R1 103 and resistor R2 104, power supply filter 102, bridge diode 107, inductor 108 and switch 109.

[0041] The basic converter stage of the PFC controller 101 includes a power supply filter 102. The power supply filter 102 is required to suppress electromagnetic interference (EMI), and resistors R1 103 and R2 104 are used to sense transient power supply voltage, power supply-L 105, and power supply-N 106.

[0042] Due to the LC structure of the inductor and capacitor, i.e., the power filter 102, resonance may cause changes in the input voltage of the PFC controller 101 or the sensed input voltage. Combined with the fast algorithm used to regulate the input current to the desired input current, resonance may become unstable.

[0043] The current embodiment prevents instability caused by resonance in the power supply filter, and without preventing instability, the desired input current may not be achievable. In the current embodiment, PFC 101 can perform DCM or CCM operation, where the input current is defined as being related to the instantaneous supply voltage to meet power factor correction and total harmonic distortion (“THD”) requirements, and is used to generate an additional input current for PFC 101 that is in phase with the detected resonance at the input voltage of PFC 101.

[0044] The power supply voltage, power supply-L 105, and power supply-N 106 are the inputs from which the PFC obtains power. Due to the switching sequence, high-frequency components are injected into the power supply. To meet the requirements for power supply pollution, additional filtering is required. Therefore, filter 102 is added, which includes two coupled inductors acting as common-mode and differential-mode filters. Capacitors before and after the filter also contribute to filtering. Rectifier 107 generates the required DC voltage as the input to the actual PFC switching unit (108, 109), which converts the energy from the input power supply-L 105 and power supply-N 106 into the output voltage Vboost via diodes. PFC controller 101 sets the timing of S1.

[0045] Figure 2 A circuit diagram 200 of the degraded resistor of the current embodiment is shown.

[0046] The circuit diagram includes an input 201, resistor R1 202, resistor R2 203, power supply filter and rectifier 204, Vmains sensor 205, bandpass filter 206, adder 207, PFC 208, load 209, and Vbus regulator 210.

[0047] The power filter and rectifier stage 204 generates the input voltage for the PFC stage 208. The PFC stage 208 delivers power to the load 209 at voltage Vbus 211.

[0048] Vbus 211 is adjusted to the desired value via Vbus regulator 210. Vbus regulator 210 sends control signal 212 back to PFC 208, where control signal 212 sets the instantaneous input current level. Vbus regulator 210 confirms that the instantaneous input current is proportional to the supply voltage, thereby drawing a current proportional to the supply voltage, which gives the resistive behavior required for a high power factor. An additional signal 213 provides active damping, which is the output of power sensing block 205, followed by bandpass filter 206. Bandpass filter 206 only allows the frequency component of the sensed supply voltage caused by resonance in the power filter to pass through. When sensing resistors 202, 203 sense a voltage related to controller ground, the sensing resistors sense half of the resonant component. By adding signal 213 (representing only the resonant component) to the desired input current, PFC makes the additional input current component proportional to signal 213. In practice, this manifests as an active resistor, which weakens the resonance; however, the energy gained from the resonance is not dissipated but converted into the output.

[0049] Figure 3 A circuit diagram 300 is shown for Vmains sensing behind the power filter in the current embodiment.

[0050] Circuit diagram 300 includes power supply voltage, power supply -L 303 and power supply -N 304, power supply filter 301, resistor R1 305 and resistor R2 306, diode bridge 307, inductor 308 and switch 309.

[0051] The current embodiment is for sensing before and after the power supply filter 301.

[0052] The current embodiment can be applied to a variety of applications (e.g., high-power gaming or PC desktops), such as power supplies with power levels exceeding approximately 300 watts and including different load ranges that require PFC 301 functionality and meet THD requirements.

[0053] In another embodiment, the power supply voltage can be sensed via a sensing resistor between the output of diode bridge 307 and inductor 308.

[0054] As will be apparent from the foregoing description, various exemplary embodiments of the present invention can be implemented in hardware. Furthermore, various exemplary embodiments can be implemented as instructions stored on a non-transitory machine-readable storage medium (e.g., volatile or non-volatile memory), which can be read and executed by at least one processor to perform the operations described in detail herein. The non-transitory machine-readable storage medium can include any mechanism for storing information in a machine-readable form, such as a personal or laptop computer, server, or other computing device. Therefore, the non-transitory machine-readable storage medium can include read-only memory (ROM), random access memory (RAM), disk storage media, optical storage media, flash memory devices, and similar storage media, and does not include transient signals.

[0055] Those skilled in the art will understand that any block diagram herein represents a conceptual diagram of an illustrative circuit embodying the principles of the invention. Similarly, it should be understood that any flowchart, diagram, state transition diagram, pseudocode, etc., represents various processes that can be substantially represented in a machine-readable medium and are executed by a computer or processor, whether or not such a computer or processor is explicitly shown.

[0056] Therefore, it should be understood that the above description is intended to be illustrative rather than restrictive. Many embodiments and applications beyond the examples provided will become apparent upon reading the above description. The scope should not be determined by reference to the above description or the following abstract, but rather by reference to the appended claims and the full scope of their equivalents. Future research and development in the art discussed herein is anticipated and intended, and the disclosed systems and methods will be incorporated into such future embodiments. In conclusion, it should be understood that modifications and variations are possible with this application.

[0057] The benefits, advantages, solutions to the problems, and any features that make any benefit, advantage, or solution occur or become more significant should not be construed as key, essential, or necessary features of any or all claims. The invention is defined solely by the appended claims, which include any modifications made during the pending period of this application and all equivalents of those published claims.

[0058] Unless otherwise expressly indicated herein, all terms used in the claims are intended to be given the broadest, most reasonable structure and the general meaning as understood by one skilled in the art described herein. Specifically, unless expressly limited to the contrary is indicated in the claims, the use of the singular articles “a,” “the,” “the,” etc., should be understood as enumerating one or more of the indicated elements.

[0059] An abstract of this disclosure is provided to enable the reader to quickly determine the nature of the technical disclosure. It should be understood that this abstract is not intended to interpret or limit the scope or meaning of the claims. Furthermore, in the foregoing embodiments, it can be seen that various features in the various embodiments are grouped together for the purpose of simplifying this disclosure. The approach of this disclosure should not be construed as reflecting an intention that the claimed embodiments require more features than expressly recited in each claim. Rather, as reflected in the appended claims, the subject matter of the invention lies in fewer than all features of a single disclosed embodiment. Therefore, the appended claims are hereby incorporated into the detailed description, wherein each claim exists independently as a separate subject matter.

Claims

1. A circuit for power factor correction ("PFC") characterized by, The circuit comprises: a power filter and rectifier configured to produce an input voltage for power factor correction and transmit the input voltage to a PFC controller and a load block, a PFC stage delivering power to a load at a voltage Vbus; a voltage regulator configured to regulate an output voltage on Vbus by a PFC controller and output a control signal to a summer; a supply voltage sensor configured to sense a supply voltage and output a sensed supply voltage; a band pass filter configured to filter out frequencies in a range of a resonant frequency of the sensed supply voltage and output an extra signal; and a summer configured to add the extra signal to the control signal and output a required input current to the PFC controller.

2. The circuit for power factor correction according to claim 1, characterized in that, The control signal sets a momentary input current level.

3. The circuit for power factor correction according to claim 2, characterized in that, The voltage regulator verifies that the momentary input current level is proportional to the input voltage.

4. The circuit for power factor correction of claim 1, wherein, The extra signal provides active damping.

5. The circuit for power factor correction according to claim 1, characterized in that, The sensing of the supply voltage is at an input of the power filter and rectifier.

6. The circuit for power factor correction of claim 1, wherein, The sensing of the supply voltage is at an output of the power filter and rectifier.

7. The circuit for power factor correction of claim 1, wherein, The PFC stage includes transmitting power from the input voltage to a load.

8. A method for power factor correction ("PFC") characterized by, The method comprises the steps of: producing an input voltage for power factor correction by a power filter and rectifier and transmitting power from the input voltage to a PFC controller and a load block, a PFC stage delivering power to a load at a voltage Vbus; regulating an output voltage on Vbus by a PFC controller by a voltage regulator and outputting a control signal to a summer; sensing a supply voltage by a supply voltage sensor; filtering out frequencies in a range of a resonant frequency by a band pass filter and outputting an extra signal; and adding the extra signal to the control signal and outputting a required input current to the PFC controller by a summer.

9. The method for power factor correction according to claim 8, characterized in that, The control signal sets a momentary input current level.

10. The method for power factor correction according to claim 9, characterized in that, The voltage regulator verifies that the momentary input current level is proportional to the input voltage. The extra signal provides active damping. The sensing of the supply voltage is at an input of the power filter and rectifier. The sensing of the supply voltage is at an output of the power filter and rectifier. The PFC stage includes transmitting power from the input voltage to a load. The method comprises the steps of: producing an input voltage for power factor correction by a power filter and rectifier and transmitting power from the input voltage to a PFC controller and a load block, a PFC stage delivering power to a load at a voltage Vbus; regulating an output voltage on Vbus by a PFC controller by a voltage regulator and outputting a control signal to a summer; sensing a supply voltage by a supply voltage sensor; filtering out frequencies in a range of a resonant frequency by a band pass filter and outputting an extra signal; and adding the extra signal to the control signal and outputting a required input current to the PFC controller by a summer. The control signal sets a momentary input current level. The voltage regulator verifies that the momentary input current level is proportional to the input voltage. The extra signal provides active damping.

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