Semiconductor packages with flexible interconnects

Abstract

Embodiments of the present disclosure relate to a semiconductor package with flexible interconnects. A cavity-type semiconductor package having a substrate and a cover is disclosed. The semiconductor package includes a first semiconductor die coupled to the substrate; and a flexible material layer disposed on a surface of the cover. Traces are disposed on the flexible material layer. The cover is coupled to the substrate using the flexible material layer and the traces between the cover and the substrate. A second semiconductor die is coupled to the flexible material layer and the traces on the cover. The cover also includes apertures to expose the second semiconductor die to the surrounding environment. The flexible material layer absorbs stress caused by the different coefficients of thermal expansion of the cover and the substrate during the operating cycle of the package, thereby reducing the likelihood of separation of the cover from the substrate.

Description

Technical Field

[0001] The present disclosure relates to semiconductor packages, and more particularly to cavity-type semiconductor packages. Background Art

[0002] Cavity-type semiconductor packages are known for use with microelectromechanical systems (“MEMS”) devices. Most cavity-type packages include a single semiconductor die coupled to a substrate. However, a single die does not have sufficient functionality to meet many modern system requirements. Placing two or more dies side by side on a substrate results in a larger package size, which is generally undesirable for semiconductor packages because space is at a premium in the environments in which they are used. In addition, cavity-type packages are known to suffer from a mismatch in the coefficient of thermal expansion (“CTE”) between the package lid, the substrate, and the adhesive that bonds the lid to the substrate. In other words, over repeated operating cycles, the lid, substrate, and adhesive expand by different amounts during each cycle due to the different CTEs of the materials of each component and the temperature changes during each operating cycle. This repeated expansion and contraction causes the adhesive between the lid and substrate to crack or the adhesive to separate from the lid or substrate, resulting in package failure. This problem is only exacerbated for larger packages because the increased volume of material results in an increased amount of expansion and contraction during the operating cycles. Summary of the Invention

[0003] The present disclosure relates to a semiconductor package having a substrate and a cover coupled to the substrate. A first semiconductor die is coupled to the substrate. In some examples, wires are bonded between the first die and the substrate to establish an electrical connection therebetween. Furthermore, a flexible material layer is formed on the cover, with wires or traces located on the flexible material layer. When the cover is coupled to the substrate, the flexible material layer is located between the cover and the substrate. A second semiconductor die is coupled to the flexible material layer on the cover. Traces on the flexible material layer establish an electrical connection between the second die and the substrate. The substrate, flexible material layer, and cover each have their own coefficient of thermal expansion. During operation, due to the different coefficients of thermal expansion, heat generated by operation of the package may cause each of these components to expand by a different amount. Thus, the flexible material layer absorbs stress within the package caused by the difference in coefficients of thermal expansion between the substrate and the cover. In other words, during operation, the flexible material layer deforms so that expansion and contraction of the cover and substrate do not cause the cover to separate from the substrate.

[0004] Furthermore, the cover preferably includes apertures that expose the second die to the surrounding environment. Thus, the second die can be one of several different types of sensors used to detect conditions in the surrounding environment. In some examples, the flexible material layer covers the entire surface of the cover, while in other examples, the flexible material layer is only on certain portions of the cover's surface corresponding to where electrical connections are to be established with the second die. The present disclosure also includes methods for assembling or manufacturing the cavity-type packages described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] To better understand the embodiments, reference will now be made to the accompanying drawings, by way of example only. In the accompanying drawings, like reference numerals identify similar elements or actions. In some of the drawings, the structures are drawn to scale. In other drawings, the sizes and relative positions of elements in the drawings are not necessarily drawn to scale. For example, the sizes, shapes, and angles of various elements may be exaggerated and positioned in the drawings to improve the readability of the drawings.

[0006] Figure 1 is a cross-sectional view of an embodiment of a semiconductor package according to the present disclosure, illustrating a layer of flexible material between a cover and a substrate of the semiconductor package.

[0007] Figure 2 yes Figure 1 A cross-sectional view of a package illustrating the expansion and contraction of the cover, substrate, and flexible material layer.

[0008] Figure 3 is a schematic representation of an embodiment of traces on a surface of a flexible material layer according to the present disclosure.

[0009] Figure 4 is a schematic representation of an alternative embodiment of traces within a layer of flexible material.

[0010] Figure 5 is a plan view of an embodiment of a cover according to the present disclosure.

[0011] Figure 6 yes Figure 5 A plan view of the flexible material layer on the cover.

[0012] Figure 7 is a plan view of an alternative embodiment of a cover according to the present disclosure, wherein multiple layers of flexible material are located on a surface of the cover.

[0013] Figure 8 is a cross-sectional view of an alternative embodiment of a semiconductor package illustrating a layer of flexible material coplanar with a surface of a cover and a substrate in accordance with the present disclosure.

[0014] 9A to 9Fis a cross-sectional view of an embodiment of a method for assembling a semiconductor package having a flexible material layer between a cover and a substrate of the semiconductor package according to the present disclosure. DETAILED DESCRIPTION

[0015] The present disclosure generally relates to a cavity-type semiconductor package including a plurality of semiconductor dies and a flexible material layer between a cover of the package and a substrate of the package to reduce the likelihood of separation between the cover and the substrate due to operating cycles.

[0016] For example, Figure 1 A package 100 is illustrated having a substrate 102, a first semiconductor die 104 on the substrate 102, a cover 106 coupled to the substrate 102, a second semiconductor die 108 on the cover 106, a flexible material layer 110 on the cover 106, and conductive traces 112 on the flexible material layer 110. As used herein, unless the context requires otherwise, "flexible" refers to a Young's modulus of 0.01 Pascal up to 5 GPa (kN / mm 2 However, other embodiments include "flexible" materials having an elastic modulus greater than 5 GPa or less than 0.01 GPa.

[0017] The substrate 102 includes a first surface 114 and a second surface 116 opposite to the first surface 114. Figure 1 In the embodiment of the present invention, substrate 102 includes a first layer 102a, a second layer 102b, and a third layer 102c. Although only three layers are shown for clarity, substrate 102 may include significantly more or fewer layers, such as only one, two, or more than three layers. Each of layers 102a, 102b, and 102c is a dielectric layer. In one embodiment, substrate 102 is a printed circuit board, although other substrates are expressly contemplated herein.

[0018] The substrate 102 also includes a plurality of conductive vias 118 extending from the first surface 114 through the substrate 102 to the second surface 116 to facilitate connection between the package 100 and an external device (e.g., such as another substrate or another integrated circuit or die). Each of the vias 118 includes a first surface 118a and a second surface 118b opposite the first surface. In one embodiment, the first surface 118a of each via 118 is coplanar with the first surface 114 of the substrate 102, and the second surface 118b of each via 118 is coplanar with the second surface 116 of the substrate 102, such that the vias 118 establish electrical contacts or contact pads on the surfaces 114, 116 of the substrate 102 and an electrical path through the substrate 102. In an alternative embodiment, one or both of the surfaces 118a, 118b of the vias 118 extend beyond the surfaces 114, 116 of the substrate 102.

[0019] In one embodiment, a plurality of solder balls are coupled to vias 118 on the second surface 116 of the substrate 102. Conductive traces or wiring 120 connect adjacent vias 118 and are formed on the second layer 102b of the substrate 102. However, it should be appreciated that in other embodiments, the traces 120 are formed on any of the layers 102a, 102b, or 102c of the substrate 102. The substrate 102 also includes sidewalls 120 extending between the first surface 114 and the second surface 116 of the substrate 102. In one embodiment, the substrate 102 is square or rectangular, and thus, the sidewalls 120 include four walls. The sidewalls 120 include a third surface 122 extending between the first surface 114 and the second surface 116 of the substrate 102. The third surface 122 may also be referred to herein as a side surface of the substrate 102. In one embodiment, the third surface 122 extends beyond the cover 106, while in other embodiments, the third surface 122 is flush or coplanar with the cover 106, as described herein.

[0020] A first semiconductor die 104 (which may be referred to herein as first die 104 or die 104) is coupled to substrate 102 via a die attach material 124, which may be, for example, solder, tape, or some other conductive or insulating adhesive. First die 104 includes a first surface 126 and a second surface 128 opposite first surface 126. Second surface 128 of first die 104 is coupled to first surface 114 of substrate 102 using die attach material 124. A plurality of conductive lines 130 are coupled between first die 104 and substrate 102, and more specifically, between first surface 126 of die 104 and vias or contacts 118 of substrate 102. In one embodiment, conductive lines 130 are metal conductive lines that are coupled to die 104 and substrate 102 via solder, while in other embodiments, conductive lines 130 are formed by applying a conductive paste (e.g., a paste with metal particles entrained therein) onto a sacrificial layer and heating the resulting combination to cure the conductive lines and remove the sacrificial layer. In one embodiment, the first die 104 is an application specific integrated circuit (ASIC) die in which various integrated circuits, resistors, transistors, or other electronic components are formed on a semiconducting material such as silicon.

[0021] The cover 106 includes a first surface 132 and a second surface 134 opposite the first surface 132. Apertures 136 extend through the cover 106 from the first surface 132 to the second surface 134. Figure 1As shown, aperture 136 is preferably aligned with second semiconductor die 108. In other words, in one embodiment, a vertical axis passing through the center of aperture 136 is aligned with a vertical axis passing through the center of second semiconductor die 108 relative to substrate 102. In one embodiment, the area defined by aperture 136 is less than the area of ​​second semiconductor die 108. However, in other embodiments, the area defined by aperture 136 is equal to or greater than the area of ​​second semiconductor die 108. The area of ​​aperture 136 can be selected based on design preference or based on the specifications of the application for which package 100 is to be used. In one embodiment, cover 106 does not include aperture 136, but is a solid and continuous material.

[0022] The cover 106 is preferably formed of, for example, molded epoxy or metal. In embodiments where the cover 106 is metal, the flexible material layer 110 preferably covers the entire second surface 134 of the cover 106 between connections to the second semiconductor die 108 and the substrate 102, and is preferably formed of an insulating material such as polydimethylsiloxane or another insulator to electrically isolate the metal cover 106. The first surface 132 of the cover includes a first portion 132a, a second portion 132b, and a third portion 132c. In one embodiment, the first portion 132a is parallel to the third portion 132c, while the second portion is perpendicular to the first portion 132a and the third portion 132c. The third portion 132c may also be referred to as a sidewall or side surface of the cover 106. Furthermore, the second surface 134 of the cover 106 includes a first portion 134a, a second portion 134b, and a third portion 134c, wherein the first portion 134a and the third portion 134c are parallel to each other, and the second portion 134b is perpendicular to the first portion 134a and the third portion 134c.

[0023] Furthermore, in one embodiment, the first portion 134a and the third portion 134c of the second surface 134 are parallel to the second portion 132b of the first surface 132, and the first portion 132a and the third portion 132c of the first surface 132 are parallel to the second surface 132b. Thus, each of the portions 132a, 132b, and 132c of the first surface 132 and each of the portions 134a, 134b, and 134c of the second surface 134 are perpendicular to the adjacent portions. In other embodiments, each of the portions is angled relative to the adjacent portions, and the angle is not equal to 90 degrees.

[0024] A second semiconductor die 108 (which may be referred to herein as second die 108 or die 108) is coupled to the housing 106 and includes a first surface 138 and a second surface 140 opposite the first surface 138. More specifically, the second surface 140 of the die 108 is coupled to traces 112 on the flexible material layer 110 on the third portion 134c of the second surface 134 of the housing 106. The second die 108 is coupled to the traces 112 via solder 142. The second die 108 is preferably a type of semiconductor device such as, for example, a MEMS device, a microphone, a pressure sensor, any type of flip-chip die, or even a printed circuit board. The second die 108 is preferably exposed to the ambient environment through the aperture 136, although in other embodiments without the aperture 136, the second die 108 is not exposed to the ambient environment.

[0025] In one embodiment, the area of ​​the second die 108 is larger than the area of ​​the first die 104, while in other embodiments, the area of ​​the first die 104 is larger than the area of ​​the second die 108, and in still other embodiments, the areas of the first die 104 and the second die 108 are equal. Figure 1 As shown, the second die 108 is arranged such that the first surface 138 of the second die 108 faces the first surface 126 of the first die 104. In other words, the second die 108 is inverted relative to the first die 104 such that the second surfaces 128, 140 of each respective die 104, 108 are spaced further apart from each other than the first surfaces 126, 138 of each respective die 104, 108. Furthermore, the package 100 further includes a cavity 146 between the substrate 102 and the cover 106. The first die 104 and the second die 108 are housed within the interior of the package 100 within the cavity 146.

[0026] The flexible material layer 110 is coupled to the second surface 134 of the cover 106 by an adhesive 144, which may be, for example, tape or glue. The flexible material layer 110 preferably extends along a portion of the third portion 134c, the first portion 134a, and the second portion 134b of the second surface 134 of the cover 106. In other words, in one embodiment, the flexible material layer 110 is only located on the second surface 134 of the cover 106 and does not extend along the first surface 132 of the cover 106. Figure 1As shown, the flexible material layer 110 extends along a majority of the second surface 134 of the cover 106 without covering the entire second surface 134 of the cover 106. Instead, the flexible material layer 110 extends from the substrate 102 along the second surface 134 of the cover 106 to locations on the cover 106 that correspond to the locations of contacts or solder on the second die 108. As such, the size or length of the flexible material layer 110 can be selected based on the package design or specifications. In other embodiments, as described herein, the flexible material layer 110 is formed over the entire second surface 134 of the cover 106.

[0027] The flexible material layer 110 is preferably a stretchable elastomeric substrate, such as polydimethylsiloxane (PDMS). However, other embodiments of the flexible material layer 110 include other materials having elastic properties, such as various rubbers, thermoplastics, plastics, or polymers, used alone or in combination. Traces 112 are located on the flexible material layer 110 to establish an electrical connection between the second die 108 and the substrate 108, and more specifically, one of the contacts or vias 118 of the substrate. Further, the second die 108 is electrically connected to the first die 104 via the vias, traces 120 in the substrate 102, and the flexible material layer 110 and traces 112, such that the second die 108 can communicate with the first die 104. Preferably, the traces 112 extend along the entire length of the flexible material layer 110, but in other embodiments, the length of the traces 112 is less than the length of the flexible material layer 110. Further, in one embodiment, edge 148 of trace 112, edge 150 of flexible material layer 110, and edge 152 of adhesive 144 are coplanar with cover 106. More specifically, edges 148, 150, 152 of trace 112, flexible material layer 110, and adhesive 144 are coplanar with third portion 132c of first surface 132 of cover 106.

[0028] The traces 112 are coupled to the substrate by adhesive 154, which is preferably solder or a conductive glue or adhesive. In one embodiment, an edge 156 of the adhesive 154 is coplanar with the cover 106, similar to the edges 148, 150, 152 of the traces 112, the flexible material layer 110, and the adhesive 144. Thus, when the cover 106 is coupled to the substrate, the adhesive 154, the traces 112, the flexible material layer 110, and the adhesive 144 are located between the cover 106 and the substrate 102. Although Figure 1The sidewalls 120 of substrate 102 are shown extending beyond cover 106, flexible material layer 110, and traces 112, but other embodiments of the present disclosure include substrate sidewalls 120 that are coplanar with cover 106 and flexible material layer 110. In still other embodiments, cover 106 extends to cover edges 148, 150, 152, 156 of traces 112, flexible material layer 150, adhesive 144, and adhesive 154. In such embodiments, the extensions of cover 106 may or may not be coupled to substrate 102.

[0029] As described further below, the flexible material layer 110 addresses the mismatch in thermal expansion coefficients between the cover 106, substrate 106, and adhesive 154 by introducing flexibility into the package 100 to reduce or prevent cracking of the adhesive 154 or separation of the cover 106 from the substrate 102. In other words, because the flexible material layer 110 is elastic, when the substrate 102 and cover 106 expand or contract during an operating cycle, the flexible material layer 110 deforms to absorb stress within the package 100 to prevent cracking of the adhesive 154 or separation of the cover 106 from the substrate 102.

[0030] During operation of package 100, first die 104 and second die 108 generate heat. Heat is transferred from first die 104 to substrate 102, and heat is at least partially transferred from second die 108 to cover 106. Some heat from each of dies 104, 108 is dissipated by convective cooling through the apertures. However, as described above, the remaining heat is transferred to substrate 102 and cover 106. Substrate 102 is formed of a first material having a first coefficient of thermal expansion (CTE), and cover 106 is formed of a second, different material having a second CTE. In one embodiment, the first CTE is greater than the second CTE, while in other embodiments, the first CTE is less than the second CTE. Further, second die 108 includes a material having a third CTE that is different from the first and second CTEs, and solder 142 between second die 108 and trace 112 has a fourth CTE that is different from the first through third CTEs. Regardless, the heat generated by operation of package 100 causes substrate 102 and cover 106 to expand. In one embodiment, the substrate 102 and the cap 106 expand more during operation than the second die 108. Further, the substrate 102 and the cap 106 expand by different amounts relative to each other due to the difference in CTE between these components.

[0031] The relative expansion of each component of package 100 introduces stress into package 100, particularly at the connection between cover 106 and substrate 102, and at the connection between second die 108 and cover 106. Stress also exists in package 100 after operation as package 100 cools. For example, substrate 102, cover 106, second die 108, and solder 142 will each contract by a different amount relative to their respective heated expanded states due to their different CTEs. During heating or cooling, flexible material layer 110 deforms to absorb the stress introduced by the expansion of the components of package 100. In other words, flexible material layer 110 is an elastic material that expands or contracts to reduce stress at the connection between cover 106 and substrate 102, and at the connection between second die 108 and cover 106.

[0032] For example, Figure 2 The package 100 is illustrated during a cooling cycle of the package 100 after operation of the package 100. In other words, Figure 2 This corresponds to the state of the package 100 after the package 100 has been operated from its heated expanded state to cooled. Figure 2 106 , the substrate 102 contracts to its original, cooled state faster than the cover 106. As such, a portion 158 of the flexible material layer 110 proximate the connection between the cover 106 and the substrate 102 expands to reduce stress on the adhesive 154 between the traces 112 and the substrate 102. Further, the cover 106 returns to its original, resting state at a different rate than the second die 108. As such, a portion 160 of the flexible material layer 110 proximate the solder 142 connecting the second die 108 to the cover 106 deforms to reduce stress on the solder 142. For clarity, the second die 108 is not shown in FIG. Figure 2 The deformation of the flexible material layer 110 is amplified. Figure 2 The flexible material layer 110 is shown expanding or contracting to reduce stress at the connections between the cover 106 and the substrate 102 and at the connections between the second die 108 and the traces 112, thereby reducing the risk of these connections separating or otherwise failing. In other words, the flexible material layer 110 increases the reliability and useful life of the package 100 by reducing stress at certain connections in the package 100, where separation could lead to package failure.

[0033] Figure 3 is a schematic diagram of an embodiment of a flexible material layer 200 (also referred to herein as a flexible interconnect 200). In one embodiment, Figure 1 The flexible material layer 110 and Figure 3. The flexible material layer 200 includes a flexible substrate 202, which can be PDMS or some other type of material having elastic properties, such as various rubbers, plastics, thermoplastics, or polymers used alone or in combination. The flexible substrate 202 includes a first surface 204 and a second surface 206 opposite the first surface 204. Traces 208 are formed on the first surface 204 of the flexible substrate 202. In one embodiment, the traces 208 are printed on the first surface 204 of the flexible substrate 202. In other embodiments, the traces 208 are formed by electroplating, masking, painting, or electrodeposition. The traces 208 are preferably copper or a copper alloy, although other materials such as gold, silver, palladium, tin, or nickel may be used alone or in combination with each other or with a copper alloy. Further, the traces 208 preferably have a wavy pattern on the first surface 204 of the flexible substrate 202, with gaps or spaces 210 between adjacent portions 208a, 208b of the traces 208. For clarity, the traces 208 are shown in FIG. Figure 3 While spaces 210 are magnified in the diagram, they are less than 1 mm wide, such as less than 500 microns, or more preferably less than 100 microns. Thus, trace 208 appears to an observer as a continuous metal layer. In one embodiment, portions 208a, 208b of trace 208 are in contact with each other, while in other embodiments, trace 208 includes gaps 210.

[0034] Figure 4 An alternative embodiment of a flexible material layer 300 (also referred to herein as a flexible interconnect 300) is illustrated. Unless otherwise provided below, the flexible material layer 300 is identical to the reference Figure 3 The flexible material layer 300 is the same as the flexible material layer 200 described above. The flexible material layer 300 includes a flexible substrate 302 having a first surface 304 and a second surface 306 opposite the first surface 302. A conductive trace 308 is formed in the flexible substrate 302. In other words, at least a portion of the trace 308 is located between the first surface 304 and the second surface 306 of the flexible substrate 302. Preferably, as shown by the dashed line 310, a portion of the trace 308 extends along the first surface 304 of the flexible substrate. Alternatively, the trace 308 may extend internally through the flexible substrate 302, except at opposite ends 312, 314 of the flexible substrate 302, where at least a portion of the trace 308 is exposed to establish contact with the flexible substrate 302, for example. Figure 1 The electrical connection of the substrate 102 or the second die 108 is made.

[0035] Figure 5 An embodiment of a cover 400 is shown. In one embodiment, except as otherwise described below, the cover 400 is Figure 1 Thus, cover 400 instead of cover 106 may be incorporated into package 100 . Figure 5The cover 400 is shown before a layer of flexible material is applied to the cover 400. The cover includes a surface 402 which, in one embodiment, is Figure 1 Reference is made to the second surface 134 (e.g., the rear surface or backside surface). The cover 400 includes an aperture 404 extending through the cover 400. In this embodiment, the aperture 404 is circular, although the aperture 404 may have any selected geometric shape. The surface 402 includes a first portion 402a, a second portion 402b, and a third portion 402c. In the illustrated plan view, only the edge of the second portion 402b is visible, but it should be appreciated that the second portion 402b is substantially the same as the reference 134. Figure 1 The second portion 134b of the second surface 134 is similarly described. The width 406 of the aperture 404 is preferably between 0.4 mm and 0.6 mm. In one embodiment, the width 406 of the aperture 404 is 0.5 mm or approximately 0.5 mm (e.g., within 5% of 0.5 mm). Figure 4 In the embodiment, the cover 400 is square-shaped and has four sides 408a, 408b, 408c, and 408d. Because the cover 400 is square, each side 408a, 408b, 408c, and 408d preferably has the same size (e.g., length or width) as the other. For example, the length 410 of the first side 408a is equal to the length 412 of the second side 408b.

[0036] In one embodiment, the lengths 410, 412 are equal to or less than 5 mm, while in other embodiments, the lengths 162, 164 are greater than 5 mm. Other embodiments include a cover 400 that is square or rectangular. Further, although the aperture 404 is circular and centered relative to the cover 400 in the illustrated embodiment, the shape and position of the aperture 404 can be selected based on the package design and specifications. For example, in other embodiments, the aperture 404 can also be square or rectangular with different sizes. As mentioned above, the size of the cover 400 and the aperture 404 can be selected based on the design and specifications of the package 100. Moreover, in one embodiment, Figure 1 The package 100 in FIG. 4 has similar dimensions to the lengths 410 , 412 , such that the package 100 is also square (or some other shape corresponding to the shape of the cover 400 ), wherein the dimensions of the package 100 correspond to those of the cover 400 .

[0037] Figure 6 The diagram shows a flexible material layer 414 covering the entire surface 402 of the cover 400. Figure 5 The flexible material layer 414 is connected to the reference Figure 1 The flexible material layer 110 is similar to that described, except that in this embodiment, the flexible material layer 414 covers the entire surface 402 of the cover 400, rather than Figure 1The flexible material layer 110 in FIG. 1 terminates near the connection between the solder 142 and the conductive trace 112 and does not extend beyond the aperture 136. In this embodiment, the flexible material layer 414 extends to the aperture 404. In other words, the flexible material layer 414 includes edges 414a, 414b, 414c, 414d, which, in one embodiment, are the outer edges of the flexible material layer 414. Figure 6 As shown, the edges 414a, 414b, 414c, 414d of the flexible material layer extend to Figure 5 The sides 408a, 408b, 408c, 408d of the cover 400 are shown. Further, the aperture 404 includes an edge 416 (see Figure 5 ), and the flexible material layer 414 includes an edge 418, which in one embodiment is an inner edge of the flexible material layer 414. Figure 6 As shown, edge 418 of flexible material layer 414 extends to edge 416 of aperture 404. Thus, conductive traces, such as conductive trace 112 ( Figure 1 ). Traces are preferably formed where desired such as the second die 108 ( Figure 1 ) and a die such as substrate 102 ( Figure 1 ) are located at the connections between substrates such as ). These locations can be selected based on the design and specifications of the package into which the cover 400 is incorporated.

[0038] Figure 7 Another embodiment of a cover 500 is shown. In one embodiment, the cover 500 is Figure 1 106 , except as otherwise described below. Thus, cover 500, rather than cover 106, can be incorporated into package 100. Cover 500 includes a surface 502 having a first portion 502a, a second portion 502b, and a third portion 502c. The edge of second portion 502b is visible only in the illustrated plan view, although it should be appreciated that second portion 502b is similar to second portion 134b of second surface 134 of cover 106, except perhaps with respect to the length or width of second portion 502b of surface 502. Cover 500 also includes an aperture 504 extending through cover 500. In this embodiment, aperture 504 is rectangular in shape, although in other embodiments, aperture 504 can be circular or square, for example.

[0039] The cover 500 further includes a plurality of flexible material layers 506 on the surface 502 of the cover. Each of the flexible material layers 506 is on a portion of the third portion 502c, the first portion 502a, and the second portion 502b of the surface 502. Further, at least one of the flexible material layers 506 preferably ends before the aperture 504. In other words, the edge 508 of at least one of the flexible material layers 506 on the third portion 502c of the surface 502 does not extend to the aperture 504, but rather a gap or space 510 exists between the edge 508 and the aperture 504. Further, although Figure 7 Each of the flexible material layers 506 is illustrated as being identical, but it will be appreciated that in other embodiments, the edge 508 terminates at a different location on the surface 502 of the cover 500 , or in other words, the length of each of the flexible material layers 506 may be selected to be different than the other layers 506 .

[0040] Furthermore, although a total of ten flexible material layers 506 are illustrated, other embodiments include more or less than ten flexible material layers 506. Figure 3 and Figure 4 As depicted, flexible material layer 506 is a flexible substrate, such as, for example, PDMS, on which one or more traces are formed. Thus, each of the plurality of flexible material layers 506 can be positioned on surface 502 at a location corresponding to a selected location of an electrical connection between the die and the substrate to be coupled to the trace. In this embodiment, cover 500 is rectangular, although other embodiments include, for example, cover 500 being square or circular. Furthermore, the substrate associated with cover 500 preferably has a similar size and shape so that cover 500 can be coupled to the substrate as described herein.

[0041] Figure 8 An alternative embodiment of a package 600 according to the present disclosure is illustrated. Package 600 is identical to package 100 except as otherwise described below. Package 600 includes a substrate 602, a cover 604 coupled to substrate 602, a first die 606 on substrate 602, a flexible interconnect 608 on cover 604, and a second die 610 coupled to flexible interconnect 608.

[0042] The flexible interconnect 608 includes a flexible substrate 612 (also referred to herein as a flexible material layer 612) and conductive traces 614 extending on the flexible substrate 612, similar to the reference numerals. Figure 3The flexible material layer 200 is described. For example, in one embodiment, the flexible substrate 612 is PDMS. In other embodiments, the flexible substrate 612 is an elastic material, such as a composite comprising one or more of the following, used alone or in combination: rubber, plastic, thermoplastic, or polymer, and the traces 614 extend at least partially within the interior of the substrate 612, as described with reference to FIG. Figure 4 As described above. Trace 614 is preferably copper and extends along flexible substrate 612. Flexible interconnect 608 extends along cover 604. Further, when cover 604 is coupled to substrate 602, flexible interconnect 608 is located between cover 604 and substrate 602. More specifically, solder 616 couples trace 614 to contact 618 of substrate 602. Thus, flexible interconnect 608 is electrically and physically coupled to substrate 602. Further, flexible interconnect 608 is coupled to cover 604 via an adhesive, as described above with reference to Figure 1 As described. Thus, solder 616 and flexible interconnect 608 are coupled between cover 604 and substrate 602. Furthermore, second die 610 is coupled to trace 614 of flexible interconnect 608 via solder 620. Thus, second die 610 is coupled to cover 604 and electrically coupled to substrate 602 via flexible interconnect 608. Figure 1 As depicted, a first die 608 on a substrate 602 is electrically coupled to a second die 610 via traces in the substrate 602 .

[0043] Trace 614 has a dimension 622 between a surface 624 of trace 614 facing second die 610 and an end edge 626 of trace 614. In one embodiment, dimension 622 is the width of trace 614 proximate substrate 602. Flexible substrate 612 includes a dimension 628 between a surface 630 facing trace 614 (e.g., surface 630 on which trace 614 is formed) and a surface 636 of cover 604 facing flexible substrate 612 (e.g., surface 636 to which flexible substrate 612 is adhered). In one embodiment, dimension 628 is the thickness of flexible substrate 612 or the width of flexible substrate 612 between trace 614 and cover 604. Further, cover 604 has a dimension 634 between surface 636 of cover 604 facing flexible substrate 612 and an outermost surface 632 of package 600. In the illustrated embodiment, dimension 622 of trace 614 is less than or equal to the sum of dimension 628 of flexible substrate 612 and dimension 634 of cover 604. In other words, in this embodiment, the width of trace 614 proximate substrate 602 is less than or equal to the sum of the width or thickness of flexible substrate 612 and cover 604.

[0044] As such, the flexible substrate 612 covers the ends 626 of the traces 614. In other words, the flexible substrate 612 is coplanar with the outermost surface 632 of the cover 604 and the sidewall surfaces 638 of the substrate 602, but the traces 614 do not extend to the outermost surface 632 of the cover 604. Because the flexible substrate 612 is preferably an insulating material, the flexible substrate 612 prevents electrical connection from being established with the traces 614 at the outermost surface 632 of the package 600.

[0045] 9A to 9F is a cross-sectional view of an embodiment of a method of manufacturing or assembling a semiconductor package 700 of the type described herein. In one embodiment, semiconductor package 700 is the same as package 100 described herein.

[0046] The method starts with Figure 9A , wherein a first semiconductor die 702 is coupled to a substrate 704. The substrate 704 includes a first surface 706 and a second surface 708 opposite the first surface 706. The first die 702 includes a first surface 710 and a second surface 708 opposite the first surface 710. The second surface 712 of the first die 702 is coupled to the first surface 706 of the substrate 704 by a die attach material 714, which can be solder, tape, or some other conductive or insulating adhesive. As described herein, the substrate 704 includes a through-hole 716 extending through the substrate 704. The through-hole 716 establishes a contact on the first surface 706 of the substrate 704. A wire 718 is coupled between the first surface 710 of the first die 702 and the contact or through-hole 716 on the first surface 706 of the substrate 704.

[0047] Figure 9B and Figure 9C The assembly of the cover 720 is shown. In one embodiment, the assembly of the cover 720 is similar to the coupling of the first die 702 to the Figure 9A720 is separated from the substrate 704 in the process. Thus, in one embodiment, assembly of the cover 720 occurs first in the process, while in other embodiments, coupling the first die 702 to the substrate 704 occurs first in the process. The cover 720 includes a first surface 722 and a second surface 724 opposite the first surface 722. A cavity 726 extends into the cover 720 from the first surface 722 toward the second surface 724. In one embodiment, the cover 720 is formed of molded epoxy, wherein the mold used to form the cover 720 has the same size and shape as the cover 720 shown in the figure for containing the epoxy, such that the cavity 726 is formed during the molding of the cover 720. In an alternative embodiment, the cover 720 is a solid block of molded epoxy, and the cavity 726 can be formed by, for example, etching, mechanical cutting, stamping, or using a laser. In other embodiments, the cover 720 is metal, in which case the cover 720 can be extruded with the cavity 726, or as a solid block of metal, in which case the cavity 726 is formed by etching, mechanical cutting, stamping, or using a laser.

[0048] Figure 9B and Figure 9C Further illustrated is a flexible interconnect 728. The flexible interconnect includes a flexible substrate 730 having a first surface 732 and a second surface 734 opposite the first surface 732. Conductive traces or wires 736 are formed on the first surface 732 of the flexible substrate 730. An adhesive 738 is formed on the second surface 734 of the flexible substrate 730. The flexible interconnect 728 is then coupled to the first surface 722 of the cover 720, as shown in FIG. Figure 9C The adhesive 738 is cured so that the flexible interconnect 728 is fixedly coupled to the cover 720. Figure 9C As shown, at this stage in the manufacturing or assembly process, the flexible interconnect 728 preferably covers the entire first surface 722 of the cover 720. In other words, the flexible interconnect 728 extends across the first surface 722 of the cover 720 between the opposing outermost edges 720a, 720b of the cover 720. In one embodiment, the cover 720 includes a plurality of flexible interconnect strips, as shown in FIG. Figure 7 Depicted, wherein each strip is coupled to 720 and is in a spaced relationship relative to the other strips.

[0049] Then, in Figure 9D, a portion of the flexible interconnect 728 is removed by routing, laser patterning, cutting, or etching to expose the second surface 722 of the cover 720. After the portion of the flexible interconnect 728 is removed, an aperture 740 is formed through the cover 720 by etching, mechanical cutting or laser cutting, or stamping. In other words, a portion of the cover 720 is removed to create the aperture 740. In one embodiment, a portion of the flexible interconnect 728 is removed first and then the aperture 740 is formed, while in other embodiments, the aperture 740 is first formed through the cover and the flexible interconnect 728 and then that portion of the flexible interconnect 728 is removed. In still other embodiments, only the aperture 740 is formed through the cover 720 and that portion of the flexible interconnect 728 is not removed, such that the flexible interconnect 728 extends along the cover 720 to terminate at the aperture 740.

[0050] exist Figure 9E 740, second semiconductor die 742 is coupled to flexible interconnect 728 via solder 744. Second die 742 includes a first surface 746 and a second surface 748 opposite first surface 746. In this embodiment, second surface 748 faces aperture 740, such that second die 742 is exposed to the surrounding environment through aperture 740.

[0051] Finally, in Figure 9F 7, cover 721 and flexible interconnect 728 are coupled to substrate 704 via solder 750. Coupling flexible interconnect 728 and cover 720 to substrate 702 includes positioning flexible interconnect 728 between cover 720 and substrate 702. Further, coupling includes establishing an electrical connection between second die 742 and substrate 702 via traces 736 of flexible interconnect 728, and establishing an electrical connection between second die 742 and first die 702 via traces 736, vias 716, and traces in substrate 704.

[0052] Figure 9F Also illustrated are traces 736, flexible substrate 730, and cover 720 having a Figure 8 Different dimensions. For example, trace 736 includes a dimension 752 between a surface 754 of trace 736 facing second die 742 and second surface 754 of cover 720. In one embodiment, dimension 752 is the width of trace 736 proximate substrate 704. Further, flexible substrate 730 includes a dimension 756 between a surface 758 of flexible substrate 730 facing trace 736 (e.g., surface 758 on which trace 736 is formed) and adhesive 738. In one embodiment, dimension 758 is the width or thickness of flexible substrate 730. Finally, cover 720 includes a dimension 760 between a first surface 722 of cover 720 and a second surface 724 of cover 720. In one embodiment, dimension 760 is the width of cover 720.

[0053] Furthermore, the thickness of the adhesive 738 is also preferably constant across the entire cover 720. In this embodiment, dimension 752 of the trace 736 is greater than or equal to the sum of dimension 756, dimension 760, and the thickness of the adhesive 738. In other words, the width of the trace 736 proximate the substrate 704 is greater than or equal to the sum of the width of the cover 720, the width of the flexible substrate 730, and the width of the adhesive 738. Thus, a portion of the trace 736 is exposed at the second surface 724 of the cover 720. However, because Figure 9F The dimensions are exaggerated because trace 736 is small or thin enough to avoid electrical connection, and the likelihood of such electrical connection being made to the trace is small, if any.

[0054] Thus, embodiments of the present disclosure provide a semiconductor package, and more particularly, a cavity-type semiconductor package having a flexible interconnect on a cover and coupled between the cover and a substrate of the package to reduce stress in the cavity caused by expansion and contraction of components of the package during and after operation. Thus, embodiments of the present disclosure reduce the likelihood of separation of the cover from the substrate and of a semiconductor die coupled to the flexible interconnect from the cover, thereby enhancing package reliability and extending the useful life expectancy of the package.

[0055] In the above description, certain specific details are set forth in order to provide a thorough understanding of the various disclosed embodiments. However, one skilled in the relevant art will recognize that the embodiments can be practiced without one or more of these specific details or with other methods, components, materials, etc. In other instances, well-known structures associated with semiconductor devices and packages (such as cavity-type packages and MEMS devices) have not been shown or described in detail to avoid unnecessarily obscuring the description of the embodiments.

[0056] Unless the context requires otherwise, throughout the following description and claims, the word "comprise" and variations thereof (such as "comprises" and "comprising") are to be interpreted in an open, inclusive sense, that is, "including, but not limited to." Furthermore, the terms "first," "second," and similar ordinal indicators are to be interpreted as interchangeable unless the context clearly dictates otherwise.

[0057] Throughout this specification, references to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, appearances of the phrases "in one embodiment" or "in an embodiment" throughout this specification are not necessarily all referring to the same embodiment. Furthermore, in one or more embodiments, the particular features, structures, or characteristics may be combined in any suitable manner.

[0058] As used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. It should also be noted that the term "or" is generally used in its broadest sense, that is, to mean "and / or," unless the context clearly dictates otherwise.

[0059] Unless the context clearly indicates otherwise, the relative terms "about" and "substantially" when used to describe a value, amount, quantity, or dimension generally refer to a value, amount, quantity, or dimension that is within plus or minus 5% of the stated value. It should also be understood that any specific dimensions of components or features provided herein are for illustration purposes only with reference to the exemplary embodiments described herein, and as such, unless the context clearly indicates otherwise, dimensions greater than or less than the stated dimensions should be expressly contemplated in this disclosure.

[0060] The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above detailed description. Generally speaking, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and claims, but should be construed to include all possible embodiments and equivalents to the full scope of the rights of the claims. Therefore, the claims are not limited by the disclosure.

Claims

1. A device comprising: a substrate having a first surface and a second surface opposite to each other; a first semiconductor die located on the first surface of the substrate; a cover coupled to the substrate, the cover having a first surface, a second surface opposite the first surface, and an aperture extending through the cover from the first surface to the second surface; a layer of flexible material located on the second surface of the cover and between the second surface of the cover and the first surface of the substrate; conductive traces on the flexible material layer; as well as A second semiconductor die is coupled to the conductive trace on the flexible material layer on the cover, the second semiconductor die overlapping the aperture and the first semiconductor die, and the second semiconductor die extends completely across the aperture. 2 . The device of claim 1 , wherein the cover comprises a first portion and a second portion transverse to the first portion. The device of claim 1 , wherein the conductive trace includes an end portion coplanar with the second surface of the cover. 4 . The device of claim 3 , wherein the layer of flexible material includes ends that are coplanar with the second surface of the cover and ends of the conductive traces. The device of claim 1 , wherein the layer of flexible material is located on a portion of the second surface of the cover. 6 . The device of claim 1 , wherein the substrate further comprises a plurality of conductive vias passing through the substrate from the first surface to the second surface, the conductive trace being coupled to at least one of the plurality of conductive vias.

7. The device of claim 1, wherein the layer of flexible material includes an end that is coplanar with the second surface of the cover, the end of the layer of flexible material being located on a terminal end of the conductive trace.

8. A device comprising: substrate; a cover coupled to the substrate, the cover comprising an outer surface and an aperture extending through the cover; a flexible interconnect extending along the cover and disposed between the cover and the substrate, the flexible interconnect comprising: a first end coplanar with the outer surface of the cover; and a second end opposite the first end and spaced from the aperture in the cover; A first semiconductor die is coupled to the flexible interconnect, the first semiconductor die being electrically coupled to the substrate through the flexible interconnect.

9. The device of claim 8, wherein the first semiconductor die comprises a first surface and a second surface opposite to each other, the device further comprising: A second semiconductor die is coupled to the substrate and has a first surface and a second surface opposite to each other, the first surface of the first semiconductor die facing the first surface of the second semiconductor die.

10. The device of claim 9, wherein the first semiconductor die is electrically coupled to the second semiconductor die through conductive traces in the substrate.

11. The device of claim 8, wherein the flexible interconnect comprises a polydimethylsiloxane substrate and a conductive trace on the polydimethylsiloxane substrate.

12. The device of claim 8, wherein the flexible interconnect comprises a polydimethylsiloxane layer having a surface and conductive traces in the polydimethylsiloxane layer and on the surface.

13. The device of claim 8, wherein the flexible interconnect comprises a flexible substrate having a surface and conductive traces extending on the surface of the flexible substrate, and the substrate further comprises electrical contacts, the conductive traces coupled between the first semiconductor die and the electrical contacts of the substrate.

14. A method comprising: applying a flexible interconnect to the cover; removing a portion of the flexible interconnect after applying the flexible interconnect to the cover; coupling a first semiconductor die to the flexible interconnect and the cap; as well as The flexible interconnect and the cap are coupled to a substrate, the coupling comprising positioning the flexible interconnect between the substrate and the cap, the coupling further comprising establishing an electrical connection between the first semiconductor die and the substrate.

15. The method according to claim 14, further comprising: Before applying the flexible interconnect: A second semiconductor die is coupled to the surface of the substrate.

16. The method of claim 15, wherein coupling the flexible interconnect and the cover to the substrate comprises: Electrical connections are established between the first semiconductor die and the second semiconductor die through contacts and traces in the substrate.

17. The method according to claim 14, further comprising: After applying the flexible interconnect to the cover: A portion of the cover is removed.

18. The method of claim 14, wherein applying the flexible interconnect to the cover comprises: The flexible interconnect is applied to a surface of the cover extending between the outermost edges of the cover.

19. The method of claim 14, wherein applying the flexible interconnect to the cover comprises: A plurality of separate flexible interconnecting strips are applied to the surface of the cover in spaced relationship to one another.

20. The method of claim 17, further comprising: An aperture is formed by removing the portion of the flexible interconnect and removing the portion of the cover, and wherein coupling the first semiconductor die to the flexible interconnect and the cover includes positioning the first semiconductor die to extend completely across the aperture.

Images