Devices containing tamper-resistant integrated circuits and related methods

Abstract

The present application relates to devices and related methods including tamper-resistant integrated circuits. Systems, devices, and methods related to tamper-resistant integrated circuits are described. The tamper-resistant integrated circuit includes a tamper-resistant feature, the tamper-resistant feature includes a tamper-resistant material, and the tamper-resistant material is formulated or configured to exhibit a change in at least one electrical characteristic in response to exposure to oxygen, electromagnetic radiation, or other environmental conditions. In response to the change in the at least one electrical characteristic, data located within the integrated circuit can be erased, or at least a portion of the integrated circuit can be destroyed. In some instances, one or more electrical characteristics of the tamper-resistant feature can be measured. The change in the electrical characteristic can indicate that the associated integrated circuit has been tampered with.

Description

[0001] Priority claim

[0002] This application claims the benefit of the filing date of U.S. patent application Ser. No. 16 / 547,289, filed on Aug. 21, 2019, and entitled “Tamper-Resistant Integrated Circuits, and Related Methods.” Technical Field

[0003] Embodiments disclosed herein relate to devices and integrated circuits that include one or more tamper-resistant features, and to related methods. More specifically, embodiments of the present disclosure relate to devices (e.g., microelectronic devices) that include integrated circuits that include one or more tamper-resistant features that are adapted and configured to exhibit a change in at least one electrical characteristic in response to exposure to oxygen, electromagnetic radiation, or both, and to related methods. Background Art

[0004] Microelectronic devices may include integrated circuits designed to perform various functions and processes. Integrated circuits including processors, logic circuits, volatile memory, nonvolatile memory, and other components contain useful information in the memory of the integrated circuit, such as confidential information, privacy information, or personal information. In addition, the integrated circuit is capable of performing advanced processing and data retention. In this way, the integrated circuit may include a signal processor, a column decoder, a sense amplifier, an addressing component (e.g., a column addresser, a row addresser), a multiplexer, a word line driver, a decoder (e.g., a column decoder), a global clock and timing signal, a self-refresh and wear leveling device, and other components, logic, and circuit systems. The execution of various functions of the integrated circuit and the associated microelectronic device depends on the specific performance of the above-mentioned signal processor, decoder, sense amplifier, addressing component, multiplexer, word line driver, global clock and timing signal, self-refresh and wear leveling device, and other components.

[0005] The data saved by an integrated circuit typically includes data related to the operation of the integrated circuit, including signal paths and interconnects, timing, logic synthesis and gate-level netlist acquisition, and other data related to the logic and operation of the integrated circuit. For example, the firmware of a system (permanent software programmed into read-only memory) contains information about the operation and timing of the system and is typically embedded in non-volatile memory. Summary of the invention

[0006] In some embodiments, a device includes: a material within an integrated circuit, the material coupled to a supply voltage of the integrated circuit and configured to exhibit a change in at least one electrical characteristic in response to exposure to oxygen, electromagnetic radiation, or both, and a sensor within the integrated circuit, the sensor configured to identify the change in the at least one electrical characteristic of the material and generate an output signal in response to the change in the at least one electrical characteristic of the material.

[0007] In other embodiments, a device includes a resistor within an integrated circuit and coupled between a first node and a second node, the first node being coupled to receive a supply voltage, the resistor including a material formulated and configured to exhibit a change in at least one electrical characteristic in response to exposure to oxygen, exposure to electromagnetic radiation, or both. The device further includes a third node and a sensor within the integrated circuit and configured to compare a reference voltage at the third node to an input voltage at the second node.

[0008] In yet other embodiments, a method includes applying a supply voltage at a first node coupled to a first end of a resistor to generate an input voltage at a second node coupled to a second end of the resistor, the resistor comprising a material formulated and configured to exhibit a change in resistance in response to exposure to oxygen, electromagnetic radiation, or both. The method further includes identifying, with a sensor, a change in at least one electrical property of the material based at least in part on a relative change between the input voltage and a reference voltage at the resistor, and generating, with the sensor, an output signal in response to the identified change in the at least one electrical property. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1A is a simplified block diagram of an integrated circuit including anti-tamper features according to an embodiment of the present disclosure;

[0010] Figure 1B is a simplified cross-sectional view of an anti-tamper feature according to an embodiment of the present disclosure;

[0011] Figure 1C is a simplified cross-sectional view of another anti-tamper feature according to an embodiment of the present disclosure;

[0012] Figure 1D is a simplified cross-sectional view of another anti-tamper feature according to an additional embodiment of the present disclosure;

[0013] Figure 2A is a simplified circuit diagram of a sensor for determining a state of an integrated circuit by determining a change in at least one electrical characteristic of a tamper-resistant material according to an embodiment of the present disclosure;

[0014] Figure 2B is a graph showing the input voltage V of a sensor as a function of time according to an embodiment of the present disclosure. A , reference voltage V B and the output signal V O A simplified graph of

[0015] Figure 3A is a simplified circuit diagram of a system for determining a state of an integrated circuit according to an embodiment of the present disclosure;

[0016] Figure 3B is in an enabled state according to an embodiment of the present disclosure Figure 3A A simplified circuit diagram of the system; and

[0017] Figure 3C is in a disabled state according to an embodiment of the present disclosure Figure 3A Simplified circuit diagram of the system. DETAILED DESCRIPTION

[0018] The illustrations contained herein are not intended to be actual views of any particular system, microelectronic structure, microelectronic device, or integrated circuit thereof, but are merely idealized representations used to describe the embodiments herein. Elements and features common between the figures may retain the same numerical designations, except as follows: To facilitate the following description, the figure number begins with the number of the figure that introduces or most fully describes the element.

[0019] The following description provides specific details, such as material type, material thickness and processing conditions, in order to provide a comprehensive description of the embodiments described herein. However, it will be appreciated by those skilled in the art that the embodiments disclosed herein may be practiced without adopting these specific details. In fact, the embodiments may be practiced in conjunction with conventional manufacturing techniques used in the semiconductor industry. In addition, the description provided herein does not form a complete description of tamper-proof features, integrated circuits or microelectronic devices containing tamper-proof features, or a complete description of the process flow for manufacturing tamper-proof features, associated integrated circuits or microelectronic devices. The following structures do not form a complete microelectronic device or integrated circuit containing tamper-proof features. Only those process actions and structures necessary for understanding the embodiments described herein are described in detail below. Other actions for forming complete tamper-proof features or integrated circuits containing tamper-proof features may be performed by conventional techniques.

[0020] The materials described herein may be formed by conventional techniques including, but not limited to, spin coating, blanket coating, chemical vapor deposition (CVD), atomic layer deposition (ALD), plasma enhanced ALD, physical vapor deposition (PVD), plasma enhanced chemical vapor deposition (PECVD), or low pressure chemical vapor deposition (LPCVD). Alternatively, the material may be grown in situ. Depending on the specific material to be formed, one of ordinary skill in the art may select a technique for depositing or growing the material. Unless the context indicates otherwise, removal of material may be accomplished by any suitable technique including, but not limited to, etching, grinding planarization (e.g., chemical-mechanical planarization), or other known methods.

[0021] As used herein, the terms "longitudinal", "vertical", "lateral", and "horizontal" are referenced to a principal plane of a substrate (e.g., a substrate material, a substrate structure, a substrate configuration, etc.) in or on which one or more structures and / or features are formed and are not necessarily defined by the Earth's gravitational field. A "lateral" or "horizontal" direction is a direction substantially parallel to the principal plane of the substrate, while a "longitudinal" or "vertical" direction is a direction substantially perpendicular to the principal plane of the substrate. The principal plane of a substrate is defined by a surface of the substrate having a relatively larger area than other surfaces of the substrate.

[0022] The term "substantially" used herein with respect to a given parameter, property, or condition means and encompasses the extent to which one of ordinary skill in the art would understand that a given parameter, property, or condition is met with a certain degree of variance (e.g., variance within an acceptable tolerance). For example, depending on a particular parameter, property, or condition being substantially met, the parameter, property, or condition may be at least 90.0% met, at least 95.0% met, at least 99.0% met, at least 99.9% met, or even 100.0% met.

[0023] As used herein, "about" or "approximately" with respect to a numerical value of a particular parameter includes the numerical value and a certain degree of difference relative to the numerical value that will be understood by those of ordinary skill in the art as being within an acceptable tolerance for the particular parameter. For example, "about" or "approximately" with respect to a numerical value may include additional numerical values ​​that are within the range of 90.0% to 110.0% of the numerical value, such as within the range of 95.0% to 105.0% of the numerical value, within the range of 97.5% to 102.5% of the numerical value, within the range of 99.0% to 101.0% of the numerical value, within the range of 99.5% to 100.5% of the numerical value, or within the range of 99.9% to 100.1% of the numerical value.

[0024] As used herein, spatially relative terms such as "under", "below", "lower", "bottom", "above", "upper", "top", "front", "back", "left", "right", etc. can be used to describe the relationship between an element or feature and another or more elements or features as shown in the figure for ease of description. Unless otherwise specified, in addition to the orientation depicted in the figure, spatially relative terms are also intended to cover different orientations of materials. For example, if the material in the figure is inverted, the element described as being "under" or "under" or "below" or "bottom" of other elements or features will be oriented "above" or "top" of the other elements or features. Therefore, the term "below" can cover both the upper orientation and the lower orientation, depending on the context in which the term is used, which is obvious to a person of ordinary skill in the art. The material can be oriented in other ways (e.g., rotated 90 degrees, inverted, flipped, etc.) and the spatially relative descriptors used herein can be interpreted accordingly.

[0025] As used herein, "electrical property" means and includes one or more of resistance, resistivity, voltage, current, capacitance, conductivity, dielectric constant, dielectric strength, or another property.

[0026] As used herein, the terms "resistance" and "electrical resistance" are used interchangeably.

[0027] Integrated circuits often contain valuable information. For example, an integrated circuit may contain personal or confidential information. In addition, an integrated circuit contains circuitry and algorithms for performing various operations. Because of the valuable information contained within an integrated circuit (e.g., within its memory), many people have attempted to reverse engineer an integrated circuit to obtain the data contained therein.

[0028] Reverse engineering can include methods of obtaining a cross-section of an integrated circuit to determine the various materials and components that make up the integrated circuit. Such methods can include, for example, unpacking the integrated circuit die (removing the potting material or encapsulating material to remove the integrated circuit from the packaging material), de-layering the integrated circuit, and imaging different parts of the integrated circuit. Other examples of reverse engineering include, for example, X-ray tomography, which can non-destructively provide layer-by-layer images of the integrated circuit and is commonly used to analyze internal vias, traces, wire bonds, capacitors, contacts, and resistors. Typically, such methods of reverse engineering the architecture and material composition that make up the integrated circuit do not require powering up the integrated circuit or monitoring the function and operation of the integrated circuit and its components.

[0029] Other forms of reverse engineering include determining information about the circuit system and operation of the circuit within the integrated circuit. However, such methods require reverse engineers to power the integrated circuit so that the integrated circuit can operate and perform its intended function. For example, information about the circuit system and operation of the integrated circuit can be obtained by techniques such as probing (also known as "picoprobing"), in which a probe is used to monitor the functional analysis of the integrated circuit to monitor the on-chip signal. In such cases, test cases can be developed and incentives can be created to operate the system in the functional mode of the system while monitoring the on-chip signal. Signal generators, logic analyzers, and oscilloscopes can be used to drive the system and collect results, after which the signals and systems are analyzed. By reading out and analyzing the contents of the memory of the integrated circuit, reverse engineering can gain a deeper understanding of the operation of the system being reverse engineered. Therefore, reverse engineering includes methods that can extract data from such integrated circuits and electronic systems. As described above, such methods of reverse engineering generally require reverse engineers to power the integrated circuit so that the integrated circuit can perform one or more operations.

[0030] Tamper-resistant materials and sensors have been used to resist theft and reverse engineering of integrated circuits and their associated systems. For example, hard barriers comprising ceramic or steel have been used to separate the top layer of the integrated circuit so that attempts to tamper or reverse engineering can be prevented by destroying the protective device. Single die coatings have also been applied to prevent micro-probing attempts. However, as the value of information potentially obtained through reverse engineering and the complexity of semiconductor devices, integrated circuits, and microelectronic devices continue to increase, reverse engineering techniques are also continuing to improve.

[0031] According to embodiments described herein, an integrated circuit includes one or more tamper-resistant features configured to reduce or prevent reverse engineering of components, logic, and circuit systems of the integrated circuit. The tamper-resistant features are configured and / or configured to exhibit a change in at least one electrical characteristic in response to exposure to oxygen (e.g., air), electromagnetic radiation (e.g., electromagnetic radiation within the visible spectrum), or both. In some embodiments, the tamper-resistant features include one or more tamper-resistant materials in an unoxidized state (e.g., a state in which the tamper-resistant material is not fully oxidized (e.g., partially oxidized or unoxidized)), such as a material including less than stoichiometric oxygen; a photosensitive material configured and / or configured to exhibit a change in at least one electrical characteristic in response to exposure to electromagnetic radiation; or both. By way of non-limiting example, the tamper-resistant material may include, but is not limited to, titanium. When exposed to oxygen, electromagnetic radiation, or both, the tamper-resistant material may oxidize and / or undergo a chemical change (e.g., a reaction), thereby changing at least one electrical characteristic of the tamper-resistant material. By way of non-limiting example, the resistance of the tamper-resistant material may change in response to oxidation or exposure to electromagnetic radiation.

[0032] The tamper-proof material may include a portion of a system or circuit of an integrated circuit that is configured to detect undesired exposure of the integrated circuit to oxygen and / or electromagnetic radiation, such as exposure encountered during a reverse engineering attempt of the integrated circuit. For example, during a reverse engineering attempt, the die and circuits of the integrated circuit may be exposed to electromagnetic radiation, oxygen, or both. For example, when the integrated circuit is de-layered and undergoes testing such as micro-probing technology, different components of the integrated circuit may be exposed to oxygen and electromagnetic radiation. In response to exposure to oxygen, electromagnetic radiation, or both, the tamper-proof material may exhibit one or more electrical properties, such as a change in resistance. The system or circuit to which the tamper-proof material is coupled may include a sensor that is configured to detect (e.g., measure) the at least one electrical property and determine a change in the at least one electrical property. In response to determining that the at least one electrical property has changed, the sensor may be configured to output a signal that may include or cause one or more of an alarm / notification signal, a data corruption signal, or a self-damage signal. Thus, a system containing tamper-resistant materials can hinder or prevent reverse engineering by determining when the tamper-resistant materials are exposed to oxygen, electromagnetic radiation, or both and by preventing reverse engineers from accessing data and processes stored within the integrated circuit system. The system and tamper-resistant features can facilitate the protection of data related to the operation and circuitry of the integrated circuit. For example, the system and tamper-resistant features can prevent reverse engineers from reading and analyzing the contents of the memory of the integrated circuit, such as by disabling the integrated circuit from powering on in response to a change in the at least one electrical characteristic.

[0033] Figure 1A 1 is a simplified block diagram of an integrated circuit 150 of a microelectronic device according to an embodiment of the present disclosure. The integrated circuit 150 may include, for example, a semiconductor die, a memory device (e.g., including a read-only memory, a random access memory, or both), an application-specific integrated circuit (ASIC) (e.g., a sensor), a logic circuit, a microprocessor, a microcontroller, a system on a chip (SoC), another component, or a combination thereof. An example of an integrated circuit 150 in the form of a system on a chip may include a central processing unit (CPU) 152, a read-only memory (ROM) 154, a random access memory (RAM) 156, an input / output device 158 (e.g., for coupling the integrated circuit 150 to one or more peripheral devices), and a power-up block 160. Depending on the intended use and function of the integrated circuit 150, the integrated circuit 150 may include additional components.

[0034] The central processing unit 152 may include electronic circuitry for executing the instructions of the integrated circuit 150 (e.g., an instruction set that may be hardwired into the circuitry of the central processing unit 152) by performing various logic functions, input / output operations, and other functions. The central processing unit 152 may be in operative communication with a read-only memory 154, a random access memory 156, and then an input / output device 158. The read-only memory 154 may include, for example, a programmable read-only memory (PROM), an electrically programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), flash memory, or another form of read-only memory. The random access memory 156 may include, for example, a dynamic random access memory (DRAM), a static random access memory (SRAM), flash memory, a conductive bridge random access memory (CBRAM), a ferroelectric random access memory (FRAM, also known as FeRAM), or other types of memory suitable for storing information.

[0035] The power-up block 160 may include circuits that are initialized after power is applied to the integrated circuit 150. The power-up block 160 may include, for example, a power-on reset (POR) circuit. The power-up block 160 may facilitate initialization of analog and digital blocks or circuits of the integrated circuit 150 in response to receipt of a power-up signal. Once a threshold voltage is applied to the power-up block 160, the integrated circuit 150 is initialized and may perform one or more operations. The power-up block may be in operative communication with the central processing unit 152.

[0036] Integrated circuit 150 may further include at least one anti-tamper feature 162. In some embodiments, anti-tamper feature 162 may be located within power-up block 160. Anti-tamper feature 162 may be configured and arranged to respond when another is attempting or has attempted to reverse engineer integrated circuit 150. In some embodiments, anti-tamper feature 162 is coupled to a supply voltage (V DD The tamper-proof feature 162 may be configured to prevent the power-on block 160 from providing a power-on signal (eg, a supply voltage V DD). For example, as indicated at 164, the tamper-proof feature 162 can be configured to decouple the power-up block 160 from the central processing unit 152. In some such embodiments, the tamper-proof feature 162 can prevent the integrated circuit 150 from initializing and powering up in response to the change in the at least one electrical characteristic. Thus, a reverse engineer can be prevented from obtaining data related to the function and operation of the integrated circuit 150 in response to the change in the at least one electrical characteristic. In some embodiments, the tamper-proof feature 162 is in operative communication with one or more of the central processing unit 152, the read-only memory 154, the random access memory 156, and the input / output device 158 and can be configured to facilitate erasure of data contained in one or more of the central processing unit 152, the read-only memory 154, the random access memory 156, and the input / output device 158 in response to the change in the at least one electrical characteristic.

[0037] In some embodiments, the tamper-proof feature 162 can be physically located on the circuitry of the power-up block 160. In some such embodiments, the tamper-proof feature 162 can be positioned over other components of the integrated circuit 150.

[0038] Figure 1B 1 is a simplified cross-sectional view of an anti-tamper feature of an integrated circuit 100 according to an embodiment of the present disclosure. The anti-tamper feature of the integrated circuit 100 may include an anti-tamper material 102 that is formulated and configured to exhibit a change in at least one electrical property in response to exposure to at least one of electromagnetic radiation (e.g., within the visible spectrum), oxygen, or both. The tamper-resistant material 102 may be electrically coupled to a first node 104 on a first side thereof and a second node 106 on a second side thereof. The first node 104 and the second node 106 may be configured to measure an electrical property (e.g., a voltage) of the tamper-resistant material 102. For example, in some embodiments, the first node 104 and the second node 106 may be electrically coupled to a voltmeter, and the first node 104 and the second node 106 may be configured to determine the resistance of the tamper-resistant material 102. In some embodiments, the first node 104 may be coupled to a voltmeter configured to provide a voltage to the integrated circuit 150 ( Figure 1A ) The power supply voltage V DD . Supply voltage V DD A voltage may also be provided across the tamper-resistant material 102 , over which a voltage drop may be measured at the second node 106 .

[0039] In some embodiments, the tamper-proof material 102 comprises a material that is formulated and configured to exhibit a change in at least one electrical property in response to its oxidation. For example, the tamper-proof material 102 may exhibit an increase in resistance in response to its oxidation. In other embodiments, the tamper-proof material 102 exhibits a decrease in resistance in response to oxidation. The tamper-proof material 102 may include titanium, copper, aluminum, nickel, magnesium, chromium, iron, cobalt, zinc, zirconium, ruthenium, silver, hafnium, tantalum, tungsten, iridium, gold, niobium, silicon, germanium, or a combination thereof. In some embodiments, the tamper-proof material 102 includes titanium, and in response to exposure to oxygen, the resistance of the tamper-proof material 102 increases, and titanium oxide (e.g., titanium dioxide) is formed accordingly in response to the oxidation of titanium.

[0040] In some embodiments, the tamper-resistant material 102 includes a material that is formulated and configured to exhibit a change in electrical properties in response to exposure to electromagnetic radiation, such as electromagnetic radiation within the visible spectrum (wavelength from about 350 nm to about 650 nm). The tamper-resistant material 102 may include a photosensitive material, such as ammonium dichromate, one or more silver halides (AgF, AgCl, AgBr, AgI), a photoconductive polymer (a material that absorbs electromagnetic radiation and increases electrical conductivity, such as poly (9-vinyl carbazole) (PVK)), a photoresist material, or a combination thereof.

[0041] The thickness of the tamper-resistant material 102 (in Figure 1B The thickness of the substrate (in the upper and lower directions in the view of FIG. 1 ) may be in the range of about 100 μm to about 500 μm, such as from about 100 μm to about 200 μm, from about 200 μm to about 300 μm, from about 300 μm to about 400 μm, or from about 400 μm to about 500 μm. However, the present disclosure is not limited thereto, and the thickness may be different from those described.

[0042] Because the tamper-resistant material 102 may include a material that can oxidize in response to exposure to oxygen (e.g., air); a material formulated to exhibit a change in at least one electrical property in response to exposure to electromagnetic radiation; or both, the tamper-resistant material 102 of the integrated circuit 100 can be formed or deposited in an oxygen-free environment, such as in the presence of argon or under conditions such that the tamper-resistant material 102 is not exposed to visible light during or after its manufacture, such as by forming or depositing a shadow mask (i.e., a material that is opaque to visible light) over the tamper-resistant material 102.

[0043] Continue to refer Figure 1B, the tamper-proof material 102 can be positioned adjacent to the base material 108. The base material 108 can include a semiconductor substrate, a base semiconductor material on a support structure, a metal electrode, a semiconductor substrate having one or more materials, one or more structures, or one or more regions formed thereon, a semiconductor die, or a combination thereof. For example, the base material 108 can include active circuit systems, such as transistors, capacitors, diodes, wires, other components, and combinations thereof. In some embodiments, the base material 108 includes a power-up block 160 ( Figure 1A ). The base material 108 may include a conventional silicon substrate or other bulk substrates including semiconductor materials. The term "bulk substrate" as used herein means and includes not only a silicon wafer, but also a silicon-on-semiconductor ("SOI") substrate, such as a silicon-on-sapphire ("SOS") substrate or a silicon-on-glass ("SOG") substrate, an epitaxial silicon layer on a base semiconductor, or other semiconductor or optoelectronic materials, such as silicon germanium (Si 1-x Ge x , where x is a mole fraction, for example, between 0.2 and 0.8), germanium (Ge), gallium arsenide (GaAs), gallium nitride (GaN), or indium phosphide (InP), etc. In addition, when "substrate" or "base material" is referenced in the following description, materials, regions, or junctions may have been formed in the base semiconductor structure or foundation using previous process stages. Base material 108 may include materials associated with integrated circuit system fabrication and the resulting structure. Such materials may include, for example, one or more of refractory metals, barrier materials, diffusion materials, insulator materials. Base material 108 may include, for example, a complementary metal oxide semiconductor (CMOS) structure or other semiconductor structure or microelectronic structure. Different portions of base material 108 may be electrically isolated from each other by one or more dielectric materials.

[0044] The encapsulation material 110 may be positioned adjacent to (e.g., on) the tamper-resistant material 102. The encapsulation material 110 may include a sealing material and may, for example, hermetically seal the integrated circuit 100 to prevent or reduce contamination thereof (e.g., by exposure to oxygen, visible light, or contaminants such as water). In some embodiments, the encapsulation material 110 substantially surrounds the tamper-resistant material 102.

[0045] The encapsulating material 110 may include silicon dioxide, silicon nitride, silicon oxynitride, an epoxy material, a polyimide, a silicone, another dielectric material, or a combination thereof. The encapsulating material 110 may, for example, reduce or prevent oxidation of the tamper-resistant material 102; reduce or prevent exposure of the tamper-resistant material 102 to electromagnetic radiation within a specific wavelength range (e.g., the encapsulating material 110 may include a shadow mask); or both.

[0046] During a reverse engineering attempt, the encapsulating material 110 may be removed by a reverse engineer to access components of the integrated circuit 100 (e.g., components within the substrate material 108), thereby exposing the tamper-resistant material 102 to oxygen, electromagnetic radiation, or both. Exposing the tamper-resistant material 102 to one or more of oxygen or electromagnetic radiation may change one or more electrical characteristics of the tamper-resistant material 102, which may be detected (e.g., sensed) by the first node 104 and the second node 106, each of which is electrically coupled to the tamper-resistant material 102, to indicate that the integrated circuit 100 has been compromised or may have been compromised. In some such embodiments, as will be described herein, the integrated circuit 100 may include logic (e.g., a control system) or may be coupled to a system for causing one or more actions in response to changes in the electrical characteristics of the tamper-resistant material 102.

[0047] Figure 1C 1 is a simplified cross-sectional view of another tamper-resistant feature of an integrated circuit 120 according to an embodiment of the present disclosure. The integrated circuit 120 may include a stack 111 including a plurality of tamper-resistant materials, such as a first tamper-resistant material 112 and a second tamper-resistant material 114 positioned adjacent to the first tamper-resistant material 112. The first tamper-resistant material 112 may be positioned adjacent to the second tamper-resistant material 114 at least along an interface 113. The stack 111 may be adjacent to a substrate material 108, which may be similar to the substrate material described above with reference to FIG. Figure 1B The described substrate materials 108 are substantially the same.

[0048] The first tamper-resistant material 112 may include a material formulated and configured to exhibit a change in at least one electrical property in response to oxidation, and the second tamper-resistant material 114 may include a material formulated and / or configured to exhibit a change in at least one electrical property in response to exposure to electromagnetic radiation. The first tamper-resistant material 112 may include one or more materials described above with reference to the tamper-resistant material 102 and formulated and / or configured to exhibit a change in an electrical property in response to oxidation. The second tamper-resistant material 114 may include one or more materials formulated and / or configured to exhibit a change in an electrical property in response to exposure to electromagnetic radiation, and may include one or more different materials described above with reference to the tamper-resistant material 102.

[0049] The thickness of each of the first tamper-proof material 112 and the second tamper-proof material 114 (in Figure 1C The thickness of the tamper-proof material 102 (in the upper and lower directions in the view of FIG. 1 ) may be substantially the same as the thickness of the tamper-proof material 102 described above, or the combined thickness of the first tamper-proof material 112 and the second tamper-proof material 114 may be substantially the same as the above thickness.

[0050] The first tamper-proof material 112 can be electrically coupled to the first node 116, and the second tamper-proof material 114 can be electrically coupled to the second node 118, which can be located on the opposite side of the stack 111 from the first node 116. The first node 116 and the second node 118 can be configured to measure at least one electrical characteristic of at least one of the first tamper-proof material 112 and the second tamper-proof material 114. In other words, the first node 116 and the second node 118 can be configured to measure the electrical characteristics of the stack 111. In some embodiments, the first node 116 is configured to receive the integrated circuit 150 ( Figure 1A ) supply voltage V DD The electrical properties of stack 111 may change if one or both of first tamper-resistant material 112 and second tamper-resistant material 114 exhibit a change in an electrical property, such as in response to oxidation or exposure to electromagnetic radiation. For example, in at least some embodiments, first tamper-resistant material 112 and second tamper-resistant material 114 may be exposed to oxygen and electromagnetic radiation during a reverse engineering attempt. In response to such exposure, one or both of first tamper-resistant material 112 and second tamper-resistant material 114 may exhibit a change in an electrical property that may be sensed to determine a risk of reverse engineering.

[0051] As mentioned above Figure 1B As depicted, integrated circuit 120 may include encapsulation material 110 adjacent to second tamper-resistant material 114. Although not shown, encapsulation material 110 may be positioned adjacent to a sidewall of stack 111. In other words, stack 111 (first tamper-resistant material 112 and second tamper-resistant material 114) may not include any exposed surfaces.

[0052] Figure 1D is a simplified cross-sectional view of another tamper-resistant feature of an integrated circuit 130 including tamper-resistant materials according to additional embodiments of the present disclosure. The integrated circuit 130 may include a first tamper-resistant material 132 and a second tamper-resistant material 134 surrounded (e.g., encapsulated) by an encapsulating material 110, which may be substantially the same as the encapsulating material 110 described above. The first tamper-resistant material 132 may be physically isolated from the second tamper-resistant material 134. In some embodiments, one of the first tamper-resistant material 132 and the second tamper-resistant material 134 may include a material formulated and configured to exhibit a change in an electrical property in response to oxidation thereof, and the other of the first tamper-resistant material 132 and the second tamper-resistant material 134 may include a material formulated and configured to exhibit a change in an electrical property in response to exposure to electromagnetic radiation.

[0053] The first tamper-proof material 132 can be electrically coupled to a first node 136 and a second node 138. The supply voltage V can be applied to the first node 136, for example. DD is applied to the first tamper-resistant material 132, and a voltage may be measured at the second node 138. Thus, a voltage drop across the first tamper-resistant material 132 may be measured based on the voltage difference at the first node 136 and the second node 138.

[0054] The second tamper-proof material 134 can be electrically coupled to a third node 140 and a fourth node 142. The supply voltage V can be provided via the third node 140, for example. DD The voltage drop across the second tamper-proof material 134 can be measured based on the voltage difference at the third node 140 and the fourth node 142. In some embodiments, both the first node 136 and the third node 140 can be independently coupled to a supply voltage V DD .

[0055] The first tamper-resistant material 132 and the second tamper-resistant material 134 can be positioned on the substrate material 108, as described above with reference to Figure 1B and Figure 1C described.

[0056] References Figure 1B to Figure 1D The tamper-resistant features of the described integrated circuits 100, 120, 130 may be fabricated by, for example, forming or depositing respective ones of the tamper-resistant materials 102, 112, 114, 132, 134 on a substrate material 108, which may include the integrated circuit 150 ( Figure 1A ) components, such as power-on block 160 ( Figure 1A ). The tamper-resistant materials 102, 112, 114, 132, 134 may be deposited or formed in situ by, for example, ALD, plasma-enhanced ALD, PVD, PECVD, LPCVD, another method, or a combination thereof. The encapsulating material 110 may be formed or deposited on the tamper-resistant materials 102, 112, 114, 132, 134 by ALD, PVD, PECVD, LPCVD, another method, or a combination thereof.

[0057] The tamper-resistant features of integrated circuits 100, 120, 130 may be used, for example, with any integrated circuit such as a semiconductor die, an ASIC, a logic circuit, a microelectronic device, a microprocessor, a microcontroller, an SoC, another component, or a combination thereof. Other integrated circuits may include one or more forms of memory, such as volatile memory, non-volatile memory, or both. For example, such integrated circuits may include DRAM, SRAM, flash memory, CBRAM, FeRAM, PROM, EEPROM, or other forms of memory.

[0058] Figure 2A According to an embodiment of the present disclosure, the integrated circuit 150 ( Figure 1A ) state. The system 200 may include a resistor 202 coupled between a first node 204 and a second node 206, the first node being configured to receive a supply voltage V DD (also referred to as a power supply voltage), the second node is configured to provide an input voltage V to the sensor 208 A Therefore, the first end of the resistor 202 can be configured to receive the supply voltage V DD . Input voltage V A may correspond to the voltage at the second end of the resistor 202 .

[0059] Resistor 202 may include the Figure 1B to Figure 1D One or more of the tamper-resistant materials 102, 112, 114, 132, 134 described herein. For example, the resistor 202 may include a material that is formulated and configured to exhibit a change in at least one electrical property in response to exposure to oxygen, electromagnetic radiation, or both. In some embodiments, the resistor 202 may be configured to exhibit an increase in resistance in response to exposure to oxygen or electromagnetic radiation. In other embodiments, the resistor 202 may be configured to exhibit a decrease in resistance in response to exposure to oxygen or electromagnetic radiation.

[0060] For a constant supply voltage V DD , the resistance of resistor 202 may directly affect the input voltage V A In other words, the supply voltage V DD A voltage drop (or voltage increase) may be exhibited across resistor 202. Thus, in some embodiments, the resistance of resistor 202 (eg, tamper-resistant material 102, 112, 114, 132, 134) may correspond to an input voltage V A In other words, the input voltage V AThe supply voltage V DD With input voltage V A The comparison of can indicate the resistance of resistor 202 and the condition of the tamper-proof material.

[0061] The sensor 208 can be connected to the second node 206 and have a reference voltage V B The third node 210 is operably connected. In some embodiments, the sensor 208 includes a comparator. In other embodiments, the sensor 208 includes, for example, a differential amplifier. In the case where the sensor 208 includes a comparator, for example, the non-inverting input of the sensor 208 (e.g., V A ) can be coupled to the second node 206, and the inverting input of the sensor 208 (eg, V B ) can be coupled to the third node 210. The sensor 208 can be configured to receive an input voltage V A The relative value of the reference voltage V B The relative magnitude of the input voltage is compared with the relative magnitude of the reference voltage. In some embodiments, the output signal V at the fourth node 212 corresponding to the output node of the sensor 208 is O Can include digital signals (1 or 0, depending on V A and V B By way of non-limiting example, the output signal V O 0 indicates that V A The value is less than V B The output signal V O A value of 1 indicates that V A The value has exceeded V B The value (and V A The value has changed). In use and operation, the output signal V O The change in V may correspond to a change in the condition of resistor 202. In some such embodiments, sensor 208 may be configured to detect a change in the condition of resistor 202 based on output signal V O The value of determines the change in the condition of resistor 202. In some embodiments, sensor 208 can be configured to be based on a reference voltage V B With input voltage V A Or supply voltage V DD A comparison of one or both of them is used to determine a change in the condition of resistor 202.

[0062] With output signal V O The fourth node 212 can be electrically connected to a control system 220 or logic, which is configured to respond to the output signal VO As will be described herein, the control system 220 may be configured to send an indication to another system, such as another component of the integrated circuit 150, to perform one or more actions in response to determining that the resistor 202 has been exposed to oxygen, electromagnetic radiation, or both. In some embodiments, the control system 220 is in operative communication with the power-up block 160 and may be configured to prevent the power-up block 160 from providing power to the integrated circuit 150. The control system 220 may also be in operative communication with one or more of the following: the central processing unit 152, the read-only memory 154, the random access memory 156, and the input / output device 158, which may be configured to perform one or more erase operations in response to receiving a signal from the control system 220. Thus, the control system 220 may be configured to erase data located within the integrated circuit 150 in response to a change in at least one electrical characteristic of the resistor 202.

[0063] The control system 220 can enable the user to respond to the output signal V O The action of the control system 220 is determined by the change of the output signal V O is 0, the control system 220 can be configured to supply power to the integrated circuits 100, 120, 130. O For example, if the output signal V is 1, the control system 220 may be configured to prevent the integrated circuits 100, 120, 130 from being powered on. O , the system 200 may be configured to perform one or more actions. The one or more actions may include sending a notification to a user of the integrated circuit indicating a reverse engineering attempt (as indicated by a change in the at least one electrical characteristic of the resistor 202), corrupting data stored within the integrated circuit, or damaging one or more components of the integrated circuit. In some embodiments, the notification may be sent to the control system 220 via a specially scrambled output on a data pin, by an alert pin firing, or both, to identify a reverse engineering attempt on the integrated circuit 100, 120, 130. If the reverse engineering attempt is made while the consumer is using the integrated circuit 100, 120, 130 (e.g., a reverse engineer is hacking into memory from a consumer platform), the control system 220 may be programmed by the consumer to take specific measures once reverse engineering is detected by the integrated circuit 100, 120, 130.

[0064] In some embodiments, the control system 220 is configured to provide the integrated circuit 150 ( Figure 1A ) component sends a signal in response to the output signal V OThe control system 220 may be configured to erase data stored in the memory of the integrated circuit 150, such as by performing an erase operation. In other embodiments, the control system 220 may be configured to damage the data stored in the memory, such as by writing random logic bits to the memory. In some embodiments, the data damage may be permanent. In other embodiments, the data damage may be reversible and the data stored in the memory may be retained.

[0065] In yet other embodiments, the control system 220 may be configured to destroy (eg, self-destruct) the integrated circuit 150 in response to a change in the at least one electrical characteristic. Figure 1A ). In some such embodiments, the integrated circuit 150 may include one or more materials that are formulated and configured to damage one or more electrical interconnects within the integrated circuit 150. By way of non-limiting example, the integrated circuit 150 may include at least one etchant, such as at least one acid (hydrochloric acid, hydrofluoric acid, sulfuric acid, nitric acid, phosphoric acid, acetic acid, or another acid), at least one base (hydrogen peroxide, ammonium hydroxide), or other etchant formulated and configured to remove or damage at least one conductive line (e.g., polysilicon, copper, tungsten, titanium, silver, gold) or conductive interconnect. The at least one etchant may be positioned within a cavity of the integrated circuit 100, 120, 130, or may be positioned proximate to the integrated circuit 100, 120, 130.

[0066] Figure 2B is the input voltage V as a function of time A , reference voltage V B and the output signal V O A simplified graph of the input voltage V at time t. A Exceeds the reference voltage V B , indicating a change in an electrical characteristic of resistor 202 (eg, due to oxidation). At this time t, in response to the input voltage V A Exceeds the reference voltage V B The switching output signal V O The output signal V O A change in may indicate that resistor 202 is exposed to oxygen, electromagnetic radiation, or both. In some embodiments, the reference voltage V B In other words, the reference voltage V B The value of the output signal V O The resistance of resistor 202 changes by a sufficient amount before changing in response to the resistance change.

[0067] In use and operation, a supply voltage V is applied to the resistor 202.DD , thereby generating from the supply voltage V DD To the input voltage V A The sensor 208 receives an input voltage V A and reference voltage V B And compare the input voltage V A The relative magnitude and reference voltage V B The relative value of the output signal V O may correspond to the state of resistor 202. In other words, the output signal V O The value of may be indicative of a change in at least one electrical property of resistor 202 , such as a change that may be caused by oxidation of the at least one electrical property, exposure of the at least one electrical property to electromagnetic radiation, or both.

[0068] As just one example, where resistor 202 includes a material that is adapted and configured to exhibit a change in electrical properties in response to exposure to oxygen, the resistance of the material may change in response to oxidation. For example, the resistance of titanium may increase when exposed to oxygen (because the resistance of titanium dioxide is greater than the resistance of elemental titanium). In some such embodiments, the input voltage V A The input voltage V A The predetermined decrease in input voltage V A The relative magnitude exceeds the reference voltage V B The relative magnitude of can be an indication of reverse engineering. In other embodiments, the input voltage V A May increase in response to exposure to oxygen, electromagnetic radiation, or both.

[0069] In some embodiments, during the early stages of product development, such as during the development of integrated circuit 150 ( Figure 1A ), it may be desirable to include tamper-resistant materials 102, 112, 114, 132, 134 in the tamper-resistant features of the integrated circuits 100, 120, 130. In some embodiments, it may be desirable to include tamper-resistant materials 102, 112, 114, 132, 134 in integrated circuits shipped to high-risk customers who may attempt to reverse engineer the integrated circuits. However, it may not be desirable to enable the system 200 to operate in all integrated circuits 150 produced. Therefore, continuing with reference to Figure 2A , the system 200 may include a first fuse 214 in operable communication with the first node 204. The first fuse 214 may be configured to enable the system 200 in response to applying a suitable threshold voltage to the first fuse 214. The application of the threshold voltage may DD is electrically connected to resistor 202. In other words, by applying a threshold voltage to DDWhen the system 200 is coupled to the resistor 202 and enabled, the first fuse 214 may fail (e.g., blow). Therefore, the system 200 may not be enabled until the system 200 receives the expected signal to blow the first fuse 214. In other embodiments, the system 200 may include a circuit configured to provide a power supply voltage V DD A switch (eg, a transistor, such as an NMOS transistor or a PMOS transistor) coupled to the resistor 202 does not include the first fuse 214 .

[0070] The second fuse 216 can be configured to disable the system 200 after a desired amount of time. The second fuse 216 can be connected to the ground voltage V SS The second node 206 is electrically connected and can be configured to connect to the ground voltage V by causing the second fuse 216 to fail (eg, blow) and connect the second node 206 to the ground voltage V SS For example, after the integrated circuit 100, 120, 130 is sent back to the supplier, the supplier may wish to disable the system 200 by causing the second fuse 216 to fail to electrically connect the second node 206 and the input to the sensor 208 to the ground voltage V SS .

[0071] In some embodiments, the first node 206 can be electrically connected to another resistor 218, which can also be referred to herein as a so-called "pull-down" resistor. The other resistor 218 can be configured to be pulled down when the resistor 202 is not coupled to the supply voltage V DD Current is provided to the sensor 208 at a certain time (such as before the first fuse 214 fails).

[0072] Although it has Figure 2A The system 200 is described and illustrated as including a sensor 208 including a comparator, but the disclosure is not limited thereto. In some embodiments, the system 200 is configured to determine a change in an electrical characteristic of the resistor 202 (e.g., resistance) by comparing a voltage at the second node 206 to a voltage baseline value at the second node 206. In other words, the system 200 can be configured to detect a change in a voltage leaving the resistor 202 or a voltage drop across the resistor 202. In some such embodiments, the sensor 208 can be configured to detect a change in a voltage, such as an input voltage V A changes.

[0073] In other embodiments, when the sensor 208 includes a differential amplifier, the output signal V at the fourth node 212 is O Can correspond to the input voltage V A With reference voltage V B In use and operation, the output signal V OThe change in can correspond to a change in the condition (eg, resistance) of resistor 202. In some such embodiments, the differential amplifier can be configured to output a signal V O The value of determines the change in the condition of resistor 202. Control system 220 may be configured to respond to output signal V O If the output signal V O is less than a predetermined value (or if the input voltage V A does not exceed a predetermined amount), the control system 220 may be configured to send a signal to the integrated circuit 150 ( Figure 1A The predetermined value may be selected so that the effect of the noise does not cause the control system 220 to generate a response action in response to the effect of the noise.

[0074] If the output signal V O is greater than a predetermined value, the control system 220 may be configured to prevent the integrated circuit from powering on. O The change of output signal V O If a predetermined value is exceeded or deviated from, system 200 can be configured to perform one or more actions, such as one or more of: sending a notification to a user of the integrated circuit indicating a reverse engineering attempt (as indicated by a change in at least one of the electrical characteristics of resistor 202), corrupting data stored within the integrated circuit, or destroying one or more components of the integrated circuit, as described above.

[0075] In use and operation, the differential amplifier converts the input voltage V A With reference voltage V B The output signal of the differential amplifier is V O Based on the input voltage V A With reference voltage V B The difference (for example, V B -V A ) and may correspond to the state of resistor 202. In other words, the output signal V O The value or output signal V O A change in the value of may indicate a change in at least one electrical property of resistor 202, such as a change that may be caused by oxidation of the at least one electrical property; exposure of the at least one electrical property to electromagnetic radiation; or both.

[0076] In other embodiments, system 200 may include any circuitry configured to detect (e.g., measure) a change in at least one electrical characteristic of resistor 202. By way of non-limiting example, system 200 may include an operational amplifier or sense amplifier configured to detect a change in voltage, a change in capacitance, or a combination thereof.

[0077] In some embodiments, as will be referred to Figure 3A As depicted, system 200 may include a voltage divider (also referred to as a resistor divider) for providing a reference voltage to sensor 208 , which may facilitate detection of a change in resistance of resistor 202 .

[0078] Although it has Figure 2A The system 200 is described and illustrated as including only one resistor 202, but the present disclosure is not limited thereto. In other embodiments, the system 200 may include more than one resistor 202. For example, the system 200 may include the resistor 202 described above. Figure 1D The integrated circuit 130 described may include a first resistor corresponding to the first tamper-resistant material 132 and a second resistor corresponding to the second tamper-resistant material 134. In some such embodiments, the system 200 may be configured to determine a change in at least one electrical characteristic of each of the first resistor and the second resistor. The first resistor and the second resistor may be coupled in series, may be coupled in parallel, or may be individually coupled to separate comparators.

[0079] Figure 3A According to an embodiment of the present disclosure, the integrated circuit 150 ( Figure 1A ) state. The system 300 includes a resistor 302 coupled between a first node 304 and a second node 306, the first node being configured to receive a supply voltage V DD , the second node is configured to have an input voltage V A In use and operation, a voltage drop occurs across the first resistor 302, and the input voltage V A The value is less than the supply voltage V DD The first resistor 302 can be the same as the value of Figure 2A The resistor 202 described is substantially the same. For example, the first resistor 302 may include one or more of the tamper-resistant materials 102, 112, 114, 132, 134 described above.

[0080] The sensor 308 can be connected to the second node 306 and have a reference voltage V B The sensor 308 is electrically connected to the third node 310. Therefore, the sensor 308 can be configured to receive the input voltage V A and reference voltage V B Sensor 308 can be used with reference to Figure 2A The sensor 208 described is substantially the same. For example, in some embodiments, the sensor 308 includes a comparator. In other embodiments, the sensor 308 includes a differential amplifier, an operational amplifier, or a sense amplifier.

[0081] The system 300 may include a first voltage divider 324 including a third node 310 located between the second resistor 318 and the third resistor 320, and a second voltage divider 326 including a second node 306 located between the first resistor 302 and the fourth resistor 322. In some embodiments, the resistance of the first resistor 302 is less than the resistance of the second resistor 318, the third resistor 320, and the fourth resistor 322. The relative values ​​of the resistance of each of the first resistor 302, the second resistor 318, the third resistor 320, and the fourth resistor 322 may be selected to reduce or eliminate the effects of noise on the sensor 308. For example, if the first resistor 302 is exposed to oxygen or electromagnetic radiation so that the resistance of the first resistor 302 increases, the resistance of the second resistor 318 may be approximately equal to the resistance of the fourth resistor 322, and the resistance of the third resistor may be greater than the resistance of the first resistor 302. In some embodiments, if exposure of the first resistor 302 to oxygen or electromagnetic radiation reduces the resistance of the first resistor 302, the resistance of the third resistor 320 may be approximately equal to the resistance of the first resistor 302, and the resistance of the second resistor 318 may be greater than the resistance of the fourth resistor 322. However, the present disclosure is not limited thereto, and the relative resistances of the resistors 302, 318, 320, 322 may be different than that described.

[0082] The fourth node 312 can be coupled to an enable signal that can enable the operation of the system 300. When the first transistor 314 is turned on, the fifth node 316 can be coupled to the ground voltage V SS .

[0083] In an embodiment where the sensor 308 includes a comparator, the output signal V at the sixth node 328 corresponding to the output node of the sensor 308 O Can include digital signals (1 or 0, depending on V A The relative value and V B In some such embodiments, when the input signal V A The value exceeds the reference signal V B When the value is O The value can be changed.

[0084] In other embodiments, such as when the sensor 308 includes a differential amplifier, the output signal V O Corresponding to the input voltage V A With reference voltage V B In some such embodiments, during use and operation, the output signal V OThe change in can correspond to the change in the condition of the first resistor 302, and the differential amplifier can be configured to output the voltage V O The value of determines the change in the condition of the first resistor 302.

[0085] is configured to receive an output signal V from the sensor 308 O The sixth node 328 can be electrically connected to a control system 330 or logic, which is configured to respond to the output voltage V O (eg, when sensor 308 includes a comparator) changes beyond a predetermined voltage (eg, when sensor 308 includes a differential amplifier), or in response to an input voltage V A The control system 330 may be configured to respond to the detected output signal V O As will be described herein, control system 330 can enable a user to respond to output signal V O If the output signal V O is less than a predetermined value (or if the input voltage V A does not change by more than a predetermined amount), the control system 330 can be configured to supply power to the integrated circuit.

[0086] As described above with reference to system 200, system 300 may include fuses for enabling system 300. For example, first fuse 332 may be in operative communication with fourth node 312. First fuse 332 may be configured to enable system 300 in response to applying a suitable threshold voltage to first fuse 332. In some embodiments, fourth node 312 may not receive a signal until first fuse 332 is blown. Applying the threshold voltage may electrically connect fourth node 312 to an enable signal.

[0087] Figure 3B 3 is a simplified circuit diagram of the system 300 in an enabled state according to an embodiment of the present disclosure. In some such embodiments, the high enable signal may turn on the first transistor 314 and electrically connect the fifth node 316 (ie, via the first transistor 314) to the ground voltage V SS .

[0088] When it is desired to disable the system 300 , the fourth node 312 may be configured to receive a low enable voltage. Figure 3C 3 is a simplified circuit diagram of a system 300 in a disabled state according to an embodiment of the present disclosure. When the system 300 is disabled, the first transistor 314 may be turned off. An inverter 338 ( Figure 3A) can be configured to receive a low enable signal and invert the signal. The inverted signal turns on the second transistor 334, so that the second node 306 is connected to the ground voltage V through the second transistor 334. SS .

[0089] Therefore, the integrated circuit may include one or more tamper-resistant materials, which may facilitate the detection of reverse engineering attempts to the integrated circuit. The tamper-resistant material may be formulated and configured to exhibit a change in at least one electrical characteristic in response to exposure to oxygen, electromagnetic radiation, or both. The integrated circuit may include a system configured to detect a change in the at least one electrical characteristic and to perform one or more operations in response to detecting the change. The tamper-resistant material may facilitate the protection of valuable intellectual property by reducing or preventing reverse engineering attempts. The integrated circuit may include a fuse, which may be configured to enable the tamper-resistant feature of the integrated circuit when shipping the integrated circuit to a high-risk consumer who may attempt to steal the intellectual property within the integrated circuit. When the integrated circuit is sent to a lower-risk consumer, such as when the integrated circuit is manufactured and sold in large quantities to the public, the fuse may be disabled. In addition, the change in the electrical characteristic of the tamper-resistant material may be measured to determine whether an attempt to reverse engineer the integrated circuit has been made.

[0090] Thus, in at least some embodiments, a device (e.g., a microelectronic device) includes: a material within an integrated circuit, the material coupled to a supply voltage of the integrated circuit and configured to exhibit a change in at least one electrical property in response to exposure to oxygen, electromagnetic radiation, or both, and a sensor within the integrated circuit, the sensor configured to identify the change in the at least one electrical property of the material and generate an output signal in response to the change in the at least one electrical property of the material.

[0091] Thus, in at least some embodiments, a device includes: a resistor located within an integrated circuit and coupled between a first node and a second node, the first node being coupled to receive a supply voltage, the resistor comprising a material formulated and configured to exhibit a change in at least one electrical characteristic in response to exposure to oxygen, exposure to electromagnetic radiation, or both; a third node and a sensor located within the integrated circuit and configured to compare a reference voltage at the third node with an input voltage at the second node.

[0092] Thus, in at least some embodiments, a method includes applying a supply voltage at a first node coupled to a first end of a resistor to generate an input voltage at a second node coupled to a second end of the resistor, the resistor comprising a material formulated and configured to exhibit a change in resistance in response to exposure to oxygen, electromagnetic radiation, or both; identifying, using a sensor, a change in at least one electrical property of the material based at least in part on a relative change between the input voltage and a reference voltage at the resistor; and generating, using the sensor, an output signal in response to the identified change in the at least one electrical property.

[0093] Additional non-limiting example embodiments of the present disclosure are set forth below.

[0094] Embodiment 1: A device comprising: a material within an integrated circuit, the material coupled to a supply voltage of the integrated circuit and configured to exhibit a change in at least one electrical property in response to exposure to oxygen, electromagnetic radiation, or both; and a sensor within the integrated circuit, the sensor configured to identify the change in the at least one electrical property of the material and generate an output signal in response to the change in the at least one electrical property of the material.

[0095] Embodiment 2: A device according to embodiment 1, wherein the material is coupled to a first node and a second node, the first node is configured to receive the supply voltage, the second node is configured to receive an input voltage, the input voltage includes a voltage drop of the supply voltage across the material, wherein the sensor is configured to identify the change in the at least one electrical characteristic of the material based at least in part on a comparison of the input voltage with a reference voltage.

[0096] Embodiment 3: The device of Embodiment 1 or Embodiment 2, wherein the material is configured to exhibit a change in resistance in response to exposure to oxygen.

[0097] Embodiment 4: The apparatus of any one of embodiments 1 to 3, wherein the material comprises a metal.

[0098] Embodiment 5: The apparatus of any one of embodiments 1 to 4, wherein the material comprises titanium.

[0099] Embodiment 6: The device of any one of embodiments 1 to 5, wherein the material is configured to exhibit an increase in electrical resistance in response to exposure to oxygen.

[0100] Embodiment 7: The device of any one of embodiments 1 to 6, further comprising another material coupled to the supply voltage and configured to exhibit a change in the at least one electrical property in response to exposure to the other of electromagnetic radiation or oxygen.

[0101] Embodiment 8: A device according to embodiment 7, wherein: the other material shares an interface with the material; and the material is coupled to a first node configured to receive the supply voltage, and the other material is coupled to a second node configured to receive an input voltage, wherein the sensor is configured to identify the change in the at least one electrical characteristic of the material based at least in part on a comparison of the input voltage with a reference voltage.

[0102] Embodiment 9: The device of Embodiment 7, wherein the another material and the material are physically separated from each other, and each of the material and the another material is coupled to a node configured to receive the supply voltage and to a node for receiving an input voltage.

[0103] Embodiment 10: The apparatus of any one of embodiments 1 to 9, further comprising logic configured to corrupt data stored in the integrated circuit in response to the output signal of the sensor.

[0104] Embodiment 11: The device of any one of embodiments 1 to 10, further comprising at least one material formulated and configured to destroy at least a portion of the integrated circuit in response to the output signal of the sensor.

[0105] Embodiment 12: The apparatus of Embodiment 11, wherein the at least one material comprises at least one etchant formulated and configured to remove at least a portion of at least one metal of the metal line.

[0106] Embodiment 13: The apparatus of any one of embodiments 1 to 12, further comprising a comparator configured to invert the output signal in response to the change in the at least one electrical characteristic.

[0107] Embodiment 14: The apparatus of any one of embodiments 1 to 13, wherein the sensor comprises a differential amplifier, and the output signal comprises a difference between an input voltage at the first node and a reference voltage.

[0108] Embodiment 15: The apparatus of any one of Embodiments 1 to 14, further comprising a fuse positioned between a node configured to receive a supply voltage and the material.

[0109] Embodiment 16: A device comprising: a resistor located within an integrated circuit and coupled between a first node and a second node, the first node being coupled to receive a supply voltage, the resistor comprising a material formulated and configured to exhibit a change in at least one electrical characteristic in response to exposure to oxygen, exposure to electromagnetic radiation, or both; a third node; and a sensor located within the integrated circuit and configured to compare a reference voltage at the third node with an input voltage at the second node.

[0110] Embodiment 17: The apparatus of Embodiment 16, further comprising a comparator configured to generate an output signal indicative of the change in the at least one electrical characteristic in response to the input voltage exceeding the reference voltage.

[0111] Embodiment 18: The apparatus of Embodiment 16 or Embodiment 17, wherein the material comprises an elemental metal.

[0112] Embodiment 19: A device according to any one of embodiments 16 to 18, wherein the resistor comprises: a first material, the first material is formulated and configured to exhibit a change in resistance in response to oxidation; and a second material, the second material is formulated and configured to exhibit a change in resistance in response to exposure to electromagnetic radiation.

[0113] Embodiment 20: The apparatus of Embodiment 19, wherein the first material and the second material share at least one interface.

[0114] Embodiment 21: A device according to any one of embodiments 16 to 20, wherein the resistor includes a material, which is formulated and configured to exhibit the change in the at least one electrical characteristic in response to oxidation, and the device further includes another resistor, which is coupled between the third node and the fourth node, and the other resistor includes another material, which is formulated and configured to exhibit the change in the at least one electrical characteristic in response to exposure to electromagnetic radiation.

[0115] Embodiment 22: A method comprising: applying a supply voltage at a first node coupled to a first end of a resistor to generate an input voltage at a second node coupled to a second end of the resistor, the resistor comprising a material formulated and configured to exhibit a change in resistance in response to exposure to oxygen, electromagnetic radiation, or both; identifying a change in at least one electrical property of the material using a sensor based at least in part on a relative change between the input voltage and a reference voltage at the resistor; and generating an output signal using the sensor in response to the identified change in the at least one electrical property.

[0116] Embodiment 23: The method of Embodiment 22, wherein generating an output signal comprises generating the output signal in response to a difference between the input voltage and the reference voltage exceeding a predetermined amount.

[0117] Embodiment 24: The method of Embodiment 22 or Embodiment 23, further comprising performing at least one of the following in response to the output signal: destroying at least a portion of an integrated circuit or erasing data stored in a memory of the integrated circuit.

[0118] Embodiment 25: The method of any one of Embodiments 22 to 24, further comprising providing the supply voltage to an integrated circuit in response to the relative change between the input voltage and the reference voltage being less than a predetermined amount.

[0119] Although certain illustrative embodiments have been described in conjunction with the accompanying drawings, it will be recognized and appreciated by those skilled in the art that the embodiments covered by the present disclosure are not limited to those embodiments explicitly shown and described herein. Rather, many additions, deletions, and modifications, including legal equivalents, may be made to the embodiments described herein without departing from the scope of the embodiments covered by the present disclosure (such as the embodiments claimed hereinafter). Furthermore, features from one disclosed embodiment may be combined with features of another disclosed embodiment while still being encompassed within the scope of the present disclosure.

Claims

1. A device comprising: a tamper-resistant material within an integrated circuit, the tamper-resistant material being coupled to a supply voltage of the integrated circuit and being configured to exhibit a change in at least one electrical characteristic in response to oxidation of the tamper-resistant material or exposure to electromagnetic radiation, and A sensor within the integrated circuit is configured to identify the change in the at least one electrical characteristic of the tamper-proof material and to generate an output signal in response to the change in the at least one electrical characteristic of the tamper-proof material.

2. The device of claim 1 , wherein the tamper-resistant material is coupled to a first node and a second node, the first node being configured to receive the supply voltage, the second node being configured to receive an input voltage, the input voltage comprising a voltage drop of the supply voltage across the tamper-resistant material, wherein the sensor is configured to identify the change in the at least one electrical characteristic of the tamper-resistant material based at least in part on a comparison of the input voltage with a reference voltage. 3 . The device of claim 1 , wherein the tamper-resistant material is configured to exhibit a change in resistance in response to oxidation of the tamper-resistant material.

4. The device of claim 1, wherein the tamper-resistant material comprises metal.

5. The device of claim 1, wherein the tamper-resistant material comprises partially oxidized titanium or unoxidized titanium.

6. The device of claim 1, wherein the tamper-resistant material is configured to exhibit an increase in electrical resistance in response to oxidation of the tamper-resistant material.

7. The device of claim 1, further comprising another tamper-resistant material coupled to the supply voltage and configured to exhibit a change in at least one electrical property in response to exposure to electromagnetic radiation or oxidation of the another tamper-resistant material.

8. The apparatus of claim 7, wherein: The another tamper-resistant material shares an interface with the tamper-resistant material; and The tamper-proof material is coupled to a first node configured to receive the supply voltage, and the other tamper-proof material is coupled to a second node configured to receive an input voltage, wherein the sensor is configured to identify the change in the at least one electrical characteristic of the tamper-proof material based at least in part on a comparison of the input voltage with a reference voltage.

9. The device of claim 7, wherein the another tamper-resistant material and the tamper-resistant material are physically separated from each other, and each of the tamper-resistant material and the another tamper-resistant material is coupled to a node configured to receive the supply voltage and to a node for receiving an input voltage.

10. The apparatus of any one of claims 1-9, further comprising logic configured to corrupt data stored in the integrated circuit in response to the output signal of the sensor.

11. The apparatus of any one of claims 1 to 9, further comprising at least one material formulated and configured to destroy at least a portion of the integrated circuit in response to the output signal of the sensor.

12. The apparatus of claim 11, wherein the at least one material comprises at least one etchant formulated and configured to remove at least a portion of at least one metal of the metal line.

13. The apparatus of any one of claims 1 to 9, further comprising a comparator configured to invert the output signal in response to the change in the at least one electrical characteristic.

14. The apparatus of any one of claims 1 to 9, wherein the sensor comprises a differential amplifier, the output signal comprising a difference between an input voltage at a first node and a reference voltage.

15. The apparatus of any one of claims 1-9, further comprising a fuse positioned between a node configured to receive a supply voltage and the tamper-resistant material.

16. The apparatus of claim 1, wherein the tamper-resistant material is positioned on a power-up block of the integrated circuit.

17. The device of claim 16, wherein the tamper-resistant material is configured to prevent a power-up signal from being provided by the power-up block in response to the change in the at least one electrical characteristic.

18. The device of claim 1, wherein the tamper-resistant material comprises copper, aluminum, nickel, magnesium, chromium, iron, cobalt, zinc, zirconium, ruthenium, silver, hafnium, tantalum, tungsten, iridium, gold, niobium, silicon, germanium, or combinations thereof.

19. The device of claim 1, wherein the tamper-resistant material comprises ammonium dichromate, one or more silver halides, or a photoconductive polymer.

20. An apparatus comprising: a resistor within the integrated circuit and coupled between a first node and a second node, the first node being configured to receive a supply voltage, the resistor comprising a material formulated and configured to exhibit a change in at least one electrical characteristic in response to exposure to oxygen, exposure to electromagnetic radiation, or both; The third node; as well as A sensor is located within the integrated circuit and is configured to compare a reference voltage at the third node with an input voltage at the second node.

21. The apparatus of claim 20, further comprising a comparator configured to generate an output signal indicative of the change in the at least one electrical characteristic in response to the input voltage exceeding the reference voltage.

22. The apparatus of claim 20, wherein the material comprises an elemental metal.

23. The apparatus of any one of claims 20 to 22, wherein the resistor comprises: a first material formulated and configured to exhibit a change in resistance in response to oxidation; as well as A second material is formulated and configured to exhibit a change in electrical resistance in response to exposure to electromagnetic radiation.

24. The apparatus of claim 23, wherein the first material and the second material share at least one interface.

25. The apparatus of any one of claims 20 to 22, wherein the resistor comprises a material formulated and configured to exhibit the change in the at least one electrical characteristic in response to oxidation, and the apparatus further comprises another resistor coupled between the third node and the fourth node, the other resistor comprising another material formulated and configured to exhibit the change in the at least one electrical characteristic in response to exposure to electromagnetic radiation.

26. A method comprising: applying a supply voltage at a first node coupled to a first end of a resistor within an integrated circuit of a memory device to generate an input voltage at a second node coupled to a second end of the resistor, the resistor comprising a tamper-resistant material formulated and configured to exhibit a change in resistance in response to a reverse engineering attempt; identifying, with a sensor, a change in at least one electrical property of the tamper-resistant material based at least in part on a relative change between the input voltage and a reference voltage at the resistor; generating, with the sensor, an output signal in response to the identified change in the at least one electrical characteristic; and The reverse engineering attempt is identified based on the output signal.

27. The method of claim 26, wherein generating an output signal comprises generating the output signal in response to a difference between the input voltage and the reference voltage exceeding a predetermined amount.

28. The method of claim 26 or claim 27, further comprising, in response to the output signal, at least one of: destroying at least a portion of an integrated circuit or erasing data stored in a memory of the integrated circuit.

29. The method of claim 26 or claim 27, further comprising providing the supply voltage to an integrated circuit in response to the relative change between the input voltage and the reference voltage being less than a predetermined amount.

30. An apparatus comprising: a tamper-resistant material within an integrated circuit, the tamper-resistant material configured to identify a reverse engineering attempt of the integrated circuit, the tamper-resistant material coupled to a supply voltage of the integrated circuit and configured to exhibit a change in at least one electrical characteristic in response to oxidation of the tamper-resistant material or exposure to electromagnetic radiation; and a sensor within the integrated circuit, the sensor configured to identify the change in the at least one electrical characteristic of the tamper-resistant material and to generate an output signal in response to the change in the at least one electrical characteristic of the tamper-resistant material; as well as A fuse is provided between a node and the tamper-resistant material, the node being configured to receive the supply voltage.

31. The apparatus of claim 30, wherein the fuse is configured to enable the sensor in response to application of a threshold voltage to the fuse.

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