Semiconductor structure and method for forming the same

Abstract

A semiconductor structure and a method for forming the same are disclosed. The method includes: providing a substrate; forming a plurality of mutually discrete magnetic tunnel junctions on the substrate, wherein the sidewall surfaces of the magnetic tunnel junctions have damage layers; forming a first dielectric film on the substrate surface, the top surface of the magnetic tunnel junctions, and the top surface of the damage layer; and after forming the first dielectric film, removing the damage layer using a first etching process. The method improves the performance of the formed semiconductor structure while removing the damage layer.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor structure and a forming method thereof. Background Art

[0002] MRAM (Magnetic Random Access Memory) is a non-volatile magnetic random access memory. It has the high-speed read and write capabilities of static random access memory (SRAM), the high integration of dynamic random access memory (DRAM) and much lower power consumption than DRAM. Compared with flash memory (Flash), its performance will not degrade with the increase of usage time. Due to the above characteristics of MRAM, it is called universal memory and is considered to be able to replace SRAM, DRAM, EEPROM and Flash.

[0003] Unlike traditional random access memory chip manufacturing technology, the data in MRAM is not stored in the form of charge or current, but in a magnetic state, and is sensed by measuring resistance without interfering with the magnetic state. MRAM uses a magnetic tunnel junction (MTJ) structure to store data. Generally speaking, an MRAM unit consists of a transistor (1T) and a magnetic tunnel junction (MTJ) to form a storage unit. The magnetic tunnel junction (MTJ) structure includes at least two electromagnetic layers and an insulating layer for isolating the two electromagnetic layers. The current flows vertically from one electromagnetic layer through the insulating layer or "through" another electromagnetic layer. One of the electromagnetic layers is a fixed magnetic layer, which fixes the electrode in a specific direction through a strong fixed field. The other electromagnetic layer is a freely rotatable magnetic layer that keeps the electrode on one side.

[0004] However, the performance of the magnetic tunnel junction prepared by the prior art is poor. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a semiconductor structure and a method for forming the same, so as to remove the damaged layer and improve the performance of the formed semiconductor structure.

[0006] In order to solve the above technical problems, the technical solution of the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a plurality of mutually discrete magnetic tunnel junctions on the substrate, and the side wall surfaces of the magnetic tunnel junctions have a damage layer; forming a first dielectric film on the surface of the substrate, the top surface of the magnetic tunnel junction and the top surface of the damage layer; after forming the first dielectric film, using a first etching process to remove the damage layer.

[0007] Optionally, the magnetic tunnel junction includes: a lower electromagnetic layer located on a portion of the substrate, an insulating layer located on a surface of the lower electromagnetic layer, and an upper electromagnetic layer located on a surface of the insulating layer.

[0008] Optionally, the method for forming the substrate and the magnetic tunnel junction includes: providing an initial substrate; forming a lower electromagnetic film on the initial substrate; forming an insulating film on the surface of the lower electromagnetic layer; forming an upper electromagnetic film on the surface of the insulating film; forming a mask layer on the surface of the upper electromagnetic film, the mask layer covering a portion of the surface of the upper electromagnetic film; using the mask layer as a mask, etching the upper electromagnetic film, the insulating film, the lower electromagnetic film and a portion of the initial substrate to form the substrate and the magnetic tunnel junction.

[0009] Optionally, a second etching process is adopted to etch the upper electromagnetic film, the insulating film, the lower electromagnetic film and part of the initial substrate using the mask layer as a mask; the second etching process includes: reactive ion etching or ion beam etching.

[0010] Optionally, the base includes a substrate and an electrode layer located on the surface of the substrate; the material of the electrode layer includes: one or a combination of titanium, tantalum, platinum, copper, tungsten, aluminum, titanium nitride, tantalum nitride and tungsten silicide.

[0011] Optionally, it also includes: in the process of forming the first dielectric film, forming a second dielectric film on the side wall surface of the damaged layer, and the first dielectric film has a first size in a direction perpendicular to the substrate surface, and the second dielectric film has a first size greater than the second size in a direction perpendicular to the side wall surface of the magnetic tunnel junction; the first etching process also includes: removing the second dielectric film; after removing the second dielectric film, removing the damaged layer.

[0012] Optionally, a material of the first dielectric film includes silicon oxide, silicon nitride, silicon carbide nitride, silicon boron nitride, silicon carbon nitride oxide, or silicon nitride oxide.

[0013] Optionally, a material of the second dielectric film includes silicon oxide, silicon nitride, silicon carbide nitride, silicon boron nitride, silicon carbon nitride oxide, or silicon nitride oxide.

[0014] Optionally, the process for forming the first dielectric film includes: chemical vapor deposition process, physical vapor deposition process or gas cluster ion beam deposition process; the process for forming the second dielectric film includes: chemical vapor deposition process, physical vapor deposition process or gas cluster ion beam deposition process.

[0015] Optionally, the process for forming the first dielectric film and the second dielectric film is a gas cluster ion beam deposition process; the parameters of the gas cluster ion beam deposition process include: the gas introduced includes SiH4, Si2H6, Si2H2Cl2, SiCl3H, SiC4H12 or SiF4, and may also include diluent gases such as N2, NH3, NF3, NO, N2O or C X H Y , where x is a natural number greater than 1, y is a natural number greater than 1, the ion energy is 130 electron volts to 1000 electron volts, and the angle range is 60 degrees to 90 degrees.

[0016] Optionally, the first dielectric film is etched during the process of removing the damaged layer by using the first etching process, so as to form a first dielectric layer on the surface of the substrate and the top surface of the magnetic tunnel junction.

[0017] Optionally, the first etching process is ion beam etching; the process parameters of the ion beam etching include: the gas used includes argon Ar, Ne or Xe, the time is 50 seconds to 300 seconds, the flow rate is 5 standard ml / min-200 standard ml / min, and the angle range between the ion beam and the substrate surface is 55 degrees to 88 degrees.

[0018] Optionally, the first etching process has a first etching rate for the first dielectric film in a direction parallel to the substrate surface, and has a second etching rate for the second dielectric film in a direction perpendicular to the substrate surface, and the first etching rate is greater than the second etching rate.

[0019] Optionally, the material of the lower electromagnetic layer includes: one or a combination of iron, cobalt, nickel, cobalt-iron-boron, cobalt-iron, nickel-iron and lanthanum-stron-manganese-oxide.

[0020] Optionally, the material of the insulating layer includes: one or a combination of magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide and zirconium dioxide.

[0021] Optionally, the material of the upper electromagnetic layer includes: one or a combination of iron, cobalt, nickel, cobalt-iron-boron, cobalt-iron, nickel-iron and lanthanum-stron-manganese-oxide.

[0022] Optionally, the thickness of the first dielectric film ranges from 50 angstroms to 400 angstroms.

[0023] Correspondingly, the technical solution of the present invention also provides a semiconductor structure formed by any of the above methods.

[0024] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0025] In the method for forming a semiconductor structure provided by the technical solution of the present invention, a first etching process is used to remove the damaged layer. Since the substrate surface has a first dielectric film, the first dielectric film can protect the substrate surface, thereby avoiding etching of the substrate surface, resulting in secondary deposition of etching by-products on the side wall surface of the magnetic tunnel junction, so that the performance of the formed semiconductor structure is better.

[0026] Furthermore, by adjusting the process parameters of the ion beam etching process, the angle between the ion beam and the substrate surface is in the range of 50 degrees to 88 degrees, that is, the angle between the ion beam and the substrate surface is relatively large. As semiconductor devices develop towards higher integration, when the distance between adjacent magnetic tunnel junctions is getting smaller and smaller, when the angle between the ion beam and the substrate surface is relatively large, the influence of the adjacent magnetic tunnel junction on the ion beam can be reduced, so that the damaged layer on the side wall surface of the magnetic tunnel junction can be fully removed, so that the performance of the formed semiconductor structure is better. In addition, since the second dielectric film has a second size, the first dielectric film has a first size, and the first size is larger than the second size, although the etching rate of the second dielectric film by the first etching process is greater than the etching rate of the first dielectric film, the first dielectric film with a sufficiently thick thickness can ensure that when the first etching process removes the second dielectric film and the damaged layer and exposes the side wall surface of the magnetic tunnel junction, a portion of the first dielectric film is still retained on the substrate surface, thereby avoiding etching of the substrate, resulting in secondary deposition of etching byproducts on the side wall surface of the magnetic tunnel junction, so that the performance of the formed semiconductor structure is better.

[0027] Furthermore, the thickness of the first dielectric film is in the range of 50 angstroms to 400 angstroms. The significance of selecting the thickness range is that if the thickness of the first dielectric film is less than 50 angstroms, the first dielectric film that is too thin still cannot fully protect the substrate surface and play a role in avoiding etching damage to the substrate; if the thickness of the first dielectric film is greater than 400 angstroms, while the substrate surface is protected, on the one hand, the formation of a first dielectric film that is too thick is likely to cause a waste of cost, and on the other hand, it increases the time and cost of subsequent removal of the first dielectric film. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figures 1 to 3 It is a structural schematic diagram of each step of a method for forming a magnetic tunnel junction;

[0029] Figures 4 to 8 It is a structural schematic diagram of each step of a method for forming a semiconductor structure in one embodiment of the present invention. DETAILED DESCRIPTION

[0030] As described in the background art, the performance of existing magnetic tunnel junctions is relatively poor.

[0031] The following is a detailed description of the reasons for the poor performance of the magnetic tunnel junction with reference to the accompanying drawings. Figures 1 to 3 The present invention is a structural schematic diagram of each step of a method for forming a magnetic tunnel junction.

[0032] Figures 1 to 3 The present invention is a structural schematic diagram of each step of a method for forming a magnetic tunnel junction.

[0033] Please refer to Figure 1 , providing a substrate 100, a portion of the substrate 100 having a magnetic tunnel junction 110, and a sidewall surface of the magnetic tunnel junction 110 having a damaged layer 120.

[0034] Please refer to Figure 2 A dielectric layer 130 is formed on the surface of the substrate 100 , the surface of the damaged layer 120 , and the top surface of the magnetic tunnel junction 110 .

[0035] Please refer to Figure 3 After forming the dielectric layer 130 , an ion beam etching process is used to etch the dielectric layer 130 and the damaged layer 120 until the side wall surface of the magnetic tunnel junction 110 is exposed.

[0036] In the above method, by adjusting the parameters of the ion beam etching process so that the angle between the ion beam and the direction parallel to the surface of the substrate 100 is less than 40 degrees, the etching rate in the direction parallel to the surface of the substrate 100 can be greater than the etching rate in the direction perpendicular to the surface of the substrate 100, thereby removing the damaged layer 120 without etching the surface of the substrate 100.

[0037] However, on the one hand, when the angle between the ion beam and the direction parallel to the surface of the substrate 100 is large, the etching rate in the direction parallel to the surface of the substrate 100 is less than the etching rate in the direction perpendicular to the surface of the substrate 100. When the ion beam etching process removes the damaged layer 120, it will also cause etching on the surface of the substrate 100, causing etching byproducts to still be deposited on the sidewall surface of the magnetic tunnel junction 110, so that the performance of the formed magnetic tunnel junction 110 is still poor. On the other hand, as semiconductor devices develop towards a higher degree of integration, the distance between adjacent magnetic tunnel junctions 110 is required to be smaller and smaller. When the angle between the ion beam and the direction parallel to the surface of the substrate 100 is small, due to the obstruction of the adjacent magnetic tunnel junction 110, the ion beam etching process can only remove the damaged layer near the top of the magnetic tunnel junction 110, so that the performance of the formed magnetic tunnel junction 110 is still poor.

[0038] To solve the technical problem, an embodiment of the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a plurality of mutually discrete magnetic tunnel junctions on the substrate, wherein the sidewall surfaces of the magnetic tunnel junctions have a damage layer; forming a first dielectric film on the substrate surface, the top surface of the magnetic tunnel junction, and the top surface of the damage layer; after forming the first dielectric film, using a first etching process to remove the damage layer. The method can improve the performance of the formed semiconductor structure while removing the damage layer.

[0039] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0040] Figures 4 to 8 It is a structural schematic diagram of each step of a method for forming a semiconductor structure in one embodiment of the present invention.

[0041] Providing a substrate; forming a plurality of mutually discrete magnetic tunnel junctions on the substrate, wherein the sidewall surface of the magnetic tunnel junction has a damaged layer. For the specific process of forming the substrate and the magnetic tunnel junction, please refer to Figures 4 to 6 .

[0042] Please refer to Figure 4 , providing an initial substrate 200.

[0043] In this embodiment, the initial base 200 includes an initial substrate 201 and an electrode film 202 located on the surface of the initial substrate 201 .

[0044] The material of the initial substrate 201 is a semiconductor material. In this embodiment, the material of the initial substrate 201 is silicon. In other embodiments, the material of the initial substrate includes silicon carbide, silicon germanium, a multinary semiconductor material composed of group III-V elements, silicon on insulator (SOI) or germanium on insulator. Among them, the multinary semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs or InGaAsP.

[0045] The material of the electrode film 202 includes: one or a combination of titanium, tantalum, platinum, copper, tungsten, aluminum, titanium nitride, tantalum nitride and tungsten silicide.

[0046] In this embodiment, the material of the electrode film 202 is tungsten.

[0047] Please refer to Figure 5 , a lower electromagnetic film 211 is formed on the initial substrate 200 ; an insulating film 212 is formed on the surface of the lower electromagnetic film 211 ; and an upper electromagnetic film 213 is formed on the surface of the insulating film 212 .

[0048] The lower electromagnetic film 211 provides materials for subsequently forming a lower electromagnetic layer, the insulating film 212 provides materials for subsequently forming an insulating layer, and the upper electromagnetic film 213 provides materials for subsequently forming an upper electromagnetic layer.

[0049] The material of the lower electromagnetic film 211 includes: one or a combination of iron, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide.

[0050] In this embodiment, the lower electromagnetic film 211 is a single-layer structure, and the material of the lower electromagnetic film 211 is cobalt iron boron.

[0051] In other embodiments, the lower electromagnetic film may also be a stacked layer formed by the above materials.

[0052] The material of the insulating film 212 includes: one or a combination of magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide and zirconium dioxide.

[0053] In this embodiment, the material of the insulating film 212 is magnesium oxide.

[0054] The material of the upper electromagnetic film 213 includes: one or a combination of iron, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron or lanthanum strontium manganese oxide.

[0055] In this embodiment, the material of the upper electromagnetic film 213 is the same as that of the lower electromagnetic film 211 , which is cobalt iron boron.

[0056] In other embodiments, the material of the upper electromagnetic film and the material of the lower electromagnetic film may be different.

[0057] Please refer to Figure 6 , a mask layer 220 is formed on the surface of the upper electromagnetic film 213, and the mask layer 220 covers a portion of the surface of the upper electromagnetic film 213; using the mask layer 220 as a mask, the upper electromagnetic film 213, the insulating film 212, the lower electromagnetic film 211 and a portion of the initial substrate 200 are etched to form the substrate 240 and the magnetic tunnel junction 230.

[0058] In this embodiment, the mask layer 220 is used as a mask to etch the upper electromagnetic film 213, the insulating film 212, the lower electromagnetic film 211 and the electrode film 202, so that the upper electromagnetic film 213 forms an upper electromagnetic layer 233, the insulating film 212 forms an insulating layer 232, the lower electromagnetic film 211 forms a lower electromagnetic layer 231, and the electrode film 202 forms an electrode layer 242.

[0059] The magnetic tunnel junction 230 includes: a lower electromagnetic layer 231 located on a portion of the substrate 230 , an insulating layer 232 located on a surface of the lower electromagnetic layer 231 , and an upper electromagnetic layer 233 located on a surface of the insulating layer 232 .

[0060] The insulating layer 232 is used as a pass-through barrier between the upper electromagnetic layer 233 and the line electromagnetic layer 231 .

[0061] The logic “0” or the logic “1” can be determined by the two states that the magnetization directions of the upper electromagnetic layer 233 and the lower electromagnetic layer 231 are the same or different.

[0062] In this embodiment, the base 240 includes a substrate 242 and an electrode layer 241 , and the electrode layer 241 is located on a portion of the surface of the substrate 242 .

[0063] The lower electromagnetic layer 231 is formed by etching the lower electromagnetic film 211. Accordingly, the material of the lower electromagnetic layer 231 includes: one or a combination of iron, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide.

[0064] Similarly, the material of the insulating layer 232 includes: one or a combination of magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide and zirconium dioxide.

[0065] Similarly, the material of the upper electromagnetic layer 233 includes: one or a combination of iron, cobalt, nickel, cobalt-iron-boron, cobalt-iron, nickel-iron and lanthanum-stron-manganese-oxide.

[0066] A second etching process is adopted to etch the upper electromagnetic film 213 , the insulating film 212 , the lower electromagnetic film 211 and a portion of the initial substrate 200 using the mask layer 220 as a mask.

[0067] The second etching process includes: reactive ion etching or ion beam etching.

[0068] It should be noted that during the process of forming the magnetic tunnel junction 230 by the second etching process, a damaged layer 250 is usually formed on the side wall surface of the magnetic tunnel junction 230 .

[0069] When the upper electromagnetic film 213, the insulating film 212 and the lower electromagnetic film 211 are etched by the reactive ion etching process, the exposed side wall surface of the upper electromagnetic film 213, the side wall surface of the insulating film 212 and the side wall surface of the lower electromagnetic film 211 will be etched, so that the side wall surface of the magnetic tunnel junction 230 finally formed has a damage layer 250.

[0070] When the upper electromagnetic film 213, the insulating film 212 and the lower electromagnetic film 211 are etched by an ion beam etching process, in order to ensure sufficient etching, the initial substrate 200 located at the bottom of the lower electromagnetic film 211 will be over-etched to a certain extent, which will cause the etching by-products to be easily deposited on the side wall surface of the finally formed magnetic tunnel junction 230, that is, the secondary deposition of by-products occurs, and thus, the side wall surface of the finally formed magnetic tunnel junction 230 has a damaged layer 250.

[0071] In this embodiment, the second etching process is a reactive ion etching process. After the reactive ion etching process, a magnetic tunnel junction 230 is formed, and a damage layer 250 is formed on the sidewall surface of the magnetic tunnel junction.

[0072] In this embodiment, after the substrate 240 and the magnetic tunnel junction 230 are formed, the step further includes: removing the mask layer 220 .

[0073] Please refer to Figure 7 A first dielectric film 260 is formed on the surface of the substrate 240 , the top surface of the magnetic tunnel junction 230 , and the top surface of the damaged layer 250 .

[0074] In this embodiment, the process of forming the first dielectric film 260 further includes: forming a second dielectric film 270 on the side wall surface of the damaged layer 250, and the first dielectric film 260 has a first size H1 in a direction perpendicular to the surface of the substrate 240, and the second dielectric film 270 has a second size H2 in a direction perpendicular to the side wall surface of the magnetic tunnel junction 230, and the first size H1 is greater than the second size H2.

[0075] The material of the first dielectric film 260 includes silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbonitride oxide or silicon nitride oxide.

[0076] The material of the second dielectric film 270 includes silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbonitride oxide or silicon nitride oxide.

[0077] In this embodiment, the material of the first dielectric film 260 and the material of the second dielectric film 270 are the same, both of which are silicon nitride.

[0078] In other embodiments, the material of the first dielectric film 260 may be different from the material of the second dielectric film 270 .

[0079] The process for forming the first dielectric film 260 includes: chemical vapor deposition process, physical vapor deposition process or gas cluster ion beam deposition process; the process for forming the second dielectric film 270 includes: chemical vapor deposition process, physical vapor deposition process or gas cluster ion beam deposition process

[0080] In this embodiment, the process for forming the first dielectric film 260 and the second dielectric film 270 is a gas cluster ion beam deposition process; the parameters of the gas cluster ion beam deposition process include: the gases introduced include SiH4, Si2H6, Si2H2Cl2, SiCl3H, SiC4H 12 or SiF4, and may also include diluent gases such as N2, NH3, NF3, NO, N2O or C X H Y , where x is a natural number greater than 1, y is a natural number greater than 1, the ion energy is 130 electron volts to 1000 electron volts, and the angle range is 60 degrees to 90 degrees.

[0081] The reason for selecting the angle range is that when the incident direction of the gas introduced in the gas cluster ion beam deposition process and the surface direction of the substrate 240 are between 60 and 90 degrees, it is beneficial to make the thickness of the material deposited in the direction perpendicular to the surface of the substrate 240 greater than the thickness of the material deposited in the direction parallel to the surface of the substrate 240, that is, the first size H1 of the first dielectric film 260 is greater than the second size H2 of the second dielectric film 270.

[0082] In other embodiments, the first dielectric film is formed only on the substrate surface, the top surface of the magnetic tunnel junction, and the top surface of the damaged layer, and the sidewall surface of the magnetic tunnel junction does not have the second dielectric film.

[0083] It should be noted that the angle refers to the angle between the incident direction of the gas cluster and the surface direction of the substrate 240 .

[0084] The thickness of the first dielectric film 260 is in the range of 50 angstroms to 400 angstroms.

[0085] The significance of selecting the thickness range of the first dielectric film 260 is that: if the thickness of the first dielectric film 260 is less than 50 angstroms, the first dielectric film 260 that is too thin still cannot fully protect the surface of the substrate 240 and play a role in avoiding etching damage to the substrate 240; if the thickness of the first dielectric film 260 is greater than 400 angstroms, while satisfying the protection effect on the surface of the substrate 240, on the one hand, forming a first dielectric film 260 that is too thick is likely to cause a waste of cost, and on the other hand, it will also increase the time and cost of subsequent removal of the first dielectric film 260.

[0086] Please refer to Figure 8 After forming the first dielectric film 260 , a first etching process is used to remove the damaged layer 250 .

[0087] The first etching process is adopted to remove the damaged layer 250 , and the first dielectric film 260 is also etched to form a first dielectric layer 261 on the surface of the substrate 240 and the top surface of the magnetic tunnel junction 230 .

[0088] In the process of removing the damaged layer 250 by using the first etching process, since the surface of the substrate 240 has the first dielectric film 250, the first dielectric film 250 can protect the surface of the substrate 240, thereby avoiding etching of the surface of the substrate 240, resulting in secondary deposition of etching byproducts on the side wall surface of the magnetic tunnel junction 230, so that the performance of the formed semiconductor structure is better.

[0089] In this embodiment, since the sidewall surface of the damaged layer 250 also has a second dielectric film 270, the first etching process further includes: removing the second dielectric film 270; after removing the second dielectric film 270, removing the damaged layer 250. In addition, since the first dielectric film 260 has a first size H1 in a direction perpendicular to the surface of the substrate 240, and the second dielectric film 270 has a second size H2 in a direction perpendicular to the sidewall surface of the magnetic tunnel junction 230, and the first size H1 is greater than the second size H2, when the first etching process removes the second dielectric film 270 and exposes the surface of the damaged layer 250, it is beneficial to ensure that the surface of the substrate 240 has a first dielectric film 260 of a certain thickness, so that the retained first dielectric film 260 can protect the surface of the substrate 240.

[0090] In this embodiment, the first etching process is ion beam etching; the process parameters of the ion beam etching include: the gas used includes argon Ar, Ne or Xe, the time is 50 seconds to 300 seconds, the flow rate is 5 standard ml / min-200 standard ml / min, and the angle range between the ion beam and the substrate surface is 55 degrees to 88 degrees.

[0091] When the angle between the ion beam and the substrate surface is in the range of 55 degrees to 88 degrees, the first etching process has a first etching rate for the first dielectric film 260 in a direction parallel to the surface of the substrate 240, and has a second etching rate for the second dielectric film 270 in a direction perpendicular to the surface of the substrate 240, and the first etching rate is greater than the second etching rate.

[0092] By adjusting the process parameters of the ion beam etching process, the angle between the ion beam and the surface of the substrate 240 is in the range of 50 degrees to 88 degrees, that is, the angle between the ion beam and the surface of the substrate 240 is relatively large. As semiconductor devices develop towards higher integration, when the distance between adjacent magnetic tunnel junctions 230 is relatively small, when the angle between the ion beam and the surface of the substrate 240 is relatively large, the influence of the adjacent magnetic tunnel junctions 230 on the ion beam being blocked can be reduced, so that the damaged layer 250 located on the side wall surface of the magnetic tunnel junction 230 can be fully removed, so that the performance of the formed semiconductor structure is relatively good. Furthermore, since the second dielectric film 270 has a second size H2, the first dielectric film 260 has a first size H1, and the first size H1 is greater than the second size H2, although the etching rate of the second dielectric film 270 in the first etching process is greater than the etching rate of the first dielectric film 260, the first dielectric film 260 having a sufficiently thick thickness can ensure that when the second dielectric film 270 and the damaged layer 250 are removed by the first etching process to expose the side wall surface of the magnetic tunnel junction 230, a portion of the first dielectric film 260 is still retained on the surface of the substrate 240, thereby avoiding etching of the substrate 240, resulting in secondary deposition of etching byproducts on the side wall surface of the magnetic tunnel junction 230, so that the performance of the formed semiconductor structure is better.

[0093] Correspondingly, an embodiment of the present invention further provides a semiconductor structure formed by the above method.

[0094] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; Reactive ion etching or ion beam etching is used to form a plurality of mutually discrete magnetic tunnel junctions on the substrate, and the side wall surfaces of the magnetic tunnel junctions have a damage layer; forming a first dielectric film on the substrate surface, the top surface of the magnetic tunnel junction and the top surface of the damaged layer, and forming a second dielectric film on the side wall surface of the damaged layer during the process of forming the first dielectric film; After forming the first dielectric film, a first etching process is used to remove the second dielectric film and the damaged layer. The first etching process is ion beam etching. The process parameters of the ion beam etching include: the gas used includes argon Ar, Ne or Xe, the time is 50 seconds to 300 seconds, the flow rate is 5 standard ml / min-200 standard ml / min, the angle between the ion beam and the substrate surface is in the range of 55 degrees to 88 degrees, the first dielectric film has a first size in a direction perpendicular to the substrate surface, the second dielectric film has a second size in a direction perpendicular to the magnetic tunnel junction side wall surface, and the first size is greater than the second size so that the first etching process stops in the first dielectric film.

2. The method for forming a semiconductor structure according to claim 1, wherein: The magnetic tunnel junction includes: a lower electromagnetic layer located on a portion of the substrate, an insulating layer located on the surface of the lower electromagnetic layer, and an upper electromagnetic layer located on the surface of the insulating layer.

3. The method for forming a semiconductor structure according to claim 1 or 2, wherein: The method for forming the substrate and the magnetic tunnel junction includes: providing an initial substrate; forming a lower electromagnetic film on the initial substrate; forming an insulating film on the surface of the lower electromagnetic film; forming an upper electromagnetic film on the surface of the insulating film; forming a mask layer on the surface of the upper electromagnetic film, wherein the mask layer covers a portion of the surface of the upper electromagnetic film; using the mask layer as a mask, etching the upper electromagnetic film, the insulating film, the lower electromagnetic film and a portion of the initial substrate to form the substrate and the magnetic tunnel junction.

4. The method for forming a semiconductor structure according to claim 3, wherein: Using a second etching process, using the mask layer as a mask, etching the upper electromagnetic film, the insulating film, the lower electromagnetic film and part of the initial substrate; The second etching process includes: reactive ion etching or ion beam etching.

5. The method for forming a semiconductor structure according to claim 1, wherein: The base comprises a substrate and an electrode layer located on the surface of the substrate; the material of the electrode layer comprises: one or a combination of titanium, tantalum, platinum, copper, tungsten, aluminum, titanium nitride, tantalum nitride and tungsten silicide.

6. The method for forming a semiconductor structure according to claim 1, wherein: The first etching process further includes: removing the second dielectric film; and removing the damaged layer after removing the second dielectric film.

7. The method for forming a semiconductor structure according to claim 1, wherein: The material of the first dielectric film includes silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbonitride oxide or silicon nitride oxide.

8. The method for forming a semiconductor structure according to claim 6, wherein: The material of the second dielectric film includes silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbonitride oxide or silicon nitride oxide.

9. The method for forming a semiconductor structure according to claim 6, wherein: The process for forming the first dielectric film includes: chemical vapor deposition process, physical vapor deposition process or gas cluster ion beam deposition process; the process for forming the second dielectric film includes: chemical vapor deposition process, physical vapor deposition process or gas cluster ion beam deposition process.

10. The method for forming a semiconductor structure according to claim 9, wherein: The process for forming the first dielectric film and the second dielectric film is a gas cluster ion beam deposition process; the parameters of the gas cluster ion beam deposition process include: the gases introduced include SiH4, Si2H6, Si2H2Cl2, SiCl3H, SiC4H 12 or SiF4, and also includes a diluent gas, wherein the diluent gas is N2, NH3, NF3, NO, N2O or C X H Y , where x is a natural number greater than 1, and y is a natural number greater than 1; the ion energy is 130 electron volts to 1000 electron volts, and the angle range is 60 degrees to 90 degrees.

11. The method for forming a semiconductor structure according to claim 1 or 6, characterized in that: The first dielectric film is etched during the process of removing the damaged layer by using the first etching process, so as to form a first dielectric layer on the surface of the substrate and the top surface of the magnetic tunnel junction.

12. The method for forming a semiconductor structure according to claim 1, wherein: The first etching process has a first etching rate for the first dielectric film in a direction parallel to the substrate surface, and has a second etching rate for the second dielectric film in a direction perpendicular to the substrate surface, and the first etching rate is greater than the second etching rate.

13. The method for forming a semiconductor structure according to claim 2, wherein: The material of the lower electromagnetic layer includes: one or a combination of iron, cobalt, nickel, cobalt-iron-boron, cobalt-iron, nickel-iron and lanthanum-stron-manganese-oxide.

14. The method for forming a semiconductor structure according to claim 2, wherein: The material of the insulating layer includes: one or a combination of magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide and zirconium dioxide.

15. The method for forming a semiconductor structure according to claim 2, wherein: The material of the upper electromagnetic layer includes: one or a combination of iron, cobalt, nickel, cobalt-iron-boron, cobalt-iron, nickel-iron and lanthanum-stron-manganese-oxide.

16. The method for forming a semiconductor structure according to claim 1, wherein: The thickness of the first dielectric film ranges from 50 angstroms to 400 angstroms.

17. A semiconductor structure formed by the forming method according to any one of claims 1 to 16.

Images