Semiconductor device and display device including the same

Abstract

The present invention relates to a semiconductor device and a display device including the semiconductor device. In a semiconductor device including an oxide semiconductor, changes in electrical characteristics can be suppressed and reliability can be improved. One embodiment of the present invention is a semiconductor device including an oxide semiconductor film, including: a first insulating film; an oxide semiconductor film above the first insulating film; a second insulating film above the oxide semiconductor film; a third insulating film above the second insulating film, wherein the second insulating film contains oxygen and silicon, the third insulating film contains nitrogen and silicon, and indium is contained near the interface between the second insulating film and the third insulating film.

Description

[0001] This application is a divisional application of Chinese patent application 201580033176.X, whose application date is June 9, 2015 and whose invention name is “Semiconductor device and display device including the semiconductor device”. Technical Field

[0002] One embodiment of the present invention relates to a semiconductor device including an oxide semiconductor film and a display device including the semiconductor device.

[0003] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. The technical field of one embodiment of the invention disclosed in this specification, etc. relates to an object, method or manufacturing method. In addition, the present invention relates to a process, machine, product or composition of matter. One embodiment of the present invention particularly relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, a driving method of these devices or a manufacturing method of these devices. Background Art

[0004] Technology that uses a semiconductor film formed on a substrate with an insulating surface to form a transistor (also called a field effect transistor (FET) or a thin film transistor (TFT)) has attracted attention. The transistor is widely used in electronic devices such as integrated circuits (ICs) and image display devices (display devices). As semiconductor films that can be applied to transistors, semiconductor materials represented by silicon are well known. As other materials, oxide semiconductors have attracted attention (for example, Patent Document 1).

[0005] Furthermore, a semiconductor device is disclosed in which an insulating layer that releases oxygen by heating is used as a base insulating layer of an oxide semiconductor layer in which a channel is formed, thereby reducing oxygen vacancies in the oxide semiconductor layer (for example, Patent Document 2).

[0006] [References]

[0007] [Patent Document]

[0008] [Patent Document 1] Japanese Patent Application Publication No. 2006-165529

[0009] [Patent Document 2] Japanese Patent Application Publication No. 2012-009836 Summary of the invention

[0010] When an oxide semiconductor film is used to manufacture a transistor in the channel region, oxygen vacancies formed in the channel region of the oxide semiconductor film affect the transistor characteristics, so it becomes a problem. For example, when oxygen vacancies are formed in the channel region of the oxide semiconductor film, the oxygen vacancies bond with hydrogen to become a carrier supply source. When a carrier supply source is formed in the channel region of the oxide semiconductor film, changes in the electrical characteristics of the transistor having the oxide semiconductor film occur, typically a drift in the threshold voltage occurs. In addition, there is a problem of uneven electrical characteristics of each transistor. Therefore, in the channel region of the oxide semiconductor film, the fewer oxygen vacancies, the better.

[0011] In view of the above problems, one of the purposes of one embodiment of the present invention is to suppress the variation of electrical characteristics and improve reliability in a semiconductor device including an oxide semiconductor. Another purpose of one embodiment of the present invention is to provide a semiconductor device with reduced power consumption. Another purpose of one embodiment of the present invention is to provide a new semiconductor device. Another purpose of one embodiment of the present invention is to provide a new display device.

[0012] Note that the description of the above-mentioned objects does not prevent the existence of other objects. One mode of the present invention does not need to achieve all of the above-mentioned objects. Objects other than the above-mentioned objects are obvious from the description of the specification and can be extracted from the description.

[0013] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film, including: a first insulating film; an oxide semiconductor film above the first insulating film; a second insulating film above the oxide semiconductor film; and a third insulating film above the second insulating film. The second insulating film contains oxygen and silicon, the third insulating film contains nitrogen and silicon, and contains indium near the interface between the second insulating film and the third insulating film.

[0014] Another embodiment of the present invention is a semiconductor device including an oxide semiconductor film, including: a gate electrode; a first insulating film above the gate electrode; an oxide semiconductor film above the first insulating film; a source electrode electrically connected to the oxide semiconductor film; a drain electrode electrically connected to the oxide semiconductor film; a second insulating film above the oxide semiconductor film, the source electrode, and the drain electrode; and a third insulating film above the second insulating film. The second insulating film contains oxygen and silicon, the third insulating film contains nitrogen and silicon, and contains indium near the interface between the second insulating film and the third insulating film.

[0015] In each of the above structures, indium is preferably detected by secondary ion mass spectrometry.

[0016] In each of the above structures, the oxide semiconductor film preferably contains oxygen, In, Zn and M (M is Ti, Ga, Sn, Y, Zr, La, Ce, Nd or Hf). In addition, in each of the above structures, it is preferred that the oxide semiconductor film has a crystalline portion, and the crystalline portion has a portion whose c-axis is parallel to the normal vector of the surface on which the oxide semiconductor film is formed.

[0017] Another embodiment of the present invention is a display device including a semiconductor device according to any one of the above structures and a display element. Another embodiment of the present invention is a display module including the display device and a touch sensor. In addition, another embodiment of the present invention is an electronic device including: a semiconductor device according to any one of the above structures, the display device or the display module; and an operation key or a battery.

[0018] According to one embodiment of the present invention, in a semiconductor device including an oxide semiconductor, changes in electrical characteristics can be suppressed and reliability can be improved. According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a new semiconductor device can be provided. In addition, according to one embodiment of the present invention, a new display device can be provided.

[0019] Note that the description of these effects does not prevent the existence of other effects. In addition, one mode of the present invention does not need to have all of the above effects. Effects other than the above effects are obvious from the description of the specification, drawings, claims, etc., and can be extracted from the description. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figures 1A to 1C A top view and a cross-sectional view showing one embodiment of a semiconductor device;

[0021] FIG. 2A to FIG. 2D is a cross-sectional view showing an example of a manufacturing process of a semiconductor device and one embodiment of a semiconductor device;

[0022] Figure 3A and Figure 3B is a graph illustrating the results of SIMS analysis;

[0023] FIG. 4A to FIG. 4C A top view and a cross-sectional view showing one embodiment of a semiconductor device;

[0024] FIG. 5A to FIG. 5C A top view and a cross-sectional view showing one embodiment of a semiconductor device;

[0025] FIG. 6A to FIG. 6C A top view and a cross-sectional view showing one embodiment of a semiconductor device;

[0026] FIG. 7A to FIG. 7Dis a cross-sectional view showing one embodiment of a semiconductor device;

[0027] Fig. 8A and Figure 8B is a diagram illustrating the band structure;

[0028] 9A to 9D is a cross-sectional view showing an example of a manufacturing process of a semiconductor device;

[0029] FIG. 10A to FIG. 10D is a cross-sectional view showing an example of a manufacturing process of a semiconductor device;

[0030] FIG. 11A to FIG. 11D is a cross-sectional view showing an example of a manufacturing process of a semiconductor device;

[0031] Fig. 12A and Fig. 12B is a cross-sectional view showing an example of a manufacturing process of a semiconductor device;

[0032] FIG. 13A to FIG. 13D is a cross-sectional view showing an example of a manufacturing process of a semiconductor device;

[0033] FIG. 14A to FIG. 14D is a cross-sectional view showing an example of a manufacturing process of a semiconductor device;

[0034] Fig.15 is a top view showing one aspect of a display device;

[0035] Fig.16 is a cross-sectional view showing one embodiment of a display device;

[0036] Fig.17 is a cross-sectional view showing one embodiment of a display device;

[0037] 18A to 18C is a block diagram and circuit diagram illustrating a display device;

[0038] Fig.19 is a diagram illustrating a display module;

[0039] FIG. 20A to FIG. 20G is a diagram illustrating an electronic device;

[0040] FIG. 21A to FIG. 21C is a cross-sectional view illustrating the structure of an analysis sample and a transistor in an embodiment;

[0041] Fig.22A and Fig. 22B is a diagram illustrating the results of SIMS analysis in Examples;

[0042] Fig.23A and Fig. 23B It is a diagram illustrating the electrical characteristics of the transistor in the embodiment. DETAILED DESCRIPTION

[0043] The following describes the embodiments with reference to the accompanying drawings. However, a person skilled in the art can easily understand that the embodiments can be implemented in a plurality of different forms, and the methods and details can be transformed into various forms without departing from the purpose and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the contents described in the following embodiments.

[0044] In the accompanying drawings, for the sake of clarity, the size, thickness of the layer or the region are sometimes exaggerated. Therefore, the present invention is not necessarily limited to the above-mentioned dimensions. In addition, in the accompanying drawings, ideal examples are schematically shown, so the present invention is not limited to the shapes or numerical values ​​shown in the accompanying drawings.

[0045] In addition, in this specification, for the sake of convenience, ordinal numbers such as first and second are added, but they do not indicate the order of processes or the order of stacking. Therefore, for example, "first" can be appropriately replaced with "second" or "third" for description. In addition, the ordinal numbers recorded in this specification and the like are sometimes inconsistent with the ordinal numbers used to specify one embodiment of the present invention.

[0046] In this specification, for the sake of convenience, words and phrases such as "above", "upper", "below", and "lower" that indicate configuration are used to explain the positional relationship of the components with reference to the drawings. In addition, the positional relationship of the components is appropriately changed according to the direction in which each component is described. Therefore, the words and phrases described in this specification are not limited and can be appropriately replaced according to the situation.

[0047] In addition, in this specification, etc., semiconductor devices refer to all devices that can work by utilizing semiconductor characteristics. In addition to semiconductor elements such as transistors, semiconductor circuits, computing devices, or storage devices are also a form of semiconductor devices. Imaging devices, display devices, liquid crystal display devices, light-emitting devices, electro-optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.) and electronic devices sometimes include semiconductor devices.

[0048] In this specification, etc., a transistor refers to an element including at least three terminals: a gate, a drain, and a source. A transistor has a channel region between a drain (drain terminal, a drain region, or a drain electrode) and a source (source terminal, a source region, or a source electrode), and current can flow through the drain, the channel region, and the source. Note that in this specification, etc., a channel region refers to a region where current mainly flows.

[0049] In addition, when transistors with different polarities are used or when the direction of current changes during circuit operation, the functions of the source and the drain may be interchanged. Therefore, in this specification, etc., the source and the drain may be interchanged.

[0050] In this specification, etc., "electrical connection" includes connection through "an element having some kind of electrical function". Here, "an element having some kind of electrical function" is not particularly limited as long as it can transmit and receive electrical signals between the connected objects. For example, "an element having some kind of electrical function" includes not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0051] In this specification and the like, a “silicon oxynitride film” refers to a film containing more oxygen than nitrogen in its composition, and a “silicon nitride oxide film” refers to a film containing more nitrogen than oxygen in its composition.

[0052] In addition, in this specification, etc., depending on the situation and circumstances, "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced with "conductive film" in some cases. Also, for example, "insulating film" may be replaced with "insulating layer" in some cases.

[0053] In this specification, "parallel" refers to a state where the angle formed by two straight lines is greater than -10° and less than 10°, and therefore, also includes a state where the angle is greater than -5° and less than 5°. "Approximately parallel" refers to a state where the angle formed by two straight lines is greater than -30° and less than 30°. In addition, "perpendicular" refers to a state where the angle formed by two straight lines is greater than 80° and less than 100°. Therefore, also includes a state where the angle is greater than 85° and less than 95°. "Approximately perpendicular" refers to a state where the angle formed by two straight lines is greater than 60° and less than 120°.

[0054] In addition, in this specification, the vicinity of the interface refers to the range of ±5 nm above and below the interface. In addition, in a state where different films are stacked in the horizontal direction, the compound may be formed near the interface where the different films are in contact with each other. In this case, the vicinity of the interface refers to the range including the compound and the region 5 nm above and below the compound.

[0055] Implementation Method 1

[0056] In this embodiment, refer to FIG. 1A to FIG. 14D A semiconductor device according to one embodiment of the present invention will be described.

[0057] <Structural Example 1 of Semiconductor Device>

[0058] Figure 1A is a top view of a transistor 100 as a semiconductor device according to one embodiment of the present invention. Figure 1B Equivalent to following Figure 1A The cross-sectional view of the cut surface along the dot-dash line X1-X2 shown in FIG. Figure 1C Equivalent to following Figure 1A The cross-sectional view of the section taken along the dotted line Y1-Y2 is shown. Figure 1A For the sake of convenience, some components of transistor 100 (such as an insulating film used as a gate insulating film, etc.) are omitted. In addition, the dot-dash line X1-X2 direction is sometimes referred to as the channel length direction, and the dot-dash line Y1-Y2 direction is sometimes referred to as the channel width direction. Note that sometimes the top view of the transistor below is also different from the Figure 1A Similarly, some of the components are omitted.

[0059] The transistor 100 includes: a conductive film 104 serving as a first gate electrode on a substrate 102; an insulating film 106 over the substrate 102 and the conductive film 104; an insulating film 107 over the insulating film 106; an oxide semiconductor film 108 over the insulating film 107; a conductive film 112a serving as a source electrode electrically connected to the oxide semiconductor film 108; and a conductive film 112b serving as a drain electrode electrically connected to the oxide semiconductor film 108. In addition, insulating films 114, 116, and an insulating film 118 are provided over the conductive films 112a, 112b, and the oxide semiconductor film 108. The insulating films 114, 116, and 118 function as protective insulating films for the transistor 100.

[0060] In addition, the transistor 100 contains indium in the vicinity of the interface between the insulating film 116 and the insulating film 118. In other words, indium is detected in the vicinity of the interface between the insulating film 116 and the insulating film 118. The reason why this indium is detected will be described later.

[0061] The insulating films 106 and 107 function as gate insulating films of the transistor 100. Note that the insulating films 106 and 107 are sometimes collectively referred to as a first insulating film, the insulating films 114 and 116 are collectively referred to as a second insulating film, and the insulating film 118 is sometimes referred to as a third insulating film.

[0062] When oxygen vacancies are formed in the oxide semiconductor film 108 included in the transistor 100, electrons are generated as carriers, and it is easy to have a normally-on characteristic. Therefore, in order to obtain stable transistor characteristics, it is important to reduce the oxygen vacancies in the oxide semiconductor film 108. In the structure of the transistor of one embodiment of the present invention, excess oxygen is introduced into the insulating film above the oxide semiconductor film 108 (here, the insulating film 114 on the oxide semiconductor film 108) to move oxygen from the insulating film 114 to the oxide semiconductor film 108 to fill the oxygen vacancies in the oxide semiconductor film 108. In addition, excess oxygen is introduced into the insulating film 116 above the oxide semiconductor film 108 to move oxygen from the insulating film 116 through the insulating film 114 to the oxide semiconductor film 108 to fill the oxygen vacancies in the oxide semiconductor film 108. In addition, excess oxygen is introduced into the insulating film 114 and the insulating film 116 over the oxide semiconductor film 108 , so that oxygen moves from the insulating film 114 and the insulating film 116 into the oxide semiconductor film 108 , thereby filling oxygen vacancies in the oxide semiconductor film 108 .

[0063] Therefore, the insulating films 114 and 116 contain oxygen. The insulating films 114 and 116 preferably contain oxygen and silicon. More specifically, the insulating films 114 and 116 each have a region containing oxygen exceeding the stoichiometric composition (oxygen excess region). In other words, the insulating films 114 and 116 are insulating films that can release oxygen. In addition, an oxygen excess region is provided in the insulating films 114 and 116, for example, so that oxygen is introduced into the insulating films 114 and 116 after deposition. As a method for introducing oxygen, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, a plasma treatment, or the like can be used. Note that in this plasma treatment, it is preferable to use a device (also referred to as a plasma etching device or a plasma ashing device) that plasmatizes an oxygen gas with high-frequency power.

[0064] In addition, the amount of oxygen molecules released from the insulating film capable of releasing oxygen can be measured using thermal desorption spectroscopy (TDS). For example, when the insulating films 114 and 116 are measured by TDS, the amount of oxygen molecules released is preferably 1×10 19 Pieces / cm 3 Note that the substrate temperature in the TDS analysis is preferably 100° C. to 700° C., or 100° C. to 500° C.

[0065] In one embodiment of the present invention, in order to form an oxygen-excess region in the insulating films 114 and 116, a film having a function of suppressing oxygen release is formed above the insulating film 116, and oxygen is introduced into the insulating films 114 and 116 through the film. As the film having a function of suppressing oxygen release, a conductive film containing indium or a semiconductor film containing indium is preferably used. In addition, it is preferable to remove the film having a function of suppressing oxygen release after oxygen is introduced.

[0066] The film having the function of suppressing oxygen release can be made of, for example, a material containing indium (In) and any one selected from zinc (Zn), tin (Sn), tungsten (W), titanium (Ti) and silicon (Si). In particular, the film having the function of suppressing oxygen release can be made of a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (Indium Tin Oxide: ITO), indium zinc oxide, indium tin oxide containing silicon oxide (Indium Tin SiO2 Doped Oxide: ITSO).

[0067] Furthermore, when a film having a function of suppressing oxygen release is formed on the insulating film 116 and oxygen is introduced into the insulating films 114 and 116 through the film, indium is detected near the surface of the insulating film 116, in other words, near the interface between the insulating film 116 and the insulating film 118. This is because the film having a function of suppressing oxygen release contains indium, and when oxygen is introduced into the insulating films 114 and 116 through the film, indium is introduced into a region near the surface of the insulating film 116.

[0068] Next, use FIG. 2A to FIG. 3B Indium detected near the surface of the insulating film 116 will be described.

[0069] Figure 2A is a cross-sectional view of the semiconductor device 200, Figure 2B , Figure 2C and Figure 2D It is shown Figure 2A FIG. 2 is a cross-sectional view showing an example of a manufacturing process of the semiconductor device 200 shown in FIG.

[0070] Figure 2A The semiconductor device 200 shown includes an insulating film 204 over a substrate 202 and an insulating film 206 over the insulating film 204 .

[0071] Notice, Figure 2A The semiconductor device 200 shown is for evaluating the Figures 1A to 1C The analysis sample is produced by detecting indium near the surface of the insulating film 116 shown in FIG. Figures 1A to 1CThe insulating film 116 is shown.

[0072] A glass substrate was used as the substrate 202 , a 400-nm-thick silicon oxynitride film was used as the insulating film 204 , and a 200-nm-thick silicon oxynitride film was used as the insulating film 206 .

[0073] In addition, as Figure 2A The semiconductor device 200 shown was manufactured by manufacturing a sample A1 of one embodiment of the present invention and a sample A2 for comparison, and evaluating the amount of indium detected near the interface between the insulating film 204 and the insulating film 206. Next, the manufacturing method of the sample A1 and the sample A2 will be described.

[0074] <Sample A1>

[0075] First, an insulating film 204 is formed over the substrate 202, and a film 230 having a function of suppressing oxygen release is formed over the insulating film 204 (see Figure 2B ).

[0076] The insulating film 204 was formed under the following conditions: the substrate temperature was set to 220°C; silane gas with a flow rate of 160 sccm and nitrous oxide gas with a flow rate of 4000 sccm were introduced into the processing chamber; the pressure was set to 200 Pa; and 1500 W of RF power was supplied between parallel plate electrodes set in the PECVD device. As the film 230 having the function of suppressing oxygen release, a 5 nm thick ITSO film was formed using a sputtering device. The composition of the target material used to form the ITSO film was In2O3:SnO2:SiO2=85:10:5 [wt %].

[0077] Next, oxygen 239 is added through the membrane 230 having the function of suppressing oxygen release (see Figure 2C ).

[0078] Oxygen 239 was added using an ashing device under the following conditions: oxygen gas was introduced into the processing chamber at a flow rate of 250 sccm; the pressure was set to 15 Pa; and 4500 W of RF power was supplied between parallel plate electrodes arranged in the ashing device in such a way as to apply a bias to one side of the substrate.

[0079] Next, the film 230 having the function of suppressing oxygen release is removed using an etchant 242 (see Figure 2D ).

[0080] The film 230 having the function of suppressing oxygen release was treated with an aqueous solution of oxalic acid having a concentration of 5% as the etchant 242 for 300 seconds, and then treated with hydrofluoric acid having a concentration of 0.5% for 15 seconds.

[0081] Next, an insulating film 206 is formed over the insulating film 204, thereby manufacturing Figure 2A The semiconductor device 200 is shown. The insulating film 206 is deposited under the following conditions: the substrate temperature is set to 330°C; silane gas with a flow rate of 75 sccm and nitrous oxide gas with a flow rate of 1200 sccm are introduced into the process chamber; the pressure is set to 70 Pa; and 120 W of RF power is supplied between parallel plate electrodes set in the PECVD device.

[0082] <Sample A2>

[0083] The difference between sample A2 and sample A1 shown above is that sample A2 is not Figure 2C That is, in sample A2, after the film 230 capable of suppressing oxygen release is formed on the insulating film 204, the film 230 capable of suppressing oxygen release is directly removed without performing oxygen addition treatment, and then the insulating film 206 is formed.

[0084] Next, in order to measure the indium concentration in the insulating film 204 and the insulating film 206 of the manufactured samples A1 and A2, analysis was performed using secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry). Figure 3A The analysis results of sample A1 are shown. Figure 3B The analysis results of sample A2 are shown. Figure 3A and Figure 3B In the figure, the horizontal axis represents depth (nm) and the vertical axis represents indium concentration (atoms / cm 3 ).

[0085] Depend on Figure 3A and Figure 3B The results shown in the figure show that in sample A1, the indium concentration near the interface between the insulating film 204 and the insulating film 206 is 5×10 16 Atom / cm 3 On the other hand, in sample A2, the indium concentration near the interface between the insulating film 204 and the insulating film 206 is less than 5×10 16 Atom / cm 3 In addition, the detection limit of indium in the above SIMS analysis is 1×10 15 Atom / cm 3 .

[0086] In addition, SIMS analysis is difficult to accurately obtain data near the sample surface or near the stacking interface due to the measurement principle. However, when comparing sample A1 and sample A2, the amount of indium detected near the interface between the insulating film 204 and the insulating film 206 of sample A1 is greater than the amount of indium detected near the interface between the insulating film 204 and the insulating film 206 of sample A2.

[0087] Depend on Figure 3A and Figure 3B The results shown show that in sample A1, indium in the ITSO film used as a film having a function of suppressing oxygen release is introduced into the insulating film 204 during the oxygen addition process. On the other hand, in sample A2, after the film having a function of suppressing oxygen release is formed on the insulating film 204, the oxygen addition process is not performed, so indium is not introduced into the insulating film 204 or the amount of indium introduced is extremely small.

[0088] As described above, when a film having a function of suppressing oxygen release is formed over an insulating film and oxygen is introduced into the insulating film through the film, indium, which is a constituent element of the film having a function of suppressing oxygen release, is introduced into the insulating film.

[0089] In a semiconductor device according to one embodiment of the present invention, insulating films 114 and 116 are formed over an oxide semiconductor film 108. Then, a film having a function of suppressing oxygen release is formed over the insulating film 116, and oxygen is supplied to the insulating films 114 and 116 through the film, thereby causing the insulating films 114 and 116 to contain excess oxygen. The excess oxygen contained in the insulating films 114 and 116 fills oxygen vacancies formed in the oxide semiconductor film 108. By filling oxygen vacancies in the oxide semiconductor film 108, a semiconductor device with high reliability can be provided.

[0090] Next, other components included in the semiconductor device of this embodiment will be described in detail.

[0091] <Substrate>

[0092] Although there are no particular restrictions on the performance of the substrate 102 and the material, at least heat resistance that can withstand subsequent heat treatment is required. For example, as the substrate 102, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, etc. can be used. In addition, a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon or silicon carbide, a compound semiconductor substrate made of silicon germanium, etc., an SOI (Silicon On Insulator) substrate, etc. can also be used. And a substrate having a semiconductor element provided on these substrates can also be used as the substrate 102. When a glass substrate is used as the substrate 102, a large display device can be manufactured by using a large-area substrate of the 6th generation (1500mm×1850mm), the 7th generation (1870mm×2200mm), the 8th generation (2200mm×2400mm), the 9th generation (2400mm×2800mm), the 10th generation (2950mm×3400mm), etc.

[0093] As the substrate 102, a flexible substrate may be used, and the transistor 100 may be directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100. The peeling layer may be used in the case where a part or all of a semiconductor device is manufactured on the peeling layer, and then separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 may also be transferred to a substrate with low heat resistance or a flexible substrate.

[0094] <Conductive Film>

[0095] Each of the conductive film 104 used as the first gate electrode and the conductive films 112a and 112b used as the source electrode and the drain electrode can be formed using a metal element selected from chromium (Cr), copper (Cu), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo), tantalum (Ta), titanium (Ti), tungsten (W), manganese (Mn), nickel (Ni), iron (Fe), and cobalt (Co), an alloy containing the above metal elements, or an alloy combining the above metal elements.

[0096] In addition, the conductive film 104 and the conductive films 112a and 112b may have a single-layer structure or a stacked structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is stacked on an aluminum film, a two-layer structure in which a titanium film is stacked on a titanium nitride film, a two-layer structure in which a tungsten film is stacked on a titanium nitride film, a two-layer structure in which a tungsten film is stacked on a tantalum nitride film or a tungsten nitride film, and a three-layer structure in which a titanium film, an aluminum film, and a titanium film are stacked in sequence may be cited. In addition, an alloy film or a nitride film formed by combining aluminum with one or more selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium may be used.

[0097] The conductive film 104 and the conductive films 112a and 112b may also use a light-transmitting conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide added with silicon oxide.

[0098] In addition, a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta or Ti) may be applied as the conductive film 104 and the conductive films 112a and 112b. The use of the Cu-X alloy film allows processing by a wet etching process, thereby reducing manufacturing costs.

[0099] <Gate Insulating Film>

[0100] As each of the insulating films 106 and 107 used as the first gate insulating film of the transistor 100, one or more insulating layers including a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, a hafnium oxide film, a yttrium oxide film, a zirconium oxide film, a gallium oxide film, a tantalum oxide film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, and a neodymium oxide film formed by a plasma enhanced chemical vapor deposition (PECVD) method, a sputtering method, etc. can be used. Note that a single layer or three or more insulating films selected from the above materials may be used instead of the stacked structure of the insulating films 106 and 107.

[0101] The insulating film 107 in contact with the oxide semiconductor film 108 serving as the channel formation region of the transistor 100 is preferably an oxide insulating film, and the insulating film 107 preferably includes a region containing oxygen exceeding the stoichiometric composition (oxygen excess region). In other words, the insulating film 107 is an insulating film capable of releasing oxygen. In order to provide an oxygen excess region in the insulating film 107, for example, the insulating film 107 can be formed in an oxygen atmosphere. Alternatively, oxygen can be introduced into the deposited insulating film 107 to form an oxygen excess region. As a method for introducing oxygen, ion implantation, ion doping, plasma immersion ion implantation, plasma treatment, etc. can be used.

[0102] In addition, when hafnium oxide is used for the insulating film 107, the following effects are exerted. The dielectric constant of hafnium oxide is higher than that of silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used for the insulating film 107, the thickness of the insulating film 107 can be increased, thereby reducing the leakage current caused by the tunnel current. That is, a transistor with a small off-state current can be realized. Furthermore, compared with hafnium oxide including an amorphous structure, hafnium oxide including a crystalline structure has a high dielectric constant. Therefore, in order to form a transistor with a small off-state current, it is preferred to use hafnium oxide having a crystalline structure. As an example of a crystalline structure, a monoclinic system or a cubic system can be cited. Note that one embodiment of the present invention is not limited to this.

[0103] Note that in this embodiment, a silicon nitride film is formed as the insulating film 106, and a silicon oxide film is formed as the insulating film 107. Compared with the silicon oxide film, the silicon nitride film has a higher dielectric constant and a larger thickness is required to obtain a capacitance equal to that of the silicon oxide film. Therefore, when the gate insulating film of the transistor 100 includes a silicon nitride film, the physical thickness of the insulating film can be increased. Therefore, the electrostatic discharge destruction of the transistor 100 can be suppressed by suppressing the decrease in the withstand voltage of the transistor 100 and increasing the withstand voltage.

[0104] <Oxide Semiconductor Film>

[0105] The oxide semiconductor film 108 contains oxygen, In, Zn, and M (M is Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf). Typically, In-Ga oxide, In-Zn oxide, or In-M-Zn oxide can be used as the oxide semiconductor film 108. In-M-Zn oxide is particularly preferred.

[0106] When the oxide semiconductor film 108 is an In-M-Zn oxide, the atomic number ratio of the metal element of the sputtering target used to form the In-M-Zn oxide preferably satisfies In≥M and Zn≥M. The atomic number ratio of the metal element of such a sputtering target is preferably In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:4.1. Note that the atomic number ratio of the metal element of the formed oxide semiconductor film 108 includes an error within the range of ±40% of the atomic number ratio of the metal element in the above-mentioned sputtering target. For example, when a target having an atomic number ratio of In:Ga:Zn=4:2:4.1 is used as a sputtering target, the atomic number ratio of the oxide semiconductor film 108 formed is sometimes In:Ga:Zn=4:2:3 or its vicinity.

[0107] In addition, when the oxide semiconductor film 108 is In-M-Zn oxide, the atomic percentages of In and M other than Zn and O are preferably: the atomic percentage of In is higher than 25 atomic%, and the atomic percentage of M is lower than 75 atomic%, and more preferably: the atomic percentage of In is higher than 34 atomic%, and the atomic percentage of M is lower than 66 atomic%.

[0108] The energy gap of the oxide semiconductor film 108 is 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. Thus, by using an oxide semiconductor having a wide energy gap, the off-state current of the transistor 100 can be reduced.

[0109] The thickness of the oxide semiconductor film 108 is greater than or equal to 3 nm and less than or equal to 200 nm, preferably greater than or equal to 3 nm and less than or equal to 100 nm, and more preferably greater than or equal to 3 nm and less than or equal to 50 nm.

[0110] An oxide semiconductor film having a low carrier density is used as the oxide semiconductor film 108. For example, the carrier density of the oxide semiconductor film 108 is 1×10 17 Pieces / cm 3 Below, preferably 1×10 15 Pieces / cm 3 Below, more preferably 1×10 13 Pieces / cm 3 Below, more preferably 1×10 11 Pieces / cm 3 the following.

[0111] The present invention is not limited to the above description, and a material having an appropriate composition can be used according to the desired semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the transistor. In addition, it is preferred to appropriately set the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. of the oxide semiconductor film 108 to obtain the desired semiconductor characteristics of the transistor.

[0112] By using an oxide semiconductor film with a low impurity concentration and a low defect state density as the oxide semiconductor film 108, a transistor with better electrical characteristics can be manufactured, so it is preferred. Here, the state with low impurity concentration and low defect state density (few oxygen vacancies) is referred to as "high-purity intrinsic" or "basically high-purity intrinsic". Because the high-purity intrinsic or basically high-purity intrinsic oxide semiconductor film has fewer carrier generation sources, the carrier density can be reduced. Therefore, a transistor having a channel region formed in the oxide semiconductor film rarely has an electrical characteristic of a negative threshold voltage (also called a normally-on characteristic). Because the high-purity intrinsic or basically high-purity intrinsic oxide semiconductor film has a lower defect state density, it is possible to have a lower trap state density. The off-state current of the high-purity intrinsic or basically high-purity intrinsic oxide semiconductor film is significantly low, even if the channel width W is 1×10 6 For a device with a channel length L of 10 μm, when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1 V to 10 V, the off-state current can also be below the measurement limit of the semiconductor parameter analyzer, that is, 1×10 -13 A or below.

[0113] Therefore, a transistor having a channel region formed in the above-mentioned high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film can be a transistor with small variations in electrical characteristics and high reliability. In addition, it takes a long time for the charge captured by the trap energy level of the oxide semiconductor film to be released, and sometimes acts like a fixed charge. Therefore, sometimes the electrical characteristics of a transistor having a channel region formed in an oxide semiconductor film with a high trap state density are unstable. Impurities include hydrogen, nitrogen, alkali metals or alkaline earth metals, etc.

[0114] The hydrogen contained in the oxide semiconductor film 108 reacts with the oxygen bonded to the metal atom to generate water, and at the same time, an oxygen vacancy is formed in the lattice where oxygen is detached (or the portion where oxygen is detached). As hydrogen enters the oxygen vacancy, electrons as carriers are sometimes generated. In addition, sometimes electrons as carriers are generated due to a portion of hydrogen bonding to oxygen bonded to the metal element. Therefore, a transistor using an oxide semiconductor film containing hydrogen tends to have a normally-on characteristic. Therefore, it is preferred to reduce the hydrogen in the oxide semiconductor film 108 as much as possible. Specifically, in the oxide semiconductor film 108, the hydrogen concentration measured by SIMS is 2×10 20 Atom / cm 3 Below, preferably 5×10 19 Atom / cm 3 Below, more preferably 1×10 19 Atom / cm 3 Below, more preferably 5×10 18 Atom / cm 3 Below, more preferably 1×10 18Atom / cm 3 Below, more preferably 5×10 17 Atom / cm 3 Below, more preferably 1×10 16 Atom / cm 3 the following.

[0115] When the oxide semiconductor film 108 contains silicon or carbon which is one of the Group 14 elements, oxygen vacancies increase in the oxide semiconductor film 108, so that the oxide semiconductor film 108 is converted to an n-type. Therefore, the concentration of silicon or carbon in the oxide semiconductor film 108 (the concentration measured by SIMS analysis) or the concentration of silicon or carbon near the interface with the oxide semiconductor film 108 (the concentration measured by SIMS analysis) is set to 2×10 18 Atom / cm 3 Below, preferably 2×10 17 Atom / cm 3 the following.

[0116] In addition, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor film 108 measured by SIMS analysis is 1×10 18 Atom / cm 3 Below, preferably 2×10 16 Atom / cm 3 When an alkali metal or alkaline earth metal is bonded to an oxide semiconductor, carriers are generated, thereby increasing the off-state current of the transistor. Therefore, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor film 108 is preferably reduced.

[0117] When nitrogen is contained in the oxide semiconductor film 108, electrons as carriers are generated and the carrier density increases, so that the oxide semiconductor film 108 is easily converted to n-type. As a result, a transistor including an oxide semiconductor film containing nitrogen is likely to have a normally-on characteristic. Therefore, it is preferable to reduce nitrogen in the oxide semiconductor film as much as possible; for example, the nitrogen concentration measured by SIMS is preferably 5×10 18 Atom / cm 3 the following.

[0118] The oxide semiconductor film 108 may have a non-single-crystal structure, for example. The non-single-crystal structure includes, for example, the following CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), a polycrystalline structure, the following microcrystalline structure, or an amorphous structure. Among the non-single-crystal structures, the amorphous structure has the highest defect state density, while the CAAC-OS has the lowest defect state density.

[0119] The oxide semiconductor film 108 may have an amorphous structure, for example. An oxide semiconductor film having an amorphous structure has, for example, a disordered atomic arrangement and no crystalline component. Alternatively, an oxide semiconductor film having an amorphous structure has, for example, a completely amorphous structure and no crystalline portion.

[0120] In addition, the oxide semiconductor film 108 may also be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film sometimes has, for example, a single-layer structure including two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. In addition, the mixed film sometimes has, for example, a stacked-layer structure having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region.

[0121] <Protective insulating film>

[0122] The insulating films 114, 116, and 118 have a function of protecting the insulating film. The insulating films 114 and 116 contain oxygen. In addition, the insulating film 114 is an insulating film that can transmit oxygen. In addition, when the insulating film 116 is formed in a later step, the insulating film 114 also serves as a film that alleviates damage to the oxide semiconductor film 108.

[0123] As the insulating film 114 , a silicon oxide film, a silicon oxynitride film, or the like can be used, with a thickness of 5 nm to 150 nm, preferably 5 nm to 50 nm.

[0124] Furthermore, the number of defects in the insulating film 114 is preferably small. Typically, the spin density of a signal caused by dangling bonds of silicon and appearing at g=2.001 measured by electron spin resonance (ESR) is 3×10 17 Spin / cm 3 This is because, if the defect density of the insulating film 114 is high, oxygen is bonded to the defects, and the amount of oxygen permeation in the insulating film 114 is reduced.

[0125] In the insulating film 114, sometimes all of the oxygen that enters the insulating film 114 from the outside does not move to the outside of the insulating film 114, but a part of it remains in the insulating film 114. In addition, sometimes oxygen moves in the insulating film 114, so that oxygen enters the insulating film 114 and oxygen contained in the insulating film 114 moves to the outside of the insulating film 114. When an oxide insulating film that allows oxygen to pass is formed as the insulating film 114, oxygen that has been separated from the insulating film 116 provided above the insulating film 114 can move to the oxide semiconductor film 108 via the insulating film 114.

[0126] Alternatively, the insulating film 114 may be formed using an oxide insulating film having a low state density due to nitride oxide. Note that the state density due to nitride oxide may be formed at the energy (E) of the valence band top of the oxide semiconductor film. v _ os ) and the energy of the conduction band bottom of the oxide semiconductor film (E c _ os As the oxide insulating film, a silicon oxynitride film with a small amount of nitride oxide released or an aluminum oxynitride film with a small amount of nitride oxide released can be used.

[0127] In addition, in TDS analysis, the silicon oxynitride film with a low nitrogen oxide release amount is a film that releases more ammonia than nitrogen oxide; typically, the ammonia release amount is 1×10 18 Pieces / cm 3 Above and 5×10 19 Pieces / cm 3 Note that the amount of ammonia released is the amount released when heat treatment is performed at a film surface temperature of 50° C. to 650° C., preferably 50° C. to 550° C.

[0128] For example, nitrogen oxides (NO x , x is greater than or equal to 0 and less than or equal to 2, preferably greater than or equal to 1 and less than or equal to 2), typically NO2 or NO, forms an energy level in the insulating film 114. This energy level is located in the energy gap of the oxide semiconductor film 108. Therefore, when the nitrogen oxide diffuses to the vicinity of the interface between the insulating film 114 and the oxide semiconductor film 108, this energy level sometimes captures electrons on the insulating film 114. As a result, the captured electrons remain near the interface between the insulating film 114 and the oxide semiconductor film 108, thereby causing the threshold voltage of the transistor to drift in the positive direction.

[0129] In addition, when heat treatment is performed, nitrogen oxide reacts with ammonia and oxygen. When heat treatment is performed, nitrogen oxide contained in the insulating film 114 reacts with ammonia contained in the insulating film 116, so that nitrogen oxide contained in the insulating film 114 is reduced. Therefore, electrons are hardly captured near the interface between the insulating film 114 and the oxide semiconductor film 108.

[0130] By using the above-described oxide insulating film, the insulating film 114 can reduce the drift of the threshold voltage of the transistor, which reduces the variation in the electrical characteristics of the transistor.

[0131] By performing a heat treatment in the manufacturing process of the transistor, typically a heat treatment at a temperature of 300°C or higher and lower than the strain point of the substrate, in the spectrum obtained by measuring the insulating film 114 using ESR at a temperature of 100K or lower, a first signal having a g value of 2.037 or higher and 2.039 or lower, a second signal having a g value of 2.001 or higher and 2.003 or lower, and a third signal having a g value of 1.964 or higher and 1.966 or lower are observed. In the ESR measurement using the X band, the split width between the first signal and the second signal and the split width between the second signal and the third signal are approximately 5 mT. In addition, the sum of the spin densities of the first signal having a g value of 2.037 or higher and 2.039 or lower, the second signal having a g value of 2.001 or higher and 2.003 or lower, and the third signal having a g value of 1.964 or higher and 1.966 or lower is less than 1×10 18 Spin / cm 3 , typically 1×10 17 Spin / cm 3 Above and below 1×10 18 Spin / cm 3 .

[0132] In the ESR spectrum below 100K, the first signal with a g value of 2.037 to 2.039, the second signal with a g value of 2.001 to 2.003, and the third signal with a g value of 1.964 to 1.966 are equivalent to signals caused by nitrogen oxides (NOx, x is 0 to 2, preferably 1 to 2). As typical examples of nitrogen oxides, there are nitric oxide, nitrogen dioxide, etc. That is, the smaller the sum of the spin densities of the first signal with a g value of 2.037 to 2.039, the second signal with a g value of 2.001 to 2.003, and the third signal with a g value of 1.964 to 1.966, the less the nitrogen oxide content in the oxide insulating film.

[0133] The nitrogen concentration of the oxide insulating film measured by SIMS analysis was 6×10 20 Atom / cm 3 the following.

[0134] By forming the oxide insulating film by a PECVD method using silane and nitrous oxide at a substrate temperature of 220° C. or higher, 280° C. or higher, or 350° C. or higher, a dense film with high hardness can be formed.

[0135] The insulating film 116 is formed using an oxide insulating film whose oxygen content exceeds the stoichiometric composition. By heating, a part of oxygen is released from the oxide insulating film whose oxygen content exceeds the stoichiometric composition. The amount of oxygen released from the oxide insulating film whose oxygen content exceeds the stoichiometric composition when TDS analysis is performed is 1.0×10 19 Atom / cm 3 Above, preferably 3.0×10 20 Atom / cm 3 Note that the surface temperature of the film during the TDS analysis is preferably 100° C. or higher and 700° C. or lower, or 100° C. or higher and 500° C. or lower.

[0136] As the insulating film 116 , a silicon oxide film, a silicon oxynitride film, or the like can be used with a thickness of greater than or equal to 30 nm and less than or equal to 500 nm, preferably greater than or equal to 50 nm and less than or equal to 400 nm.

[0137] Furthermore, it is preferred that the number of defects in the insulating film 116 be small. Typically, the spin density of the signal at g = 2.001 due to dangling bonds of silicon measured by ESR is less than 1.5×10 18 Spin / cm 3 , more preferably 1×10 18 Spin / cm 3 Since the insulating film 116 is farther from the oxide semiconductor film 108 than the insulating film 114 , the defect density of the insulating film 116 can also be higher than that of the insulating film 114 .

[0138] In addition, indium was detected near the surface of the insulating film 116 .

[0139] In addition, since the insulating films 114 and 116 can be formed using the same type of material, the boundary between the insulating film 114 and the insulating film 116 may not be clearly observed. Therefore, in this embodiment, the boundary between the insulating film 114 and the insulating film 116 is shown by a dotted line. Note that in this embodiment, although a two-layer structure of the insulating film 114 and the insulating film 116 is described, the present invention is not limited to this, and for example, the insulating film 114 may also have a single-layer structure.

[0140] The insulating film 118 contains nitrogen. In addition, the insulating film 118 contains nitrogen and silicon. In addition, the insulating film 118 has a function of blocking oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. By providing the insulating film 118, it is possible to prevent oxygen from diffusing from the oxide semiconductor film 108 to the outside and to prevent the oxygen contained in the insulating films 114 and 116 from diffusing to the outside, and it is also possible to suppress hydrogen, water, etc. from invading the oxide semiconductor film 108 from the outside. As the insulating film 118, for example, a nitride insulating film can be used. The nitride insulating film is formed using silicon nitride, silicon nitride oxide, aluminum nitride, aluminum nitride oxide, etc. In addition, an oxide insulating film having a blocking effect on oxygen, hydrogen, water, etc. may be provided instead of the nitride insulating film having a blocking effect on oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. Examples of oxide insulating films having a barrier effect against oxygen, hydrogen, water, and the like include aluminum oxide films, aluminum oxynitride films, gallium oxide films, gallium oxynitride films, yttrium oxide films, yttrium oxynitride films, hafnium oxide films, and hafnium oxynitride films.

[0141] Although the above-described conductive film, insulating film, oxide semiconductor film and other films can be formed by sputtering or PECVD, they can also be formed by, for example, thermal CVD (Chemical Vapor Deposition). As an example of thermal CVD, MOCVD (Metal Organic Chemical Vapor Deposition) can be cited.

[0142] Since the thermal CVD method is a film-forming method that does not use plasma, it has the advantage of not causing defects due to plasma damage.

[0143] Deposition using the thermal CVD method can be performed by simultaneously supplying a source gas and an oxidant into a process chamber, setting the pressure in the process chamber to atmospheric pressure or reduced pressure, and causing them to react with each other near or above the substrate.

[0144] In addition, deposition using the ALD method can also be performed in the following method: the pressure in the processing chamber is set to atmospheric pressure or reduced pressure, the source gas for the reaction is introduced into the processing chamber in sequence, and then the gas is repeatedly introduced in this order. For example, two or more source gases are supplied into the processing chamber in sequence by switching each switch valve (also called a high-speed valve). For example, an inert gas (argon or nitrogen, etc.) is introduced at the same time or after the first source gas is introduced so that the multiple source gases are not mixed, and then the second source gas is introduced. Note that when the first source gas and the inert gas are introduced at the same time, the inert gas is used as a carrier gas, and the inert gas can be introduced at the same time as the second source gas is introduced. In addition, the first source gas can be discharged by vacuum pumping without introducing an inert gas, and then the second source gas can be introduced. The first source gas is adsorbed on the surface of the substrate to form a first layer; then the second source gas is introduced to react with the first layer; as a result, the second layer is stacked on the first layer to form a thin film. By repeatedly introducing the gas in this order until the desired thickness is obtained, a thin film with good step coverage is formed. Since the thickness of the film can be adjusted by the number of times the gas is introduced repeatedly in sequence, the ALD method can accurately adjust the thickness and is suitable for manufacturing micro FETs.

[0145] Various films such as the conductive film, insulating film, oxide semiconductor film, metal oxide film, etc. described in the above embodiments can be formed by a thermal CVD method such as an MOCVD method. For example, when an In-Ga-Zn-O film is formed, trimethylindium, trimethylgallium, and dimethylzinc are used. The chemical formula of trimethylindium is In(CH3)3. The chemical formula of trimethylgallium is Ga(CH3)3. In addition, the chemical formula of dimethylzinc is Zn(CH3)2. In addition, without being limited to the above combination, triethylgallium (chemical formula Ga(C2H5)3) can be used instead of trimethylgallium, and diethylzinc (chemical formula Zn(C2H5)2) can be used instead of dimethylzinc.

[0146] For example, when a hafnium oxide film is formed using a deposition apparatus utilizing the ALD method, the following two gases are used: a source gas obtained by gasifying a liquid containing a solvent and a hafnium precursor compound (hafnium alkoxide or hafnium tetrakis dimethylamide (TDMAH) and other hafnium amides); and ozone (O3) used as an oxidant. The chemical formula of hafnium tetrakis dimethylamide is Hf[N(CH3)2]4. In addition, other material liquids include hafnium tetrakis (ethylmethylamide) and the like.

[0147] For example, when an aluminum oxide film is formed using a deposition apparatus using the ALD method, the following two gases are used: a source gas obtained by gasifying a liquid containing a solvent and an aluminum precursor compound (trimethylaluminum (TMA) or the like); and H2O used as an oxidant. In addition, the chemical formula of trimethylaluminum is Al(CH3)3. In addition, as other material liquids, there are tris(dimethylamide)aluminum, triisobutylaluminum, aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedione), and the like.

[0148] For example, when a silicon oxide film is formed using a deposition apparatus utilizing the ALD method, hexachlorodisilane is adsorbed on the film-forming surface, chlorine contained in the adsorbed material is removed, and free radicals of an oxidizing gas (O2, nitrous oxide) are supplied to react with the adsorbed material.

[0149] For example, when a tungsten film is formed using a deposition apparatus using the ALD method, WF6 gas and B2H6 gas are introduced repeatedly in sequence to form an initial tungsten film, and then WF6 gas and H2 gas are introduced simultaneously to form a tungsten film. Note that SiH4 gas may be used instead of B2H6 gas.

[0150] For example, when an oxide semiconductor film such as an In-Ga-Zn-O film is formed using a film forming device using the ALD method, In(CH3)3 gas and O3 gas are repeatedly introduced in sequence to form an InO layer, Ga(CH3)3 gas and O3 gas are repeatedly introduced in sequence to form a GaO layer, and then Zn(CH3)2 gas and O3 gas are repeatedly introduced in sequence to form a ZnO layer. Note that the order of these layers is not limited to the above example. In addition, these gases can also be mixed to form mixed compound layers such as In-Ga-O layers, In-Zn-O layers, Ga-Zn-O layers, etc. Note that although H2O gas obtained by bubbling with an inert gas such as Ar can also be used instead of O3 gas, it is preferred to use O3 gas that does not contain H. In addition, In(C2H5)3 gas can also be used instead of In(CH3)3 gas. Ga(C2H5)3 gas can also be used instead of Ga(CH3)3 gas. Zn(CH3)2 gas can also be used.

[0151] <Structural Example 2 of Semiconductor Device>

[0152] Next, refer to Figures 4A to 4C Description and Figures 1A to 1C The transistor 100 shown in the figure has a different structure example. In addition, when a function similar to the function described above is used, the same hatching is sometimes used without adding a special reference numeral.

[0153] Figure 4A is a top view of a transistor 150 as a semiconductor device according to one embodiment of the present invention. Figure 4BEquivalent to following Figure 4A The cross-sectional view of the cut surface along the dot-dash line X1-X2 shown in FIG. Figure 4C Equivalent to following Figure 4A The cross-sectional view is a cross-sectional view taken along the dashed line Y1 - Y2 shown.

[0154] The transistor 150 includes: a conductive film 104 serving as a first gate electrode over the substrate 102; an insulating film 106 over the substrate 102 and the conductive film 104; an insulating film 107 over the insulating film 106; an oxide semiconductor film 108 over the insulating film 107; an insulating film 114 over the oxide semiconductor film 108; an insulating film 116 over the insulating film 114; a conductive film 112a serving as a source electrode electrically connected to the oxide semiconductor film 108 via an opening 141a provided in the insulating film 114 and the insulating film 116; and a conductive film 112b serving as a drain electrode electrically connected to the oxide semiconductor film 108 via an opening 141b provided in the insulating film 114 and the insulating film 116. In addition, an insulating film 118 is provided over the transistor 150, more specifically, over the conductive films 112a, 112b, and the insulating film 116. The insulating film 114 and the insulating film 116 have a function as a protective insulating film for the oxide semiconductor film 108. The insulating film 118 functions as a protective insulating film for the transistor 150 .

[0155] In addition, the transistor 150 includes indium in the vicinity of the interface between the insulating film 116 and the insulating film 118 .

[0156] The transistor 100 shown above adopts a channel etched structure, and FIG. 4A to FIG. 4C The transistor 150 shown in the figure has a channel protection structure. As described above, the semiconductor device according to one embodiment of the present invention can have either a channel etching structure or a channel protection structure.

[0157] The transistor 150 has a structure similar to the transistor 100 described above, in which the insulating films 114 and 116 are provided over the oxide semiconductor film 108 , whereby oxygen included in the insulating films 114 and 116 can fill oxygen vacancies in the oxide semiconductor film 108 .

[0158] <Structural Example 3 of Semiconductor Device>

[0159] Next, refer to FIG. 5A to FIG. 5C Description and FIG. 4A to FIG. 4C The transistor 150 shown in the figure is a different structural example. In addition, when a part having a function similar to that described above is represented, the same hatching is sometimes used without adding a special reference numeral.

[0160] Figure 5A is a top view of a transistor 160 as a semiconductor device according to one embodiment of the present invention. Figure 5B Equivalent to following Figure 5A The cross-sectional view of the cut surface along the dot-dash line X1-X2 shown in FIG. Figure 5C Equivalent to following Figure 5A The cross-sectional view is a cross-sectional view taken along the dashed line Y1 - Y2 shown.

[0161] The transistor 160 includes: a conductive film 104 serving as a gate electrode over the substrate 102; an insulating film 106 over the substrate 102 and the conductive film 104; an insulating film 107 over the insulating film 106; an oxide semiconductor film 108 over the insulating film 107; an insulating film 114 over the oxide semiconductor film 108; an insulating film 116 over the insulating film 114; a conductive film 112a serving as a source electrode electrically connected to the oxide semiconductor film 108; and a conductive film 112b serving as a drain electrode electrically connected to the oxide semiconductor film 108. In addition, an insulating film 118 is provided over the transistor 160, more specifically, over the conductive films 112a, 112b, and the insulating film 116. The insulating film 114 and the insulating film 116 have a function as a protective insulating film for the oxide semiconductor film 108. The insulating film 118 has a function as a protective insulating film for the transistor 160.

[0162] In addition, the transistor 160 includes indium in the vicinity of the interface between the insulating film 116 and the insulating film 118 .

[0163] Transistor 160 and FIG. 4A to FIG. 4C The transistor 150 shown is different in the shapes of the insulating films 114 and 116. Specifically, the insulating films 114 and 116 of the transistor 160 are provided in an island shape above the channel region of the oxide semiconductor film 108. The other structures are the same as those of the transistor 150, and similar effects are achieved.

[0164] <Structural Example 4 of Semiconductor Device>

[0165] Next, refer to FIG. 6A to FIG. 6C Description and Figures 1A to 1C The transistor 100 shown in the figure is a different structural example. In addition, when a part having a function similar to that described above is indicated, the same hatching is sometimes used without adding a special reference numeral.

[0166] Fig. 6A is a top view of a transistor 170 as a semiconductor device according to one embodiment of the present invention. Figure 6B Equivalent to following Fig. 6A The cross-sectional view of the cut surface along the dot-dash line X1-X2 shown in FIG. Figure 6C Equivalent to following Fig. 6A The cross-sectional view is a cross-sectional view taken along the dashed line Y1 - Y2 shown.

[0167] The transistor 170 includes: a conductive film 104 serving as a first gate electrode above the substrate 102; an insulating film 106 above the substrate 102 and the conductive film 104; an insulating film 107 above the insulating film 106; an oxide semiconductor film 108 above the insulating film 107; an insulating film 114 above the oxide semiconductor film 108; an insulating film 116 above the insulating film 114; a conductive film 112a serving as a source electrode electrically connected to the oxide semiconductor film 108; a conductive film 112b serving as a drain electrode electrically connected to the oxide semiconductor film 108; an insulating film 118 above the conductive films 112a, 112b and the insulating film 116; and conductive films 120a, 120b above the insulating film 118.

[0168] In addition, the transistor 170 includes indium in the vicinity of the interface between the insulating film 116 and the insulating film 118 .

[0169] In the transistor 170, the insulating films 114, 116, and 118 function as a second gate insulating film of the transistor 170. In the transistor 170, the conductive film 120a functions as, for example, a pixel electrode for a display device. The conductive film 120a is connected to the conductive film 112b via an opening 142c provided in the insulating films 114, 116, and 118. In addition, in the transistor 170, the conductive film 120b functions as a second gate electrode (also referred to as a back gate electrode).

[0170] like Figure 6C As shown, the conductive film 120b is connected to the conductive film 104 serving as the first gate electrode through openings 142a and 142b provided in the insulating films 106, 107, 114, 116, and 118. Therefore, the same potential is applied to the conductive film 120b and the conductive film 104.

[0171] In addition, in this embodiment, the structure in which the openings 142a and 142b are provided so that the conductive film 120b is connected to the conductive film 104 is exemplified, but one embodiment of the present invention is not limited thereto. For example, a structure in which only one of the openings 142a and 142b is formed so that the conductive film 120b is connected to the conductive film 104, or a structure in which the openings 142a and 142b are not provided so that the conductive film 120b is not connected to the conductive film 104. When the structure in which the conductive film 120b is not connected to the conductive film 104 is adopted, different potentials can be applied to the conductive film 120b and the conductive film 104, respectively.

[0172] like Figure 6BAs shown, the oxide semiconductor film 108 is located at a position opposite to each of the conductive film 104 used as the first gate electrode and the conductive film 120b used as the second gate electrode, and is sandwiched between the two conductive films used as gate electrodes. The length of the conductive film 120b used as the second gate electrode in the channel length direction and the length of the channel width direction are respectively greater than the length of the oxide semiconductor film 108 in the channel length direction and the length of the channel width direction. The conductive film 120b covers the entire oxide semiconductor film 108 via the insulating films 114, 116, and 118. In addition, since the conductive film 120b used as the second gate electrode is connected to the conductive film 104 used as the first gate electrode through the openings 142a and 142b provided in the insulating films 106, 107, 114, 116, and 118, the side surface of the oxide semiconductor film 108 in the channel width direction is opposite to the conductive film 120b used as the second gate electrode via the insulating films 114, 116, and 118.

[0173] In other words, in the channel width direction of the transistor 170, the conductive film 104 used as the first gate electrode and the conductive film 120b used as the second gate electrode are connected to each other through openings provided in the insulating films 106, 107 used as the first gate insulating film and the insulating films 114, 116, 118 used as the second gate insulating film, and the conductive film 104 and the conductive film 120b surround the oxide semiconductor film 108 via the insulating films 106, 107 used as the first gate insulating film and the insulating films 114, 116, 118 used as the second gate insulating film.

[0174] By adopting the above structure, the oxide semiconductor film 108 included in the transistor 170 is electrically surrounded by the electric field of the conductive film 104 serving as the first gate electrode and the conductive film 120b serving as the second gate electrode. As shown in the transistor 170, the device structure of a transistor in which the oxide semiconductor film having a channel region is electrically surrounded by the electric field of the first gate electrode and the second gate electrode can be referred to as a surrounded channel (s-channel) structure.

[0175] Since the transistor 170 has an s-channel structure, an electric field for causing a channel can be effectively applied to the oxide semiconductor film 108 by using the conductive film 104 used as the first gate electrode; thereby, the current driving capability of the transistor 170 is improved, so that a higher on-state current characteristic can be obtained. In addition, since the on-state current can be increased, the transistor 170 can be miniaturized. In addition, since the transistor 170 has a structure surrounded by the conductive film 104 used as the first gate electrode and the conductive film 120b used as the second gate electrode, the mechanical strength of the transistor 170 can be improved.

[0176] <Structural Example 5 of Semiconductor Device>

[0177] Next, refer to FIG. 7A to FIG. 7D Description and Figures 1A to 1C The transistor 100 shown in the figure is a different structural example. In addition, when a part having a function similar to that described above is indicated, the same hatching is sometimes used without adding a special reference numeral.

[0178] Fig. 7A and Figure 7B yes Figure 1B and Figure 1C 1 is a cross-sectional view of a modified example of the transistor 100 shown. Figure 7C and Fig.7D yes Figure 1B and Figure 1C 1 is a cross-sectional view of a modified example of the transistor 100 shown.

[0179] In addition to the oxide semiconductor film 108 having a three-layer structure, Fig. 7A and Figure 7B The transistor 100A shown has Figure 1B and Figure 1C The transistor 100A has the same structure as shown. Specifically, the oxide semiconductor film 108 included in the transistor 100A includes an oxide semiconductor film 108a, an oxide semiconductor film 108b, and an oxide semiconductor film 108c.

[0180] In addition to the fact that the oxide semiconductor film 108 has a two-layer structure, Figure 7C and Fig.7D The transistor 100B shown has Figure 1B and Figure 1C The transistor 100B has the same structure as that of the transistor 100. Specifically, the oxide semiconductor film 108 included in the transistor 100B includes an oxide semiconductor film 108a and an oxide semiconductor film 108b.

[0181] Here, refer to Fig. 8A and Figure 8B The energy band structures of the oxide semiconductor films 108 a , 108 b , and 108 c and the insulating films in contact with the oxide semiconductor films 108 b and 108 c are described.

[0182] Fig. 8A 108 a , 108 b , and 108 c , and the insulating film 114 . Figure 8B 1 is an example of an energy band diagram in the film thickness direction of a stacked body including an insulating film 107, oxide semiconductor films 108b and 108c, and an insulating film 114. In the energy band diagram, energy levels (Ec) of the conduction band bottoms of the insulating film 107, oxide semiconductor films 108a, 108b, 108c, and the insulating film 114 are shown for easy understanding.

[0183] exist Fig. 8A In the energy band diagram, a silicon oxide film is used as the insulating films 107 and 114, an oxide semiconductor film formed by using a metal oxide target in which the atomic number ratio of metal elements is In:Ga:Zn=1:3:2 is used as the oxide semiconductor film 108a, an oxide semiconductor film formed by using a metal oxide target in which the atomic number ratio of metal elements is In:Ga:Zn=1:1:1 is used as the oxide semiconductor film 108b, and an oxide semiconductor film formed by using a metal oxide target in which the atomic number ratio of metal elements is In:Ga:Zn=1:3:2 is used as the oxide semiconductor film 108c.

[0184] exist Figure 8B In the energy band diagram, a silicon oxide film is used as the insulating films 107 and 114, an oxide semiconductor film formed by using a metal oxide target material whose atomic number ratio of metal elements is In:Ga:Zn=1:1:1 is used as the oxide semiconductor film 108b, and an oxide semiconductor film formed by using a metal oxide target material whose atomic number ratio of metal elements is In:Ga:Zn=1:3:2 is used as the oxide semiconductor film 108c.

[0185] like Fig. 8A and Figure 8B As shown, in the oxide semiconductor films 108a, 108b, and 108c, the energy level of the conduction band bottom changes smoothly. In other words, the energy level of the conduction band bottom changes continuously or is continuously connected. In order to achieve such a band structure, there are no impurities that form defect energy levels such as trap centers or recombination centers at the interface between the oxide semiconductor film 108a and the oxide semiconductor film 108b or at the interface between the oxide semiconductor film 108b and the oxide semiconductor film 108c.

[0186] In order to form a continuous connection between the oxide semiconductor film 108a and the oxide semiconductor film 108b and between the oxide semiconductor film 108b and the oxide semiconductor film 108c, it is necessary to use a multi-chamber deposition apparatus (sputtering apparatus) equipped with a load lock chamber so that each film is continuously stacked without being exposed to the air.

[0187] By adopting Fig. 8A and Figure 8B In the energy band structure shown, the oxide semiconductor film 108 b serves as a well. In a transistor using the stacked structure, a channel region is formed in the oxide semiconductor film 108 b.

[0188] Note that trap levels due to impurities or defects may be formed at or near the interface between the oxide semiconductor film and the insulating film. In addition, by providing the oxide semiconductor films 108a and 108c, the trap levels can be kept away from the oxide semiconductor film 108b in which the channel region is formed.

[0189] In addition, when the energy level of the trap energy level is lower than the conduction band bottom energy level (Ec) of the oxide semiconductor film 108b, electrons are easily accumulated in the trap energy level. When electrons accumulate in the trap energy level, they become negative fixed charges, causing the threshold voltage of the transistor to drift in the positive direction. Therefore, it is preferred to adopt a structure in which the energy level of the trap energy level is higher than the conduction band bottom energy level (Ec) of the oxide semiconductor film 108b. By adopting the above structure, electrons are not easily accumulated in the trap energy level, so the on-state current of the transistor can be increased, and the field effect mobility can also be improved.

[0190] exist Fig. 8A and Figure 8B In the embodiment of the present invention, the energy level of the bottom of the conduction band of the oxide semiconductor films 108a and 108c is closer to the vacuum energy level than that of the oxide semiconductor film 108b. Typically, the difference between the bottom energy level of the conduction band of the oxide semiconductor film 108b and the bottom energy level of the conduction band of the oxide semiconductor films 108a and 108c is 0.15 eV or 0.5 eV, and is 2 eV or 1 eV. In other words, the difference between the electron affinity of the oxide semiconductor films 108a and 108c and the electron affinity of the oxide semiconductor film 108b is 0.15 eV or 0.5 eV, and is 2 eV or 1 eV.

[0191] By having the above structure, the oxide semiconductor film 108b becomes the main path of the current and is used as a channel region. Since the oxide semiconductor films 108a and 108c include one or more of the metal elements contained in the oxide semiconductor film 108b forming the channel region, interface scattering is not easily generated at the interface between the oxide semiconductor film 108a and the oxide semiconductor film 108b or at the interface between the oxide semiconductor film 108b and the oxide semiconductor film 108c. As a result, since the movement of carriers at the interface is not hindered, the field effect mobility of the transistor is improved.

[0192] Note that in order to prevent the oxide semiconductor films 108a and 108c from being used as part of the channel region, the oxide semiconductor films 108a and 108c use a material with sufficiently low conductivity. Alternatively, the oxide semiconductor films 108a and 108c use a material whose electron affinity (difference between the vacuum level and the conduction band bottom level) is lower than that of the oxide semiconductor film 108b and whose conduction band bottom level is different from that of the oxide semiconductor film 108b (band offset). In addition, in order to suppress the difference between the threshold voltages caused by the drain voltage value, the oxide semiconductor films 108a and 108c preferably use a material whose conduction band bottom level is closer to the vacuum level by more than 0.2 eV, preferably more than 0.5 eV, than that of the oxide semiconductor film 108b.

[0193] The oxide semiconductor films 108a and 108c preferably do not have a spinel crystal structure. This is because when the oxide semiconductor films 108a and 108c contain a spinel crystal structure, the constituent elements of the conductive films 112a and 112b may diffuse into the oxide semiconductor film 108b at the interface between the spinel crystal structure and other regions. Note that in the case where the oxide semiconductor films 108a and 108c are CAAC-OS described later, the properties of the constituent elements of the blocking conductive films 112a and 112b, such as copper, are improved, so it is preferred.

[0194] The thickness of the oxide semiconductor films 108a and 108c is greater than or equal to the thickness that can suppress the diffusion of the constituent elements of the conductive films 112a and 112b into the oxide semiconductor film 108b and less than the thickness that suppresses the supply of oxygen from the insulating film 114 to the oxide semiconductor film 108b. For example, when the thickness of the oxide semiconductor films 108a and 108c is greater than or equal to 10 nm, the diffusion of the constituent elements of the conductive films 112a and 112b into the oxide semiconductor film 108b can be suppressed. In addition, when the thickness of the oxide semiconductor films 108a and 108c is less than or equal to 100 nm, oxygen can be efficiently supplied from the insulating films 114 and 116 to the oxide semiconductor film 108b.

[0195] When the oxide semiconductor films 108a and 108c are In-M-Zn oxides, by including Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf as M at a higher atomic number ratio than In, the energy gap of the oxide semiconductor films 108a and 108c can be increased and the electron affinity can be reduced. Therefore, the difference in electron affinity between the oxide semiconductor films 108a and 108c and the oxide semiconductor film 108b can sometimes be controlled according to the ratio of the element M. In addition, since Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf is a metal element with a strong bonding force with oxygen, oxygen vacancies are less likely to be generated in the oxide semiconductor film by making the atomic number ratio of these elements higher than In.

[0196] In addition, when the oxide semiconductor films 108a and 108c are In-M-Zn oxides, the atomic percentages of In and M excluding Zn and O are preferably: the atomic percentage of In is less than 50 atomic%, and the atomic percentage of M is greater than 50 atomic%, and more preferably: the atomic percentage of In is less than 25 atomic%, and the atomic percentage of M is greater than 75 atomic%. In addition, as the oxide semiconductor films 108a and 108c, gallium oxide films can be used.

[0197] In addition, when the oxide semiconductor films 108a, 108b, and 108c are In-M-Zn oxides, the atomic number ratio of M contained in the oxide semiconductor films 108a and 108c is greater than the atomic number ratio of M contained in the oxide semiconductor film 108b, typically more than 1.5 times the atomic number ratio of M contained in the oxide semiconductor film 108b, preferably more than 2 times, and more preferably more than 3 times.

[0198] In addition, when the oxide semiconductor films 108a, 108b, and 108c are In-M-Zn oxides, when the atomic number ratio of the oxide semiconductor film 108b is In:M:Zn=x1:y1:z1, and the atomic number ratio of the oxide semiconductor films 108a and 108c is In:M:Zn=x2:y2:z2, y2 / x2 is greater than y1 / x1, and y2 / x2 is preferably 1.5 times or more of y1 / x1. y2 / x2 is more preferably 2 times or more of y1 / x1, and y2 / x2 is further preferably 3 times or more of y1 / x1. At this time, in the oxide semiconductor film 108b, when y1 is greater than x1, the transistor including the oxide semiconductor film 108b has stable electrical characteristics, so it is preferred. However, if y1 is three times or more as large as x1, the field effect mobility of the transistor including the oxide semiconductor film 108b decreases. Therefore, y1 is preferably smaller than three times as large as x1.

[0199] When the oxide semiconductor film 108b is an In-M-Zn oxide, when the atomic number ratio of the metal element of the target material used to deposit the oxide semiconductor film 108b is In:M:Zn=x1:y1:z1, x1 / y1 is preferably greater than or equal to 1 / 3 and less than or equal to 6, more preferably greater than or equal to 1 and less than or equal to 6, and z1 / y1 is preferably greater than or equal to 1 / 3 and less than or equal to 6, more preferably greater than or equal to 1 and less than or equal to 6. Note that by making z1 / y1 greater than or equal to 1 and less than or equal to 6, it is easy to form the later-described CAAC-OS used as the oxide semiconductor film 108b. Typical examples of the atomic number ratio of the metal element of the target material include In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1:2, and the like.

[0200] When the oxide semiconductor films 108a and 108c are In-M-Zn oxides, when the atomic number ratio of the metal elements of the target material used to deposit the oxide semiconductor films 108a and 108c is In:M:Zn=x2:y2:z2, x2 / y2<x1 / y1 is preferred, and z2 / y2 is preferably greater than 1 / 3 and less than 6, and more preferably greater than 1 and less than 6. In addition, by increasing the atomic number ratio of M relative to indium, the energy gap of the oxide semiconductor films 108a and 108c can be expanded and the electron affinity thereof can be reduced, so y2 / x2 is preferably greater than 3 or greater than 4. Typical examples of the atomic number ratio of the metal elements in the target material include In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:5, In:M:Zn=1:3:6, In:M:Zn=1:4:2, In:M:Zn=1:4:4, In:M:Zn=1:4:5, In:M:Zn=1:5:5, etc.

[0201] In the case where the oxide semiconductor films 108a and 108c are In-M oxides, when divalent metal atoms (e.g., zinc, etc.) are not included as M, oxide semiconductor films 108a and 108c that do not have a spinel crystal structure can be formed. In addition, as the oxide semiconductor films 108a and 108c, for example, In-Ga oxide films can be used. For example, the In-Ga oxide film can be formed by sputtering and using an In-Ga metal oxide target (In:Ga=7:93). In addition, in order to deposit the oxide semiconductor films 108a and 108c by a sputtering method using DC discharge, when In:M=x:y [atomic number ratio], y / (x+y) is preferably set to less than 0.96, more preferably less than 0.95, for example, 0.93.

[0202] Note that the atomic number ratio of the oxide semiconductor films 108 a , 108 b , and 108 c includes a variation of ±40% of the atomic number ratio as an error.

[0203] In addition, the structures of the transistors in this embodiment mode can be freely combined with each other.

[0204] <Method 1 for manufacturing semiconductor device>

[0205] Below, refer to 9A to 10D A semiconductor device as one embodiment of the present invention will be described in detail. Figures 1A to 1C A method for manufacturing transistor 100 is shown.

[0206] The film (insulating film, oxide semiconductor film, conductive film, etc.) constituting the transistor 100 can be formed by sputtering, chemical vapor deposition (CVD), vacuum evaporation, pulsed laser deposition (PLD). Alternatively, it can be formed by coating or printing. As typical examples of film forming methods, there are sputtering and plasma enhanced chemical vapor deposition (PECVD), but thermal CVD can also be used. As an example of thermal CVD, metal organic chemical vapor deposition (MOCVD) can also be used.

[0207] Deposition using the thermal CVD method is performed as follows: the pressure in the processing chamber is set to atmospheric pressure or reduced pressure, and the raw material gas and the oxidant are simultaneously supplied into the processing chamber to react near or above the substrate. Since the thermal CVD method does not generate plasma during deposition, it has the advantage of not generating defects caused by plasma damage.

[0208] In addition, deposition using the ALD method is performed in the following method: the pressure in the processing chamber is set to atmospheric pressure or reduced pressure, the source gas for the reaction is introduced into the processing chamber in sequence, and the gas is repeatedly introduced in this order. For example, two or more source gases are supplied into the processing chamber in sequence by switching each switch valve (also called a high-speed valve). For example, an inert gas (argon or nitrogen, etc.) is introduced at the same time or after the introduction of the first source gas so that the source gases are not mixed, and then the second source gas is introduced. Note that when the first source gas and the inert gas are introduced at the same time, the inert gas is used as a carrier gas, and in addition, the inert gas can be introduced at the same time as the introduction of the second source gas. In addition, the first source gas can be discharged by vacuum pumping without introducing an inert gas, and then the second source gas can be introduced. The first source gas is adsorbed on the surface of the substrate to form a first monoatomic layer; then the second source gas is introduced to react with the first monoatomic layer; as a result, the second monoatomic layer is stacked on the first monoatomic layer to form a thin film.

[0209] By repeatedly introducing the gases in this order until the desired thickness is obtained, a thin film with good step coverage can be formed. Since the thickness of the thin film can be adjusted by the number of times the gases are repeatedly introduced in sequence, the ALD method can accurately adjust the thickness and is suitable for manufacturing micro transistors.

[0210] First, a conductive film is formed over the substrate 102, and the conductive film is processed by a photolithography process and an etching process to form a conductive film 104 serving as a first gate electrode. Next, insulating films 106 and 107 serving as a first gate insulating film are formed over the conductive film 104 (see Fig. 9A ).

[0211] The conductive film 104 used as the first gate electrode can be formed by sputtering, chemical vapor deposition (CVD), vacuum evaporation, or pulsed laser deposition (PLD). Alternatively, it can be formed by coating or printing. Typical deposition methods include sputtering and plasma enhanced chemical vapor deposition (PECVD). Thermal CVD methods such as the metal organic chemical vapor deposition (MOCVD) method described above or atomic layer deposition (ALD) methods can also be used.

[0212] In this embodiment, a glass substrate is used as the substrate 102. As the conductive film 104 serving as a first gate electrode, a tungsten film is formed to a thickness of 100 nm by a sputtering method.

[0213] The insulating films 106 and 107 used as the first gate insulating film can be formed by sputtering, PECVD, thermal CVD, vacuum evaporation, PLD, etc. In this embodiment, a 400 nm thick silicon nitride film is formed as the insulating film 106 by PECVD, and a 50 nm thick silicon oxynitride film is formed as the insulating film 107.

[0214] A stacked structure of silicon nitride films can be used as the insulating film 106. Specifically, a stacked structure of three layers of a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film can be used as the insulating film 106. An example of the three-layer stacked structure is as follows.

[0215] A first silicon nitride film with a thickness of 50 nm can be formed under the following conditions: for example, silane with a flow rate of 200 sccm, nitrogen with a flow rate of 2000 sccm, and ammonia with a flow rate of 100 sccm are used as source gases, the source gases are supplied into the reaction chamber of the PECVD device, the pressure in the reaction chamber is controlled to 100 Pa, and a high-frequency power supply of 27.12 MHz is used to supply 2000 W of power.

[0216] A second silicon nitride film with a thickness of 300 nm can be formed under the following conditions: silane with a flow rate of 200 sccm, nitrogen with a flow rate of 2000 sccm, and ammonia with a flow rate of 2000 sccm are used as source gases, the source gases are supplied into the reaction chamber of the PECVD device, the pressure in the reaction chamber is controlled to 100 Pa, and a high-frequency power supply of 27.12 MHz is used to supply 2000 W of power.

[0217] A third silicon nitride film with a thickness of 50 nm can be formed under the following conditions: silane with a flow rate of 200 sccm and nitrogen with a flow rate of 5000 sccm are used as source gases, the source gases are supplied into the reaction chamber of the PECVD device, the pressure in the reaction chamber is controlled to 100 Pa, and a high-frequency power supply of 27.12 MHz is used to supply 2000 W of power.

[0218] In addition, the first silicon nitride film, the second silicon nitride film, and the third silicon nitride film can be formed at a substrate temperature of 350°C.

[0219] When the insulating film 106 has a three-layer stacked structure of silicon nitride films, for example, when a conductive film containing copper (Cu) is used as the conductive film 104, the following effects can be achieved.

[0220] The first silicon nitride film can suppress the diffusion of copper (Cu) elements from the conductive film 104. The second silicon nitride film has a function of releasing hydrogen and can improve the withstand voltage of the insulating film used as a gate insulating film. The third silicon nitride film is a film that releases less hydrogen and can suppress the diffusion of hydrogen released from the second silicon nitride film.

[0221] The insulating film 107 is preferably formed using an insulating film containing oxygen in order to improve interface characteristics between the insulating film 107 and the oxide semiconductor film 108 to be formed later.

[0222] Next, an oxide semiconductor film 108 is formed over the insulating film 107 (see Fig. 9B ).

[0223] In this embodiment, an oxide semiconductor film is formed by a sputtering method using an In-Ga-Zn metal oxide target (In:Ga:Zn=1:1:1.2 (atomic number ratio)), a mask is formed on the oxide semiconductor film by a photolithography process, and the oxide semiconductor film is processed into a desired shape to form an island-shaped oxide semiconductor film 108.

[0224] After the oxide semiconductor film 108 is formed, heat treatment may be performed at a temperature of 150° C. or higher and lower than the substrate strain point, preferably 200° C. or higher and 450° C. or lower, and more preferably 300° C. or higher and 450° C. or lower. The heat treatment here is one of the high-purification treatments for the oxide semiconductor film, and can reduce hydrogen, water, etc. included in the oxide semiconductor film 108. In addition, heat treatment for the purpose of reducing hydrogen, water, etc. may also be performed before the oxide semiconductor film 108 is processed into an island shape.

[0225] The oxide semiconductor film 108 can be heat treated using an electric furnace, an RTA apparatus, or the like. By using an RTA apparatus, the heat treatment can be performed at a temperature not lower than the strain point of the substrate for a short time, thereby shortening the heat treatment time.

[0226] The heat treatment of the oxide semiconductor film 108 can be performed in an atmosphere of nitrogen, oxygen, ultra-dry air (air with a water content of less than 20 ppm, preferably less than 1 ppm, and more preferably less than 10 ppb) or a rare gas (argon, helium, etc.). The above-mentioned nitrogen, oxygen, ultra-dry air or rare gas preferably does not contain hydrogen, water, etc. In addition, after heat treatment in a nitrogen or rare gas atmosphere, heat treatment can also be performed in an oxygen or ultra-dry air atmosphere. As a result, while hydrogen, water, etc. in the oxide semiconductor film can be detached, oxygen can be supplied to the oxide semiconductor film. As a result, the amount of oxygen vacancies in the oxide semiconductor film can be reduced.

[0227] In addition, in the case of forming the oxide semiconductor film 108 by sputtering, a rare gas (typically argon), oxygen, or a mixture of a rare gas and oxygen is appropriately used as a sputtering gas. In addition, when a mixture of a rare gas and oxygen is used, it is preferred to increase the proportion of oxygen gas relative to the rare gas. In addition, the sputtering gas needs to be highly purified. For example, as a sputtering gas, oxygen gas or argon gas is used, a high-purity gas with a dew point of less than -40°C, preferably less than -80°C, more preferably less than -100°C, and further preferably less than -120°C is used, thereby preventing moisture and the like from mixing into the oxide semiconductor film 108 as much as possible.

[0228] When the oxide semiconductor film 108 is formed by sputtering, it is preferable to perform high vacuum evacuation (evacuation to 5×10 -7 Pa to 1×10 -4 Pa) to remove as much water and the like which are impurities to the oxide semiconductor film 108 as possible. Alternatively, it is preferable to combine a turbomolecular pump and a cold trap to prevent gas, especially gas containing carbon or hydrogen, from flowing back into the processing chamber from the exhaust system.

[0229] Next, conductive films 112a and 112b serving as a source electrode and a drain electrode are formed over the insulating film 107 and the oxide semiconductor film 108 (see Fig. 9C ).

[0230] In this embodiment, as the conductive films 112a and 112b, a stacked film of a tungsten film having a thickness of 50 nm and an aluminum film having a thickness of 400 nm is formed by a sputtering method, a mask is formed over the stacked film by a photolithography process, and the stacked film is processed into a desired shape, thereby forming the conductive films 112a and 112b. Note that in this embodiment, a two-layer stacked structure is used as the conductive films 112a and 112b, but the present invention is not limited to this. For example, as the conductive films 112a and 112b, a three-layer stacked structure of a tungsten film having a thickness of 50 nm, an aluminum film having a thickness of 400 nm, and a titanium film having a thickness of 100 nm may be used.

[0231] In addition, the surface (back channel side) of the oxide semiconductor film 108 may be washed after the conductive films 112a and 112b are formed. As a method for washing, for example, washing with a chemical solution such as phosphoric acid can be cited. By washing with a chemical solution such as phosphoric acid, impurities (for example, elements contained in the conductive films 112a and 112b) attached to the surface of the oxide semiconductor film 108 can be removed.

[0232] Note that a recessed portion may be formed in a portion of the oxide semiconductor film 108 when the conductive films 112 a and 112 b are formed and / or in the above-described cleaning step.

[0233] Through the above steps, the transistor 100 is formed.

[0234] Next, insulating films 114 and 116 serving as protective insulating films of the transistor 100 are formed over the transistor 100, specifically, over the oxide semiconductor film 108 and the conductive films 112a and 112b of the transistor 100 (see Fig.9D ).

[0235] Preferably, after forming the insulating film 114, the insulating film 116 is continuously formed without being exposed to the atmosphere. After forming the insulating film 114, the insulating film 116 is continuously formed without being exposed to the atmosphere by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas, thereby reducing the concentration of impurities derived from atmospheric components at the interface between the insulating film 114 and the insulating film 116, and moving oxygen in the insulating films 114 and 116 to the oxide semiconductor film 108, thereby reducing the amount of oxygen vacancies in the oxide semiconductor film 108.

[0236] For example, as the insulating film 114, a silicon oxynitride film can be formed by the PECVD method. At this time, as source gases, it is preferred to use a deposition gas containing silicon and an oxidizing gas. Typical examples of deposition gases containing silicon are silane, disilane, trisilane, fluorinated silane, and the like. As oxidizing gases, there are nitrous oxide, nitrogen dioxide, and the like. In addition, the insulating film 114 containing nitrogen and having a small amount of defects can be formed by the PECVD method under the following conditions: the ratio of the oxidizing gas to the above-mentioned deposition gas is greater than 20 times and less than 100 times, preferably greater than 40 times and less than 80 times; and the pressure in the processing chamber is less than 100 Pa, preferably less than 50 Pa.

[0237] In this embodiment, as the insulating film 114, a silicon oxynitride film is formed by a PECVD method under the following conditions: the temperature of the substrate 102 is maintained at 220° C., silane with a flow rate of 50 sccm and nitrous oxide with a flow rate of 2000 sccm are used as source gases, the pressure in the processing chamber is 20 Pa, and the high-frequency power supplied to the parallel plate electrodes is 100 W at 13.56 MHz (power density is 1.6×10 -2 W / cm 2 ).

[0238] As the insulating film 116, a silicon oxide film or a silicon oxynitride film is formed under the following conditions: the temperature of the substrate in the processing chamber of the PECVD device which is vacuum-evacuated is maintained at 180° C. or higher and 280° C. or lower, preferably 200° C. or higher and 240° C. or lower, a source gas is introduced into the processing chamber and the pressure in the processing chamber is set to 100 Pa or higher and 250 Pa or lower, preferably 100 Pa or higher and 200 Pa or lower, and 0.17 W / cm2 is supplied to the electrode in the processing chamber. 2 Above 0.5W / cm 2 Below, preferably 0.25W / cm 2 Above and 0.35W / cm 2 The following high frequency power.

[0239] As the deposition condition of the insulating film 116, high frequency power having the power density described above is supplied to the reaction chamber having the pressure described above, thereby improving the decomposition efficiency of the source gas in the plasma, increasing the oxygen radicals, and promoting the oxidation of the source gas, so that the oxygen content in the insulating film 116 exceeds the stoichiometric composition. On the other hand, in the film formed at the substrate temperature described above, since the bonding force between silicon and oxygen is weak, part of the oxygen in the film is released by the heat treatment in the subsequent step. As a result, an oxide insulating film containing oxygen exceeding the stoichiometric composition and part of the oxygen released by heating can be formed.

[0240] In the step of forming the insulating film 114, the insulating film 114 serves as a protective film for the oxide semiconductor film 108. Therefore, the insulating film 116 can be formed using high-frequency power with high power density while reducing damage to the oxide semiconductor film 108.

[0241] In addition, in the deposition conditions of the insulating film 116, when the flow rate of the deposition gas containing silicon relative to the oxidizing gas is increased, the amount of defects in the insulating film 116 can be reduced. Typically, an oxide insulating layer with a small amount of defects can be formed, in which the spin density of the signal caused by the silicon dangling bond and appearing at g=2.001 measured by ESR is less than 6×10 17 Spin / cm 3 , preferably 3×1017 Spin / cm 3 Below, more preferably 1.5×10 17 Spin / cm 3 As a result, the reliability of the transistor can be improved.

[0242] Heat treatment may be performed after forming the insulating films 114 and 116. The heat treatment can reduce nitrogen oxides included in the insulating films 114 and 116. In addition, by the heat treatment, part of oxygen in the insulating films 114 and 116 can be moved to the oxide semiconductor film 108, so that the amount of oxygen vacancies in the oxide semiconductor film 108 can be reduced.

[0243] The temperature of the heat treatment performed on the insulating films 114 and 116 is typically set to 150° C. or higher and 400° C. or lower, preferably 300° C. or higher and 400° C. or lower, and more preferably 320° C. or higher and 370° C. or lower. The heat treatment can be performed in an atmosphere of nitrogen, oxygen, ultra-dry air (air having a water content of 20 ppm or lower, preferably 1 ppm or lower, and more preferably 10 ppb or lower), or a rare gas (argon, helium, etc.). In the heat treatment in which the nitrogen, oxygen, ultra-dry air, or rare gas preferably does not contain hydrogen, water, etc., an electric furnace, an RTA device, etc. can be used.

[0244] In this embodiment, heat treatment is performed at 350° C. for 1 hour in an atmosphere of nitrogen and oxygen.

[0245] Next, a film 130 having a function of suppressing oxygen release is formed over the insulating film 116 (see Fig. 10A ).

[0246] The film 130 having the function of suppressing oxygen release can be formed using a conductive film containing indium or a semiconductor film containing indium.

[0247] In this embodiment, as the film 130 having the function of suppressing oxygen release, an ITSO film having a thickness of 5 nm is formed by using a sputtering device. In addition, when the thickness of the film 130 is set to be greater than 1 nm and less than 20 nm or greater than 2 nm and less than 10 nm, oxygen can be advantageously permeated and oxygen release can be suppressed, which is preferred.

[0248] Next, oxygen 139 is added to the insulating films 114 and 116 and the oxide semiconductor film 108 through the film 130 (see Fig. 10B ).

[0249] As a method of adding the oxygen 139 to the insulating films 114 and 116 and the oxide semiconductor film 108 through the film 130, there are ion doping method, ion implantation method, plasma treatment method, and the like.

[0250] In addition, when adding oxygen 139, by applying a bias voltage to the substrate side, oxygen 139 can be effectively added to the insulating films 114 and 116 and the oxide semiconductor film 108. For example, an ashing device is used, and the power density of the bias voltage applied to the substrate side of the ashing device can be 1 W / cm 2 Above and 5W / cm 2 Furthermore, the substrate temperature when adding oxygen 139 is higher than room temperature and lower than 300° C., preferably higher than 100° C. and lower than 250° C., so that oxygen can be effectively added to the insulating films 114 and 116 .

[0251] When the film 130 is provided over the insulating film 116 and oxygen is added thereto, the film 130 functions as a protective film that suppresses release of oxygen from the insulating film 116. Therefore, a large amount of oxygen can be added to the insulating films 114 and 116 and the oxide semiconductor film 108.

[0252] In addition, when oxygen is introduced by plasma treatment, the amount of oxygen introduced into the insulating film 116 can be increased by exciting oxygen using microwaves to generate high-density oxygen plasma.

[0253] Next, the film 130 having the function of suppressing oxygen release is removed using an etchant 142 (see Fig. 10C ).

[0254] As the etchant 142, a chemical solution or etching gas that can remove the film 130 having a function of suppressing oxygen release is used. In this embodiment, a 5% oxalic acid aqueous solution is used as the etchant 142. Note that, as the etchant 142, after using the 5% oxalic acid aqueous solution, a 0.5% hydrofluoric acid may be used. By using a 0.5% hydrofluoric acid, the film having a function of suppressing oxygen release can be advantageously removed.

[0255] Next, an insulating film 118 is formed on the insulating film 116, thereby obtaining Figures 1A to 1C The transistor 100 shown (see Fig. 10D ).

[0256] When the insulating film 118 is formed by a PECVD method, the substrate temperature is set to 300° C. to 400° C., preferably 320° C. to 370° C., so that a dense film can be formed.

[0257] For example, when a silicon nitride film is formed as the insulating film 118 by the PECVD method, a deposition gas containing silicon, nitrogen and ammonia are preferably used as source gases. Ammonia is used in an amount less than the amount of nitrogen, so that ammonia dissociates in the plasma and generates activated substances. The activated substances cut the bonds between silicon and hydrogen and the triple bonds of nitrogen included in the deposition gas containing silicon. As a result, the bonding between silicon and nitrogen can be promoted, and a silicon nitride film with fewer bonds between silicon and hydrogen, fewer defects and a dense structure can be formed. On the other hand, when the amount of ammonia is greater than the amount of nitrogen, the decomposition of the deposition gas containing silicon and nitrogen is not promoted, so that a non-dense silicon nitride film is formed, in which the bonds between silicon and hydrogen remain and the defects increase. Therefore, in the source gas, the nitrogen flow ratio relative to ammonia is set to be greater than 5 and less than 50, preferably greater than 10 and less than 50.

[0258] In this embodiment, as the insulating film 118, a silicon nitride film with a thickness of 50 nm is formed by using a PECVD device and using source gases of silane, nitrogen and ammonia. The flow rate of silane is 50 sccm, the flow rate of nitrogen is 5000 sccm, and the flow rate of ammonia is 100 sccm. The pressure of the processing chamber is 100 Pa, the substrate temperature is 350°C, and a high-frequency power of 1000 W is supplied to the parallel plate electrodes by a high-frequency power supply of 27.12 MHz. The PECVD device has an electrode area of ​​6000 cm 2 The power supplied by the parallel plate PECVD device is converted into power per unit area (power density) of 1.7×10 -1 W / cm 2 .

[0259] Note that by performing heat treatment before or after forming the insulating film 118, excess oxygen included in the insulating films 114 and 116 can be diffused into the oxide semiconductor film 108 to fill oxygen vacancies in the oxide semiconductor film 108. Alternatively, by forming the insulating film 118 by heating, excess oxygen included in the insulating films 114 and 116 can be diffused into the oxide semiconductor film 108 to fill oxygen vacancies in the oxide semiconductor film 108. The temperature of the heat treatment that can be performed before or after forming the insulating film 118 is typically 150° C. to 400° C., preferably 300° C. to 400° C., and preferably 320° C. to 370° C.

[0260] Through the above process, it is possible to manufacture Figures 1A to 1C Transistor 100 is shown.

[0261] <Method 2 for manufacturing semiconductor device>

[0262] Next, use FIG. 11A to FIG. 12B A semiconductor device as one embodiment of the present invention will be described in detail. FIG. 4A to FIG. 4C 1. A method for manufacturing transistor 150 is shown.

[0263] First, proceed to Fig. 9B In the process shown in FIG. 1 , insulating films 114 and 116 and a film 130 having a function of suppressing oxygen release are formed over the insulating film 107 and the oxide semiconductor film 108 (see FIG. 1 ). Fig.11A ).

[0264] Next, oxygen 139 is added to the insulating films 114 and 116 and the oxide semiconductor film 108 through the film 130 having a function of suppressing oxygen release (see Fig. 11B ).

[0265] Next, the film 130 having the function of suppressing oxygen release is removed using an etchant 142 (see Fig. 11C ).

[0266] Next, a mask is formed over the insulating film 116 by a photolithography step, and openings 141a and 141b are formed in desired regions of the insulating film 114 and the insulating film 116. Note that the openings 141a and 141b reach the oxide semiconductor film 108 (see Fig.11D ).

[0267] Next, a conductive film is formed over the oxide semiconductor film 108 and the insulating film 116 so as to cover the openings 141a and 141b, a mask is formed over the conductive film by a photolithography process, and the conductive film is processed into a desired shape, thereby forming conductive films 112a and 112b (see Fig. 12A ).

[0268] Next, an insulating film 118 is formed on the insulating film 116 and the conductive films 112a and 112b (see Fig. 12B ).

[0269] Through the above process, it is possible to manufacture FIG. 4A to FIG. 4C Transistor 150 is shown.

[0270] Note, manufacturing FIG. 5A to FIG. 5C The transistor 160 shown is configured such that the insulating films 114 and 116 remain above the channel region of the oxide semiconductor film 108 when the openings 141 a and 141 b are formed.

[0271] <Method 3 for manufacturing semiconductor device>

[0272] Below, refer to FIG. 13A to FIG. 14D A semiconductor device as one embodiment of the present invention will be described in detail. FIG. 6A to FIG. 6C 1. A method for manufacturing transistor 170 is shown.

[0273] Fig.13A and Fig. 13C and Fig.14Aand Fig. 14C A cross-sectional view along the channel length direction of the transistor 170 during the manufacturing process is shown. Fig. 13B and Fig.13D and Fig. 14B and Fig.14D A cross-sectional view along the channel width of the transistor 170 during a manufacturing process is shown.

[0274] First, proceed to Fig. 10D The process shown (see Fig.13A and Fig. 13B ).

[0275] Next, a mask is formed on the insulating film 118 by a photolithography process, and an opening 142c is formed in a desired region of the insulating films 114, 116, and 118. In addition, a mask is formed on the insulating film 118 by a photolithography process, and openings 142a and 142b are formed in a desired region of the insulating films 106, 107, 114, 116, and 118. The opening 142c reaches the conductive film 112b. In addition, the openings 142a and 142b reach the conductive film 104 (see FIG. Fig. 13C and Fig.13D ).

[0276] The openings 142a, 142b and the opening 142c may be formed simultaneously or in different steps. When the openings 142a, 142b and the opening 142c are formed simultaneously, they may be formed using a gray tone mask or a half tone mask, for example.

[0277] Next, a conductive film 120 is formed on the insulating film 118 so as to cover the openings 142a, 142b, and 142c (see Fig.14A and Fig. 14B ).

[0278] As the conductive film 120, for example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) can be used. In particular, a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide, or indium tin oxide containing silicon oxide can be used for the conductive film 120. In addition, the conductive film 120 is advantageously formed using the same type of material as the film 130 having the function of suppressing oxygen release, and the manufacturing cost can be suppressed.

[0279] In addition, the conductive film 120 can be formed by, for example, a sputtering method. In this embodiment, a 110 nm-thick ITSO film is formed by a sputtering method.

[0280] Next, a mask is formed over the conductive film 120 by a photolithography process, and the conductive film 120 is processed into a desired shape to form conductive films 120a and 120b (see FIG. Fig. 14C and Fig.14D ).

[0281] Through the above steps, we can produce FIG. 6A to FIG. 6C Transistor 170 is shown.

[0282] The structure and method described in this embodiment can be used in combination with the structure and method described in other embodiment as appropriate.

[0283] Implementation Method 2

[0284] In this embodiment, a structure of an oxide semiconductor film included in a semiconductor device which is one embodiment of the present invention is described in detail.

[0285] Oxide semiconductor films are roughly divided into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. Non-single-crystal oxide semiconductor films include CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor) films, polycrystalline oxide semiconductor films, microcrystalline oxide semiconductor films, and amorphous oxide semiconductor films.

[0286] First, the CAAC-OS film is described.

[0287] The CAAC-OS film is one of oxide semiconductor films including a plurality of crystal portions aligned in the c-axis.

[0288] A composite analysis image (also called a high-resolution TEM image) of a bright field image and a diffraction pattern of the CAAC-OS film was observed using a transmission electron microscope (TEM). Therefore, multiple crystal parts were clearly observed. However, even in the high-resolution TEM image, the boundary between the crystal parts, i.e., the grain boundary, was not clearly observed. Therefore, in the CAAC-OS film, a decrease in electron mobility due to the grain boundary is not likely to occur.

[0289] According to the high-resolution cross-sectional TEM image of the CAAC-OS film observed from a direction roughly parallel to the sample surface, the metal atoms are arranged in layers in the crystal part. Each metal atomic layer has a morphology that reflects the surface on which the CAAC-OS film is formed (hereinafter, the surface on which the CAAC-OS film is formed is referred to as the formed surface) or the top surface of the CAAC-OS film and is arranged parallel to the top surface or the formed surface of the CAAC-OS film.

[0290] On the other hand, high-resolution planar TEM images of the CAAC-OS film observed from a direction substantially perpendicular to the sample surface show that metal atoms are arranged in a triangular or hexagonal shape in the crystal part, but there is no regularity in the arrangement of metal atoms between different crystal parts.

[0291] The CAAC-OS film was structurally analyzed using an X-ray diffraction (XRD) device. For example, when a CAAC-OS film including InGaZnO4 crystals was analyzed using an out-of-plane method, a peak appeared when the diffraction angle (2θ) was around 31°. Since this peak originates from the (009) plane of the InGaZnO4 crystal, it can be seen that the crystals in the CAAC-OS film have a c-axis orientation, and the c-axis is oriented in a direction roughly perpendicular to the formed surface or top surface of the CAAC-OS film.

[0292] Note that when a CAAC-OS film including InGaZnO4 crystals is analyzed using an out-of-plane method, a peak is observed near 2θ of 36° in addition to a peak near 2θ of 31°. The peak near 2θ of 36° means that a portion of the CAAC-OS film contains crystals that are not oriented along the c-axis. Preferably, a peak appears near 2θ of 31° in the CAAC-OS film, and no peak appears near 2θ of 36°.

[0293] The CAAC-OS film is an oxide semiconductor film with a low impurity concentration. Impurities refer to elements other than the main components of the oxide semiconductor film, such as hydrogen, carbon, silicon, and transition metal elements. In particular, the binding force between elements such as silicon and oxygen is stronger than the binding force between metal elements included in the oxide semiconductor film and oxygen, and the atomic arrangement of the oxide semiconductor film is disrupted and the crystallinity is reduced by taking oxygen from the oxide semiconductor film. In addition, heavy metals such as iron or nickel, argon, carbon dioxide, etc., because of their large atomic radius (molecular radius), disrupt the atomic arrangement of the oxide semiconductor film and reduce the crystallinity. Note that impurities contained in the oxide semiconductor film sometimes become carrier traps or carrier generation sources.

[0294] In addition, the CAAC-OS film is an oxide semiconductor film with a low defect state density. For example, oxygen vacancies in the oxide semiconductor film may become carrier traps or may become carrier generation sources when hydrogen is captured therein.

[0295] The state of low impurity concentration and low defect state density (small number of oxygen vacancies) is called "high-purity intrinsic" or "basically high-purity intrinsic". The high-purity intrinsic or basically high-purity intrinsic oxide semiconductor film has fewer carrier generation sources and therefore can have a lower carrier density. Therefore, transistors using the oxide semiconductor film rarely have electrical characteristics of negative threshold voltage (also called normally-on characteristics). In addition, the high-purity intrinsic or basically high-purity intrinsic oxide semiconductor film has fewer carrier traps. Therefore, the electrical characteristics of the transistor including the oxide semiconductor film vary little and have high reliability. In addition, it takes a long time for the charges captured by the carrier traps of the oxide semiconductor film to be released, and sometimes they can act like fixed charges. Therefore, the electrical characteristics of transistors including oxide semiconductor films with high impurity concentrations and high defect state density are sometimes unstable.

[0296] Furthermore, in a transistor using the CAAC-OS film, variation in electric characteristics due to irradiation with visible light or ultraviolet light is small.

[0297] Next, a microcrystalline oxide semiconductor film is described.

[0298] The microcrystalline oxide semiconductor film has an area where a crystal part is observed in a high-resolution TEM image and an area where a crystal part is not clearly observed. The crystal part in the microcrystalline oxide semiconductor film is mostly greater than 1 nm and less than 100 nm, or greater than 1 nm and less than 10 nm. In particular, an oxide semiconductor film having nanocrystalline (nc: nanocrystal) microcrystals with a size of greater than 1 nm and less than 10 nm or greater than 1 nm and less than 3 nm is called an nc-OS (nanocrystalline Oxide Semiconductor: nanocrystalline oxide semiconductor) film. In addition, for example, in a high-resolution TEM image of an nc-OS film, it is sometimes not easy and clear to observe the grain boundary.

[0299] The atomic arrangement of the nc-OS film is periodic in a tiny region (e.g., a region with a size of 1 nm or more and 10 nm or less, especially a region with a size of 1 nm or more and 3 nm or less). In addition, the regularity of the crystal orientation is not observed between different crystalline parts of the nc-OS film. Therefore, no orientation is observed in the film as a whole. Therefore, sometimes the nc-OS film is no different from the amorphous oxide semiconductor film in some analysis methods. For example, when the nc-OS film is structurally analyzed by an out-of-plane method of an XRD device using an X-ray having a diameter larger than that of the crystalline part, no peak representing the crystalline surface appears. In addition, a halo pattern is shown in the selected area electron diffraction pattern of the nc-OS film obtained by using an electron beam having a probe diameter larger than that of the crystalline part (e.g., 50 nm or more). On the other hand, spots are shown in the nanobeam electron diffraction pattern of the nc-OS film obtained by using an electron beam having a diameter close to the size of the crystalline part or smaller than the crystalline part. In addition, in the nanobeam electron diffraction pattern of the nc-OS film, a high brightness (ring-shaped) area such as a circle is sometimes observed. Furthermore, in the nanobeam electron diffraction pattern of the nc-OS film, a plurality of spots are sometimes observed in a ring-shaped region.

[0300] The nc-OS film is an oxide semiconductor film with higher regularity than the amorphous oxide semiconductor film. Therefore, the defect state density of the nc-OS film is lower than that of the amorphous oxide semiconductor film. However, the regularity of the crystal orientation is not observed between different crystal parts of the nc-OS film. Therefore, the defect state density of the nc-OS film is higher than that of the CAAC-OS film.

[0301] Next, the amorphous oxide semiconductor film is described.

[0302] An amorphous oxide semiconductor film is an oxide semiconductor film having a disordered atomic arrangement and having no crystalline part. An example thereof is an oxide semiconductor film in an amorphous state such as quartz.

[0303] In a high-resolution TEM image of an amorphous oxide semiconductor film, no crystal portion is observed.

[0304] When the amorphous oxide semiconductor film is structurally analyzed using an XRD device by an out-of-plane method, no peak indicating a crystal plane appears. In addition, a halo pattern is observed in the electron diffraction pattern of the amorphous oxide semiconductor film. In addition, in the nanobeam electron diffraction pattern of the amorphous oxide semiconductor film, no spots are observed, but a halo pattern is observed.

[0305] In addition, the oxide semiconductor film may have a structure showing physical properties between the nc-OS film and the amorphous oxide semiconductor film. An oxide semiconductor film having such a structure is particularly referred to as an amorphous-like oxide semiconductor (a-like OS: amorphous-like Oxide Semiconductor) film.

[0306] In the high-resolution TEM images of a-like OS films, cavities (also called voids) are sometimes observed. In addition, in the high-resolution TEM images of a-like OS films, there are areas where the crystal part is clearly confirmed and areas where the crystal part is not confirmed. The a-like OS film sometimes crystallizes due to a small amount of electron irradiation during TEM observation, and the growth of the crystal part is observed. On the other hand, in a good nc-OS film, crystallization due to a small amount of electron irradiation during TEM observation is almost not observed.

[0307] In addition, the size of the crystalline part of the class a OS film and the nc-OS film can be measured using high-resolution TEM images. For example, InGaZnO4 crystals have a layered structure with two Ga-Zn-O layers between the In-O layers. The unit lattice of the InGaZnO4 crystal has a total of nine layers, three In-O layers and six Ga-Zn-O layers, overlapping in the c-axis direction as a layered structure. Therefore, the spacing between these adjacent layers is roughly equal to the lattice surface spacing of the (009) plane (also called the d value), and its value is obtained from the crystal structure analysis, that is, 0.29nm. Therefore, focusing on the lattice fringes of the high-resolution TEM image, in the region where the spacing of the lattice fringes is greater than 0.28nm and less than 0.30nm, each lattice fringe corresponds to the ab plane of the InGaZnO4 crystal.

[0308] In addition, the density of the oxide semiconductor film may vary depending on the structure. For example, when the composition of a certain oxide semiconductor film is known, the structure of the oxide semiconductor film can be estimated by comparing it with the density of a single crystal oxide semiconductor film having the same composition as the oxide semiconductor film. For example, the density of the class a OS film is greater than 78.6% and less than 92.3% relative to the density of a single crystal oxide semiconductor film having the same composition. For example, the density of the nc-OS film and the density of the CAAC-OS film are greater than 92.3% and less than 100% relative to the density of a single crystal oxide semiconductor film having the same composition. Note that it is difficult to form an oxide semiconductor film whose density is less than 78% relative to the density of a single crystal oxide semiconductor film.

[0309] The above content is explained using a specific example. For example, in an oxide semiconductor film where the atomic ratio satisfies In:Ga:Zn=1:1:1, the density of single crystal InGaZnO4 having a rhombohedral crystal structure is 6.357 g / cm 3 Therefore, for example, in an oxide semiconductor film where the atomic ratio satisfies In:Ga:Zn=1:1:1, the density of the type a OS film is 5.0 g / cm 3 Above and less than 5.9g / cm 3 In addition, for example, in an oxide semiconductor film where the atomic ratio satisfies In:Ga:Zn=1:1:1, the density of the nc-OS film or the density of the CAAC-OS film is 5.9 g / cm 3 Above and less than 6.3g / cm 3 .

[0310] Note that sometimes there are no single crystals with the same composition. In this case, by combining single crystals with different compositions in a given ratio, the density of the single crystal equivalent to the desired composition can be calculated. The density of the single crystal with the desired composition can be calculated using a weighted average of the combined ratios of the single crystals with different compositions. Note that it is preferred to reduce the types of combined single crystals as much as possible to calculate the density.

[0311] Note that the oxide semiconductor film may be a stacked-layer film including two or more of an amorphous oxide semiconductor film, an a-type OS film, a microcrystalline oxide semiconductor film, and a CAAC-OS film, for example.

[0312] The structure described in this embodiment mode can be used in combination with the structure described in any other embodiment mode as appropriate.

[0313] Implementation 3

[0314] In this embodiment, using Figures 15 to 17 An example of a display device including the transistor described as an example in the above embodiment will be described.

[0315] Fig.15 is a plan view showing an example of a display device. Fig.15 The display device 700 shown includes: a pixel portion 702 arranged above a first substrate 701; a source driver circuit portion 704 and a gate driver circuit portion 706 arranged above the first substrate 701; a sealant 712 arranged in a manner surrounding the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706; and a second substrate 705 arranged in a manner opposite to the first substrate 701. Note that the first substrate 701 and the second substrate 705 are sealed by the sealant 712. That is, the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 are sealed by the first substrate 701, the sealant 712, and the second substrate 705. Note that although in Fig.15 Although not shown in the figure, a display element is provided between the first substrate 701 and the second substrate 705.

[0316] In addition, in the display device 700, an FPC (Flexible printed circuit) terminal portion 708 electrically connected to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 is provided in an area above the first substrate 701 that is not surrounded by the sealant 712. In addition, the FPC 716 is connected to the FPC terminal portion 708, and various signals are supplied to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 through the FPC 716. In addition, the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708 are each connected to a signal line 710. Various signals from the FPC 716 are supplied to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708 through the signal line 710.

[0317] In addition, a plurality of gate drive circuit units 706 may be provided in the display device 700. In addition, as the display device 700, although an example in which the source drive circuit unit 704 and the gate drive circuit unit 706 are formed above the first substrate 701 (the pixel unit 702 is also formed therein) is shown, it is not limited to this structure. For example, only the gate drive circuit unit 706 may be formed above the first substrate 701, or only the source drive circuit unit 704 may be formed above the first substrate 701. In this case, a substrate having a source drive circuit or a gate drive circuit formed thereon (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) may be mounted on the first substrate 701. In addition, there is no particular limitation on the connection method of the separately formed drive circuit substrate, and a COG (Chip On Glass) method, a wire bonding method, or the like may be used.

[0318] The pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 included in the display device 700 include a plurality of transistors. As the plurality of transistors, transistors of the semiconductor device of one embodiment of the present invention can be used.

[0319] In addition, the display device 700 may include various elements. For example, the element includes at least one of a liquid crystal element, an EL (electroluminescent) element (e.g., an EL element including organic and inorganic materials, an organic EL element, or an inorganic EL element), an LED (e.g., a white LED, a red LED, a green LED, a blue LED, etc.), a transistor (a transistor that emits light according to an electric current), an electron emission element, an electronic ink, an electrophoretic element, a grating light valve (GLV), a plasma display (PDP), a display element using a microelectromechanical system (MEMS), a digital micromirror device (DMD), a digital microshutter (DMS), MIRASOL (registered trademark), an IMOD (interference measurement adjustment) element, a shutter-type MEMS display element, an optical interference-type MEMS display element, an electrowetting element, a piezoelectric ceramic display, and a display element including a carbon nanotube. In addition, a display medium whose contrast, brightness, reflectivity, transmittance, etc., change due to an electric or magnetic effect may also be included. As an example of a display device using an EL element, there is an EL display, etc. As an example of a display device using an electron emission element, there are field emission displays (FED) or SED flat-panel displays (SED: Surface-conduction Electron-emitter Display: surface conduction electron emission display), etc. As an example of a display device including a liquid crystal element, there are liquid crystal displays (transmissive liquid crystal displays, semi-transmissive liquid crystal displays, reflective liquid crystal displays, direct-view liquid crystal displays, projection liquid crystal displays), etc. As an example of a display device including electronic ink or electrophoretic elements, there are electronic paper, etc. Note that when a semi-transmissive liquid crystal display or a reflective liquid crystal display is implemented, part or all of the pixel electrodes formed are made to function as reflective electrodes. For example, part or all of the pixel electrodes are made to contain aluminum, silver, etc. In this case, a storage circuit such as SRAM can be set under the reflective electrode, thereby further reducing power consumption.

[0320] As a display method of the display device 700, a progressive method or an interlaced method can be used. In addition, the color element controlled in the pixel when performing color display is not limited to the three colors of RGB (R represents red, G represents green, and B represents blue). For example, it can be composed of four pixels of R pixel, G pixel, B pixel and W (white) pixel. Or, as in the PenTile arrangement, one color element can be composed of two colors in RGB. The two colors can be changed in the color element. Or one or more colors such as yellow, cyan, magenta, etc. can be added to RGB. In addition, the size of the display area can be different depending on the points of each color element. However, the disclosed invention is not limited to a display device for color display, but can also be applied to a display device for black and white display.

[0321] In addition, in order to obtain a full-color display device in which white light (W) is used for backlight (such as organic EL elements, inorganic EL elements, LEDs, fluorescent lamps, etc.), a coloring layer (also called a filter) can be used. As a coloring layer, for example, red (R), green (G), blue (B), yellow (Y), etc. can be appropriately combined. By using a coloring layer, the color reproducibility can be further improved compared to the case where a coloring layer is not used. At this time, it is also possible to directly use the white light in the area that does not include the coloring layer for display by setting an area including the coloring layer and an area that does not include the coloring layer. By partially setting an area that does not include the coloring layer, when displaying a bright image, the brightness reduction caused by the coloring layer can sometimes be reduced and the power consumption can be reduced by about 20% to 30%. However, when a full-color display is performed using a self-luminous element such as an organic EL element or an inorganic EL element, R, G, B, Y, and W colors can also be emitted from an element having each luminous color. By using a self-luminous element, power consumption is sometimes further reduced compared to the case where a coloring layer is used.

[0322] In this embodiment, using Fig.16 and Fig.17 A structure including a liquid crystal element and an EL element as a display element will be described. Fig.16 It is along Fig.15 The cross-sectional view of the dot-dash line QR shown in FIG. 1 is a structure including a liquid crystal element as a display element. Fig.17 It is along Fig.15 The cross-sectional view taken along the dashed line QR shown in FIG. 1 is a structure including an EL element as a display element.

[0323] Below, first explain Fig.16 and Fig.17 The common parts are shown, and then the different parts are described.

[0324] <Description of Common Parts of Display Devices>

[0325] Figure 16 to Figure 17 The display device 700 shown includes: a routing wiring section 711; a pixel section 702; a source driver circuit section 704; and an FPC terminal section 708. In addition, the routing wiring section 711 includes a signal line 710. In addition, the pixel section 702 includes a transistor 750 and a capacitor 790. In addition, the source driver circuit section 704 includes a transistor 752.

[0326] As the transistor 750 and the transistor 752 , the transistors described above can be used as appropriate.

[0327] The transistor used in this embodiment includes a highly purified oxide semiconductor film in which the formation of oxygen vacancies is suppressed. In this transistor, the current value in the off state (off-state current value) can be reduced. Therefore, the retention time of electrical signals such as image signals can be extended, and the write interval can also be extended in the state where the power is turned on. Therefore, the frequency of refresh work can be reduced, thereby achieving the effect of suppressing power consumption.

[0328] In addition, the transistor used in this embodiment can obtain a higher field effect mobility and can therefore be driven at high speed. For example, by using such a transistor capable of high-speed driving in a liquid crystal display device, a switching transistor in a pixel portion and a driving transistor in a driving circuit portion can be formed above a substrate. That is, since a semiconductor device formed of a silicon wafer or the like does not need to be used separately as a driving circuit, the number of components of the semiconductor device can be reduced. In addition, a high-quality image can also be provided in the pixel portion by using a transistor capable of high-speed driving.

[0329] The capacitor 790 includes a dielectric between a pair of electrodes. More specifically, a conductive film formed by the same process as a conductive film used as a gate electrode of the transistor 750 is used as one electrode of the capacitor 790, and a conductive film used as a source electrode and a drain electrode of the transistor 750 is used as the other electrode of the capacitor 790. In addition, as a dielectric sandwiched between a pair of electrodes, an insulating film used as a gate insulating film of the transistor 750 is used.

[0330] In addition, Fig.16 and Fig.17 In the embodiment, insulating films 764 , 766 , and 768 , an oxide semiconductor film 767 , and a planarizing insulating film 770 are provided over the transistor 750 , the transistor 752 , and the capacitor 790 .

[0331] The insulating films 764, 766, and 768 can be formed using the same materials and manufacturing methods as the insulating films 114, 116, and 118 shown in the previous embodiment, respectively. In addition, the oxide semiconductor film 767 can be formed using the same materials and manufacturing methods as the oxide semiconductor film 117 shown in the previous embodiment. In addition, the planarization insulating film 770 can use a heat-resistant organic material such as a polyimide resin, an acrylic resin, a polyimide amide resin, a benzocyclobutene resin, a polyamide resin, an epoxy resin, etc. The planarization insulating film 770 can also be formed by stacking a plurality of insulating films formed of these materials. In addition, a structure without the planarization insulating film 770 can also be used.

[0332] The signal line 710 is formed in the same process as a conductive film used as a source electrode and a drain electrode of the transistors 750 and 752. Note that the signal line 710 may be formed using a conductive film formed in a different process from that of the source electrode and the drain electrode of the transistors 750 and 752, for example, a conductive film used as a gate electrode. When a material containing copper is used as the signal line 710, for example, signal delay due to wiring resistance is reduced, and a large screen display can be achieved.

[0333] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 716. The connection electrode 760 is formed by the same process as the conductive film used as the source electrode and the drain electrode of the transistors 750 and 752. The connection electrode 760 is electrically connected to the terminal included in the FPC 716 through the anisotropic conductive film 780.

[0334] Note that, for example, a glass substrate can be used as the first substrate 701 and the second substrate 705. Note that a flexible substrate can be used as the first substrate 701 and the second substrate 705. Examples of the flexible substrate include a plastic substrate.

[0335] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film, and is used to control the distance (cell gap) between the first substrate 701 and the second substrate 705. In addition, a spherical spacer can also be used as the structure 778. In addition, in this embodiment, an example of a structure in which the structure 778 is provided on the first substrate 701 side is shown, but is not limited to this. For example, a structure in which the structure 778 is provided on the second substrate 705 side or a structure in which the structure 778 is provided on both the first substrate 701 and the second substrate 705 can be adopted.

[0336] In addition, a light-shielding film 738 serving as a black matrix, a coloring film 736 serving as a color filter, and an insulating film 734 in contact with the light-shielding film 738 and the coloring film 736 are provided on the second substrate 705 side.

[0337] <Structural Example of Display Device Using Liquid Crystal Element as Display Element>

[0338] Fig.16 The display device 700 shown includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is provided on the second substrate 705 side and has a function of a counter electrode. Fig.16 The display device 700 shown can change the alignment state of the liquid crystal layer 776 according to the voltage applied to the conductive film 772 and the conductive film 774, thereby controlling the transmission and non-transmission of light to display an image.

[0339] The conductive film 772 is connected to a conductive film serving as a source electrode and a drain electrode included in the transistor 750. The conductive film 772 is formed over the planarizing insulating film 770 to serve as a pixel electrode, that is, one electrode of the display element. The conductive film 772 also functions as a reflective electrode. Fig.16 The display device 700 shown is a so-called reflective color liquid crystal display device in which external light is reflected by the conductive film 772 and an image is displayed through the color film 736 .

[0340] As the conductive film 772, a conductive film that is translucent to visible light or a conductive film that is reflective to visible light can be used. As the conductive film that is translucent to visible light, for example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) is preferably used. As the conductive film that is reflective to visible light, for example, a material containing aluminum or silver can be used. In this embodiment, a conductive film that is reflective to visible light is used as the conductive film 772.

[0341] In addition, when a conductive film that is reflective to visible light is used as the conductive film 772, the conductive film 772 may have a stacked structure. For example, an aluminum film having a thickness of 100 nm is formed as a lower layer, and a silver alloy film (e.g., an alloy film containing silver, palladium, and copper) having a thickness of 30 nm is formed as an upper layer. By adopting the above structure, the following excellent effects are exerted.

[0342] (1) The closeness between the base film and the conductive film 772 can be improved;

[0343] (2) A chemical solution can be used to etch the aluminum film and the silver alloy film together;

[0344] (3) The cross-sectional shape of the conductive film 772 can be made into a favorable shape (for example, a tapered shape).

[0345] The reason for (3) is considered to be as follows: the etching rate of the aluminum film using a chemical solution is slower than that of the silver alloy film, or when the upper silver alloy film is etched to expose the lower aluminum film, electrons are extracted from a metal lower than the silver alloy film, that is, from aluminum having a high ionization tendency, and the etching of the silver alloy film is suppressed, thereby etching the lower aluminum film faster than the silver alloy film.

[0346] In addition, Fig.16 In the display device 700 shown, a portion of the planarization insulating film 770 of the pixel portion 702 is provided with concavities and convexities. The concavities and convexities can be formed, for example, by forming the planarization insulating film 770 using an organic resin film or the like and providing the concavities and convexities on the surface of the organic resin film. In addition, a conductive film 772 serving as a reflective electrode is formed along the concavities and convexities. Therefore, when external light is incident on the conductive film 772, the light can be diffusely reflected on the surface of the conductive film 772, and visibility can be improved.

[0347] Note that although as Fig.16 The display device 700 shown in the figure exemplifies a reflective color liquid crystal display device, but is not limited thereto. For example, a transmissive color liquid crystal display device may be used, in which a conductive film having light-transmitting properties to visible light may be used as the conductive film 772. In the case of a transmissive color liquid crystal display device, it is not necessary to provide the concavoconvexity on the planarizing insulating film 770.

[0348] Note that although Fig.16 Although not shown in the figure, an alignment film may be provided on the side of each of the conductive films 772 and 774 that contacts the liquid crystal layer 776. Fig.16 Although not shown in the figure, optical components (optical substrates) such as polarization components, phase difference components, and anti-reflection components can be appropriately provided. For example, circular polarization using a polarization substrate and a phase difference substrate can also be used. In addition, a backlight source, a side light source, etc. can also be used as a light source.

[0349] When a liquid crystal element is used as a display element, thermotropic liquid crystal, low molecular liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials exhibit cholesteric phase, smectic phase, cubic phase, chiral nematic phase, isotropic phase, etc. depending on the conditions.

[0350] In addition, when the lateral electric field method is adopted, a liquid crystal presenting a blue phase that does not require an alignment film can also be used. The blue phase is a type of liquid crystal phase, and when the temperature of the cholesteric liquid crystal is raised, it appears just before the transition from the cholesteric phase to the isotropic phase. Since the blue phase only appears in a narrow temperature range, a liquid crystal composition mixed with a chiral agent of more than a few weight percent is used for the liquid crystal layer in order to improve the temperature range. The liquid crystal composition containing a liquid crystal presenting a blue phase and a chiral agent has a short response time and optical isotropy, making an alignment treatment unnecessary. In addition, the viewing angle dependence of the liquid crystal composition containing a liquid crystal presenting a blue phase and a chiral agent is small. In addition, since there is no need to set an alignment film and no friction treatment is required, electrostatic damage caused by the friction treatment can be prevented, thereby reducing the defects and damage of the liquid crystal display device in the manufacturing process.

[0351] When a liquid crystal element is used as a display element, a TN (Twisted Nematic) mode, an IPS (In-Plane-Switching) mode, an FFS (Fringe Field Switching) mode, an ASM (Axially Symmetric aligned Micro-cell) mode, an OCB (Optical Compensated Birefringence) mode, an FLC (Ferroelectric Liquid Crystal) mode, an AFLC (Anti Ferroelectric Liquid Crystal) mode, or the like can be used.

[0352] In addition, a normally black liquid crystal display device, such as a transmissive liquid crystal display device using a vertical alignment (VA) mode, may also be used. As vertical alignment modes, several examples may be cited, such as an MVA (Multi-Domain Vertical Alignment) mode, a PVA (Patterned Vertical Alignment) mode, an ASV (Advanced Super View) mode, and the like.

[0353] <Display Device Using Light-Emitting Element as Display Element>

[0354] Fig.17 The display device 700 shown includes a light-emitting element 782. The light-emitting element 782 includes a conductive film 784, an EL layer 786, and a conductive film 788. Fig.17The display device 700 shown can display an image by causing an EL layer 786 included in a light-emitting element 782 to emit light.

[0355] In addition, the conductive film 784 is connected to a conductive film used as a source electrode and a drain electrode included in the transistor 750. The conductive film 784 is formed above the planarization insulating film 770 to serve as a pixel electrode, that is, an electrode of the display element. As the conductive film 784, a conductive film that is translucent to visible light or a conductive film that is reflective to visible light can be used. As the conductive film that is translucent to visible light, for example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) is used. For example, a conductive film that is reflective to visible light can be formed using a material containing aluminum or silver.

[0356] In addition, Fig.17 In the display device 700 shown, an insulating film 730 is provided over a planarizing insulating film 770 and a conductive film 784. The insulating film 730 covers a portion of the conductive film 784. Note that the light emitting element 782 has a top emission structure. Therefore, the conductive film 788 has light-transmitting properties, and transmits light emitted by the EL layer 786. Note that although a top emission structure is illustrated in this embodiment mode, the present invention is not limited thereto. For example, a bottom emission structure that emits light to the conductive film 784 side or a dual emission structure that emits light to the conductive film 784 side and the conductive film 788 side may also be used.

[0357] In addition, a coloring film 736 is provided at a position overlapping with the light emitting element 782, and a light shielding film 738 is provided at a position overlapping with the insulating film 730, the routing wiring portion 711, and the source driver circuit portion 704. The coloring film 736 and the light shielding film 738 are covered by the insulating film 734. The space between the light emitting element 782 and the insulating film 734 is filled with the sealing film 732. Note that although the example is shown in Fig.17 The display device 700 shown in the figure has a structure in which the coloring film 736 is provided, but the present invention is not limited to this. For example, when the EL layer 786 is formed by separate coating, the coloring film 736 may not be provided.

[0358] The structure described in this embodiment mode can be implemented in combination with the structures described in other embodiment modes as appropriate.

[0359] Implementation 4

[0360] In this embodiment, using 18A to 18C A display device including a semiconductor device according to one embodiment of the present invention will be described.

[0361] Fig.18AThe display device shown includes: a region having pixels of display elements (hereinafter referred to as pixel portion 502); a circuit portion arranged outside the pixel portion 502 and having a circuit for driving the pixels (hereinafter referred to as driving circuit portion 504); a circuit having a function of protecting the element (hereinafter referred to as protection circuit 506); and a terminal portion 507. In addition, the protection circuit 506 may not be provided.

[0362] A part or all of the driver circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. Thus, the number of components or the number of terminals can be reduced. When a part or all of the driver circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driver circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding).

[0363] The pixel portion 502 includes a circuit (hereinafter referred to as a pixel circuit 501) for driving a plurality of display elements arranged in X rows (X is a natural number greater than or equal to 2) and Y columns (Y is a natural number greater than or equal to 2). The driving circuit portion 504 includes a driving circuit such as a circuit for outputting a signal (scanning signal) for selecting a pixel (hereinafter referred to as a gate driver 504a), a circuit for supplying a signal (data signal) for driving the display element in the pixel (hereinafter referred to as a source driver 504b), and the like.

[0364] The gate driver 504a has a shift register, etc. The gate driver 504a receives a signal for driving the shift register through the terminal portion 507 and outputs a signal. For example, the gate driver 504a receives a start pulse signal, a clock signal, etc. and outputs a pulse signal. The gate driver 504a has a function of controlling the potential of the wiring (hereinafter referred to as the scanning lines GL_1 to GL_X) to which the scanning signal is supplied. In addition, a plurality of gate drivers 504a may be provided to control the scanning lines GL_1 to GL_X respectively. Alternatively, the gate driver 504a has a function of being able to supply an initialization signal. However, this is not limited to the above, and the gate driver 504a may also supply other signals.

[0365] The source driver 504b has a shift register, etc. The source driver 504b receives a signal for driving the shift register and a signal (image signal) for deriving a data signal therefrom through a terminal portion 507. The source driver 504b has a function of generating a data signal written to the pixel circuit 501 according to the image signal. In addition, the source driver 504b has a function of controlling the output of the data signal in response to a pulse signal generated by an input of a start pulse signal, a clock signal, etc. In addition, the source driver 504b has a function of controlling the potential of the wiring (hereinafter referred to as data lines DL_1 to DL_Y) to which the data signal is supplied. Alternatively, the source driver 504b has a function of being able to supply an initialization signal. However, it is not limited thereto, and the source driver 504b can supply other signals.

[0366] The source driver 504 b includes, for example, a plurality of analog switches. By sequentially turning on the plurality of analog switches, the source driver 504 b can output a signal obtained by time-dividing an image signal as a data signal.

[0367] The pulse signal and the data signal are input to each of the plurality of pixel circuits 501 through one of the plurality of scanning lines GL supplied with the scanning signal and one of the plurality of data lines DL supplied with the data signal, respectively. In addition, each of the plurality of pixel circuits 501 controls the writing and holding of the data signal through the gate driver 504a. For example, a pulse signal is input to the pixel circuit 501 of the mth row and nth column from the gate driver 504a through the scanning line GL_m (m is a natural number less than X), and a data signal is input to the pixel circuit 501 of the mth row and nth column from the source driver 504b through the data line DL_n (n is a natural number less than Y) according to the potential of the scanning line GL_m.

[0368] Fig.18A The protection circuit 506 shown is connected to, for example, a scanning line GL between the gate driver 504a and the pixel circuit 501. Alternatively, the protection circuit 506 is connected to a data line DL between the source driver 504b and the pixel circuit 501. Alternatively, the protection circuit 506 may be connected to a wiring between the gate driver 504a and the terminal portion 507. Alternatively, the protection circuit 506 may be connected to a wiring between the source driver 504b and the terminal portion 507. In addition, the terminal portion 507 refers to a portion provided with a terminal for inputting power, control signals, and image signals from an external circuit to the display device.

[0369] The protection circuit 506 is a circuit that causes conduction between a wiring connected to the protection circuit and another wiring when a potential outside a certain range is supplied to the wiring.

[0370] like Fig.18AAs shown, by providing the pixel portion 502 and the driving circuit portion 504 with a protection circuit 506, respectively, the tolerance of the display device to overcurrent caused by ESD (Electro Static Discharge) and the like can be improved. However, the structure of the protection circuit 506 is not limited thereto, and for example, the protection circuit 506 can be configured to be connected to the gate driver 504a, or the protection circuit 506 can be configured to be connected to the source driver 504b. Alternatively, the protection circuit 506 can be configured to be connected to the terminal portion 507.

[0371] In addition, although Fig.18A , an example of a driver circuit portion 504 including a gate driver 504a and a source driver 504b is shown, but the present invention is not limited to this structure. For example, only the gate driver 504a may be formed and a separately prepared substrate (for example, a driver circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) formed with a source driver circuit may be mounted.

[0372] in addition, Fig.18A The plurality of pixel circuits 501 shown may be, for example, Fig.18B The structure shown.

[0373] Fig.18B The pixel circuit 501 shown includes a liquid crystal element 570, a transistor 550, and a capacitor 560. As the transistor 550, the transistor shown in the previous embodiment can be used.

[0374] The potential of one of the pair of electrodes of the liquid crystal element 570 is appropriately set according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set according to the written data. In addition, a common potential may be supplied to one of the pair of electrodes of the liquid crystal element 570 included in each of the plurality of pixel circuits 501. In addition, a different potential may be supplied to one of the pair of electrodes of the liquid crystal element 570 in each of the pixel circuits 501 of each row.

[0375] For example, the following modes can also be used as a driving method for a display device having a liquid crystal element 570: TN mode; STN mode; VA mode; ASM (Axially Symmetric Aligned Micro-cell) mode; OCB (Optically Compensated Birefringence) mode; FLC (Ferroelectric Liquid Crystal) mode; AFLC (AntiFerroelectric Liquid Crystal) mode; MVA mode; PVA (Patterned Vertical Alignment) mode; IPS mode; FFS mode; or TBA (Transverse Bend Alignment) mode, etc. In addition, as a driving method of the display device, in addition to the above-mentioned driving method, there are ECB (Electrically Controlled Birefringence) mode, PDLC (Polymer Dispersed Liquid Crystal) mode, PNLC (Polymer Network Liquid Crystal) mode, guest-host mode, etc. However, it is not limited to these, and various liquid crystal elements and driving methods can be used as liquid crystal elements and driving methods.

[0376] In the pixel circuit 501 at the mth row and the nth column, one of the source electrode and the drain electrode of the transistor 550 is electrically connected to the data line DL_n, and the other of the source electrode and the drain electrode is electrically connected to the other electrode of the pair of electrodes of the liquid crystal element 570. In addition, the gate electrode of the transistor 550 is electrically connected to the scanning line GL_m. The transistor 550 has a function of controlling the writing of the data signal by being turned on or off.

[0377] One of a pair of electrodes of the capacitor 560 is electrically connected to a wiring to which a potential is supplied (hereinafter referred to as a potential supply line VL), and the other electrode is electrically connected to the other of a pair of electrodes of the liquid crystal element 570. In addition, the potential of the potential supply line VL is appropriately set according to the specifications of the pixel circuit 501. The capacitor 560 has a function as a storage capacitor that stores written data.

[0378] For example, in a Fig.18B In the display device of the pixel circuit 501, by Fig.18AThe gate driver 504a shown selects the pixel circuits 501 of each row in turn, turns on the transistors 550 and writes data signals.

[0379] When the transistor 550 is turned off, the pixel circuit 501 to which the data has been written is in a holding state. By sequentially performing the above steps row by row, an image can be displayed.

[0380] Fig.18A The plurality of pixel circuits 501 shown may have, for example, Fig. 18C The structure shown.

[0381] in addition, Fig. 18C The pixel circuit 501 shown includes transistors 552 and 554, a capacitor 562, and a light-emitting element 572. The transistor shown in the previous embodiment mode can be applied to one or both of the transistor 552 and the transistor 554.

[0382] One of a source electrode and a drain electrode of the transistor 552 is electrically connected to a wiring (hereinafter referred to as a data line DL_n) to which a data signal is supplied, and a gate electrode of the transistor 552 is electrically connected to a wiring (hereinafter referred to as a scanning line GL_m) to which a gate signal is supplied.

[0383] The transistor 552 has a function of controlling writing of a data signal by being turned on or off.

[0384] One of a pair of electrodes of the capacitor 562 is electrically connected to a wiring to which a potential is supplied (hereinafter referred to as a potential supply line VL_a), and the other is electrically connected to the other of a source electrode and a drain electrode of the transistor 552 .

[0385] The capacitor 562 functions as a storage capacitor for storing written data.

[0386] One of a source electrode and a drain electrode of the transistor 554 is electrically connected to the potential supply line VL_a, and a gate electrode of the transistor 554 is electrically connected to the other of a source electrode and a drain electrode of the transistor 552 .

[0387] One of the anode and the cathode of the light-emitting element 572 is electrically connected to the potential supply line VL_b, and the other is electrically connected to the other of the source electrode and the drain electrode of the transistor 554 .

[0388] As the light-emitting element 572, for example, an organic electroluminescent element (also referred to as an organic EL element) or the like can be used. Note that the light-emitting element 572 is not limited to an organic EL element, and an inorganic EL element including an inorganic material can be used.

[0389] Furthermore, the high power supply potential VDD is applied to one of the potential supply line VL_a and the potential supply line VL_b, and the low power supply potential VSS is applied to the other.

[0390] For example, in a Fig. 18C In the display device of the pixel circuit 501, by Fig.18A The gate driver 504a shown selects the pixel circuits 501 of each row in turn, turns on the transistors 552 and writes data signals.

[0391] When the transistor 552 is turned off, the pixel circuit 501 to which data is written is put into a hold state. Furthermore, the amount of current flowing between the source electrode and the drain electrode of the transistor 554 is controlled according to the potential of the written data signal. The light-emitting element 572 emits light at a brightness corresponding to the amount of current flowing. By performing the above steps in sequence row by row, an image can be displayed.

[0392] The structure described in this embodiment mode can be used in combination with the structures described in other embodiment modes as appropriate.

[0393] Implementation method 5

[0394] In this embodiment, refer to Fig.19 as well as FIG. 20A to FIG. 20G A display module and an electronic device including a semiconductor device according to one embodiment of the present invention will be described.

[0395] exist Fig.19 In the display module 8000 shown, a touch panel 8004 connected to an FPC 8003 , a display panel 8006 connected to an FPC 8005 , a backlight 8007 , a frame 8009 , a printed substrate 8010 , and a battery 8011 are provided between an upper cover 8001 and a lower cover 8002 .

[0396] For example, the semiconductor device which is one embodiment of the present invention can be used for the display panel 8006 .

[0397] The upper cover 8001 and the lower cover 8002 may be appropriately changed in shape or size according to the sizes of the touch panel 8004 and the display panel 8006 .

[0398] The touch panel 8004 can be a resistive film touch panel or a capacitive touch panel, and can be formed to overlap with the display panel 8006. In addition, the opposing substrate (sealing substrate) of the display panel 8006 can also have the function of a touch panel. In addition, a light sensor can be provided in each pixel of the display panel 8006 to form an optical touch panel.

[0399] The backlight 8007 has a light source 8008. Note that although Fig.19The structure in which the light source 8008 is arranged above the backlight 8007 is shown as an example, but the present invention is not limited to this. For example, a structure in which the light source 8008 is arranged at the end of the backlight 8007 and a light diffusion plate is further provided may be used. When a self-luminous light-emitting element such as an organic EL element is used, or when a reflective panel is used, the backlight 8007 may not be provided.

[0400] The frame 8009 has a function of protecting the display panel 8006 and also has an electromagnetic shielding function for blocking electromagnetic waves generated by the operation of the printed substrate 8010. In addition, the frame 8009 may also function as a heat sink.

[0401] The printed circuit board 8010 has a power supply circuit and a signal processing circuit for outputting a video signal and a clock signal. As a power supply for supplying power to the power supply circuit, an external commercial power supply can be used, or a power supply using a separately provided battery 8011 can be used. When a commercial power supply is used, the battery 8011 can be omitted.

[0402] In addition, components such as a polarizing plate, a phase difference plate, and a prism sheet may also be provided in the display module 8000 .

[0403] FIG. 20A to FIG. 20G 9000, a display unit 9001, a speaker 9003, an operation key 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (the sensor has a function of measuring or sensing the following factors: force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, electricity, radiation, flow, humidity, inclination, vibration, smell or infrared), a microphone 9008, etc.

[0404] FIG. 20A to FIG. 20G The electronic device shown may have various functions. For example, it may have the following functions: the function of displaying various data (static images, dynamic images, text images, etc.) on the display unit; the function of a touch panel; the function of displaying a calendar, date, or time, etc.; the function of controlling processing by using various software (programs); the function of wireless communication; the function of connecting to various computer networks by using the wireless communication function; the function of sending and receiving various data by using the wireless communication function; the function of reading out programs or data stored in a recording medium and displaying them on the display unit; etc. Note that FIG. 20A to FIG. 20G The functions that the electronic device shown may have are not limited to the above functions, but may have various functions. FIG. 20A to FIG. 20GAlthough not shown in the figure, the electronic device may include a plurality of display units. In addition, a camera or the like may be provided in the electronic device so as to have the following functions: a function of taking a still image; a function of taking a moving image; a function of storing the taken image in a recording medium (an external recording medium or a recording medium built into the camera); a function of displaying the taken image on a display unit; etc.

[0405] Below, we explain in detail FIG. 20A to FIG. 20G Electronic equipment shown.

[0406] Fig. 20A 9001 is a perspective view showing a portable information terminal 9100. The display unit 9001 included in the portable information terminal 9100 is flexible. Therefore, the display unit 9001 can be assembled along the curved surface of the curved frame 9000. In addition, the display unit 9001 has a touch sensor, and the screen can be touched with a finger or a stylus pen to perform operations. For example, by touching an icon displayed on the display unit 9001, an application can be started.

[0407] Fig. 20B 9101 is a perspective view showing a portable information terminal 9101. The portable information terminal 9101 has one or more functions of, for example, a telephone, an electronic notebook, and an information browsing device. Specifically, it can be used as a smart phone. Note that the speaker 9003, the connection terminal 9006, the sensor 9007, and the like are not included in the portable information terminal 9101. Fig. 20B shown, but can be set in Fig. 20A The portable information terminal 9101 is at the same position as that of the portable information terminal 9100 shown in the figure. In addition, the portable information terminal 9101 can display text and image information on its multiple faces. For example, three operation buttons 9050 (also referred to as operation icons or just icons) can be displayed on one face of the display unit 9001. In addition, information 9051 represented by a dotted rectangle can be displayed on another face of the display unit 9001. In addition, as an example of information 9051, there can be cited a display indicating that information from an email, SNS (Social Networking Services), or phone call, etc. has been received; the title of the email and SNS, etc.; the sender's name of the email or SNS, etc.; the date; the time; the remaining battery level; and the antenna reception strength, etc. Alternatively, the operation button 9050, etc. can be displayed instead of the information 9051 at the position where the information 9051 is displayed.

[0408] Fig. 20C: is a perspective view showing a portable information terminal 9102. The portable information terminal 9102 has a function of displaying information on three or more surfaces of the display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are displayed on different surfaces, respectively. For example, a user of the portable information terminal 9102 can confirm its display (here, information 9053) while the portable information terminal 9102 is placed in a jacket pocket. Specifically, the phone number or name of the person calling is displayed at a position where the information can be viewed from above the portable information terminal 9102. The user can confirm the display without taking the portable information terminal 9102 out of his pocket, thereby being able to determine whether to answer the call.

[0409] Fig.20D is a perspective view showing a watch-type portable information terminal 9200. The portable information terminal 9200 can execute various applications such as mobile phones, e-mails, reading and editing of articles, music playback, network communications, computer games, etc. In addition, the display surface of the display unit 9001 is curved, and display can be performed on the curved display surface. In addition, the portable information terminal 9200 can perform short-range wireless communications standardized by existing communications. For example, in this case, mutual communication between the information terminal 9200 and a headset capable of wireless communication can be performed, so that a hands-free call can be performed. In addition, the portable information terminal 9200 includes a connection terminal 9006, and data can be exchanged directly with other information terminals through a connector. In addition, charging can also be performed through the connection terminal 9006. In addition, the charging work can also be performed using wireless power supply without using the connection terminal 9006.

[0410] FIG. 20E to FIG. 20G 9201 is a perspective view showing a foldable portable information terminal. Fig.20E is a perspective view of the portable information terminal 9201 in the unfolded state, Fig.20F is a perspective view of the portable information terminal 9201 in a state halfway between changing from one of the unfolded state and the folded state to the other state, Figure 20G 9055 is a perspective view of a portable information terminal 9201 in a folded state. The portable information terminal 9201 is easy to carry in the folded state, and has a large display area with seamless splicing in the unfolded state, so that the display is easy to see at a glance. The display unit 9001 included in the portable information terminal 9201 is supported by three frames 9000 connected by hinges 9055. By bending the two frames 9000 through the hinges 9055, the portable information terminal 9201 can be reversibly changed from the unfolded state to the folded state. For example, the portable information terminal 9201 can be bent with a curvature radius of more than 1 mm and less than 150 mm.

[0411] Each of the electronic devices described in this embodiment has a display unit for displaying certain information. Note that a semiconductor device according to one embodiment of the present invention can also be applied to an electronic device that does not include a display unit. In addition, although a structure in which the display unit of the electronic device is flexible and can display on a curved display surface or a structure in which the display unit can be folded is shown in this embodiment, it is not limited thereto, and a structure in which the display unit of the electronic device is not flexible and displays on a flat surface can also be used.

[0412] The structure described in this embodiment mode can be used in combination with the structures described in other embodiment modes as appropriate.

[0413] Example

[0414] In this embodiment, a Fig.21A The analytical sample 600 and Fig.21B and Fig. 21C The transistor 650 shown was subjected to SIMS analysis and measurement of electrical characteristics.

[0415] Notice, Fig.21B and Fig. 21C The top view of transistor 650 shown is equivalent to Fig. 6A A top view of transistor 170 is shown. Fig.21B is a cross-sectional view of the transistor 650 in the channel length direction. Fig. 21C It is a cross-sectional view of the transistor 650 in the channel width direction.

[0416] In this embodiment, sample B1 and sample B2 shown below were manufactured as analysis samples 600. Sample C1 and sample C2 shown below were manufactured as transistors 650. Note that sample B1 and sample C1 are semiconductor devices of one embodiment of the present invention, and sample B2 and sample C2 are semiconductor devices for comparison.

[0417] First, a method for producing the analytical sample 600 produced in this embodiment will be described.

[0418] (Sample B1 and Sample B2)

[0419] First, a conductive film is formed over the substrate 602, and then the conductive film is removed. A glass substrate is used as the substrate 602. In addition, as the conductive film, a tungsten film with a thickness of 100 nm is formed by using a sputtering device. In addition, the conductive film is removed using a dry etching device.

[0420] Next, insulating films 606 and 607 are formed over the substrate 602. As the insulating film 606, a silicon nitride film is formed to a thickness of 400 nm using a PECVD apparatus. Also, as the insulating film 607, a silicon oxynitride film is formed to a thickness of 50 nm using a PECVD apparatus.

[0421] Next, an oxide semiconductor film 608a is formed over the insulating film 607. Note that the difference between the sample B1 and the sample B2 is the formation conditions of the oxide semiconductor film 608a.

[0422] As the oxide semiconductor film 608a of sample B1, an IGZO film with a thickness of 35 nm was formed by using a sputtering device. Note that the deposition conditions of the oxide semiconductor film 608a of sample B1 are as follows: the substrate temperature is 170°C; an argon gas with a flow rate of 100 sccm and an oxygen gas with a flow rate of 100 sccm are introduced into the processing chamber; the pressure is 0.6 Pa; and an AC power of 2500 W is supplied to the metal oxide sputtering polycrystalline target (In:Ga:Zn=1:1:1.2 [atomic number ratio]).

[0423] As the oxide semiconductor film 608a of sample B2, an IGZO film with a thickness of 35 nm was formed by using a sputtering device. Note that the deposition conditions of the oxide semiconductor film 608a of sample B2 are as follows: the substrate temperature is 170°C; an argon gas with a flow rate of 100 sccm and an oxygen gas with a flow rate of 100 sccm are introduced into the processing chamber; the pressure is 0.6 Pa; and an AC power of 2500 W is supplied to the metal oxide sputtering polycrystalline target (In:Ga:Zn=1:1:1 [atomic number ratio]).

[0424] Next, a first heat treatment is performed, which is performed at 450° C. for 1 hour in a nitrogen atmosphere, and then at 450° C. for 1 hour in a mixed gas atmosphere of nitrogen and oxygen.

[0425] Next, a conductive film is formed over the insulating film 607 and the oxide semiconductor film 608a, and then removed. As the conductive film, a 50 nm thick tungsten film, a 400 nm thick aluminum film, and a 100 nm thick titanium film are successively formed in a vacuum using a sputtering device. In addition, the conductive film is removed using a dry etching device.

[0426] Next, a chemical solution is applied over the oxide semiconductor film 608a to clean the surface of the oxide semiconductor film 608a. Note that as the above cleaning method, an aqueous solution of phosphoric acid having a concentration of 85% is diluted 100 times, applied over the oxide semiconductor film 608a, and then cleaned for 15 seconds.

[0427] Next, an insulating film 614 and an insulating film 616 are formed over the oxide semiconductor film 608a. As the insulating film 614, a silicon oxynitride film with a thickness of 50 nm is formed by using a PECVD apparatus. In addition, as the insulating film 616, a silicon oxynitride film with a thickness of 400 nm is formed by using a PECVD apparatus. Note that the insulating film 614 and the insulating film 616 are continuously formed in a vacuum by using a PECVD apparatus.

[0428] The deposition conditions of the insulating film 614 are as follows: the substrate temperature is 220°C; the silane gas with a flow rate of 50 sccm and the nitrous oxide gas with a flow rate of 2000 sccm are introduced into the processing chamber; the pressure is 20 Pa; and the RF power of 100 W is supplied between the parallel plate electrodes set in the PECVD device. In addition, the deposition conditions of the insulating film 616 are as follows: the substrate temperature is 220°C; the silane gas with a flow rate of 160 sccm and the nitrous oxide gas with a flow rate of 4000 sccm are introduced into the processing chamber; the pressure is 200 Pa; and the RF power of 1500 W is supplied between the parallel plate electrodes set in the PECVD device.

[0429] Next, a second heat treatment is performed at 350° C. for 1 hour in a mixed gas atmosphere of nitrogen and oxygen.

[0430] Next, after the second heat treatment, only the sample B1 was subjected to the following three steps.

[0431] <1. Step of forming ITSO film>

[0432] A sputtering apparatus is used to form an ITSO film with a thickness of 5 nm over the insulating film 616. Note that the composition of a target used to form the ITSO film is In2O3:SnO2:SiO2=85:10:5 [wt %].

[0433] <2. Treatment process of adding oxygen>

[0434] Next, oxygen addition treatment was performed through the ITSO film. The oxygen addition treatment was performed under the following conditions: using an ashing device; introducing oxygen gas with a flow rate of 250 sccm into the processing chamber; the pressure was 15 Pa; and 4500 W of RF power was supplied between parallel plate electrodes set in the ashing device in a manner that biased the substrate side.

[0435] <3. ITSO film removal process>

[0436] Next, the ITSO film is removed to expose the insulating film 616. In order to remove the ITSO film, a 5% oxalic acid aqueous solution is applied to the insulating film 616 using a wet etching device, and after etching for 300 seconds, a 0.5% hydrofluoric acid solution is applied to the insulating film 616 and etching is performed for 15 seconds.

[0437] Next, both sample B1 and sample B2 form an insulating film 618 on the insulating film 616. As the insulating film 618, a silicon nitride film with a thickness of 100 nm is formed using a PECVD device. The deposition conditions of the insulating film 618 are as follows: the substrate temperature is 350° C.; silane gas with a flow rate of 50 sccm, nitrogen gas with a flow rate of 5000 sccm, and ammonia gas with a flow rate of 100 sccm are introduced into the processing chamber; the pressure is 100 Pa; and 1000 W of RF power is supplied between the parallel plate electrodes provided in the PECVD device.

[0438] Next, a third heat treatment is performed. As the third heat treatment, heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere.

[0439] Through the above-described steps, sample B1 and sample B2 of this example were manufactured.

[0440] Next, SIMS analysis was performed to measure the indium concentration in the oxide semiconductor film 608 a and the insulating films 614 , 616 , and 618 of the manufactured samples B1 and B2. Fig.22A The analysis results of sample B1 are shown. Fig. 22B The analysis results of sample B2 are shown. Fig.22A and Fig. 22B In the figure, the horizontal axis represents depth (nm) and the vertical axis represents indium concentration (atoms / cm 3 ).

[0441] Depend on Fig.22A and Fig. 22B The results shown in the figure show that in sample B1, the indium concentration near the interface between the insulating film 616 and the insulating film 618 is 5×10 16 Atom / cm 3 On the other hand, in sample B2, the indium concentration near the interface between the insulating film 616 and the insulating film 618 is less than 5×10 16 Atom / cm 3 Note that in the above SIMS analysis, the lower limit of detection of indium is 1 × 10 15 Atom / cm 3 the following.

[0442] In addition, when comparing sample B1 and sample B2, the amount of indium detected near the interface between the insulating film 616 and the insulating film 618 of sample B1 is greater than the amount of indium detected near the interface between the insulating film 616 and the insulating film 618 of sample B2.

[0443] Depend on Fig.22A and Fig. 22B The results shown show that in sample B1, indium in the ITSO film used as a film having a function of suppressing oxygen release is introduced into the insulating film 616 during the oxygen addition process, so indium is detected near the interface between the insulating film 616 and the insulating film 618. On the other hand, in sample B2, the step of forming the ITSO film on the insulating film 616, the step of oxygen addition process, and the step of removing the ITSO film are not performed, so indium is not detected near the surface of the insulating film 616, in other words, near the interface between the insulating film 616 and the insulating film 618.

[0444] The insulating film 616 is an insulating film containing oxygen. Therefore, when the insulating film 616 contains excess oxygen, oxygen, which is one of the main components, may not be accurately measured by SIMS analysis. For example, when the insulating film 616 contains oxygen exceeding the stoichiometric composition, it may be difficult to measure the oxygen exceeding the stoichiometric composition by SIMS analysis. However, in a semiconductor device according to one embodiment of the present invention, when an ITSO film is formed on the insulating film 616 as a film having a function of suppressing oxygen release and oxygen is added to the insulating film 616 through the ITSO film, as shown in FIG. Fig.22A As shown, indium is detected near the surface of the insulating film 616, in other words, near the interface between the insulating film 616 and the insulating film 618. Therefore, by measuring the impurity concentration near the surface of the insulating film 616 (here, the indium concentration is measured), it is sometimes possible to confirm whether the process of adding oxygen to the insulating film 616 is performed.

[0445] As described above, when oxygen in the insulating film 616 cannot be accurately measured by SIMS analysis, it is important to analyze the physical property values ​​of the film in contact with the insulating film 616, here, the indium concentration near the interface between the insulating film 616 and the insulating film 618.

[0446] Next, a method for manufacturing the transistor 650 manufactured in this embodiment is described.

[0447] (Sample C1 and Sample C2)

[0448] As each of the samples C1 and C2, five transistors having a channel length L=3 μm and a channel width W=50 μm were manufactured in a substrate.

[0449] First, a conductive film is formed over the substrate 602, and the conductive film is processed to form the conductive film 604. As the conductive film 604, a tungsten film is formed to a thickness of 100 nm using a sputtering apparatus.

[0450] Next, insulating films 606 and 607 are formed over the substrate 602 and the conductive film 604 .

[0451] Next, an oxide semiconductor film 608a is formed over the insulating film 607 and processed into an island shape, thereby forming the oxide semiconductor film 608. Note that the difference between sample C1 and sample C2 is the formation conditions of the oxide semiconductor film 608.

[0452] The oxide semiconductor film 608 of the sample C1 was formed under the same conditions as those of the oxide semiconductor film 608a of the sample B1 described above, and was then processed into an island shape.

[0453] In addition, the oxide semiconductor film 608 of the sample C2 was formed under the same conditions as the oxide semiconductor film 608a of the sample B2 described above, and was then processed into an island shape.

[0454] Next, a first heat treatment is performed.

[0455] Next, a conductive film is formed over the insulating film 607 and the oxide semiconductor film 608, and the conductive film is processed to form conductive films 612a and 612b. As the conductive films 612a and 612b, a 50 nm thick tungsten film, a 400 nm thick aluminum film, and a 100 nm thick titanium film are continuously formed in a vacuum using a sputtering device.

[0456] Next, an insulating film 614 and an insulating film 616 are formed over the oxide semiconductor film 608 and the conductive films 612 a and 612 b .

[0457] Next, a second heat treatment is performed.

[0458] Next, the steps of forming an ITSO film, adding oxygen, and removing the ITSO film were performed on sample C1 in the same manner as sample B1 described above. In addition, the steps of forming an ITSO film, adding oxygen, and removing the ITSO film were not performed on sample C2 in the same manner as sample B2 described above.

[0459] Next, an insulating film 618 is formed over the insulating film 616 .

[0460] Next, an opening 642c reaching the conductive film 612b and openings 642a and 642b reaching the conductive film 604 are formed. The openings 642a, 642b, and 642c are formed using a dry etching apparatus.

[0461] Next, a conductive film is formed on the insulating film 618 so as to cover the openings 642a, 642b, and 642c, and the conductive film is processed to form conductive films 620a and 620b. As the conductive films 620a and 620b, an ITSO film having a thickness of 100 nm is formed using a sputtering device. The composition of the target material used to form the ITSO film is the same as that used in the ITSO film formation step shown above.

[0462] Next, a third heat treatment is performed.

[0463] Through the above-described steps, samples C1 and C2 were manufactured.

[0464] Next, the electrical characteristics of the transistors of the samples C1 and C2 manufactured as described above were measured. Fig.23A and Fig. 23B The electrical characteristics results of samples C1 and C2 are shown.

[0465] Notice, Fig.23A is the electrical characteristic result of sample C1, Fig. 23B is the electrical characteristic result of sample C2. Fig.23A and Fig. 23B In the graph, the horizontal axis represents the gate voltage (Vg), the vertical axis represents the drain current (Id), and the data of the five transistors are overlapped. In addition, the voltage (Vd) between the source electrode and the drain electrode is set to 1V and 10V, and Vg is applied every 0.5V in the range of -15V to 20V.

[0466] Depend on Fig.23A and Fig. 23B The results shown confirm that in sample C1 of one embodiment of the present invention, the deviation between the multiple transistors is small. In addition, it is confirmed that sample C1 has a good rise characteristic near 0V. On the other hand, it is confirmed that in sample C2 for comparison, the deviation between the multiple transistors is large. In addition, it is confirmed that the transistor of sample C2 has a normally-on characteristic.

[0467] It is considered that the difference in transistor characteristics between the above-mentioned sample C1 and sample C2 is caused by whether or not a process of adding oxygen to the insulating films 614 and 616 is performed. In the sample C1 of one embodiment of the present invention, an ITSO film is formed on the insulating film 616 and oxygen is added to the insulating films 614 and 616 through the ITSO film, thereby being able to advantageously add excess oxygen to the insulating films 614 and 616. In addition, the above-mentioned excess oxygen fills the oxygen vacancies in the oxide semiconductor film 608, thereby obtaining a transistor with less deviation and good rise characteristics.

[0468] From the above, it can be seen that the transistor of sample C1 of this embodiment is a transistor with small deviation and high reliability.

[0469] The structure shown in this embodiment can be used in combination with other embodiment modes as appropriate.

[0470] Description of Reference Numerals

[0471] 100: transistor; 100A: transistor; 100B: transistor; 102: substrate; 104: conductive film; 106: insulating film; 107: insulating film; 108: oxide semiconductor film; 108a: oxide semiconductor film; 108b: oxide semiconductor film; 108c: oxide semiconductor film; 112a: conductive film; 112b: conductive film; 114: insulating film; 116: insulating film; 117: oxide semiconductor film; 118: insulating film; 120: conductive film; 120a: conductive film; 120b: conductive film; 130: film; 139: oxygen; 140c: opening; 141a: opening; 141b: opening; 142: etchant; 142a: opening; 142b: opening portion; 142c: opening portion; 150: transistor; 160: transistor; 170: transistor; 180b: oxide semiconductor film; 200: semiconductor device; 202: substrate; 204: insulating film; 206: insulating film; 230: film; 239: oxygen; 242: etchant; 501: pixel circuit; 502: pixel portion; 504: drive circuit portion; 504a: gate driver; 504b: source driver; 506: protection circuit; 507: terminal portion; 550: transistor; 552: transistor; 554: transistor; 560: capacitor; 562: capacitor; 570: liquid crystal element; 572: light-emitting element; 600: analysis sample; 602: substrate; 604: Conductive film; 606: insulating film; 607: insulating film; 608: oxide semiconductor film; 608a: oxide semiconductor film; 612a: conductive film; 612b: conductive film; 614: insulating film; 616: insulating film; 618: insulating film; 620a: conductive film; 620b: conductive film; 642a: opening; 642b: opening; 642c: opening; 650: transistor; 700: display device; 701: substrate; 702: pixel portion; 704: source driver circuit portion; 705: substrate; 706: gate driver circuit portion; 708: FPC terminal portion; 710: signal line; 711: wiring portion; 712: sealant; 716: FPC; 730: insulating film; 732 : Sealing film; 734: Insulating film; 736: Coloring film; 738: Shading film; 750: Transistor; 752: Transistor; 760: Connecting electrode; 764: Insulating film; 766: Insulating film; 767: Oxide semiconductor film; 768: Insulating film; 770: Flattening insulating film; 772: Conductive film; 774: Conductive film; 775: Liquid crystal element; 776: Liquid crystal layer; 778: Structural body; 780: Anisotropic conductive film; 782: Light emitting element; 784: Conductive film; 786: EL layer; 788: Conductive film; 790: Capacitor element; 8000: Display module; 8001: Upper cover; 8002: Lower cover; 8003: FPC; 8004: Touch panel; 8005: FPC;8006: display panel; 8007: backlight; 8008: light source; 8009: frame; 8010: printed substrate; 8011: battery; 9000: frame; 9001: display unit; 9003: speaker; 9005: operation key; 9006: connection terminal; 9007: sensor; 9008: microphone; 9050: operation button; 9051: information; 9052: information; 9053: information; 9054: information; 9055: hinge; 9100: portable information terminal; 9101: portable information terminal; 9102: portable information terminal; 9200: portable information terminal; 9201: portable information terminal;

[0472] This application is based on Japanese Patent Application No. 2014-126787 filed with Japan Patent Office on June 20, 2014, the entire contents of which are incorporated herein by reference.

Claims

1. A semiconductor device comprising: a gate electrode; a first insulating film above the gate electrode; an oxide semiconductor film over the first insulating film; a second insulating film over the oxide semiconductor film; as well as a third insulating film over the second insulating film, wherein the second insulating film and the third insulating film are in contact with each other, wherein indium is included near the interface between the second insulating film and the third insulating film, wherein the indium concentration at the interface is higher than the indium concentration at the center of the second insulating film, The width of the oxide semiconductor film is smaller than the width of the gate electrode in the channel length direction.

2. The semiconductor device according to claim 1, Indium was detected near the interface by secondary ion mass spectrometry.

3. The semiconductor device according to claim 1, wherein the oxide semiconductor film includes indium, zinc, and a metal element, And the metal element is at least one selected from titanium, gallium, tin, yttrium, zirconium, lanthanum, cerium, neodymium and hafnium.

4. The semiconductor device according to claim 1, wherein the second insulating film includes oxygen and silicon, and The third insulating film includes nitrogen and silicon.

5. The semiconductor device according to claim 1, The indium concentration near the interface is 5×10 16 Atom / cm 3 above.

6. The semiconductor device according to claim 1, The second insulating film is in contact with a channel formation region in the oxide semiconductor film.

7. The semiconductor device according to claim 1, further comprising: A source electrode and a drain electrode are electrically connected to the oxide semiconductor film. 8 . The semiconductor device according to claim 7 , wherein the semiconductor device has a channel etching type structure or a channel protection type structure.

9. A method for manufacturing a semiconductor device, the method comprising the steps of: forming a first conductive film; forming a first insulating film over the first conductive film; forming an oxide semiconductor film over the first insulating film; forming a second insulating film over the oxide semiconductor film; forming a film including indium over the second insulating film; adding oxygen to the oxide semiconductor film and the second insulating film through the film including indium; removing the film comprising indium; and after removing the film containing indium, forming a third insulating film over the second insulating film, The first conductive film is processed into a gate electrode so as to have a width greater than a width of the oxide semiconductor film in a channel length direction.

10. The method according to claim 9, wherein indium is included near an interface between the second insulating film and the third insulating film, and The indium concentration at the interface is higher than the indium concentration at the center of the second insulating film.

11. The method according to claim 9, wherein the adding of oxygen is performed by an ion doping method, an ion implantation method, or a plasma treatment. 12 . The method according to claim 9 , wherein the adding of oxygen is performed at a substrate temperature of room temperature or higher and 300° C. or lower.

13. The method according to claim 9, wherein the oxide semiconductor film includes indium, zinc, and a metal element, and The metal element is selected from at least one of titanium, gallium, tin, yttrium, zirconium, lanthanum, cerium, neodymium and hafnium.

14. The method according to claim 9, wherein the second insulating film includes oxygen and silicon, and The third insulating film includes nitrogen and silicon. 15 . The method according to claim 9 , wherein the second insulating film is in contact with a channel formation region in the oxide semiconductor film.

16. The method according to claim 9, further comprising the steps of: forming a source electrode and a drain electrode electrically connected to the oxide semiconductor film; and In the same step as or after the step of forming the source electrode and the drain electrode, a recessed portion is formed in part of the oxide semiconductor film.

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