Storage device and method of controlling a storage device

Abstract

A memory device and a method of controlling a memory device are provided. The memory device includes a memory and a memory controller that sends a command to the memory. The memory includes at least one array of memory cells, a memory temperature sensor that measures a temperature of the memory, and control logic. The control logic outputs a busy signal in response to the command, receives the temperature of the memory from the memory temperature sensor in response to the command, and determines whether to perform a command operation according to the command on the array of memory cells based on the received temperature of the memory.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2019-0118738, filed on September 26, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. TECHNICAL FIELD

[0002] Exemplary embodiments of the present disclosure relate to a storage device and a method of controlling a storage device. BACKGROUND

[0003] As a non-volatile memory, a flash memory can maintain stored data even when power is interrupted. Recently, storage devices including a flash memory, such as an embedded multimedia card (eMMC), a universal flash storage (UFS), a solid state drive (SSD), and a memory card, have become more widely used. The storage devices are used to store or move a large amount of data.

[0004] When the temperature of a memory in a storage device increases, the storage device consumes a large amount of power while operating. Accordingly, the operating performance of the storage device can decrease. In addition, the memory can be damaged, thus, causing errors in data stored in the storage device and / or shortening the lifespan of the storage device. SUMMARY

[0005] Aspects of the present disclosure provide a storage device that controls a memory according to a temperature of the memory without intervention of a memory controller.

[0006] Aspects of the present disclosure further provide a method of controlling a storage device that controls a memory according to a temperature of the memory without intervention of a memory controller.

[0007] According to an exemplary embodiment of the present disclosure, a storage device includes a memory and a memory controller. The memory controller transmits a command to the memory. The memory includes at least one memory cell array, a memory temperature sensor that measures a temperature of the memory, and control logic. The control logic outputs a busy signal in response to the command, receives the temperature of the memory from the memory temperature sensor in response to the command, and determines whether to perform a command operation according to the command on the memory cell array based on the received temperature of the memory.

[0008] According to an example embodiment of the disclosure, a storage device includes a storage device temperature sensor measuring a temperature of the storage device, a memory controller receiving the temperature of the storage device from the storage device temperature sensor and generating an enable signal when the received temperature of the storage device is higher than or equal to a first set temperature, and a first memory and a second memory. Each of the first memory and the second memory operates in a thermal throttling mode in response to the enable signal received from the memory controller. While operating in the thermal throttling mode, the first memory receives a temperature of the first memory from a first memory temperature sensor disposed in the first memory in response to a first command received from the memory controller, and determines whether to execute the first command according to the received temperature of the first memory. While operating in the thermal throttling mode, the second memory receives a temperature of the second memory from a second memory temperature sensor disposed in the second memory in response to a second command received from the memory controller, and determines whether to execute the second command according to the received temperature of the second memory. A time when the first command is executed by the first memory is different from a time when the second command is executed by the second memory.

[0009] According to an example embodiment of the disclosure, a method of controlling a storage device includes measuring a temperature of the storage device using a storage device temperature sensor disposed in the storage device, generating an enable signal when the temperature of the storage device is higher than a first set temperature, measuring a temperature of a memory using a memory temperature sensor disposed in the memory in response to a command while the enable signal is provided, and determining whether to execute a command operation according to the command on the memory based on the measured temperature of the memory. BRIEF DESCRIPTION OF DRAWINGS

[0010] The above and other features of the disclosure will become more apparent by describing in detail example embodiments thereof with reference to the attached drawings, in which:

[0011] Figure 1 is a block diagram of a system including a storage device according to an example embodiment;

[0012] Figure 2 is Figure 1 is an example block diagram of a memory of

[0013] Figure 3 is a graph showing a thermal throttling mode of a storage device according to an example embodiment;

[0014] Figure 4 shows an operation of a storage device according to an example embodiment;

[0015] Figure 5 shows an operation of a storage device according to an example embodiment;

[0016] Figure 6 shows operation of a storage device according to an example embodiment;

[0017] Figure 7 shows operation of a storage device according to an example embodiment;

[0018] Figure 8 is a flowchart showing operation of a storage device in a thermal throttling mode according to an example embodiment;

[0019] Figure 9 is a flowchart showing operation of a storage device in a thermal throttling mode according to an example embodiment;

[0020] Figure 10 is a flowchart showing operation of a storage device in a thermal throttling mode according to an example embodiment;

[0021] Figure 11 is a block diagram of a storage device according to an example embodiment; and

[0022] Figure 12 shows operation of a storage device according to Figure 11 example embodiments at random times. DETAILED DESCRIPTION

[0023] Example embodiments of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings. Like reference numerals can be used to refer to like elements throughout the accompanying drawings.

[0024] It will be understood that the terms "first", "second", "third", etc. are used herein to distinguish one element from another, and the elements are not limited by these terms. Thus, a "first" element in an example embodiment can be described as a "second" element in another example embodiment.

[0025] It should be understood that the description of a feature or aspect within each example embodiment should be taken as indicative of possible aspects or features of other example embodiments, unless the context clearly indicates otherwise.

[0026] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0027] Figure 1 is a block diagram of a system including a storage device 20 according to an example embodiment.

[0028] Referring to Figure 1According to an exemplary embodiment, a system including the storage device 20 can include a host 10 and the storage device 20. The system can be, but is not limited to, a data storage medium based on a flash memory such as a memory card, a universal serial bus (USB) memory, a solid state drive (SSD), etc.

[0029] The host 10 can transmit a data operation request REQ and an address ADDR to the memory controller 200, and exchange data DATA with the memory controller 200.

[0030] The storage device 20 can include a storage device temperature sensor 100, a memory controller 200, and a memory 300. The memory 300 can be, for example, a non-volatile memory.

[0031] The storage device temperature sensor 100 can be disposed inside the storage device 20. The storage device temperature sensor 100 can measure a temperature T s .

[0032] The memory controller 200 can receive a temperature T s of the storage device 20 from the storage device temperature sensor 100. The memory controller 200 can control the memory 300 according to the temperature T s The memory controller 200 can provide an enable signal EN to the memory 300.

[0033] The memory controller 200 can control the memory 300 in response to a request from the host 10. The memory controller 200 can read data DATA stored in the memory 300, for example, in response to a data operation request REQ received from the host 10, and can control the memory 300 to write data DATA. The memory controller 200 can provide an address ADDR, a command CMD, and a control signal CTRL to the memory 300, and control a program operation, a read operation, and an erase operation of the memory 300. In addition, data DATA to be programmed and read data DATA can be transmitted and received between the memory controller 200 and the memory 300.

[0034] The memory 300 can output a ready and busy signal RnB. The ready and busy signal RnB can indicate a state of the memory 300. When the memory 300 outputs, for example, a ready signal, the memory controller 200 can provide a command CMD to the memory 300. In one exemplary embodiment, when the memory 300 outputs, for example, a busy signal, the memory controller 200 does not provide a command CMD. The memory 300 can include a memory cell array 310, a memory temperature sensor 320, and control logic 330. The memory 300 can be controlled according to a temperature T mThe memory 300 can output a reboot signal Reboot in response to a command CMD received from the memory controller 200 when the memory 300 is rebooted.

[0035] Figure 2 is Figure 1 an exemplary block diagram of the memory 300.

[0036] Referring to Figure 1 and Figure 2 , the memory 300 can include a memory cell array 310, a memory temperature sensor 320, and control logic 330.

[0037] The memory 300 can be, but is not limited to, a NAND flash memory, a vertical NAND (VNAND) flash memory, a NOR flash memory, a resistive random access memory (RRAM), a phase change RAM (PRAM), a magnetoresistive RAM (MRAM), a ferroelectric RAM (FRAM), or a spin transfer torque magnetic RAM (STT-RAM).

[0038] The memory cell array 310 can include a plurality of memory blocks, each of which can include a plurality of memory cells connected to a plurality of word lines WL and a plurality of bit lines BL.

[0039] The memory cell array 310 can be connected to a row decoder 350 through a plurality of string select lines SSL, a plurality of word lines WL, and a plurality of ground select lines GSL. In addition, the memory cell array 310 can be connected to a page buffer circuit 360 through a plurality of bit lines BL.

[0040] The memory temperature sensor 320 can be disposed inside the memory 300. The memory temperature sensor 320 can measure a temperature T m of the memory 300. The temperature T m of the memory 300 measured by the memory temperature sensor 320 can be provided to the control logic 330.

[0041] The memory 300 can operate in a thermal throttling mode in response to an enable signal EN. In the thermal throttling mode, the control logic 330 can receive the temperature T m of the memory 300 from the memory temperature sensor 320 in response to the command CMD. In the thermal throttling mode, when the control logic 330 completes performing an operation on the memory cell array 310 according to the command CMD, the control logic 330 can receive the temperature T m of the memory 300 from the memory temperature sensor 320. This will be further described below with reference to Figures 3 to 8 .

[0042] The control logic 330 can control overall operations of the memory 300 based on the command CMD, the address ADDR, the control signal CTRL, and the enable signal EN received from the memory controller 200. The control logic 330 can control, for example, a write operation, a read operation, and an erase operation of the memory 300. The control logic 330 can output a ready and busy signal RnB indicating a state of the memory 300.

[0043] The control logic 330 can provide a voltage control signal CTRL_vol to the voltage generator 340. The control logic 330 can generate a row address X-ADDR and a column address Y-ADDR based on the address signal ADDR. The control logic 330 can provide the row address X-ADDR to the row decoder 350 and the column address Y-ADDR to a data input / output (I / O) circuit 370.

[0044] The voltage generator 340 can generate an operating voltage required for an operation of the memory 300 in response to the voltage control signal CTRL_vol. The operating voltage can include, but is not limited to, a word line voltage VWL, a program voltage, a read voltage, a verify voltage, and an erase voltage.

[0045] The row decoder 350 can be connected to the memory cell array 310 through a string select line SSL, a word line WL, and a ground select line GSL. The row decoder 350 can select the string select line SSL, the word line WL, and the ground select line GSL in response to the row address X-ADDR. The row decoder 350 can apply the operating voltage received from the voltage generator 340 to the selected and unselected string select line SSL, the word line WL, and the ground select line GSL, respectively.

[0046] The page buffer circuit 360 can be connected to the memory cell array 310 through a bit line BL. The page buffer circuit 360 can include a plurality of page buffers. The page buffer circuit 360 can temporarily store data to be written to a selected page during a write operation. The page buffer circuit 360 can temporarily store data read from a selected page during a read operation.

[0047] The data I / O circuit 370 can be connected to the page buffer circuit 360 through a data line DL. For example, during a write operation, the data I / O circuit 370 can receive write data DATA from the memory controller 200 and provide the write data DATA to the page buffer circuit 360 based on the column address Y-ADDR received from the control logic 330. For example, during a read operation, the data I / O circuit 370 can provide read data DATA stored in the page buffer circuit 360 to the memory controller 200 based on the column address Y-ADDR received from the control logic 330.

[0048] Figure 3is a graph showing a thermal throttling mode of the storage device 20 according to an exemplary embodiment. The X-axis represents time, and the Y-axis represents a temperature of the memory 300 or a temperature of the storage device 20.

[0049] Referring to Figure 3 , the first set temperature T1, the throttling temperature T th , the second set temperature T2, and the restart temperature T r may be different from each other. The throttling temperature T th may be higher than the first set temperature T1 and lower than the second set temperature T2. The restart temperature T r may be higher than the throttling temperature T th and lower than the second set temperature T2. The first set temperature T1, the throttling temperature T th , the second set temperature T2, and the restart temperature T r may be preset values, and can be differently set for different storage devices. When the temperature of the storage device 20 is higher than or equal to the first set temperature T1 and lower than the second set temperature T2, the storage device 20 can operate in a thermal throttling mode. When the temperature of the storage device 20 is higher than or equal to the first set temperature T1, the thermal throttling mode of the storage device 20 can be turned on. In the thermal throttling mode, the storage device 20 according to an exemplary embodiment can perform a command operation by comparing the temperature T m of the memory 300 with the throttling temperature T th . The storage device 20 can perform the command operation when the temperature T m of the memory 300 is lower than or equal to the throttling temperature T th .

[0050] Alternatively, in the thermal throttling mode, the storage device 20 according to an exemplary embodiment can perform a command operation by comparing the temperature T m of the memory 300 with the throttling temperature T th and the restart temperature T r . The storage device 20 can perform the command operation when the temperature T m of the memory 300 is lower than or equal to the throttling temperature T th and lower than the restart temperature T r . The storage device 20 can be restarted to protect the storage device 20 itself when the temperature T m of the memory 300 is higher than or equal to the restart temperature T r .

[0051] Further, in one exemplary embodiment, when the temperature of the storage device 20 is higher than or equal to the second set temperature T2, the storage device 20 does not generate a command to protect the storage device 20 itself.

[0052] When the temperature of the storage device 20 is below a first set temperature T1, the thermal throttling mode of the storage device 20 can be turned off. This is because the temperature of the storage device 20 is low enough for the storage device 20 to execute command operations. Therefore, in an exemplary embodiment, when not operating in thermal throttling mode, the storage device 20 does not receive the temperature of the memory 300 from the memory temperature sensor 320. That is, the storage device 20 can execute command operations regardless of the temperature of the memory 300. Therefore, the sensing operation of the memory temperature sensor 320 can be stopped, thereby reducing the amount of heat generated and power consumed by the storage device 20.

[0053] Figures 4 to 6 The operation of the storage device 20 according to an exemplary embodiment is illustrated. Figures 4 to 6 In the middle, the solid line RnB, representing the ready and busy signal lines, indicates the temperature T of the memory 300. m Less than or equal to the throttling temperature T th In this case, the dotted (dotted) ready and busy signal line RnB indicates the memory temperature T at 300°C. m Above the throttling temperature T th And the temperature is lower than the second set temperature T2.

[0054] Reference Figure 1 , Figure 3 and Figure 4 The memory 300 can receive commands (CMD) from the memory controller 200 via I / O line IOx. The memory 300 can execute command operations according to the command CMD in response to it. The memory 300 can output a low-level busy signal while executing the command operation. Although in Figure 4 The memory 300 outputs a busy signal when the command CMD is provided to the memory 300, but the exemplary embodiment is not limited to this. For example, the memory 300 may also output a busy signal at a predetermined time after the command CMD is received.

[0055] Next, the memory 300 can output a high-level ready signal after completing the command operation.

[0056] When the temperature T of storage device 20 s When the temperature is higher than or equal to the first set temperature T1 and lower than the second set temperature T2, the memory controller 200 may output a high-level enable signal EN. Simultaneously with the output of the high-level enable signal EN, the memory 300 may operate in thermal throttling mode.

[0057] In thermal throttling mode, memory 300 can determine its temperature T in response to command CMD. m Is it lower than or equal to the throttling temperature T? th When the memory temperature is 300°C (T0),m less than or equal to the throttling temperature T th When the command operation is performed, the memory 300 can output a busy signal at a low level. The time when the command CMD is provided to the memory 300 determines the temperature T m of the memory 300. Whether the temperature T th of the memory 300 is less than or equal to the throttling temperature T m is determined. th

[0058] When the memory 300 completes the command operation, whether the temperature T m of the memory 300 is less than or equal to the throttling temperature T th may be determined. When it is determined that the temperature T m of the memory 300 is less than or equal to the throttling temperature T th , the memory 300 can output a ready signal. That is, when the command operation is started and when the command operation is completed, the memory 300 can determine whether the temperature T m of the memory 300 is less than or equal to the throttling temperature T th .

[0059] Here, when it is described that the memory 300 outputs a busy signal or a busy signal at a low level, it can mean that the ready and busy signal RnB is at a low level, and when it is described that the memory 300 outputs a ready signal or a ready signal at a high level, it can mean that the ready and busy signal RnB is at a high level.

[0060] Referring to Figure 1 and Figure 5 , while the memory 300 performs the command operation (actual busy state), the temperature T m of the memory 300 can increase. When the temperature T m of the memory 300 is higher than the throttling temperature T th after the memory 300 completes the command operation, the memory 300 can output a busy signal at a low level (for example, the ready and busy signal RnB can be at a low level). That is, the memory 300 can be in a dummy busy state in which the memory 300 outputs a busy signal but does not actually perform the command operation. Accordingly, the temperature T m of the memory 300 can decrease.

[0061] In the dummy busy state, the memory 300 can determine whether the temperature T m of the memory 300 is less than or equal to the throttling temperature T th at regular intervals (for example, time intervals).When it is determined that the temperature T m of the memory 300 is lower than or equal to the throttling temperature T th , the memory 300 can output a high level of the ready signal.

[0062] Referring to Figures 1 to 6 , the temperature T m of the memory 300 can be higher than the throttling temperature T th before the command CMD is received. In this case, in one exemplary embodiment, the memory 300 can output a busy signal in response to the command CMD but not actually perform the command operation. That is, the memory 300 can be in a dummy busy state.

[0063] In the dummy busy state, the memory 300 can determine at regular intervals whether the temperature T m of the memory 300 is lower than or equal to the throttling temperature T th . When it is determined that the temperature T m of the memory 300 is lower than or equal to the throttling temperature T th , the memory 300 can perform the command operation. That is, the memory 300 can be in an actual busy state in which the memory 300 outputs a busy signal and actually performs the command operation.

[0064] As described above, when the temperature T m of the memory 300 is higher than the throttling temperature T th after the memory 300 completes the command operation, the memory 300 can output a low level of the busy signal (for example, the ready and busy signal RnB can be at a low level).

[0065] Figure 7 An operation of the memory device 20 according to an exemplary embodiment is illustrated.

[0066] In Figure 7 , a solid ready and busy signal line RnB indicates a case in which the temperature T m of the memory 300 is lower than or equal to the throttling temperature T th , a broken ready and busy signal line RnB indicates a case in which the temperature T m of the memory 300 is higher than the throttling temperature T th and lower than the restart temperature T r , and a dotted ready and busy signal line RnB, which is shorter than the line of the broken ready and busy signal line RnB, indicates a case in which the temperature T m of the memory 300 is higher than or equal to the restart temperature T r and lower than the second set temperature T2. The following description will focus on differences from the above-described embodiment. Figures 4 to 6 ​

[0067] Reference Figure 1 , Figure 3 and Figure 7 When the temperature T of storage device 20 s When the temperature is higher than or equal to the first set temperature T1 and lower than the second set temperature T2, the memory controller 200 may output a high-level enable signal EN. Simultaneously with the output of the high-level enable signal EN, the memory 300 may operate in thermal throttling mode.

[0068] In thermal throttling mode, while the memory 300 is executing command operations (actually in a busy state), the temperature T of the memory 300 is... m It can be increased. The temperature T of memory 300 after the command operation is completed in memory 300 is also increased. m Higher than restart temperature T r In this case, memory 300 can be restarted to protect itself. A restarted memory 300 can output a restart signal (Reboot). That is, memory 300 can output a restart signal (Reboot) in response to the CMD command.

[0069] According to an exemplary embodiment, the storage device 20 can be adjusted based on the temperature T of the storage device 20. s Controlled, and when the temperature T of the memory reaches 300°C m Temperature T is higher than or equal to the restart temperature. r At this time, memory 300 can be restarted independently. Therefore, due to the temperature T of memory 300... m Damage caused can be prevented, thereby protecting the memory 300 and the storage device 20.

[0070] Figure 8 This is a flowchart illustrating the operation of the storage device 20 in thermal throttling mode according to an exemplary embodiment.

[0071] Reference Figure 1 and Figure 8 According to an exemplary embodiment, the memory controller 200 can receive the temperature T of the storage device 20 from the storage device temperature sensor 100 at regular intervals (or periodically). s (Operation S210).

[0072] The memory controller 200 can determine the temperature T of the storage device 20. s Is it higher than or equal to the first set temperature T1 and lower than the second set temperature T2 (operation S220)?

[0073] Then, when the temperature T of the storage device 20 is determined... sWhen the temperature is higher than or equal to the first set temperature T1 and lower than the second set temperature T2, the memory controller 200 can generate an enable signal EN (operation S230). The memory controller 200 can provide the enable signal EN to the memory 300.

[0074] Here, when the enable signal EN is described as being generated / provided, it can mean that the enable signal EN is activated (e.g., the enable signal EN transitions from a low level to a high level).

[0075] The memory 300 can execute a thermal throttling mode in response to the enable signal EN (operation S240). That is, the memory 300 can execute a thermal throttling mode while the enable signal EN is provided (e.g., the enable signal EN is high). The thermal throttling mode can be one in which the memory 300 operates based on the temperature T of the memory 300. m The mode that determines whether to execute the command operation.

[0076] When the memory controller 200 determines the temperature T of the storage device 20 in operation S220 s When the temperature is not higher than or equal to the first set temperature T1 and lower than the second set temperature T2, the memory controller 200 can determine the temperature T of the storage device 20. s Is it higher than or equal to the second set temperature T2 (operation S250)?

[0077] Then, when the temperature T of storage device 20 is determined... s When the temperature is higher than or equal to the second set temperature T2, the memory controller 200 may stop sending commands CMD to the memory 300 (operation S260). The second set temperature T2 may be, for example, the temperature at which the storage device 20 can operate normally. To protect the storage device 20, when the temperature T of the storage device 20 is determined... s When the temperature is higher than or equal to the second set temperature T2, the memory controller 200 may stop sending commands CMD.

[0078] When the temperature T of the storage device 20 is determined in operation S250 s When it is not higher than or equal to the second set temperature T2 (that is, when the temperature T of the storage device 20 is determined) s When the temperature is below the first set temperature T1, the memory controller 200 can return to operation S210 and receive the temperature T of the storage device 20 from the storage device temperature sensor 100. s This is because when the temperature T of the storage device is 20... s When the temperature is below the first set temperature T1, the storage device 20 is protected even without executing the thermal throttling mode. Therefore, the memory controller 200 can execute command operations in response to the command CMD without receiving the temperature T of the storage device 20 from the storage device temperature sensor 100. sNow we will refer to Figure 9 Describe the thermal throttling mode.

[0079] Figure 9 This is a flowchart illustrating the operation of the storage device 20 in thermal throttling mode according to an exemplary embodiment.

[0080] Reference Figure 1 and Figure 9 When control logic 330 receives command CMD from memory controller 200 in thermal throttling mode (operation S310), control logic 330 can receive the temperature T of memory 300 from memory temperature sensor 320. m (Operation S320)

[0081] Optionally, in operation S310, when the control logic 330 does not receive the command CMD from the memory controller 200 in thermal throttling mode, the control logic 330 does not receive the temperature T of the memory 300 from the memory temperature sensor 320. m .

[0082] Therefore, since the control logic 330 according to the exemplary embodiment receives the temperature T of the memory 300 from the memory temperature sensor 320 in thermal throttling mode in response to the command CMD, m Therefore, the memory controller 200 receives the temperature T of the memory 300 from the memory temperature sensor 320. m The power consumed can be reduced.

[0083] Control logic 330 can determine the temperature T of memory 300. m Is it lower than or equal to the throttling temperature T? th (Operation S330). Throttling temperature T th It can be set differently for different storage devices, and can be a preset temperature.

[0084] When the temperature T of the memory 300 is determined m Less than or equal to the throttling temperature T th At this time, control logic 330 may output a busy signal (for example, the ready and busy signals RnB may be set to low level) and execute the command operation according to command CMD (operation S340).

[0085] Then, control logic 330 can determine whether the command operation according to command CMD has been completed (operation S350).

[0086] When it is determined that the command operation according to command CMD has been completed, control logic 330 can receive the temperature T of memory 300 from memory temperature sensor 320. m (Operate S360)

[0087] Then, control logic 330 can determine the temperature T of memory 300. m Is it lower than or equal to the throttling temperature T? th (Operation S370)

[0088] When the temperature T of the memory 300 is determined m Less than or equal to the throttling temperature T th When this happens, control logic 330 can output a ready signal (operation S380) (for example, the ready and busy signals RnB can be set to high level).

[0089] When the temperature T of memory 300 is determined in operation S330 m Above the throttling temperature T th At this time, control logic 330 may output a busy signal (e.g., the ready and busy signals RnB may be set to low) and not execute the command operation according to command CMD (operation S332). Therefore, the amount of heat generated or power consumed by storage device 20 can be reduced.

[0090] Then, control logic 330 can receive the temperature T of memory 300 from memory temperature sensor 320 at regular intervals. m (Operation S334). The rule interval can be set differently for different storage devices, and can be a preset interval.

[0091] Then, control logic 330 can determine the temperature T of memory 300. m Is it lower than or equal to the throttling temperature T? th (Operation S336).

[0092] When the temperature T of the memory 300 is determined m Less than or equal to the throttling temperature T th At this time, control logic 330 may output a busy signal (for example, the ready and busy signals RnB may be set to low level) and execute the command operation according to command CMD (operation S340).

[0093] Optionally, when the temperature T of the memory 300 is determined in operation S336... m Above the throttling temperature T th At this time, control logic 330 can return to operation S334 and measure the temperature T of memory 300 at regular intervals. m .

[0094] When the temperature T of memory 300 is determined in operation S370 m Above the throttling temperature T thAt this time, control logic 330 may output a busy signal (for example, the ready and busy signals RnB may be set to low level) and not execute the command operation according to command CMD (operation S372).

[0095] Then, control logic 330 can receive the temperature T of memory 300 from memory temperature sensor 320 at regular intervals. m (Operation S374).

[0096] Then, control logic 330 can determine the temperature T of memory 300. m Is it lower than or equal to the throttling temperature T? th (Operation S376).

[0097] When the temperature T of the memory 300 is determined m Less than or equal to the throttling temperature T th At this time, control logic 330 can output a busy signal and execute command operations according to command CMD (operation S380).

[0098] Optionally, when the temperature T of memory 300 is determined in operation S376... m Above the throttling temperature T th At this time, control logic 330 can return to operation S374 and receive the temperature T of memory 300 at regular intervals. m .

[0099] According to an exemplary embodiment, the storage device 20 can, without the intervention of the memory controller 200, use control logic 330 based on the temperature T of the memory 300. m This determines whether to execute the command operation. Therefore, since communication between the memory controller 200 and the control logic 330 does not occur, the amount of unnecessary heat generated by the storage device 20 and the amount of unnecessary power consumed can be prevented.

[0100] Figure 10 This is a flowchart illustrating the operation of the storage device 20 in thermal throttling mode according to an exemplary embodiment. For ease of explanation, the following description will focus on... Figure 9 and Figure 10 The differences between them.

[0101] Reference Figure 1 and Figure 10 When control logic 330 determines the temperature T of memory 300 in operation S330 m Above the throttling temperature T th At that time, control logic 330 can further determine the temperature T of memory 300. m Is it below the restart temperature T? r(Operation S331). When control logic 330 determines the temperature T of memory 300 in operation S331... m Temperature T is higher than or equal to the restart temperature. r When the temperature T of the memory 300 is determined, the control logic 330 can restart the memory 300 and output a restart signal Reboot (operation S339). That is, when the temperature T of the memory 300 is determined... m Temperature T is higher than or equal to the restart temperature. r When necessary, control logic 330 can forcibly restart memory 300 to protect memory 300. Therefore, memory controller 200 can receive a reboot signal Reboot in response to command CMD. Optionally, when the temperature T of memory 300 is determined in operation S331... m Below restart temperature T r At this time, control logic 330 may output a busy signal and not execute the command operation according to command CMD (operation S332).

[0102] Furthermore, when control logic 330 determines the temperature T of memory 300 in operation S336... m Above the throttling temperature T th At that time, control logic 330 can further determine the temperature T of memory 300. m Is it below the restart temperature T? r (Operation S338). When the temperature T of the memory 300 is determined... m Below restart temperature T r At this time, control logic 330 can return to operation S334 and measure the temperature T of memory 300 at regular intervals. m Optionally, when control logic 330 determines the temperature T of memory 300 in operation S338... m Temperature T is higher than or equal to the restart temperature. r When this happens, control logic 330 can restart memory 300 and output a reboot signal Reboot (operation S339).

[0103] Furthermore, when control logic 330 determines the temperature T of memory 300 in operation S376... m Above the throttling temperature T th At that time, control logic 330 can further determine the temperature T of memory 300. m Is it below the restart temperature T? r (Operation S378). When the temperature T of the memory 300 is determined... m Below restart temperature T r At this time, control logic 330 can return to operation S374 and receive the temperature T of memory 300 at regular intervals. m Optionally, when control logic 330 determines the temperature T of memory 300 in operation S378... mTemperature T is higher than or equal to the restart temperature. r At this time, control logic 330 can restart memory 300 and output a restart signal Reboot (operation S379). That is, memory controller 200 can receive the restart signal Reboot in response to command CMD.

[0104] Figure 11 This is a block diagram of a storage device 20 according to an exemplary embodiment. For ease of explanation, the following description will focus on... Figure 1 storage device 20 and Figure 11 The difference between the storage devices 20.

[0105] Reference Figure 11 According to an exemplary embodiment, the storage device 20 may include first memories 300_1 to nth memories 300_n, where n is a natural number greater than 1. The memory controller 200 may receive the temperature T of the storage device 20 from the storage device temperature sensor 100. s The memory controller 200 can adjust the temperature T of the storage device 20 received from the storage device temperature sensor 100 based on the temperature T of the storage device 20. s The enable signal EN will be provided to each of the first memory 300_1 to the nth memory 300_n.

[0106] The memory controller 200 can send the first command CMD1 to the nth command CMDn to the first memory 300_1 to the nth memory 300_n respectively upon request from the host 10.

[0107] Each of the first memory 300_1 to the nth memory 300_n may include a corresponding one of the first control logic 330_1 to the nth control logic 330_n and a corresponding one of the first memory temperature sensors 320_1 to the nth memory temperature sensors 320_n. Each of the first memory 300_1 to the nth memory 300_n may, in response to a corresponding one of the first command CMD1 to the nth command CMDn, receive a first temperature T of the first memory 300_1 from a corresponding one of the first memory temperature sensors 320_1 to the nth memory temperature sensors 320_n. m_1 The nth temperature T of the nth memory 300_n m_n It corresponds to one of the options and can execute commands.

[0108] The first memory 300_1 to the nth memory 300_n can execute command operations at different times, and can output ready and busy signals RnB_1 to RnB_n respectively. The first memory 300_1 to the nth memory 300_n can receive restart signals Reboot_1 to Reboot_n from the memory controller 200 respectively.

[0109] According to the exemplary embodiment, the storage device 20 does not simultaneously determine whether to execute command operations on the memory based on the temperature of the storage device 20. Therefore, the efficiency of the storage device 20 can be improved.

[0110] Figure 12 Showing according to Figure 11 The storage device 20 in the exemplary embodiment operates at random times. Here, the solid ready-to-busy signal lines RnB_1 to RnB_4 indicate the temperature T of the memory 300. m Less than or equal to the throttling temperature T th In this situation, the broken ready-to-work signal lines RnB_1 to RnB_4 indicate the temperature T of the memory 300. m Above the throttling temperature T th And below the restart temperature T r In this case, and the linear shape is shorter than the broken ready and busy signal lines RnB, the dashed ready and busy signal lines RnB_1 to RnB_4 indicate the temperature T of the memory 300. m Temperature T is higher than or equal to the restart temperature. r And the temperature is below the second set temperature T2. Furthermore, the upward arrow indicates the temperature T of the memory 300. m The determined situation. For ease of description, the first memory 300_1, the second memory 300_2, the third memory 300_3, and the fourth memory 300_4 will be mainly described below. However, it should be understood that the embodiments are not limited thereto.

[0111] Reference Figure 11 and Figure 12 The first memory 300_1 to the fourth memory 300_4 can receive the enable signal EN and operate in thermal throttling mode.

[0112] In hot throttling mode, the times when the first memory 300_1 receives and executes the first command CMD1, the times when the second memory 300_2 receives and executes the second command CMD2, the times when the third memory 300_3 receives and executes the third command CMD3, and the times when the fourth memory 300_4 receives and executes the fourth command CMD4 can be different from each other. The first memory 300_1 can execute the first command operation at time A, the second memory 300_2 can execute the second command operation at time D, the third memory 300_3 can execute the third command operation at time E, and the fourth memory 300_4 can execute the fourth command operation at time A.

[0113] At time B, the temperature T of the first memory 300_1 m_1 Temperature T below 300_2 of the second memory m_2At time B, both the first memory 300_1 and the second memory 300_2 can output busy signals, but the first memory 300_1 can execute the first command CMD1, while the second memory 300_2 does not execute the second command CMD2.

[0114] Within the interval between B and C, the first memory 300_1 can execute the first command CMD1 and does not receive the temperature T of the first memory 300_1 from the first memory temperature sensor 320_1. m_1 In the interval between B and C, the second memory 300_2 can receive the temperature T of the second memory 300_2 from the second memory temperature sensor 320_2 at regular intervals. m_2 Furthermore, the third memory 300_3 does not receive the temperature T of the third memory 330_3 from the third memory temperature sensor 320_3. m_3 The temperature T of the second memory 300_2 received from the second memory temperature sensor 320_2. m_2 It can be higher than the temperature T of the third memory 300_3 received from the third memory temperature sensor 320_3. m_3 In other words, the first memory 300_1 can be in an actual busy state, the second memory 300_2 can be in a virtual busy state, and the third memory 300_3 can be in a ready state.

[0115] While the fourth command operation is being executed in the fourth memory 300_4, the temperature T of the fourth memory 300_4 is... m_4 It can become higher than or equal to the restart temperature T r If at time C when the fourth command operation is completed, the temperature T of the fourth memory 300_4 is received from the fourth memory temperature sensor 320_4. m_4 Temperature T is higher than or equal to the restart temperature. r Then, the fourth memory 300_4 can be restarted. The fourth memory 300_4 can output a restart signal Reboot_4. That is, the memory controller 200 can receive the restart signal Reboot_4 from the fourth memory 300_4 in response to the fourth command CMD4. Subsequently, the fourth memory 300_4 can receive another fourth command CMD4 from the memory controller 200.

[0116] Although Figure 12 The first command CMD1, the second command CMD2, the third command CMD3, and the fourth command CMD4 are output at different times, but the exemplary embodiment is not limited to this, and some commands may also be output simultaneously. At time F, the second memory 300_2 may enter a ready state. At time G, the third memory 330_3 may enter a dummy busy state. At time H, the fourth memory 300_4 may be in a ready state.

[0117] exist Figure 12 In this context, the indicators _1, _2, etc. are used to represent the previously described elements (e.g., I / O line IOx, ready and busy signals RnB, and restart signal Reboot) in a manner corresponding to the first memory 300_1 to the fourth memory 300_4.

[0118] Although this disclosure has been specifically shown and described with reference to exemplary embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made herein without departing from the spirit or scope of this disclosure as defined by the claims.

Claims

1. A storage device, the storage device comprising: Memory; The memory controller sends commands to the memory; as well as Storage device temperature sensor, measures the temperature of the storage device. The memory includes: At least one memory cell array; A memory temperature sensor measures the temperature of the memory, and is different from a storage device temperature sensor; and The control logic, in response to the command, outputs a busy signal or a ready signal. in, While operating in thermal throttling mode, in response to the control logic receiving the command, the control logic receives the memory temperature from the memory temperature sensor, determines whether the memory temperature is lower than or equal to the throttling temperature at the time the command is provided to the memory, and executes the command operation according to the command on the at least one memory cell array when the memory temperature is lower than or equal to the throttling temperature. When not operating in thermal throttling mode, the control logic does not receive the memory temperature from the memory temperature sensor, and executes command operations on the at least one memory cell array according to the command, regardless of the memory temperature.

2. The storage device according to claim 1, wherein, The control logic restarts the memory when the memory temperature is higher than or equal to the restart temperature and outputs a restart signal in response to the command. The restart temperature is higher than the throttling temperature.

3. The storage device according to claim 1, wherein, When the memory temperature is higher than the throttling temperature, the control logic receives the memory temperature from the memory temperature sensor at regular intervals, and when the memory temperature received from the memory temperature sensor is lower than or equal to the throttling temperature, the control logic executes a command operation on the at least one memory cell array according to the command.

4. The storage device according to any one of claims 1 to 3, wherein, When the command operation performed on the at least one memory cell array according to the command ends, the control logic receives the temperature of the memory from the memory temperature sensor.

5. The storage device according to claim 4, wherein, When the temperature of the memory received from the memory temperature sensor is lower than or equal to the throttling temperature after the command operation performed on the at least one memory cell array according to the command has ended, the control logic outputs a ready signal, and when the temperature of the memory received from the memory temperature sensor is higher than the throttling temperature after the command operation performed on the at least one memory cell array according to the command has ended, the control logic outputs a busy signal.

6. The storage device according to claim 5, wherein, When the temperature of the memory received from the memory temperature sensor is higher than or equal to the restart temperature after the command operation performed on the at least one memory cell array according to the command has ended, the control logic restarts the memory and outputs a restart signal in response to the command, wherein the restart temperature is higher than the throttling temperature.

7. The storage device according to claim 4, wherein, When the temperature of the memory received from the memory temperature sensor is higher than the throttling temperature after the command operation performed on the at least one memory cell array according to the command has ended, the control logic receives the temperature of the memory at regular intervals.

8. The storage device according to any one of claims 1 to 3, in, When the temperature of the storage device received from the storage device temperature sensor is higher than or equal to a first set temperature, the memory controller provides an enable signal to the memory, and in response to the provision of the enable signal, the memory operates in thermal throttling mode. The throttling temperature is higher than the first set temperature.

9. A storage device, the storage device comprising: A storage device temperature sensor measures the temperature of the storage device; The memory controller receives the temperature of the storage device from a storage device temperature sensor and generates an enable signal when the received temperature of the storage device is higher than or equal to a first set temperature. as well as A first memory and a second memory, each of which operates in thermal throttling mode in response to an enable signal received from a memory controller. in, While operating in thermal throttling mode, the first memory, in response to a first command received from the memory controller, receives the temperature of the first memory from a first memory temperature sensor located within the first memory, and determines whether to execute the first command based on the received temperature of the first memory. While operating in thermal throttling mode, the second memory, in response to a second command received from the memory controller, receives the temperature of the second memory from a second memory temperature sensor located within the second memory, and determines whether to execute the second command based on the received temperature of the second memory. The time it takes for the first memory to execute the first command is different from the time it takes for the second memory to execute the second command.

10. The storage device according to claim 9, wherein, The memory controller periodically receives the measured temperature of the storage device from the storage device temperature sensor, and stops providing the first command and the second command to the first memory and the second memory when the temperature of the storage device is higher than the second set temperature.

11. The storage device according to claim 9 or 10, wherein, While the first memory is executing the first command, both the first memory and the second memory output busy signals. The first memory executes the first command, and the second memory does not execute the second command.

12. The storage device according to claim 11, wherein, During the time when the first command is executed in the first memory, the temperature of the second memory received from the second memory temperature sensor is higher than the temperature of the first memory received from the first memory temperature sensor.

13. The storage device according to claim 9 or 10, further comprising: The third memory operates in thermal throttling mode in response to an enable signal received from the memory controller. in, While operating in thermal throttling mode, the third memory, in response to a third command received from the memory controller, receives the temperature of the third memory from a third memory temperature sensor located within the third memory, and determines whether to execute the third command based on the received temperature of the third memory. The time taken for the first memory to execute the first command, the time taken for the second memory to execute the second command, and the time taken for the third memory to execute the third command are different from each other.

14. The storage device according to claim 13, wherein, The first memory includes first control logic, the second memory includes second control logic, and the third memory includes third control logic. While the first memory executes the first command, the first control logic does not receive the temperature of the first memory from the first memory temperature sensor, the second control logic receives the temperature of the second memory from the second memory temperature sensor at regular intervals, and the third control logic does not receive the temperature of the third memory from the third memory temperature sensor.

15. The storage device according to claim 14, wherein, The temperature of the second memory received from the second memory temperature sensor is different from the temperature of the third memory received from the third memory temperature sensor.

16. A method for controlling a storage device, the method comprising: The temperature of the storage device is measured using a storage device temperature sensor installed in the storage device. When the temperature of the storage device is higher than the first set temperature, an enable signal is generated; While the enable signal is provided to enable the memory to operate in thermal throttling mode, the memory temperature is measured using a memory temperature sensor located in the memory in response to a command received by the memory. When the command is received by the memory, it is determined whether the measured temperature of the memory is lower than or equal to the throttling temperature; When the measured temperature of the memory is lower than or equal to the throttling temperature, execute the command operation according to the command on the memory; as well as While the enable signal is not provided so that the memory is not operating in thermal throttling mode, the memory temperature is not measured using a memory temperature sensor, and the command operation according to the command is performed on the memory regardless of the memory temperature.

17. The method according to claim 16, wherein, After the command operation performed on the memory according to the command is completed, the memory temperature sensor measures the temperature of the memory. When the measured temperature of the memory is higher than the throttling temperature, a busy signal is output, and when the measured temperature of the memory is lower than or equal to the throttling temperature, a ready signal is output.

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