Product-sum operator, neuromorphic device and product-sum operation method

Abstract

The present invention provides a product-sum operator, which has: a plurality of first product operation elements, which multiply a first input signal corresponding to an input value by a weight to generate a first output signal and output the first output signal; and a sum operation unit, which calculates the sum of the first output signals output by each of the plurality of first product operation elements during an operation period from the moment when each of the plurality of first product operation elements generated by the input of the first input signal becomes a stable state after a transient response caused by charging of the parasitic capacitance to the moment when each of the plurality of first product operation elements generated by the input of the first input signal starts to generate a transient response caused by discharging of the parasitic capacitance.

Description

Technical Field

[0001] The invention relates to a product-sum operator, a neuromorphic device and a product-sum operation method. Background Art

[0002] Currently, multiplication and summation calculators and neuromorphic devices are attracting attention as devices that perform neural network operations in order to realize artificial intelligence (AI), the Internet of Things (IoT), deep learning, etc.

[0003] For example, non-patent document 1 discloses a method for performing neural network operations using a memory bank. A method using a perceptron is widely used in neural network operations. In the operation of a neural network using a perceptron, Σax+b (b: bias term) is calculated. Here, it is desired that the bias term can be adjusted in a wide range from positive to negative.

[0004] Prior art literature

[0005] Non-patent literature

[0006] Non-patent document 1: Geoffrey W.Burr,Robert M.Shelby,Abu Sebastian,SangbumKim,Seyoung Kim,Severin Sidler,Kumar Virwani,Masatoshi Ishii,PritishNarayanan,Alessandro Fumarola,Lucas L.Sanches,Irem Boybat,Manuel Le Gallo,Kibong Moon,Jiyoo Woo,Hyunsang Hwang&Yusuf Leblebici,Advances in Physics:X,2,89(2017) Summary of the invention

[0007] Problems to be solved by the invention

[0008] However, when a negative bias is generated when executing the calculation of the neural network, the circuit structure of the product-sum operator and the neuromorphic device may become complicated.

[0009] Therefore, an object of the present invention is to provide a product-sum operator, a neuromorphic device, and a product-sum operation method that can adjust the bias in a wide range from positive to negative without complicating the circuit structure.

[0010] Technical solutions to the problem

[0011] One embodiment of the present invention provides a product-sum operator, which has: a plurality of first product operation elements, which multiply a first input signal corresponding to an input value by a weight to generate a first output signal and output the first output signal; and a sum operation unit, which calculates the sum of the first output signals output by each of the plurality of first product operation elements during an operation period from the moment when each of the plurality of first product operation elements generated by the input of the first input signal becomes a stable state after a transient response caused by charging of the parasitic capacitance to the moment when each of the plurality of first product operation elements generated by the input of the first input signal starts to generate a transient response caused by discharging of the parasitic capacitance.

[0012] In one aspect of the present invention, each of the plurality of first product operation elements is a variable resistance element having a write terminal, a common terminal, and a read terminal.

[0013] In one aspect of the present invention, each of the plurality of first product operation elements is a tunnel magnetoresistance effect element.

[0014] In addition, the product-sum operator of one embodiment of the present invention also has at least one second product operation element, which multiplies the second input signal used in generating the positive bias by a weight to generate a second output signal, and outputs the second output signal, and the sum operation unit calculates the sum of the first output signals output by each of the plurality of first product operation elements and the second output signal output by each of the at least one second product operation element.

[0015] In addition, a multiplication-sum operator of one embodiment of the present invention further has a resistor, which is input with a third input signal and outputs a third output signal to the sum operation unit based on the third input signal. During the operation, the sum operation unit calculates the sum of the first output signals output by each of the plurality of first multiplication operation elements, the second output signal output by each of at least one second multiplication operation element, and the third output signal output by the resistor.

[0016] In addition, a product-sum operator of one embodiment of the present invention further comprises: at least one second product operation element, which multiplies a second input signal by a weight to generate a second output signal and outputs the second output signal; and a resistor, which is input with a third input signal and outputs a third output signal to the sum operation unit based on the third input signal, and the sum operation unit calculates the sum of the first output signals output by each of the plurality of first product operation elements, the second output signals output by each of the plurality of second product operation elements, and the second output signal output by each of at least one second product operation element during the operation.

[0017] In addition, one embodiment of the present invention provides a neuromorphic device including any of the above-mentioned product-sum operators.

[0018] In addition, one embodiment of the present invention provides a product-sum operation method, which is performed by any one of the above-mentioned product-sum operators, and includes: a product operation step, in which multiple first product operation elements respectively multiply the first input signal by a weight to generate the first output signal and output the first output signal; and a sum operation step, in which the sum operation unit calculates the sum of the first output signals output by each of the multiple first product operation elements during the operation period from the moment when the multiple first product operation elements each become stable after the transient response caused by the charging of the parasitic capacitance generated by the input of the first input signal to the moment when the transition response caused by the discharge of the parasitic capacitance generated by the input of the first input signal begins to occur.

[0019] Effects of the Invention

[0020] According to the product-sum operator, neuromorphic device, and product-sum operation method, a product-sum operator, neuromorphic device, and product-sum operation method that can adjust the bias in a wide range from positive to negative without complicating the circuit structure can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a diagram showing an example of a partial structure of a product-sum operator according to an embodiment.

[0022] Figure 2 A diagram showing an example of a variable resistance element according to an embodiment.

[0023] Figure 3 It is a diagram showing an example of an equivalent circuit of a part of the structure of the product-sum operator according to the embodiment.

[0024] Figure 4 1 is a diagram showing an example of a first output signal output by a first product operation element in response to input of a first input signal corresponding to an input value according to an embodiment.

[0025] Figure 5 This is a diagram for explaining an example of a neural network operation performed by a product-sum operator according to an embodiment. DETAILED DESCRIPTION

[0026] Reference Figure 1 and Figure 2 , an example of the structure of the product-sum operator of the implementation method is described. Figure 1 It is a diagram showing an example of a partial structure of a product-sum operator according to an embodiment. Figure 2A diagram showing an example of a variable resistance element according to an embodiment.

[0027] like Figure 1 As shown, the product-sum operator 1 has: a first input part 101E, 201E, ..., k01E; a first product operation element 111, 121, 211, 221, ..., k11, k21; a second input part 102E, 202E, ..., n02E; a second product operation element 112, 122, 212, 222, ..., n12, n22; a third input part 103E; resistors 113W, 123W; and a sum operation part 10S, 20S.

[0028] The first product operation element 111 may also be a resistance variable element having parasitic capacitance, such as a phase-change memory (PCM), a resistive random access memory (ReRAM), Figure 2 The magnetoresistance effect element shown in FIG. Figure 1 and Figure 2 As shown, the first product operation element 111 has a variable resistor 111R, a read terminal 111X, a common terminal 111Y, and a write terminal 111Z. In addition, the first product operation elements 121, 211, 221, ..., k11, k21 are resistance variable elements, for example, Figure 2 The elements shown are similar to magnetoresistance effect elements, and respectively have: variable resistors 121R, 211R, 221R, ..., k11R, k21R; read terminals 121X, 211X, 221X, ..., k11X, k21X; common terminals 121Y, 211Y, 221Y, ..., k11Y, k21Y; write terminals 121Z, 211Z, 221Z, ..., k11Z, k21Z.

[0029] Here, for example Figure 2 As shown, the variable resistor 111R of the first product operation element 111 includes a magnetization fixed layer 1111, a non-magnetic layer 1112, a first region 1113, a magnetic wall 1114, a second region 1115, a first magnetization supply layer 1116, and a second magnetization supply layer 1117. Figure 2 In the description, use Figure 2 The x-axis, y-axis and z-axis are shown. The x-axis, y-axis and z-axis form a three-dimensional orthogonal coordinate system of a right-hand system. The magnetization fixed layer 1111, the non-magnetic layer 1112, the first region 1113, the second region 1115, the first magnetization supply layer 1116 and the second magnetization supply layer 1117 are formed in a relatively thin rectangular parallelepiped shape, and the largest surface is parallel to the xy plane.

[0030] The magnetization direction of the magnetization fixed layer 1111 is fixed to the +y direction. Here, the magnetization is fixed means that the magnetization direction does not change before and after writing using a write current. In addition, the magnetization fixed layer 1111 may also be, for example, an in-plane magnetization film having in-plane magnetic anisotropy or a perpendicular magnetization film having perpendicular magnetic anisotropy.

[0031] The surface of the non-magnetic layer 1112 with the largest area facing the +z direction side is in contact with the surface of the magnetization fixed layer 1111 facing the -z direction side. The surface of the magnetization fixed layer 1111 facing the z direction side and the surface of the non-magnetic layer 1112 facing the z direction side may be equal in shape and area, but the non-magnetic layer 1112 may be wider in a manner covering the first region 1113 and the second region 1115 and may be larger than the magnetization fixed layer 1111. In addition, the non-magnetic layer 1112 is used to read the change in the magnetization state of the magnetization free layer of the first product operation element 111 with respect to the magnetization fixed layer 1111 as a change in resistance value.

[0032] The first region 1113, the magnetic wall 1114, and the second region 1115 form a magnetization free layer. The magnetization free layer is made of a ferromagnetic material and can reverse the magnetization direction. The magnetization direction of the first region 1113 is fixed to the +y direction, and a certain area on the -y direction side of the surface facing the +z direction side contacts the surface of the non-magnetic layer 1112 facing the -z direction side. On the other hand, the magnetization direction of the second region 1115 is fixed to the -y direction, and a certain area on the +y direction side of the surface facing the +z direction side contacts the surface of the non-magnetic layer 1112 facing the -z direction side. The magnetic wall 1114 is sandwiched by the first region 1113 and the second region 1115 in the y direction.

[0033] It is preferred that the first magnetization supply layer 1116 does not overlap with the magnetization fixing layer 1111 in the z direction, and the surface facing the +z direction side contacts the surface facing the -z direction side of the first region 1113. In addition, the first magnetization supply layer 1116 has a function of fixing the magnetization direction of the range overlapping with the first magnetization supply layer 1116 in the first region 1113 to a desired direction. In addition, a write terminal 111Z is connected to the surface facing the -z direction side of the first magnetization supply layer 1116. In addition, the first magnetization supply layer 1116 is made of, for example, the same material as the ferromagnetic material that can be used in the magnetization fixing layer 1111, an antiferromagnetic material such as IrMn, a ferromagnetic material sandwiching a non-magnetic intermediate layer such as Ru, Ir, etc., and may also have a synthetic antiferromagnetic structure including a non-magnetic material and a ferromagnetic material.

[0034] The second magnetization supply layer 1117 does not overlap with the magnetization fixed layer 1111 in the z direction, and the surface facing the +z direction side contacts the surface facing the -z direction side of the second region 1115. In addition, the second magnetization supply layer 1117 has a function of fixing the magnetization direction of the second region 1115 in the range overlapping with the second magnetization supply layer 1117 to a desired direction. In addition, a common terminal 111Y is connected to the surface facing the -z direction side of the second magnetization supply layer 1117. In addition, the second magnetization supply layer 1117 is made of, for example, the same material as the ferromagnetic material that can be used in the magnetization fixed layer 1111, an antiferromagnetic material such as IrMn, a ferromagnetic material sandwiching a non-magnetic intermediate layer such as Ru, Ir, etc., and may also have a synthetic antiferromagnetic structure including a non-magnetic material and a ferromagnetic material.

[0035] The first product operation element 111 changes the position of the magnetic wall 1114 in the y direction by adjusting the magnitude and time of the write current flowing between the common terminal 111Y and the write terminal 111Z. Thus, the first product operation element 111 can continuously change the ratio of the area of ​​the region where the magnetization direction is parallel to the area where the magnetization direction is antiparallel, and change the resistance value of the variable resistor 111R approximately linearly. Here, the region where the magnetization direction is parallel is the area of ​​the portion of the first region 1113 that overlaps with the magnetization fixed layer 1111 in the z direction. In addition, the region where the magnetization direction is antiparallel is the area of ​​the portion of the second region 1115 that overlaps with the magnetization fixed layer 1111 in the z direction. In addition, the magnitude and time of the write current are adjusted by at least one of the number and width of the current pulses.

[0036] In addition, the first product operation element 111 can also be a tunnel magnetoresistance effect element. The tunnel magnetoresistance effect element has a magnetization fixed layer, a magnetization free layer, and a tunnel barrier layer as a non-magnetic layer. The magnetization fixed layer and the magnetization free layer are made of ferromagnetic materials and have magnetization. The tunnel barrier layer is sandwiched between the magnetization fixed layer and the magnetization free layer. The tunnel magnetoresistance effect element can change the resistance value by changing the relationship between the magnetization of the magnetization fixed layer and the magnetization of the magnetization free layer. Known materials can be used in the tunnel barrier layer. For example, Al2O3, SiO2, MgO and MgAl2O4 can be used as its material. In addition, materials such as Zn, Be, etc. can also be used in the tunnel barrier layer.

[0037] return Figure 1 , the first input signal corresponding to the input value is input from the first input unit 101E to the readout terminals 111X and 121X. Figure 1The first input signals corresponding to the input values ​​are input from the first input unit 201E to the readout terminals 211X and 221X, and from the first input unit k01E to the readout terminals k11X and k21X. These first input signals are pulse width modulated (PWM) according to the input values.

[0038] In addition, write currents for adjusting the resistance values ​​of the variable resistors 111R and 121R are input to the write terminals 111Z and 121Z. Figure 1 The write terminals 211Z and 221Z are input with a write current for adjusting the resistance value of the variable resistors 211R and 221R, and the write terminals k11Z and k21Z are input with a write current for adjusting the resistance value of the variable resistors k11R and k21R.

[0039] The first product operation element 111 multiplies the first input signal corresponding to the input value by a weight to generate a first output signal, and outputs the first output signal. That is, the first product operation element 111 performs a product operation on the first input signal input to the readout terminal 111X with the resistance value of the variable resistor 111R as a weight, generates a first output signal, and outputs the first output signal from the common terminal 111Y. Similarly, the first product operation elements 121, 211, 221, ..., k11, k21 respectively multiply the first input signal corresponding to the input value by a weight to generate a first output signal, and output the first output signal.

[0040] The second product operation element 112 is a variable resistance element similar to the first product operation elements 111, 121, 211, 221, ..., k11, k21, and has a variable resistor 112R, a read terminal 112X, a common terminal 112Y, and a write terminal 112Z. In addition, the second product operation elements 122, 212, 222, ..., n12, n22 are variable resistance elements similar to the second product operation element 112, and have variable resistors 122R, 212R, 222R, ..., n12R, n22R, read terminals 122X, 212X, 222X, ..., n12X, n22X, common terminals 122Y, 212Y, 222Y, ..., n12Y, n22Y, and write terminals 122Z, 212Z, 222Z, ..., n12Z, n22Z, respectively.

[0041] The second input signal corresponding to the set value is input from the second input unit 102E to the read terminals 112X and 122X. Figure 1The second input signal corresponding to the set value is input from the second input unit 202E to the read terminals 212X and 222X, and the second input signal corresponding to the set value is input from the second input unit n02E to the read terminals n12X and n22X. These second input signals include signals having waveforms required to generate a desired positive bias in each of the second product operation elements 112, 122, 212, 222, ..., n12, and n22.

[0042] The second product operation element 112 multiplies the second input signal by a weight to generate a second output signal, and outputs the second output signal. That is, the second product operation element 112 uses the resistance value of the variable resistor 112R as a weight, performs a product operation on the second input signal input to the readout terminal 112X, generates a second output signal, and outputs the second output signal from the common terminal 112Y. The second input signal is different from the first input signal corresponding to the input value, and is used to generate a positive bias, so it becomes a signal with a certain waveform. Similarly, the second product operation elements 122, 212, 222, ..., n12, n22 multiply the second input signal by a weight to generate a second output signal, and output the second output signal.

[0043] The resistor 113W receives a third input signal and outputs a third output signal to the sum operation unit 10S based on the third input signal. Similarly, the resistor 123W receives a third input signal and outputs a third output signal to the sum operation unit 20S based on the third input signal. In addition, these third input signals include signals having waveforms required to generate a desired positive bias in the resistors 113W and 123W, and are input by the third input unit 103E.

[0044] In addition, the resistors 113W and 123W do not have parasitic capacitances, unlike the second product operation elements 112, 122, 212, 222, ..., n12, and n22, and therefore cannot generate a transient response caused by discharge from the parasitic capacitances. Therefore, the resistor 113W can generate a positive bias having an absolute value greater than the sum of the positive biases generated by the second product operation elements 112, 212, ..., and n12 by inputting a desired third input signal. In addition, the same is true for the resistor 123W.

[0045] The sum operation unit 10S calculates the sum of the first output signals outputted by the first product operation elements 111, 211, ..., k11, the second output signals outputted by the second product operation elements 112, 212, ..., n12, and the third output signal outputted by the resistor 113W. Similarly, the sum operation unit 20S calculates the sum of the first output signals outputted by the first product operation elements 121, 221, ..., k21, the second output signals outputted by the second product operation elements 122, 222, ..., n22, and the third output signal outputted by the resistor 123W. However, the sum operation units 10S and 20S may calculate the sum of the first input signal and the second input signal, or the sum of the first input signal and the third input signal.

[0046] Next, refer to Figure 3 and Figure 4 An example of a method of calculating the sum of the products by the sum-of-products operator according to the embodiment will be described. Figure 3 It is a diagram showing an example of an equivalent circuit of a part of the structure of the product-sum operator according to the embodiment.

[0047] like Figure 3 As shown, the first product operation element 111 has a parasitic capacitance 111C and a parasitic resistance 111P. It can be considered that the parasitic capacitance 111C is connected in parallel with the variable resistance 111R, and the parasitic resistance 111P is connected in series with the variable resistance 111R. Similarly, the first product operation elements 121, 211, 221, ..., k11, k21 have parasitic capacitances 121C, 211C, 221C, ..., k11C, k21C and parasitic resistances 121P, 211P, 221P, ..., k11P, k21P, respectively. In addition, it can be considered that the first product operation elements 111, 121, 211, 221, ..., k11, k21 are connected in series with wiring resistances 111W, 121W, 211W, 221W, ..., k11W, k21W, respectively.

[0048] Figure 4 1 is a diagram showing an example of a first output signal output by a first product operation element in response to an input of a first input signal corresponding to an input value of the embodiment. Figure 4 In the description of , the first product operation element 111 is described as an example, but the same applies to the first product operation elements 121, 211, 221, . . . , k11, and k21.

[0049] Figure 4 (a) in FIG. 1 shows an example of the first output signal T2 when the first input signal corresponding to the input value "2" is input. The first output signal T2 includes a transient response TF2 and a transient response TS2.

[0050] The transient response TF2 is caused by charging the parasitic capacitor 111C, and starts to occur at the time when the first input signal starts to be input to the first product operation element 111, and changes to a stable state after a predetermined time has passed. The time when the first input signal starts to be input is, for example, Figure 4 In addition, the transient response TF2 is at a time t0, for example Figure 4 The transition to the stable state occurs at time t1 shown. The peak height of the transient response TF2 and the period during which the transient response TF2 occurs depend on the electrostatic capacitance of the parasitic capacitor 111C.

[0051] On the other hand, the transient response TS2 is caused by the discharge from the parasitic capacitor 111C, and starts to occur at the time when the input of the first input signal to the first product operation element 111 is completed, and changes to a stable state after a predetermined time has passed. The time when the input of the first input signal is completed is, for example, Figure 4 The time t21 shown in (a) of FIG. 1 is shown in FIG. 1 . In addition, the transient response TS2 is Figure 4 The transition to the stable state occurs at time t22 shown in (a) of FIG. 1 . In addition, the peak height of the transient response TS2 and the period during which the transient response TS2 occurs depend on the electrostatic capacitance of the parasitic capacitor 111C. In addition, the period from time t1 to time t21 becomes a length corresponding to the input value "2".

[0052] same, Figure 4 (b) Figure 4 (c) and Figure 4 (d) in FIG. 1 shows an example of first output signals T1, T3 and T0 when first input signals corresponding to input values ​​"1", "3" and "0" are input, respectively. The first output signals T1, T3 and T0 respectively include transient responses TF1, TF3 and TF0 caused by charging to the parasitic capacitor 111C and transient responses TS1, TS3 and TS0 caused by discharging from the parasitic capacitor 111C. In addition, the transient responses TF1, TF3 and TF0 are all in Figure 4 The generation starts at the time t0 shown. Figure 4 The state changes to the stable state at the time t1 shown. The peak heights of the transient responses TF1, TF3, and TF0 and the periods during which the transient responses TF1, TF3, and TF0 occur depend on the electrostatic capacitance of the parasitic capacitor 111C.

[0053] On the other hand, the transient responses TS1, TS3 and TS0 are respectively generated due to the end of the input of the first input signal. Figure 4 At time t11 shown in (b) Figure 4 The time t31 shown in (c) and Figure 4The transient responses TS1, TS3 and TS0 start to occur at the time t01 shown in (d) of FIG. Figure 4 At time t12 shown in (b) Figure 4 The time t32 shown in (c) and Figure 4 The time t02 shown in (d) in FIG. 1 is converted to a stable state. In addition, the peak heights of the transient responses TS1, TS3, and TS0 and the periods during which the transient responses TS1, TS3, and TS0 are generated depend on the electrostatic capacitance of the parasitic capacitor 111C. In addition, the period from time t1 to time t11, the period from time t1 to time t31, and the period from time t1 to time t01 become the lengths corresponding to the input values ​​"1", "3", and "0", respectively.

[0054] In addition, if Figure 4 As shown, the transition of the transient responses TS2, TS1, TS3 and TS0 to the stable state at time t2 has been completed.

[0055] The sum operation unit 10S calculates the sum of the first output signals outputted by the first product operation element 111 during the calculation period from the time when the first product operation elements 111, 211, ..., k11 become stable after the transient response caused by the charging of the parasitic capacitances 111C, 211C, ..., k11C due to the input of the first input signal to the time when the transient response caused by the discharging of the parasitic capacitances 111C, 211C, ..., k11C due to the input of the first input signal starts to occur. The same is true for the sum operation unit 20S.

[0056] The time when the transient response caused by charging becomes a stable state is: Figure 4 The time after the transient response caused by the discharge starts to occur is the time during the period when the transient response occurs, or the time when the state becomes stable after the transient response. For example, the period during which the transient response TS2 caused by the discharge occurs is the period from time t21 to time t22. In addition, for example, the time after the transient response TS2 caused by the discharge becomes stable is the time after time t22.

[0057] The operation period referred to here refers to the time when all transient responses caused by discharges generated by the input of the first input signals corresponding to the plurality of input values ​​become stable, for example, the period from time t1 to time t2. The product-sum operator 1 supplies the first output signals T2, T1, T3, and T0 to the sum operation unit 10S only during the operation period, for example, by using a switch, and calculates the sum of the first output signals during the operation period.

[0058] The sum operation unit 10S and the sum operation unit 20S of the product-sum operation unit 1 include at least a part of the transient responses TS2, TS1, TS3, and TS0 caused by discharge during the operation period, and thus can generate negative charge corresponding to the negative bias. In particular, even when the first input unit 101E, 201E, ..., k01E is input with the first input signal corresponding to the input value "0", the first input signal that generates the transient response TF0 caused by charging and the transient response TS0 caused by discharging is input. Therefore, the product-sum operation unit 1 can always generate a negative bias of a certain value even when the first input signal corresponding to the input value "0" is input to the first product operation elements 111, 121, 211, 221, ..., k11, k21.

[0059] return Figure 3 , the second product operation element 112 has a parasitic capacitance 112C and a parasitic resistance 112P. It can be considered that the parasitic capacitance 112C is connected in parallel with the variable resistor 112R, and the parasitic resistance 112P is connected in series with the variable resistor 112R. Similarly, the second product operation elements 122, 212, 222, ..., n12, and n22 have parasitic capacitances 122C, 212C, 222C, ..., n12C, and n22C, and parasitic resistances 122P, 212P, 222P, ..., n12P, and n22P, respectively. In addition, it can be considered that the wiring resistances 112W, 122W, 212W, 222W, ..., n12W, and n22W are connected in series with the second product operation elements 112, 122, 212, 222, ..., n12, and n22, respectively.

[0060] The second product operation elements 112, 122, 212, 222, ..., n12, n22 are used to generate positive charges corresponding to positive biases based on the second input signal. These positive biases are used to adjust the biases by accumulating the negative biases generated by the first product operation elements 111, 121, 211, 221, ..., k11, k21 and the second product operation elements 112, 122, 212, 222, ..., n12, n22.

[0061] The resistor 113W and the resistor 123W are used to generate positive charges corresponding to the positive bias based on the third input signal. These positive biases are used to adjust the bias by accumulating the negative biases generated by the first product operation elements 111, 121, 211, 221, ..., k11, k21 and the second product operation elements 112, 122, 212, 222, ..., n12, n22.

[0062] The sum operation unit 10S calculates the sum of the first output signal output by the first product operation element 111, 211, ..., k11, the second output signal output by the second product operation element 112, 212, ..., n12, and the third output signal output by the resistor 113W during the operation period. Similarly, the sum operation unit 20S calculates the sum of the first output signal output by the first product operation element 121, 221, ..., k21, the second output signal output by the second product operation element 122, 222, ..., n22, and the third output signal output by the resistor 123W during the operation period.

[0063] However, when the third input signal is not input to the resistor 113W and the resistor 123W or when the product operation element 1 does not have the resistor 113W and the resistor 123W, the sum of the first output signal output by the first product operation element 111, 211, ..., k11 and the second output signal output by the second product operation element 112, 212, ..., n12 is calculated during the calculation period. The same is true for the sum operation unit 20S.

[0064] Next, refer to Figure 5 An example of a neural network operation performed by the product-sum operator of the embodiment is described. Figure 5 This is a diagram for explaining an example of a neural network operation performed by a product-sum operator according to an embodiment.

[0065] Nodes 101, 201, ..., k01, 102, 202, ..., n02, 103 form an input layer. Perceptrons 10, 20 form a hidden layer or output layer.

[0066] Node 101 and Figure 1 and Figure 3 The nodes 201, ..., k01 correspond to the first input section 101E, ..., k01E, respectively, and output input values ​​corresponding to the first input signal to the perceptrons 10 and 20. Similarly, the nodes 201, ..., k01 correspond to the first input sections 201E, ..., k01E, respectively, and output input values ​​corresponding to the first input signal to the perceptrons 10 and 20.

[0067] Node 102 and Figure 1 and Figure 3 The nodes 202, ..., k02 correspond to the second input units 202E, ..., n02E, respectively, and output input values ​​corresponding to the second input signals to the perceptrons 10 and 20. Similarly, the nodes 202, ..., k02 correspond to the second input units 202E, ..., n02E, respectively, and output input values ​​corresponding to the second input signals to the perceptrons 10 and 20.

[0068] Node 103 and Figure 1 and Figure 3The third input unit 103E shown corresponds to the sensor 10 or 20 and outputs an input value corresponding to the third input signal.

[0069] Arrow 111A corresponds to first product operation element 111, and indicates that the input value outputted from node 101 is multiplied by a weight, and a value corresponding to the first output signal is inputted to perceptron 10. Similarly, arrow 121A corresponds to first product operation element 121, and indicates that the input value outputted from node 101 is multiplied by a weight, and a value corresponding to the first output signal is inputted to perceptron 20. The same is true for arrows 211A, 221A, ..., k11A, and k21A.

[0070] Arrow 112A corresponds to second product operation element 112, indicating that the input value outputted from node 102 is multiplied by the weight, and a value corresponding to the second output signal is inputted to perceptron 10. Similarly, arrow 122A corresponds to second product operation element 122, indicating that the input value outputted from node 102 is multiplied by the weight, and a value corresponding to the second output signal is inputted to perceptron 20. The same is true for arrows 212A, 222A, ..., n12A, and n22A.

[0071] Arrow 113A corresponds to resistor 113, and indicates that the input value output to node 103 is multiplied by the weight determined by the resistance value, and the value corresponding to the third output signal is input to sensor 10. Similarly, arrow 123A corresponds to resistor 123, and indicates that the input value output to node 103 is multiplied by the weight determined by the resistance value, and the value corresponding to the third output signal is input to sensor 20.

[0072] The output of the sensor 10 is the sum of the values ​​input from arrows 111A, 211A, ... k11A, arrows 112A, 212A, ... n12A and arrow 113A plus Figure 5 Similarly, the output of sensor 20 is the sum of the values ​​input from arrows 121A, 221A, ... k21A, arrows 122A, 222A, ... n22A, and arrow 123A plus Figure 5 The value of the offset “-b2” is shown.

[0073] The bias "-b1" includes a negative bias generated by at least one of the first product operation elements 111, 211, ..., k11, and may include a positive bias generated by at least one of the second product operation elements 112, 212, ..., n02 and the resistor 113W. The same applies to the bias "-b2".

[0074] The above is a description of the product-sum operator 1 of the embodiment. The product-sum operator 1 calculates the sum of the first output signals during the operation period that includes at least a part of the transient response caused by the discharge from each of the parasitic capacitors 111C, 121C, 211C, 221C, ..., k11C, and k21C. Therefore, the product-sum operator 1 does not complicate the circuit structure by adding additional components, and can generate negative charges corresponding to the negative bias. In addition, the product-sum operator 1 can generate a negative bias with a large absolute value and generate a negative bias in a wide range by using a plurality of first product operation elements or including the transient response caused by the discharge in as many operation periods as possible.

[0075] In addition, the first product operation elements 111, 121, 211, 221, ..., k11, k21 may also be resistance change elements or tunnel magnetoresistance elements having a write terminal, a common terminal, and a read terminal. Thus, the electrostatic capacitance of the parasitic capacitance of the resistance change element and the tunnel magnetoresistance element of the product-sum operation unit 1 is large, so that a negative bias with a large absolute value can be generated, and a negative bias can be generated in a wide range.

[0076] In addition, the product sum operator 1 generates positive charges corresponding to the desired positive bias in each of the second product operation elements 112, 122, 212, 222, ..., n12, n22, thereby being able to calculate the sum of the above-mentioned negative bias and adjust the bias within a wide range from positive to negative.

[0077] In addition, the product-sum operator 1 generates positive charges corresponding to the desired positive bias of each of the resistors 113W and 123W, and thus can calculate the sum of the above-mentioned negative biases and adjust the bias in a wide range from positive to negative. In addition, the resistor 113W can generate a positive bias whose absolute value is greater than the sum of the positive biases generated by the second product operation elements 112, 212, ..., n12. Similarly, the resistor 123W can generate a positive bias whose absolute value is greater than the sum of the positive biases generated by the second product operation elements 122, 222, ..., n22. Therefore, the product-sum operator 1 can quickly offset the above-mentioned negative bias by using the positive bias generated by at least one of the resistors 113W and 123W, and can adjust the bias in a wide range from positive to negative.

[0078] Furthermore, the above-mentioned product-sum operator 1 can be used as a constituent element of a neuromorphic device.

[0079] Alternatively, the processing may be performed by recording a program for realizing the functions of each device such as the product-sum calculator 1 in the above-described embodiment on a computer-readable recording medium and causing a computer system to read and execute the program recorded on the recording medium.

[0080] In addition, the computer system mentioned here may also include hardware such as an operating system (OS) or peripheral devices. In addition, computer-readable recording media also include, for example, writable non-volatile memories such as floppy disks, optical magnetic disks, ROMs (Read Only Memory), flash memories, removable media such as DVDs (Digital Versatile Discs), storage devices such as hard disks built into computer systems, and media that retain programs for a certain period of time, such as volatile memories inside computer systems of servers or clients when programs are sent via networks or communication lines.

[0081] In addition, the above-mentioned program can also be transmitted from a computer system storing the program in a storage device, etc., to another computer system via a transmission medium or a transmission wave in the transmission medium. Here, the transmission medium for transmitting the program refers to a medium having the function of transmitting information, such as a network such as the Internet or a communication line such as a telephone line.

[0082] In addition, the above-mentioned program may be a program for realizing a part of the above-mentioned functions, or a program that can be realized by combining with a program that has already recorded the above-mentioned functions in a computer system, a so-called differential program. The above-mentioned program is read and executed by a processor such as a CPU (Central Processing Unit) possessed by the computer.

[0083] The product-sum operator or the neuromorphic device using the above-mentioned product-sum operator can function as the brain of various sensors and robots. When the signal output from the sensor is input to the control device using the neuromorphic device, it can function as an Edge element. There is usually a lot of noise in the sensor signal, and the sensor signal to be obtained in the ordinary sensor module cannot be extracted from the noise. Therefore, the following method is adopted, such as using signal processing technology to remove the noise from the time series signal of the sensor signal, and extracting the desired signal. In this case, only energy is consumed except for the obtained signal, and no information is generated. By inputting the sensor signal to the control device using the neuromorphic device, high-precision identification can be performed. At present, the observation signal in which the noise and the source signal overlap is separated into the source signal and the noise, and extracted as information with the original meaning, but when using this control device, the source signal to be obtained can be predicted based on the time series signal containing noise, and even if the output intensity or statistical value of the source signal is small, it can be extracted as a meaningful signal. It is a module in which the sensor and the control device are integrated, and can be set as an AI Edge sensor module. When the present control device is used, the discrimination accuracy becomes higher, and therefore, information can be extracted with a smaller calculation function than before, thereby achieving low cost, power saving, and volume saving.

[0084] It is also preferred to input signals of multiple sensors to the control device at the same time. By inputting signals of multiple sensors at the same time, it is possible to discern the correlation between sensors. For example, in a robot, sensors are provided on the hands, feet, and body. When signals from the sensors are input to the control device at the same time, it is possible to compositely judge whether the robot is walking or rolling based on the signals. In addition, in robots and vehicles that are provided with multiple AI Edge sensor modules, by simultaneously inputting signals to the control device, it is possible to expect power saving and high functionality. In the case where multiple sensors are sensors of different types, it is necessary to set a control device corresponding to the voltage and current that can correspond to each sensor. In this case, a transformer or an analog-to-digital converter is required at the interface of the control device, and energy is consumed due to energy conversion. In the AI ​​Edge sensor module, energy is also consumed, but the signal output from the AI ​​Edge sensor module to the central control device is a signal that has been discriminated and recognized to a certain extent in the AI ​​Edge sensor module, and only necessary information can be sent. Through these functions, the communication between the AI ​​Edge sensor module and the central control device can be reduced, and therefore, the energy consumption of the system as a whole can be reduced.

[0085] The embodiments of the present invention have been described in detail above with reference to the drawings, but the specific structure is not limited to the embodiments, and various modifications and substitutions can be made within the scope of the present invention. The structures described in the above embodiments can also be combined.

[0086] Industrial Applicability

[0087] According to the present invention, when a sum-of-products operation is used in a neuromorphic device, the accuracy of the result can be improved.

[0088] Explanation of symbols

[0089] 1…Product-sum operator, 101E, 201E, k01E…First input unit, 111, 121, 211, 221, k11, k21…First product operator, 111C, 121C, 211C, 221C, k11C, k21C…Parasitic capacitance, 111P, 121P, 211P, 221P, k11P, k21P…Parasitic resistance, 111R, 121R, 211R, 221R, k11R, k21R…Variable resistance, 111W, 121W, 211W, 221W, k11W, k21W…Wiring resistance, 111X, 121X, 211X, 221X, k11X, k21X…Read output terminal, 111Y, 121Y, 211Y, 221Y, k11Y, k21Y…common terminal, 111Z, 121Z, 211Z, 221Z, k11Z, k21Z…write terminal, 102E, 202E, n02E…second input unit, 112, 122, 212, 222, n12, n22…second product operation element, 112C, 122C, 212C, 222C, n12C, n22C…parasitic capacitance, 112P, 122P, 212P, 222P, n12P, n22P…parasitic resistance, 112R, 122R, 212R, 222R, n12R, n22R…variable resistance, 112W, 122W, 212W, 222W, n12W, n22W…wiring resistor, 112X, 122X, 212X, 222X, n12X, n22X…readout terminal, 112Y, 122Y, 212Y, 222Y, n12Y, n22Y…common terminal, 112Z, 122Z, 212Z, 222Z, n12Z, n22Z…write terminal, 103E…third input section, 113W, 123W…resistor, 10S, 20S…sum calculation section, 1111…magnetization fixed layer, 1112…nonmagnetic layer, 1113…first region, 1114…magnetic wall, 1115…second region, 1116… first magnetization supply layer, 1117…second magnetization supply layer, 4…tunnel magnetoresistance effect element, 41…first ferromagnetic layer, 42…second ferromagnetic layer, 43…tunnel barrier layer, T, T0, T1, T2, T3…first output signal, TF0, TF1, TF2, TF3, TS0, TS1, TS2, TS3…transition response, 10, 20…sensor, 101, 102, 103, 201, 202, k01, n02…node, 111A, 112A, 113A, 121A, 122A, 123A, 211A, 212A, 221A, 222A, k11A, k21A, n12A, n22A…arrow.

Claims

1. A product-sum operator, characterized in that: have: a plurality of first product operation elements, which multiply a first input signal corresponding to an input value by a weight to generate a first output signal, and output the first output signal; as well as A sum operation unit calculates the sum of the first output signals output by each of the plurality of first product operation elements during an operation period from a moment when each of the plurality of first product operation elements generated by the input of the first input signal becomes a stable state after a transient response caused by charging of the parasitic capacitance to each of the plurality of first product operation elements generated by the input of the first input signal to a moment after a transient response caused by discharging of the parasitic capacitance by each of the plurality of first product operation elements generated by the input of the first input signal starts to occur.

2. The product-sum operator according to claim 1, characterized in that: Each of the plurality of first product operation elements is a variable resistance element having a write terminal, a common terminal, and a read terminal.

3. The product-sum operator according to claim 1, characterized in that: Each of the plurality of first product operation elements is a tunnel magnetoresistance effect element.

4. The product-sum operator according to any one of claims 1 to 3, characterized in that: The device further comprises at least one second product operation element which multiplies a second input signal used in generating the positive bias by a weight to generate a second output signal, and outputs the second output signal. The sum operation unit calculates the sum of the first output signals outputted from each of the plurality of first product operation elements and the second output signal outputted from each of at least one second product operation element.

5. The product-sum operator according to any one of claims 1 to 3, characterized in that: further comprising a resistor to which a third input signal is input and to which a third output signal is output to the sum operation unit based on the third input signal, During the calculation period, the sum operation unit calculates the sum of the first output signals outputted from each of the plurality of first product operation elements and the third output signal outputted from the resistor.

6. The product-sum operator according to any one of claims 1 to 3, characterized in that: Also features: at least one second product operation element, which multiplies the second input signal by the weight to generate a second output signal, and outputs the second output signal; and a resistor which receives a third input signal and outputs a third output signal to the sum operation unit based on the third input signal, During the calculation period, the sum operation unit calculates the sum of the first output signals outputted by each of the plurality of first product operation elements, the second output signal outputted by each of at least one second product operation element, and the third output signal outputted by the resistor.

7. A neuromorphic device, characterized in that A product-sum operator according to any one of claims 1 to 6.

8. A product-sum operation method, which is performed by the product-sum operator according to any one of claims 1 to 6, characterized in that: include: a product operation step, wherein the plurality of first product operation elements respectively multiply the first input signal by a weight to generate the first output signal, and output the first output signal; as well as In the sum operation step, during the operation period from the moment when each of the plurality of first product operation elements generated by the input of the first input signal becomes a stable state after a transient response caused by charging the parasitic capacitance to the first product operation elements, to the moment when each of the plurality of first product operation elements generated by the input of the first input signal starts to generate a transient response caused by discharging the parasitic capacitance, the sum operation unit calculates the sum of the first output signals output by each of the plurality of first product operation elements.

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