A method of protecting a load circuit

Abstract

The invention relates to a new method for protecting circuits from ground faults and parallel and series arc faults in a fully solid state circuit configuration. A solid state circuit and method of use are described that provide the key functions of low voltage DC power, mains voltage and current sensing, fault detection processing, and high voltage electronic switching.

Description

[0001] This application is a divisional application of PCT application number PCT / US2017 / 031207, international application date May 5, 2017, Chinese application number 201780027249.3, entitled "Solid-State Line Interference Circuit Interruptor". Technical Field

[0002] This invention relates to a power distribution system, and more particularly to an all-solid-state circuit interrupter for disconnecting power from the power distribution system to the user load when an disturbance such as a ground fault or arc fault is detected by a proprietary fault detection processor integrated in the interrupter. Background Technology

[0003] The protection of power supply systems is mainly achieved using fuses and circuit breakers, which prevent overcurrent damage to the power distribution system by stopping the flow of current in the event of a short circuit or overload.

[0004] Secondly, ground fault interrupters (GFIs) are primarily used in branch circuits to protect users from electric shock caused by unexpected current flowing directly to the ground once a threshold leakage current is detected, by interrupting the flow of said current. Recently, arc fault interrupters (AFIs) have been used to reduce the risk of structural fires that can be caused by sparks generated by arc faults.

[0005] An arc fault occurs when two conductors in a circuit become so close together that an electrical breakdown occurs in the material between them, allowing current to flow intermittently between the conductors. This breakdown and the resulting current are accompanied by extremely high temperatures, far exceeding the ignition point of typical building materials, thus posing an immediate fire hazard near the arc fault.

[0006] Arcing faults occurring from line to line, line to neutral, or line to ground are called parallel arcing faults and typically cause overcurrents that trip either the circuit breaker or the GF1 device. For example, an arcing fault occurring within a line due to the accidental breaking of a conductor in the circuit may be connected in series with a load and may not be interrupted by the circuit breaker or GF1 device. Therefore, more sophisticated sensing schemes have been developed to robustly detect series arcing faults and trigger the disconnection of the affected circuit. These arcing fault sensing schemes are further complicated by the need to minimize false triggering caused by complex loads such as switching power supplies and dimmer circuits, which exhibit current-voltage relationships simulating arcing faults. These sophisticated arcing fault sensing schemes typically require more complex circuitry than the simple and bulky electromechanical devices used in prior art circuit breakers and GF1 devices. These more complex AFI circuits typically consist of solid-state analog and digital devices, such as operational amplifiers and microprocessors. Therefore, there is a need for an all-solid-state approach that integrates GF1 and AFI functionality into a compact, low-power interruptor configuration. Summary of the Invention

[0007] This invention relates to a novel method for protecting circuits from ground faults and parallel and series arcing faults in a fully solid-state circuit configuration. Solid-state circuits are described, providing key functions such as low-voltage DC power supply, mains voltage and current sensing, fault detection and handling, and high-voltage electronic switching.

[0008] An efficient solid-state AC-to-DC power conversion system is described. The system and associated devices meet the need for a compact, integrated, and low-cost design that is efficient and provides low-voltage access for driving typical silicon-based electronics used in home sensors and networks, smart cars, etc. In one embodiment, the system includes an efficient electronic switch for disconnecting the input of the series voltage regulator circuit from the rectified AC mains power supply to reduce power consumption within the series regulator. When the switch is closed, energy is accumulated and stored in a shunt energy storage element. When the rectified AC mains waveform exceeds a threshold, the electronic switch opens. When the switch is open, energy is supplied to the load by the energy storage element through the regulator circuit. In this way, the benefits of the regulator circuit are attributed to the attached load circuit, while the power dissipated within the regulator circuit is significantly reduced compared to prior art. A comparator is used to control the electronic switch. In one embodiment, the comparator includes an operational amplifier and a reference voltage source. In another embodiment, the comparator includes a MOS field-effect transistor. In one embodiment, the MOS field-effect transistor is controlled by a voltage divider.

[0009] One embodiment uses a power MOS field-effect transistor (MOSFET) as an electronic switch having a very low "on" resistance connected between the AC trunk power supply and the desired load. Since a typical power MOSFET inherently includes a body diode connected in parallel with the conductive channel, the paired devices are connected back-to-back with a common source terminal to provide a true bidirectional (AC) switching configuration. To control the switching action of the power MOSFETs, a novel floating control circuit is employed. This circuit uses a rectifier diode connected at the drain to precharge the gate-source bias voltage, thereby "on"ing both devices, and uses an optically coupled phototransistor with its gate shorted to the common source terminal to force the devices into an "off" state when illuminated by an isolated light source. Therefore, the power MOSFET switch is normally "on" unless forced "off" by the optical control signal. The optical control signal can be continuously applied for nominal on-off control of the power delivered to the load, or the optical control signal can be synchronized with the AC trunk waveform to provide phase control. The integrated control circuitry for the light control signal can provide either leading-edge phase control, preferably for switching reactive loads, or trailing-edge phase control, preferably for nonlinear loads such as LEDs.

[0010] The specific examples are not intended to limit the inventive concept to the exemplary applications. Other aspects and advantages of the invention will become apparent from the accompanying drawings and detailed description. Attached Figure Description

[0011] Figure 1A This is a block diagram showing the key components of a solid-state circuit interrupter.

[0012] Figure 1B It is a block diagram showing the location of the circuit fault.

[0013] Figure 2 This is a schematic diagram illustrating the function of an AC-DC converter circuit.

[0014] Figure 3 This is a schematic diagram of an embodiment of an AC-DC converter using MOS transistors.

[0015] Figure 4 This is a schematic diagram of an embodiment using a bidirectional switch with a power MOSFET.

[0016] Figure 5 This is a schematic diagram of a bidirectional switch that uses four switching elements to reduce the "on" resistance of the main switch and increase the "off" resistance of the main switch.

[0017] Figure 6 This is a schematic diagram of an embodiment of a solid-state circuit interrupter.

[0018] Figure 7 This is a schematic diagram illustrating an embodiment of a fault detection processor.

[0019] Figure 8 This is a flowchart of an embodiment of the voltage and current anomaly detection process. Detailed Implementation

[0020] All items with common numbering in the accompanying drawings refer to the same item throughout the specification. Figure 1A This is a block diagram illustrating the key components of a solid-state circuit interrupter. An AC trunk line 101 is connected to a load 106 via an electronic switching unit 105. A low-voltage DC power supply 102 effectively powers the trunk line voltage and current sensing circuit 103 and the fault detection processor 104. Sensing inputs to the fault detection processor 104 are provided from the voltage and current sensing circuit 103. The solid-state sensing circuit includes sensors that sense the waveforms of the voltage and current applied to the load circuit and develop a proportional analog waveform. The fault detection processor processes the proportional analog waveform and generates a fault output 107 upon detecting a ground fault or arc fault. Upon fault detection, the fault output 107 of the fault detection processor 104 is latched and fed to a control input 108 of the electronic switch 105, which disconnects the load 106 from the trunk line 101 until a reset 109 is applied to the fault detection processor 104. In another embodiment, the output voltage of the electronic switch 105 can be changed via the control circuit 108. In this embodiment, upon detection of an arc fault, the output voltage can be reduced to a value less than the arc discharge threshold but greater than zero. This embodiment allows the load circuitry to continue operating at a reduced voltage while minimizing the chance of a damaging arc. Operating at the reduced voltage also allows for continued characteristic of the load and mains power circuitry to pinpoint the location of the arc fault for subsequent replacement or repair.

[0021] Figure 1BTypical locations of faults in a power supply system are shown. In one embodiment, circuit breaker 110 is located between AC mains power supply 101 and load 106. Arcing faults can be in series 114 and occur in both line 111 and neutral 112 before 116 and after 117 of the circuit breaker. Parallel faults 115 can occur on either side of the circuit breaker between the line and neutral, or between the line or neutral and ground 113. In one embodiment, circuit breaker 110 is located between AC mains power supply 101 and load 106, for example, in a socket plug. Multiple circuit breakers are installed in the AC power supply network. In one embodiment, multiple circuit breakers are located in a branch of the AC power supply network. In another embodiment (not shown), multiple circuit breakers are located in series in the same branch of the AC power supply network. Fault detection is based on the analysis of both voltage and current associated with the fault. Multiple fault detectors in series can determine the location of the fault relative to the circuit breaker based on current analysis.

[0022] Figure 2 A schematic diagram of an improved AC-DC converter circuit is shown, comprising an AC trunk 101 and a diode bridge 202. The waveform at the output of the diode bridge 202 is simply a full-wave rectified sine wave, which typically varies between 0V and a peak value of approximately 170V for a conventional AC trunk with a root mean square value of 120V. However, it should be noted that, assuming the digital specifications of the affected components are properly adjusted, the method described below applies to any periodic power waveform. Furthermore, if the power waveform is less than the reference voltage described below, the power waveform can include a DC offset.

[0023] The circuit includes a comparator circuit 204, whose inverting input is connected to the output of a diode bridge 202, and a reference voltage 203 is connected to the non-inverting input of the comparator circuit 204. The comparator 204 controls a series switch 205; if the output voltage of the diode bridge exceeds the reference voltage V... R Then, the series switch 205 disconnects the diode bridge output from the subsequent circuit (opens switch 205). When the reference voltage V RWhen the output voltage of the diode bridge exceeds the voltage, switch 205 closes, and capacitor 206 is charged through series diode 207. When the output voltage of the diode bridge decreases, diode 207 prevents capacitor 206 from discharging through switch 205. The combination of diode 207 and capacitor 206 forms a "peak detector" circuit, which stores energy in each half of the AC trunk cycle to supply the subsequent regulator circuit and load 208. The voltage across capacitor 206 only needs to be large enough to meet the energy requirements of the subsequent regulator circuit and load 208. Compared to the RMS value of the AC trunk, the input voltage of the series regulator is significantly reduced. Regardless of how the peak voltage of the AC trunk fluctuates, as long as the voltage of the AC trunk remains greater than V... R The operation of the "peak detector" circuit ensures that the peak voltage stored on capacitor 206 is always V. R The embodiment of the switching circuit operates as a voltage regulator circuit itself. Since the operation of switch 205 uses negligible energy, therefore... Figure 2 The AC-DC converter circuit shown is far more efficient than that seen in prior art circuits. An additional benefit is the significant reduction in heat generated by the circuit, thereby reducing the rise in operating temperature. Although comparator 204 is a well-known analog circuit element, other analog or digital circuits can be used to achieve the desired threshold function required to operate switch 205.

[0024] Figure 3 A schematic diagram of an AC-DC converter circuit is shown, in which... Figure 2 The switch 205 shown is implemented using an enhancement-mode MOSFET 301, and the comparator circuit 204 is also implemented using a threshold voltage, V. T A single common-source amplifier stage of an enhancement-mode MOSFET 302, characterized by a load resistor 303. Therefore, when the output of the voltage divider network including resistors 304 and 305 exceeds the threshold voltage of the MOSFET 302, V... T When the gate of switch 301 is pulled to ground, switch 301 is turned on. When the output of the voltage divider network is less than V... T At this time, the gate of MOSFET 301 is connected to its drain, thereby closing the switch. The AC-DC converter circuit also includes a bipolar transistor 306 and a current-sensing resistor 307 to limit the charging current through MOSFET 301 and diode 207. The regulator function is implemented using a conventional series regulator circuit with a series transfer transistor 310 connected to the load 311 and biased by a Zener diode 309, which sets the DC output voltage and is biased by a resistor 308.

[0025] Figure 4This is a schematic diagram illustrating an embodiment of an optically isolated bidirectional electronic switch circuit element. In the switch unit 400, a Zener diode 402 has a Zener voltage greater than the threshold voltage of the power MOSFET and is biased by rectifier diodes 404 and 406, connected to the drain terminal of the power MOSFET, and protected by current-limiting resistors 403 and 405, respectively. Therefore, in the absence of incident illumination, when either drain terminal exceeds the Zener voltage, resistor-diode branches 403-404 and 405-406 bias the Zener diode 402, placing the power MOSFETs 407 and 408 in the "on" state. When the control circuit LED 412, powered by an external DC source 409 through a control switch 410 and bias resistor 411, is illuminated, phototransistor 401 shunts the bias current from branches 403-404 and 405-406 to the source terminal of the power MOSFET, placing the MOSFET in the "off" state. In this circuit, the on-time constant is determined by the values ​​of current-limiting resistors 403 and 405 and the gate-source capacitance of the power MOSFET, while the off-time constant is determined by the saturation current of the phototransistor 401 at the illumination level provided by the LED 412.

[0026] Figure 5 yes Figure 4 The schematic diagram illustrates an embodiment that uses two switching units 400 in each arm of the AC power supply to improve circuit performance. In this configuration, four switching units 400 include... Figure 1A The electronic switch 105 is shown. In a preferred embodiment, the power MOSFET is selected to have... Figure 4 The breakdown voltage of the unit used is one-quarter. Due to the relationship between the breakdown voltage and the "on" resistance of MOSFET devices, the "on" resistance of each switching unit can be reduced by up to 32 times, and the total "on" resistance of two series-connected switching units is relative to... Figure 4 The circuitry is reduced by a factor of 8. Furthermore, the voltage drop across each switching unit in the "off" state is one-quarter, thus reducing the dV experienced by each unit. dS / dt is reduced by a factor of four, and thus leakage current in the "off" state is reduced.

[0027] Furthermore, the inventors have discovered through experiments that this circuit configuration further improves the cutoff characteristics of the switching device and further reduces leakage current. In this figure, the control switch 410 is replaced by a transistor 500, which operates via a control port 501 and includes, along with the DC power supply 409, resistor 411, and LED 412. Figure 1AThe control circuit 108 is shown. In another embodiment, transistor 500 is controlled by an external control voltage applied to control terminal 501. This allows for rapid switching of the LED synchronized with the AC trunk waveform via an external control circuit (not shown) to provide phase control of the switch output. In this embodiment, power supply to the load is reduced in the event of a fault signal. In another embodiment, the control signal is a variable DC voltage, which allows for variable illuminance of the LED, thereby allowing the MOSFET to operate in linear mode.

[0028] In another embodiment, the output voltage and power of the electronic switch are altered via control circuitry 108. Upon detection of an arc fault, the output voltage can be reduced to a value less than the threshold for arc formation but greater than zero. This embodiment allows the load circuitry to continue operating at a reduced voltage while minimizing the chance of a damaging arc. Reduced voltage operation also allows for continuity of the load and mains power circuitry, enabling the location of the arc fault to be determined for subsequent replacement or repair.

[0029] Figure 6 This is a schematic diagram of an embodiment of a solid-state circuit interrupter. (See diagram below.) Figure 5 As shown, the AC trunk 101 is connected to the load 106 via a bidirectional MOSFET switching unit 105. Figure 3The low-voltage DC power supply 102 shown effectively powers the mainline voltage and current sensing circuit 103, the fault detection processor 104, and the bidirectional MOSFET switch control circuit 108. Sensing inputs are provided from the voltage and current sensing circuit 103 to the fault detection processor 104. Current sensing is provided using solid-state Hall effect sensors 601 and 602, which provide output voltages proportional to the current flowing through the sensors. The Hall effect sensor outputs are fed to the current sensing input of the fault detection processor 104. The AC mainline voltage waveform is full-wave rectified in bridge unit 603. (To reduce the number of components in the circuit, bridge 603 can be removed, and the full-wave rectified waveform is obtained directly from the output of bridge 202 in the AC-DC converter circuit. Bridge 603 is shown here for clarity.) The full-wave rectified waveform is attenuated using a resistor divider network including resistors 604 and 605 and is applied to the voltage sensing input of the fault detection processor 104. Upon detection of a fault, the fault output 107 of the fault detection processor 104 is latched and fed to the control input of the electronic switch control circuit 108. The control input of the electronic switch control circuit 108 provides an optical control signal to the MOSFET switching unit 105, which disconnects the load 106 from the trunk 101 until a reset 109 is applied to the fault detection processor 104. In another embodiment, the output voltage of the electronic switch is changed by the control circuit 108. In this embodiment, upon detection of an arc fault, the output voltage is reduced to a value less than the threshold for arc formation but greater than zero. Such an embodiment allows the load circuit to continue operating at a reduced voltage while reducing the chance of a damaging arc. Operation at a reduced voltage also allows for the continued characteristics of the load and trunk power circuits to determine the location of the arc fault for subsequent replacement or repair.

[0030] Figure 7 This is a schematic diagram illustrating an embodiment of the fault detection processor. A voltage-sensing signal is applied to input 701 of a differential amplifier 703, and the resulting differential signal ΔV is applied to the input of an analog-to-digital (A / D) converter 708 within a microprocessor 707. Similarly, a current-sensing input 702 is summed in the input circuit 704 of an operational amplifier 705 to form a signal proportional to the sum of the currents ΣI in the line and neutral branches of the AC mainline 101. The ΣI signal is also applied to the input of the A / D converter.

[0031] The digitized ΔV signal is processed by subroutine 709 within the microprocessor to detect anomalies in the voltage waveform over several cycles, indicating the presence of an arc fault. A non-limiting example of such voltage anomalies is the presence of excessive high-frequency energy applied to a normal low-frequency AC trunk voltage waveform.

[0032] The digitized ΣI signal is processed by subroutine 710 within microprocessor 707 to detect anomalies in the current waveform over several cycles, indicating the presence of an arc fault. A non-limiting example of such a current anomaly is the appearance of a "shoulder" (flat point) in the current waveform near its zero-crossing. The combined occurrence of voltage and current waveform anomalies is an indicator of an arc fault 712.

[0033] The current sensing signal 702 is also applied to the input of operational amplifier 706, which generates a difference signal ΔI proportional to the difference between the currents in the line and neutral branches. The ΔI signal is digitized and processed by subroutine 711, which performs threshold detection and issues a ground fault 713 signal. The arc fault 712 and ground fault 713 signals are combined and applied to the input of latch 714, which stores the fault state 107 until cleared by an external reset signal.

[0034] Figure 8 A flowchart illustrating a non-limiting example of the voltage anomaly detection subroutine 709 and current anomaly detection subroutine 710 described above is shown. At start 800, the main variable 801 is initialized and subroutine 802 is looped until the first voltage zero crossing is detected. Since the breakdown leading to the arc is voltage-driven, any current shoulder (if present) will coincide with the voltage zero crossing time. Upon detection of the initial voltage zero crossing, both voltage 805 and current 803 are sampled. If the current remains below a preset threshold for at least a preset minimum duration t... min However, it does not exceed the preset maximum duration t max If the current exceeds the threshold but is less than the minimum duration t, then a shoulder 804 is detected. min If the current anomaly detection subprocess exits, the process returns to start 800 until the next voltage zero crossing occurs. On the other hand, if the current remains below the threshold for a longer period than the maximum duration t... maxIf the current is switched off, the process returns to start 800. Voltage anomaly determination is derived from the high-frequency content of voltage waveform 805. High-pass filtering can be achieved with zero time delay by using the differential waveform and the square of the accumulated differential as a measurement of high-frequency energy within the measurement period. To form a threshold for comparing this total high-frequency energy, the squared difference is accumulated during the detected current shoulder (signaled by the current anomaly detection subprocess) when there is no arc 808, 809. Therefore, this should only represent the background noise energy during the shoulder period. This is repeated on (n) periods 806, 807 of the voltage waveform, and if the accumulated noise eventually exceeds the weighted average threshold 810, an arc fault 811 is declared. Note that since the successful formation of the noise energy threshold requires the detection of current shoulder 804, this fault declaration stems from the combined presence of current shoulder and overvoltage noise energy. In another embodiment, the detection of fault 811 triggers control circuitry for the switch (see Figure 5 The output power to load 106 is reduced. In another embodiment, fault detection causes the control circuitry of the switch to reduce the output voltage to the load. In yet another embodiment, fault detection causes a pre-selected decrease in either the power or voltage of the load, and then... Figure 8 The process loops back to the beginning at 800. The system is tested for faults again, and the voltage or power is decreased again until no fault is detected at 811.

[0035] Summarize

[0036] A novel approach to protecting circuits from ground faults and parallel and series arcing faults in a fully solid-state circuit configuration is described. Solid-state circuits are described, providing key functions such as low-voltage DC power supply, line voltage and current sensing, fault detection and handling, and high-voltage electronic switching.

Claims

1. A method for protecting a load circuit from an arc fault, the load circuit having an AC power supply having voltage and current waveforms to provide power to the load circuit, the method comprising: a. By measuring the amplitude of the current waveform at a preset measurement time interval after the voltage waveform crosses zero and the amplitude of the current waveform is less than a preset value, the presence of a shoulder on the current waveform is detected, and the sum of the lengths of the preset measurement time intervals in which the amplitude of the current waveform is less than the preset value is accumulated, and b. Calculate the total noise energy contained within the voltage waveform over the preset measurement time interval, and further calculate a threshold energy value from the total noise energy contained within the voltage waveform during the preset measurement time interval in which the amplitude of the current waveform is less than the preset value. c. If the sum of the lengths of the preset measurement time intervals, where the amplitude of the current waveform obtained over the preset measurement time interval is less than the preset value, falls within a preset range of the time interval value, and the total noise energy contained in the voltage waveform exceeds the calculated threshold energy value, then an arc fault is detected. d. When an arc fault is detected, control the power supplied to the load circuit by the AC power source.

2. The method according to claim 1, wherein, Controlling the power supplied to the load circuit by the AC power source includes disconnecting the power to the load circuit.

3. The method according to claim 1, wherein, Controlling the power supplied to the load circuit by the AC power source includes reducing the power supplied to the load circuit to a non-zero value.

4. The method according to claim 1, wherein, Controlling the power supplied to the load circuit by the AC power source includes: gradually reducing the power supplied to the load circuit by the AC power source until no arc fault is detected.

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