Method for preparing InSb functional layer

Abstract

The present application relates to a method for preparing an InSb functional layer, comprising: providing a III-V compound semiconductor single crystal substrate; growing a buffer layer on the III-V compound semiconductor single crystal substrate; growing a lattice constant matching transition layer on the buffer layer; and growing an InSb functional layer on the transition layer. According to the method for preparing an InSb functional layer in an embodiment of the present application, the lattice mismatch dislocation density of the InSb functional layer caused by mismatch is reduced, the crystal quality of the InSb functional layer is improved, and thus the performance of the InSb Hall element is effectively improved.

Description

Technical Field

[0001] The present application relates to the field of Hall sensors, and in particular to a method for preparing an InSb functional layer. Background Art

[0002] The Hall element is a magnetic sensor based on the Hall effect. The so-called Hall effect refers to the physical phenomenon that when a magnetic field acts on carriers in metal conductors and semiconductors, the carriers are deflected, and an additional electric field is generated perpendicular to the direction of the current and the magnetic field, thereby generating a lateral potential difference at both ends of the semiconductor. The Hall device made according to the Hall effect can use the magnetic field as the working medium to convert the motion parameters of an object into a voltage output, so that it has the functions of sensing and switching.

[0003] The sensitivity of the Hall element is related to two factors: the thickness of the Hall element functional layer material and the concentration of carriers. The Hall coefficient of general metal materials is very small, and the Hall effect is not obvious; while the concentration of carriers in semiconductors is much smaller than that of metals, and the sensitivity is higher than that of metal materials, so the Hall element can be made of a variety of semiconductor materials. Hall elements with high sensitivity mainly include gallium arsenide Hall elements, indium antimonide Hall elements and indium arsenide Hall elements, among which gallium arsenide Hall elements and indium antimonide Hall elements are the most used.

[0004] On the other hand, the sensitivity of the Hall element is related to the mobility of the functional layer material. Generally, the higher the mobility, the higher the sensitivity. Gallium arsenide Hall elements have excellent linearity and temperature stability, but slightly lower sensitivity.

[0005] The electron mobility of InSb material is very high, reaching 78000cm at room temperature. 2 / Vs, therefore, InSb is suitable for making highly sensitive Hall elements. InSb Hall elements are generally prepared by epitaxy or vacuum evaporation. For the epitaxy method, because there is no suitable lattice-matching substrate for InSb material, it is generally grown on a GaAs substrate. The lattice mismatch between InSb and GaAs is as high as 14.5%, and the dislocation density of InSb material grown on a conventional GaAs substrate is 1E8-1E9 cm -2 , which will significantly reduce the mobility of the material. Conventionally, the thickness of the InSb functional layer is increased to reduce the dislocation density and improve the mobility of the material. However, increasing the thickness will not only affect the Hall sensitivity, but also significantly increase the cost. How to reduce the mismatch dislocation density caused by mismatch and improve the crystal quality of the InSb functional layer without increasing the thickness is a problem that needs to be solved.

[0006] In the background technology section, the above information disclosed is only used to enhance the understanding of the background of the present application and therefore it may include information that does not constitute the prior art known to a person of ordinary skill in the art. Summary of the invention

[0007] The present application provides a method for preparing an InSb functional layer, which can improve the crystal quality of the InSb functional layer and obtain a higher mobility, thereby effectively improving the performance of an indium antimonide (InSb) Hall element.

[0008] According to one aspect of the present application, a method for preparing an InSb functional layer is proposed, comprising: providing a III-V compound semiconductor single crystal substrate; growing a buffer layer on the III-V compound semiconductor single crystal substrate; growing a lattice constant matching transition layer on the buffer layer, and growing an InSb functional layer on the transition layer.

[0009] According to some embodiments, the buffer layer includes GaAs.

[0010] According to some embodiments, the transition layer is Al x Ga 0.51-x In 0.49 P, where the value of x is greater than or equal to 0 and less than 0.51.

[0011] Al x Ga 0.51-x In 0.49 P:Te, wherein the value of x is greater than or equal to 0 and less than 0.51, and the doping concentration range of Te is 1E18 to 1E19.

[0012] According to some embodiments, after growing the InSb functional layer on the transition layer, the method further includes: stripping the InSb functional layer.

[0013] According to some embodiments, stripping the InSb functional layer includes: adhering a rigid support substrate to the surface of the functional layer; using a first etching solution to corrode the III-V compound semiconductor single crystal substrate and the buffer layer; using a second etching solution to corrode the transition layer.

[0014] According to some embodiments, the rigid support substrate includes: a silicon substrate, a glass substrate, a ceramic substrate, or a rigid plastic substrate.

[0015] According to some embodiments, the first etching solution is H3PO4:H2O2:H2O=1:1:20.

[0016] According to some embodiments, the second etching solution is HCl:H2O=1:1.

[0017] According to some embodiments, the buffer layer, the transition layer, and the InSb functional layer are grown using a MOCVD epitaxial growth method.

[0018] According to some embodiments of the present application, by growing a buffer layer and a transition layer, the mismatch dislocation density of the InSb material caused by the mismatch is reduced, the crystal quality of InSb is improved, and a higher mobility can be obtained; then, by stripping the InSb functional layer, the InSb functional layer with a low defect density required for the manufacture of the Hall device is obtained, thereby effectively improving the performance of the Insb Hall element.

[0019] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without exceeding the scope of protection required by the present application.

[0021] Figure 1 A schematic diagram showing a substrate structure for preparing an InSb functional layer according to an embodiment of the present application is shown.

[0022] Figure 2a to Figure 2f The process of preparing an InSb functional layer according to an embodiment of the present application is shown.

[0023] Description of reference numerals:

[0024] 101 III-V Compound Semiconductor Single Crystal Substrate

[0025] 103 Buffer layer

[0026] 105 Transition Layer

[0027] 107 InSb functional layer

[0028] 109 Rigid support substrate DETAILED DESCRIPTION

[0029] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this application will be comprehensive and complete and will fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar parts, and thus their repeated description will be omitted.

[0030] The described features, structures or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or more of these specific details, or other modes, components, materials, devices, etc. may be adopted. In these cases, known structures, methods, devices, implementation steps, materials or operations will not be shown or described in detail.

[0031] In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or devices.

[0032] The terms "first", "second", etc. in the specification and claims of this application and the above drawings are used to distinguish different objects rather than to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions.

[0033] The potential difference of the Hall element Vh = KhIB, where Kh = 1 / ned, represents the sensitivity of the Hall element, also known as the Hall coefficient, n is the carrier concentration, d is the thickness of the semiconductor material, e is the electron charge, I is the driving current, and B is the external magnetic induction intensity. It can be seen that the sensitivity of the Hall element is related to the thickness of the Hall element functional layer material and the carrier concentration. The Hall coefficient of general metal materials is very small, and the Hall effect is not obvious; while the carrier concentration in semiconductors is much smaller than that of metals, and the sensitivity is higher than that of metal materials, so the Hall element can be made of a variety of semiconductor materials.

[0034] On the other hand, the sensitivity of the Hall element is related to the mobility of the functional layer material. Generally, the higher the mobility, the higher the sensitivity.

[0035] According to some embodiments, the Hall element functional layer material may include binary, ternary, quaternary and other materials. For example, the Hall element functional layer material may include GaAs, InAs, InSb, InGaAs, or InGaAsP and other materials. According to some embodiments, the Hall element functional layer may be formed on the substrate by epitaxial growth or ion implantation. It is easy to understand that the present application is not limited thereto, and other suitable methods may also be used to form the Hall element functional layer.

[0036] InSb Hall elements are generally prepared by epitaxy or vacuum evaporation. Since there is no suitable lattice-matching substrate for InSb material, it is generally grown epitaxially on a GaAs substrate, so there is a certain lattice mismatch.

[0037] Figure 1 A schematic diagram showing a substrate structure for preparing an InSb functional layer according to an embodiment of the present application is shown.

[0038] According to an embodiment, the substrate structure for preparing the InSb functional layer includes: a III-V compound semiconductor single crystal substrate 101 ; a buffer layer 103 grown on the substrate 101 ; and a transition layer 105 grown on the buffer layer 103 .

[0039] See also Figure 1 In order to obtain a high-quality InSb functional layer 107 , it is necessary to provide a III-V compound semiconductor single crystal substrate 101 ; grow a buffer layer 103 on the III-V compound semiconductor single crystal substrate 101 ; and grow a lattice constant matching transition layer 105 on the buffer layer 103 .

[0040] Compared with the InSb functional layer grown on the surface of the traditional GaAs substrate that does not match the substrate lattice constant, Figure 1 The substrate structure for preparing the InSb functional layer described in detail adds a growth buffer layer and a growth transition layer, and the growth transition layer contains Al x Ga 0.51-x In 0.49 P transition layer or Al x Ga 0.51-x In 0.49 The transition layer of P:Te is grown by using the MOCVD epitaxial growth method to grow the InSb functional layer material, which is beneficial to reduce the mismatch dislocation density caused by mismatch, improve the crystal quality of the InSb functional layer, and obtain a higher mobility (which can be increased by about 20%).

[0041] Figure 2a to Figure 2f The process of preparing an InSb functional layer according to an embodiment of the present application is shown.

[0042] See also Figure 2a , prepare a substrate 101, and a semiconductor single crystal substrate, such as a GaAs substrate, an InP substrate or a Si substrate, etc., can be selected as the substrate 101. However, the present application is not limited thereto, and other suitable substrates can also be used. In the embodiment of the present application, GaAs is selected as the III-V compound semiconductor single crystal substrate substrate 101.

[0043] See also Figure 2b, a buffer layer 103 is grown on a GaAs substrate 101 by using an MOCVD epitaxial growth method, thereby obtaining a GaAs buffer layer 103 .

[0044] See also Figure 2c , on the GaAs buffer layer 103 , a transition layer 105 is grown on the GaAs buffer layer 103 by using an MOCVD epitaxial growth method.

[0045] According to an embodiment, the transition layer 105 is a lattice-matched Al x Ga 0.51-x In 0.49 P, wherein the value of x is greater than 0 or equal to 0 and less than 0.51. Optionally, the transition layer 105 may also be Al with a lattice constant matching x Ga 0.51-x In 0.49 P:Te, wherein the doping concentration of Te is in the range of 1E18 to 1E19, and the value of x is greater than 0 or equal to 0 and less than 0.51.

[0046] According to the embodiment, the Hall element functional layer can be prepared by epitaxial growth, ion implantation and other processes. Since the sensitivity of the Hall element is related to the carrier concentration of the functional layer material, and the carrier concentration in the semiconductor is much smaller than that in the metal, and the sensitivity is higher than that in the metal material, the Hall element can be made of a variety of semiconductor materials. The materials that can be used for the Hall element functional material layer include binary, ternary, quaternary and other materials, such as GaAs, InAs, InSb, InGaAs, InGaAsP and the like.

[0047] See also Figure 2d On the transition layer 105 with lattice constant matching, an InSb functional layer 107 (for example, with a thickness of about 1 μm) is grown on the transition layer 105 by using the MOCVD epitaxial growth method, thereby obtaining an InSb functional layer with lower mismatch dislocation density and better crystal quality.

[0048] According to an embodiment, by using an increased Al x Ga 0.51-x In 0.49 P layer or Al x Ga 0.51-x In 0.49 P:Te layer replaces the existing technology such as GaAs substrate as a transition layer to grow the InSb functional layer by optimizing Al x Ga 0.51-x In 0.49 P layer or Al x Ga 0.51-x In 0.49 The growth conditions of the P:Te layer, such as growth pressure and growth temperature, can effectively improve the Alx Ga 0.51- x In 0.49 P layer or Al x Ga 0.51-x In 0.49 The order and surface roughness of the P:Te layer improve the Al x Ga 0.51-x In 0.49 The crystal quality of the interface between the P layer and the InSb layer, or the Al x Ga 0.51-x In 0.49 The crystal quality of the interface between the P:Te layer and the InSb layer is beneficial to reduce the mismatch dislocation density caused by mismatch (the dislocation density of conventional InSb materials is 1E8-1E9 cm -2 , improving the crystal quality of InSb, can obtain higher mobility (increased by about 20%).

[0049] According to an embodiment, the method for preparing the InSb functional layer 107 further includes: stripping the InSb functional layer 107. Stripping the InSb functional layer 107 includes: adhering the upper surface of the InSb functional layer 107 to the rigid support substrate 109; etching the III-V compound semiconductor single crystal substrate 101 and the buffer layer 103 using a first etching solution; and etching the transition layer 105 using a second etching solution.

[0050] See also Figure 2e A rigid support substrate 109 is adhered to the upper surface of the InSb functional layer 107 . Preferably, a silicon substrate, a glass substrate, a ceramic substrate or a rigid plastic substrate can be selected as the rigid support substrate 109 .

[0051] See also Figure 2f According to the embodiment, the first etching solution H3PO4:H2O2:H2O=1:1:20 is used to etch the III-V compound semiconductor single crystal substrate 101 and the buffer layer 103, and the second etching solution HCl:H2O=1:1 is used to etch the Al x Ga 0.51- x In 0.49 P transition layer 105 or Al x Ga 0.51-x In 0.49 The transition layer 105 of P:Te is used to obtain the InSb Hall function layer 107, and the subsequent conventional processes are carried out to prepare the required Hall element.

[0052] Those skilled in the art understand that the Hall element is a magnetic sensor based on the Hall effect, and its sensitivity is related to two factors: the thickness of the Hall element functional layer material and the carrier concentration. The Hall coefficient of general metal materials is very small, and the Hall effect is not obvious; while the carrier concentration in semiconductors is much smaller than that of metals, and the sensitivity is higher than that of metal materials, so Hall elements are made of a variety of semiconductor materials. This application does not have any special restrictions on the selected semiconductor materials, nor does it exclude other Hall functional materials that will appear in the future.

[0053] The embodiments of the present application are described and explained in detail above. It should be clearly understood that the present application describes how to form and use specific examples, but the present application is not limited to any details of these examples. On the contrary, based on the teaching of the contents disclosed in the present application, these principles can be applied to many other embodiments.

[0054] Through the description of the example embodiments, it is easy for those skilled in the art to understand that the technical solution according to the embodiments of the present application has at least one or more of the following advantages.

[0055] In summary, according to some embodiments of the present application, compared with the InSb functional layer grown on the surface of the conventional GaAs substrate and having a lattice constant that does not match the substrate, the present application adds a growth transition layer after growing the buffer layer, which includes Al x Ga 0.51-x In 0.49 P transition layer or Al x Ga 0.51-x In 0.49 The transition layer of P:Te is grown by using the MOCVD epitaxial growth method to grow the InSb functional layer material, which is beneficial to reduce the mismatch dislocation density caused by mismatch, improve the crystal quality of the InSb functional layer, and obtain a higher mobility (which can be increased by about 20%).

[0056] The embodiments of the present application are described in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and its core idea of ​​the present application. At the same time, changes or deformations made by those skilled in the art based on the ideas of the present application, the specific implementation methods and the scope of application of the present application, all belong to the scope of protection of the present application. In summary, the content of this specification should not be construed as a limitation on the present application.

Claims

1. A method for preparing an InSb functional layer, characterized in that: include: Providing III-V compound semiconductor single crystal substrates; growing a buffer layer on the III-V compound semiconductor single crystal substrate; Growing a transition layer on the buffer layer, the transition layer having a lattice constant matching that of the buffer layer; Growing an InSb functional layer on the transition layer; Wherein, the buffer layer comprises GaAs; The transition layer is Al x Ga 0.51-x In 0.49 P, where the value of x is greater than or equal to 0 and less than 0.51, or, The transition layer is Al x Ga 0.51-x In 0.49 P:Te, wherein the value of x is greater than or equal to 0 and less than 0.51, and the doping concentration range of Te is 1E18 to 1E19.

2. The method according to claim 1, characterized in that: After growing the InSb functional layer on the transition layer, the method further includes: stripping the InSb functional layer.

3. The method according to claim 2, characterized in that The stripping of the InSb functional layer comprises: Adhere a rigid support substrate on the surface of the InSb functional layer; Using a first etching solution, etching the III-V compound semiconductor single crystal substrate and the buffer layer; The transition layer is etched using a second etching solution.

4. The method according to claim 3, characterized in that The rigid support substrate includes: a silicon substrate, a glass substrate, a ceramic substrate or a rigid plastic substrate.

5. The method according to claim 3, characterized in that: The first etching solution is H3PO4:H2O2:H2O=1:1:

20.

6. The method according to claim 3, characterized in that The second etching solution is HCl:H2O=1:

1.

7. The method according to claim 1, characterized in that The buffer layer, the transition layer and the InSb functional layer are grown by using an MOCVD epitaxial growth method.

Images