Performance enhancement of silicon-based devices

Abstract

A power converter is provided. The power converter includes two or more hybrid switching circuits electrically connected to a source or storage element. Each switching circuit includes a wide bandgap device connected in parallel to a silicon-based device. The converter further includes a controller operably coupled to each device of the first and second switching circuits. The controller is configured to operate each hybrid switching circuit by: (i) activating the silicon-based device for an activation period, (ii) activating the wide bandgap device for a predetermined duty cycle less than the activation period, (iii) deactivating the silicon-based device while the wide bandgap device is activated, and (iv) deactivating the wide bandgap device. For example, the hybrid switching circuits are operated sequentially to convert alternating current (AC) from a power source into a link voltage for the power converter.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of U.S. Provisional Application No. 62 / 716,011, filed August 8, 2018, the disclosure of which is incorporated by reference in its entirety. Technical Field

[0003] The present invention relates to a switched mode power converter (SMPC) including a plurality of semiconductor switches arranged in parallel, and in particular to a power converter employing soft switching techniques to provide zero voltage switching (ZVS) and minimal switching losses. Background Art

[0004] In power electronics, high current power capability can be achieved by electrically connecting multiple semiconductor switches in parallel to allow them to carry the load current together. For example, multiple different switching devices have been used in a parallel arrangement because they provide a hybrid switching circuit with much lower conduction resistance than a single switch. By way of further example, Si MOSFETs and GaN high electron mobility transistors (HEMTs) have been used in a parallel arrangement to increase Si MOSFET switching speed with the faster GaN HEMT switching speed.

[0005] For example, in a ZVS application, both devices turn on with zero voltage stress, and the GaN device carries the turn-off stress, allowing the hybrid switching circuit to benefit from the faster fall time and lower E of the GaN device. off Also for example, in hard-switching applications, GaN devices are turned on first and turned off last. This requires more complex control, but also allows the combination to benefit from GaN's faster rise and fall times and lower E on and E off However, during the conduction regions of both ZVS and hard switching, GaN devices must share current with Si devices, which limits the current capability of the hybrid switching circuit due to GaN's poor thermal characteristics, which in turn are due to its small die size combined with silicon's poor thermal conductivity. Therefore, there remains a continuing need for improved switching circuits, such as power converters, that use GaN devices and / or other wide bandgap (WBG) devices to optimize the operation of Si devices.

[0006] FIG1 illustrates a prior art SMPC and is included as background to the present invention. FIG1 generally illustrates the role of a hybrid switch in an SMPC. The SMPC is generally designated 100 and consists of a resonant circuit topology 180, a controlled current source 140, switches S1 and S2, and any source or storage element V DClinkThe controlled current source 140 represents the behavior of any soft switching topology with ZVS. S1 is turned on when the voltage across it is 0V, which allows the SMPC to reduce losses. Summary of the Invention

[0007] A SMPC and associated switching sequence are provided. In one embodiment, the SMPC includes a first hybrid switching circuit and a second hybrid switching circuit electrically connected to a power source at a common node as a half-bridge. Each hybrid switching circuit includes a wide bandgap (WBG) device, such as a GaN HEMT, connected in parallel to a silicon-based device, such as a Si MOSFET. The converter further includes a controller operably coupled to each device in the first and second switching circuits. The controller is configured to sequentially and separately operate the first and second hybrid switching circuits by: (i) activating the silicon-based device of one hybrid switching circuit for an activation period, (ii) activating the WBG device of the same hybrid switching circuit for a predetermined duty cycle that is less than the activation period, (iii) deactivating the silicon-based device while the WBG device is activated, and (iv) deactivating the WBG device.

[0008] In one operating method as a half-bridge within a soft-switching SMPC, a controller activates a first silicon-based device for an active period, activates a first WBG device for a predetermined duty cycle less than the active period, and deactivates the first silicon-based device while the first WBG device is activated. After the first WBG device is deactivated, the controller then activates a second silicon-based device for an active period, activates the second WBG device for a predetermined duty cycle less than the active period, and deactivates the second silicon-based device while the second WBG device is activated.

[0009] In another operating method as a dual active bridge (DAB) SMPC, eight hybrid switching circuits contain parallel-connected WBG devices and silicon-based devices. Four hybrid switching circuits are connected on either side of a transformer in a full-bridge topology. When the voltage across a given hybrid switching circuit reaches zero, a controller activates the corresponding silicon-based device for an activation period and then activates the corresponding WBG device for a predetermined duty cycle that is less than the activation period. While the WBG device remains active, the silicon-based device is deactivated. After the silicon-based device is deactivated, the WBG device is deactivated before the next hybrid switching circuit is activated.

[0010] The present invention offers numerous advantages over existing topologies. By using the WBG device for only a short period while the silicon-based device is off, the RMS current in the WBG device is kept low. Consequently, the present invention can be used to sink currents greater than the continuous rating of the silicon-based device during commutation without violating its safe operating area. This allows for a lower number of WBG devices in parallel with the silicon-based device and / or cheaper WBG devices with lower current ratings. Furthermore, by keeping the WBG device off during conduction of the parallel silicon-based device, i 2 R losses are primarily confined to silicon-based devices, which can utilize their larger die to absorb and dissipate thermal stress.These and other features and advantages of the present invention will become apparent from the following description of the invention when viewed in light of the accompanying drawings and appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] FIG. 1 is an embodiment of a prior art SMPC utilizing ZVS.

[0012] Figure 2 is a circuit diagram according to one embodiment.

[0013] Figure 3 is used for Figure 2 A timing diagram of the operation of the circuit.

[0014] Figure 4 is a circuit diagram according to another embodiment. DETAILED DESCRIPTION

[0015] refer to Figure 2 , illustrates a power converter including a half-bridge, generally designated 10. Power converter 10 is an SMPC that provides ZVS in this embodiment and includes a resonant circuit topology 18 connected to the half-bridge converter. Power converter 10 also includes a controller 12 operatively coupled to each switch in first and second hybrid switching circuits S1 and S2. Hybrid switching circuits S1 and S2 are electrically connected to a controlled current source 14 at a common node 16. Each hybrid switching circuit S1 and S2 includes first and second different switches connected in parallel along respective first and second branches. Each parallel switching circuit S1 and S2 includes a silicon-based device connected in parallel to a WBG device. In the illustrated embodiment, the silicon-based device is a SiMOSFET, and the WBG device is a GaN HEMT. Other silicon-based devices may include, for example, Si insulated gate bipolar transistors (IGBTs). Other WBG devices may include, for example, silicon nitride devices, silicon carbide devices, boron nitride devices, aluminum nitride devices, and semiconductor devices comprising diamond materials.

[0016] As described above, the controller 12 is operatively connected to each of the switching devices so that each switching device can be independently switched on and off. The input node 16 is connected to the controlled current source 14 and receives the AC current i hb , and the voltage source V link connected in series across the two parallel circuits. A controlled current source 14 is depicted to model the behavior of the resonant converter topology 18. The AC current is not necessarily sinusoidal or of fixed frequency and can be a high frequency waveform. For example, in an embodiment where the SMPC is implemented as a dual active bridge (DAB) converter, the leakage inductance of the DAB transformer acts as a current source during the period when both hybrid switching circuits S1 and S2 are off, forcing current into or out of the midpoint, thereby moving the midpoint voltage from one rail to the other. The current in the leakage inductance is simultaneously driven by the voltage across it, which voltage includes the midpoint voltage. Therefore, the current changes as it drives the half-bridge voltage. In addition, Figure 2 The voltage source V link Represents any source or storage element created by the half-bridge connection across hybrid switching circuits S1 and S2, through the SMPC topology, or by connection to a load. Resonant circuit topology 18 represents the larger circuit topology that, in combination with S1 and S2, comprises the entire SMPC between the source and the load.

[0017] exist Figure 3 In the ZVS application shown at the bottom, the controller 12 is configured to operate each of the WBG device and the silicon-based device in the following manner. First, the silicon-based device of S1 or S2 is turned on for an activation period. Near the end of the activation period, the corresponding WBG device is turned on for a small duty cycle. The silicon-based device is turned off during the duty cycle period of the WBG device, and the WBG device is turned off after the duty cycle period. The controller 12 waits for a predetermined delay period and then turns on the other silicon-based device for an equivalent activation period. Near the end of the activation period, the corresponding WBG device is turned on for a small duty cycle. The silicon-based device is turned off during the duty cycle period of the WBG device, and the WBG device is turned off after the duty cycle period. The controller 12 waits for a predetermined delay period and then starts the process again. The predetermined delay period is equivalent to the drain-to-source voltage (V ds1 、V ds2 ) reaches zero. The silicon-based device used in each switching circuit only ds1 、V ds2 The MOSFET turns on when it exceeds zero volts and is clamped by the anti-parallel diode of the silicon-based device, which in this embodiment is approximately between 0V and 7V. Figure 3 The waveform at the top is highly idealized for conceptualization. The idealized waveform is for demonstration only and in no way limits the operation of the invention.

[0018] refer to Figure 4 , a dual active bridge (DAB) SMPC is shown and generally designated 20. Eight hybrid switching circuits, labeled S1 through S8, are connected in two full-bridge configurations, one on each side of the transformer. Each hybrid circuit includes a WBG device and a silicon-based device connected in parallel. A controller 22 is operably coupled to each device in each hybrid switching circuit. Controller 22 operates the SMPC using ZVS techniques. Controller 22 operates each switching circuit by first activating the silicon-based device for an activation period, and then activating the WBG device for a small duty cycle that is less than the activation period. While the WBG device is activated, the silicon-based device is deactivated, and the controller does not activate the next switching circuit until the WBG device is deactivated.

[0019] In the above-described method, due to the aforementioned delay period, both the silicon-based device and the WBG device are turned on with zero voltage stress. Only the silicon-based device is used during conduction to leverage its larger die size for enhanced thermal performance. This also allows the parallel switch circuit to accept higher currents than if both switches were turned on, as the circuit is not limited by the poor thermal characteristics of the WBG device, which in turn is due to its small die size. There is no significant benefit to turning on the WBG device during the turn-on period of the silicon-based device, as the silicon-based device switches softly during turn-on and has a sufficiently fast rise time.

[0020] Use WBG devices to bear the voltage stress during commutation and take advantage of their faster fall time and lower E compared to silicon-based devices off Losses. Using WBG devices for only a short period while the silicon-based device is turned off has additional advantages. For example, it keeps the RMS current in the WBG device low, and the device can therefore absorb a greater current than its continuous rating during commutation of the silicon-based device. This means that a lower number of WBG devices can be used in parallel with the silicon-based device and / or cheaper WBG devices with lower current ratings can be used in parallel with the silicon-based device.

[0021] When the WBG device is activated, the voltage across the silicon device is kept low while the silicon device is turned off. This eliminates the turn-off losses and Miller plateau of the silicon device, thereby increasing its turn-off speed. Since the WBG device has a significantly faster fall time and smaller turn-off losses, both switching losses and total turn-off time can be reduced. Not activating the WBG device during the conduction period of the silicon device allows the i 2R losses are primarily limited to silicon-based devices. This is optimal because silicon-based devices can use their larger die to absorb and dissipate thermal stress more effectively than WBG devices. Additionally, silicon-based devices can absorb and dissipate greater amounts of thermal stress than WBG devices.

[0022] The above description is a description of the current embodiment of the present invention. Various changes and modifications may be made without departing from the spirit and broader aspects of the present invention. This disclosure is presented for illustrative purposes and should not be interpreted as an exhaustive description of all embodiments of the present invention, or as limiting the scope of the claims to the specific elements illustrated or described in conjunction with these embodiments. Any reference to an element in the singular (e.g., using the articles "a," "an," "the," or "said") should not be interpreted as limiting the element to the singular.

Claims

1. A method for implementing zero voltage switching in a switch-mode power converter: providing first and second hybrid switch circuits electrically connected in series as a half-bridge of a dual active bridge, the first hybrid switch circuit comprising a first wide bandgap device connected in parallel to a first silicon-based device, the second hybrid switch circuit comprising a second wide bandgap device connected in parallel to a second silicon-based device; activating the first silicon-based device for a first activation period; activating the first wide bandgap device according to a first duty cycle for a period less than the first activation period at the end of the first activation period to mask the deactivation of the first silicon-based device without masking the activation of the first silicon-based device at the beginning of the first activation period; activating the second silicon-based device for a second activation period; as well as At the end of the second activation period, the second wide bandgap device is activated according to a second duty cycle for a period less than the second activation period to mask the deactivation of the second silicon-based device without masking the activation of the second silicon-based device at the beginning of the second activation period. 2 . The method of claim 1 , further comprising waiting for a delay period after the deactivation of the first silicon-based device before the activation of the second silicon-based device. 3 . The method of claim 2 , wherein the delay period is equal to or greater than the time it takes for a voltage across the second silicon-based device to reach zero. 4 . The method of claim 1 , wherein the first silicon-based device and the second silicon-based device each comprise a silicon MOSFET or a silicon IGBT.

5. The method of claim 1, wherein the first wide bandgap device and the second wide bandgap device are selected from the group consisting of gallium nitride (GaN), silicon carbide (SiC), boron nitride (BN), aluminum nitride (AlN), and diamond. 6 . The method of claim 1 , wherein the first duty cycle of the first wide bandgap device is equal to the second duty cycle of the second wide bandgap device. 7 . The method according to claim 1 , wherein the first activation period of the first silicon-based device is equal to the second activation period of the second silicon-based device.

8. A hybrid device for a switch-mode power converter, comprising: a first hybrid switching circuit and a second hybrid switching circuit, each hybrid switching circuit comprising a wide bandgap device connected in parallel to a silicon-based device, the first hybrid switching circuit and the second hybrid switching circuit being connected in series as a half-bridge of a dual active bridge converter; as well as a controller electrically connected to the first hybrid switch circuit and the second hybrid switch circuit; wherein the first hybrid switch circuit and the second hybrid switch circuit are electrically connected to a power supply at a common node; The controller is configured to operate the first hybrid switch circuit and the second hybrid switch circuit respectively according to the following switching sequence: (i) activating the silicon-based device for an activation period, (ii) activating the wide bandgap device according to a predetermined duty cycle for a period less than the activation period to mask the deactivation of the silicon-based device at the end of the activation period without masking the activation of the silicon-based device at the beginning of the activation period, and (iii) deactivating the silicon-based device while the wide bandgap device is activated, The first and second hybrid switching circuits are sequentially operated to convert the alternating current from the power source into a link voltage for a power converter.

9. The hybrid device of claim 8, wherein the first hybrid switching circuit and the second hybrid switching circuit comprise branches of an H-bridge.

10. The hybrid device of claim 9, wherein the H-bridge is a primary-side H-bridge for a dual active bridge converter.

11. The hybrid device of claim 9, wherein the H-bridge is a secondary-side H-bridge for a dual active bridge converter. 12 . The hybrid device of claim 8 , wherein the silicon-based devices of the first and second hybrid switch circuits comprise silicon MOSFETs or silicon IGBTs.

13. The hybrid device of claim 8, wherein the wide bandgap devices of the first and second hybrid switch circuits are selected from the group consisting of gallium nitride (GaN), silicon carbide (SiC), boron nitride (BN), aluminum nitride (AlN), and diamond.

14. A method for a switch-mode power converter, comprising: providing first and second hybrid switch circuits electrically connected in series as a half-bridge of a dual active bridge, the first hybrid switch circuit comprising a first wide bandgap device connected in parallel to a first silicon-based device, the second hybrid switch circuit comprising a second wide bandgap device connected in parallel to a second silicon-based device, wherein the first and second hybrid switch circuits are connected to a power supply at a common node; activating the first silicon-based device for a first activation period; at an end of the first activation period, activating the first wide bandgap device for a period less than the first activation period according to a first predetermined duty cycle to mask the deactivation of the first silicon-based device without masking the activation of the first silicon-based device at the beginning of the first activation period; deactivating the first silicon-based device while the first wide bandgap device is activated; activating the second silicon-based device for a second activation period; activating the second wide bandgap device according to a second predetermined duty cycle for a period less than the second activation period at an end of the second activation period to mask the deactivation of the second silicon-based device without masking the activation of the second silicon-based device at the beginning of the second activation period; as well as The second silicon-based device is deactivated while the second wide bandgap device is activated, causing the first and second hybrid switching circuits to convert alternating current from the power source into a link voltage for a power converter. 15 . The method of claim 14 , wherein the first silicon-based device and the second silicon-based device each comprise a silicon MOSFET or a silicon IGBT.

16. The method of claim 14, wherein the first wide bandgap device and the second wide bandgap device are selected from the group consisting of gallium nitride (GaN), silicon carbide (SiC), boron nitride (BN), aluminum nitride (AlN), and diamond.

17. The method of claim 14, wherein the first predetermined duty cycle of the first wide bandgap device is equal to the second predetermined duty cycle of the second wide bandgap device. 18 . The method of claim 14 , further comprising waiting for a predetermined delay period after the deactivation of the first silicon-based device before the activation of the second silicon-based device.

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