Channel switching power multiplexer circuit and method of operating the same

Abstract

An example power multiplexer (100) includes: a first transistor (105) coupled to a first input (102); a second transistor (106) coupled to the first transistor (105) to couple a first voltage at the first input (102) to an output (101); a third transistor coupled to the second input; a fourth transistor coupled to the third transistor to couple a second voltage at the second input to the output (101); a diode amplifier (142) for providing a third voltage to a gate (105C) of the first transistor (105) to block reverse current; and a soft start amplifier for providing a fourth voltage to a gate of a fourth transistor to turn on the fourth transistor with a constant slope.

Description

Technical Field

[0001] The present application relates generally to power multiplexers, and more particularly to channel switching power multiplexer circuits and methods of operating the same. Background Art

[0002] A power multiplexer is a circuit, device, etc. that switches between two or more input power sources to provide a continuous output power source. Summary of the invention

[0003] An example power multiplexer includes: a first transistor coupled to a first input; a second transistor coupled to the first transistor to couple a first voltage at the first input to an output; a third transistor coupled to the second input; a fourth transistor coupled to the third transistor to couple a second voltage at the second input to the output; a diode amplifier for providing a third voltage to a gate of the first transistor to block reverse current; and a soft-start amplifier for providing a fourth voltage to a gate of a fourth transistor to turn on the fourth transistor with a constant slope. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Figures 1A to 1C An example power multiplexer circuit constructed in accordance with aspects of the present description is shown.

[0005] Figure 2 Shown for operation Figures 1A to 1C An example state diagram representation of example hardware logic or machine readable instructions of a power multiplexer circuit.

[0006] FIG. 3A to FIG. 3C , FIG. 4A to FIG. 4C , FIG. 5A to FIG. 5C as well as FIG. 6A to FIG. 6C Indicates that Figure 2 The corresponding state in the state Figures 1A to 1C A power multiplexer circuit.

[0007] Figure 7 To show Figures 1A to 1C Illustration of an example conversion of an example power multiplexer circuit.

[0008] Fig. 8A FIG8C shows an operation for Figures 1A to 1C Another example state diagram representation of example hardware logic or machine readable instructions of a power multiplexer circuit. DETAILED DESCRIPTION

[0009] In general, the same reference numerals are used throughout the drawings and this specification to refer to the same or similar components. The drawings are not drawn to scale. The connecting lines or connectors shown in the drawings are intended to represent example functional relationships and / or physical or logical couplings between the various elements.

[0010] Some power multiplexers exhibit undesirable channel switching behavior when switching between input power supplies. For example, immediate switching between input power supplies can result in large inrush currents, large reverse currents, which can cause circuit damage, undesirable load transients, instability due to load capacitance and / or resistance, output voltage droop, etc.

[0011] Reference will now be made in detail to examples of improving the characteristics and / or capabilities of some power multiplexers, some of which are illustrated in the accompanying drawings. Advantageously, the described examples perform channel switching over a wide range of load conditions and without undesirable channel switching behavior.

[0012] Figures 1A to 1C An example power multiplexer circuit 100 constructed according to various aspects of the present specification is shown. To selectively switch an output 101 (e.g., a power multiplexer output) between a first input 102 (e.g., a first power multiplexer input) and a second input 103 (e.g., a second power multiplexer input), the example power multiplexer circuit 100 includes an example switch circuit 104. For example, the example switch circuit 104 can be used to switch a power output between a first power input and a second power input.

[0013] To selectively couple the input 102 coupled to the first input power source to the output 101 (such as under the control of a controller, a state machine, etc.), the example switching circuit 104 includes an example first transistor (e.g., an n-channel metal oxide semiconductor field effect transistor (MOSFET) 105, a field effect transistor (FET), a bipolar junction transistor (BJT), etc.) and an example second transistor (such as an n-channel MOSFET 106, a FET, a BJT, etc.). The example MOSFET 105 and the example MOSFET 106 are arranged in a back-to-back topology, wherein their respective drains 105A and drains 106A are connected. The source 105B of the MOSFET 105 is connected to the first input 102, and the source 106B of the MOSFET 106 is connected to the output 101. When both MOSFET 105 and MOSFET 106 are turned on, input 102 is connected to output 101, and current can flow back and forth between input 102 and output 101 through first channel A 107 formed by MOSFET 105 and MOSFET 106. MOSFET 105 has body diode 105D, and MOSFET 106 has body diode 106D.

[0014] To turn on the MOSFET 105, the example switching circuit 104 includes an example driver 108. The example driver 108 outputs a gate voltage on line 109 from an output 108A to a gate 105C of the MOSFET 105. When a logic "high" voltage is provided to an enable input 108B of the driver 108 on line 110, the driver 108 turns on (e.g., closes) the MOSFET 105. When the MOSFET 105 is closed, the drain 105A is coupled to the source 105B.

[0015] To turn on the MOSFET 106, the example switch circuit 104 includes an example driver 111. The example driver 111 outputs a gate voltage on line 112 from an output 111A to a gate 106C of the MOSFET 106. When a logic "high" voltage is provided to an enable input 111B of the driver 111 on line 113, the driver 111 turns on (e.g., closes) the MOSFET 106. When the MOSFET 106 is closed, the drain 106A is coupled to the source 106B.

[0016] To turn off the MOSFET 105, the example switch circuit 104 includes an example pull-down device 114. When a logic "high" gate voltage on line 115 is provided to an enable input 114A of the pull-down device 114, the example pull-down device 114 pulls the gate voltage on line 109 at the gate 105C of the MOSFET 105 to the input voltage VINA at the input 102 to turn off (e.g., open) the MOSFET 105 and decouple the drain 105A from the source 105B.

[0017] To turn off the MOSFET 106, the example switch circuit 104 includes an example pull-down device 116. When a logic "high" gate voltage on line 117 is provided to an enable input 116A of the pull-down device 116, the example pull-down device 116 pulls the gate voltage on line 112 at the gate 106C of the MOSFET 106 to the output voltage VOUT at the output 101 to turn off (e.g., open) the MOSFET 106 and decouple the drain 106A from the source 106B.

[0018] Generally speaking, when one of the MOSFETs 105 , 106 , 118 , 119 has been turned off via its gate voltage, its corresponding pull-down device 114 , 116 , 127 , 129 is enabled, thereby completely decoupling its associated input 102 , 103 from the output 101 .

[0019] In order to selectively couple the input 103 coupled to the second input power source to the output 101 (such as under the control of a controller, a state machine, etc.), the exemplary switch circuit 104 includes a third transistor (such as an n-channel MOSFET 118, a FET, a BJT, etc.) and a fourth transistor (such as an n-channel MOSFET 119, a FET, a BJT, etc.). The MOSFET 118 and the MOSFET 119 are arranged in a back-to-back topology, wherein their respective drains 118A and drains 119A are connected. The source 118B of the MOSFET 118 is connected to the second input 103, and the source 119B of the MOSFET 119 is connected to the output 101. When both the MOSFET 118 and the MOSFET 119 are turned on, the input 103 is connected to the output 101, and current can flow back and forth between the input 103 and the output 101 through the second channel B 120 formed by the MOSFET 118 and the MOSFET 119.

[0020] To turn on the MOSFET 118, the example switch circuit 104 includes an example driver 121. The example driver 121 outputs a gate voltage on line 122 from an output 121A to a gate 118C of the MOSFET 118. When a logic “high” voltage is provided to an enable input 121B of the driver 121 on line 123, the driver 121 turns on (e.g., closes) the MOSFET 118. When the MOSFET 118 is closed, the drain 118A is coupled to the source 118B.

[0021] To turn on the MOSFET 119, the example switch circuit 104 includes an example driver 124. The example driver 124 outputs a gate voltage on line 125 from an output 124A to a gate 119C of the MOSFET 119. When a logic "high" voltage is provided to an enable input 124B of the driver 124 on line 126, the driver 124 turns on (e.g., closes) the MOSFET 119. When the MOSFET 119 is closed, the drain 119A is coupled to the source 119B.

[0022] To turn off the MOSFET 118, the example switch circuit 104 includes an example pull-down device 127. When a logic "high" gate voltage on line 128 is provided to an enable input 127A of the pull-down device 127, the example pull-down device 127 pulls the gate voltage on line 122 at the gate 118C of the MOSFET 118 to the input voltage VINB at the input 103 to turn off (e.g., open) the MOSFET 118 and decouple the drain 118A from the source 118B.

[0023] To turn off the MOSFET 119, the example switch circuit 104 includes an example pull-down device 129. When a logic "high" gate voltage on line 130 is provided to an enable input 129A of the pull-down device 129, the example pull-down device 129 pulls the gate voltage on line 125 at the gate 119C of the MOSFET 119 to the output voltage VOUT at the output 101 to turn off (e.g., open) the MOSFET 119 and decouple the input 103 from the output 101.

[0024] Due to parasitic capacitive coupling to the gates 105C, 106C of the MOSFETs 105, 106, when the input voltage VINA at the input 102 is coupled to the output 101 too quickly by turning on the MOSFETs 105, 106, a large inrush current from the input 102 may be switched into the associated MOSFETs 105, 106. The MOSFETs 105, 106 pass the inrush current through the corresponding channels. For example, if the parasitic capacitive coupling fails to turn on the MOSFET 105, the MOSFET 105 inrush current may flow through the body diode 105D. To remove the inrush current flowing from the input 102 to the MOSFETs 105, 106 due to the parasitic coupling, the example pull-down device 114 is enabled to discharge the gate 105C to the input 102, thereby keeping the MOSFET 105 off, and the pull-down device 116 is enabled to discharge the gate 106C to the output 101, thereby keeping the MOSFET 106 off. Likewise, to reduce inrush current from input 103 to MOSFET 118 due to parasitic coupling, example pull-down device 127 is enabled to discharge gate 118C toward input 103, thereby keeping MOSFET 118 off, and pull-down device 129 is enabled to discharge gate 119C toward output 101, thereby keeping MOSFET 119 off.

[0025] In some examples, the pull-down devices 114, 116, 127, 129 are controlled based on a soft-start voltage on lines 131, 132 (described below). For example, when the soft-start voltage on lines 131, 132 meets a threshold (e.g., is lower than a reference voltage), a logic “high” enable voltage is provided at the respective enable inputs 114A, 116A, 127A, and 129A of the pull-down devices 114, 116, 127, and 129 to close the pull-down devices 114, 116, 127, and 129, thereby opening the MOSFETs 105, 106, 118, and 119 and reducing the effects of parasitic capacitive coupling.

[0026] In the case where the driver 111 and the driver 124 have a fixed output voltage VOUT slope (dVout / dt), a large inrush current can be generated by a large output capacitance Cout condition. The inrush current can be mathematically expressed as Cout*dVout / dt. In order to support a large output capacitance Cout with a small inrush current, the example power multiplexer circuit 100 includes an example soft start amplifier 133, which implements an adjustable VOUT slope. The output 133A of the example soft start amplifier 133 is connected to the gate 106C of the MOSFET 106 via line 112. The soft start amplifier 133 drives the gate voltage on line 112 at the gate 106C in response to the soft start voltage on line 131 at the input 133B. When the enable voltage on line 134 at the input 133C is a logic "high" voltage, the soft start amplifier 133 is enabled. The soft start voltage on line 131 at input 133B gradually increases over time (such as with a constant or stable slope, according to a constant or stable slope), so that the voltage on output 133A gradually increases over time (such as with a constant or stable slope, according to a constant or stable slope) to control the rise time of output 101 to manage the inrush current. For example, the soft start voltage on line 132 at input 133B can increase at a constant slope of IREF / Css, resulting in the voltage on output 133A increasing at a constant slope of slope=(IREF / Css)*gain, where

[0027] Css is an external capacitor 135,

[0028] The gain is the gain of the soft start amplifier 133, and

[0029] IREF is the current output of the reference current source 136 .

[0030] In general, the external capacitor Css 135 can be selected to control the VOUT slope to meet application requirements (such as expected load conditions, output capacitance Cout conditions, on-time targets, inrush current limits, etc.). For example, under large output capacitance Cout conditions, a large external capacitor Css 135 can be used to form a slow VOUT slope to prevent large inrush currents that can cause damage to the device or reduce power supply VIN (e.g., system reset). However, a VOUT slope that is too slow may not be suitable for applications that benefit from faster power-on to meet power-on sequence timing requirements. In some examples, the soft-start amplifier 133 is controlled based on a soft-start voltage on line 131. For example, when the soft start voltage on line 131 no longer meets the threshold (e.g., equal to or greater than the reference voltage), a logic "low" enable voltage is provided at the enable inputs 114A and 116A of the pull-down devices 114 and 116 to open the pull-down devices 114 and 116, and a logic "high" enable voltage on line 134 is provided at input 133C to enable the soft start amplifier 133 to close the MOSFET 106 with an adjustable output slope of (IREF / Css)*gain. In some examples, in the case of a small output capacitor COUT, the soft start amplifier 133 can be replaced with a fixed charge current driver. In some examples, the reference voltage VREF is selected based on the soft start amplifier headroom.

[0031] In order to maintain a small inrush current under large output capacitance Cout conditions, the example power multiplexer circuit 100 includes an example soft-start amplifier 137 that implements an adjustable VOUT slope. The output 137A of the example soft-start amplifier 137 is connected to the gate 119C of the MOSFET 119 via line 125. The soft-start amplifier 137 drives the gate voltage on line 125 at the gate 119C in response to the soft-start voltage on line 132 at the input 137B. When the enable voltage on line 138 at the input 137C is a logic "high" voltage, the soft-start amplifier 137 is enabled. The soft-start voltage on line 132 increases at a constant slope, so that the voltage on the output 137A increases at a constant slope to control the rise time of the voltage VOUT at the output 101, thereby managing the inrush current. For example, the soft start voltage on line 132 at input 137B may increase at a constant slope of IREF / Css, thereby causing the voltage at output 137A to increase at a constant slope of Slope=(IREF / Css)*Gain, where

[0032] Css is an external capacitor 135,

[0033] The gain is the gain of the soft start amplifier 137, and

[0034] IREF is the current output of the reference current source 136 .

[0035] In general, the external capacitor Css 135 can be selected to control the VOUT slope to meet application requirements (such as expected load conditions, output capacitance Cout conditions, on-time targets, inrush current limits, etc.). For example, under large output capacitance Cout conditions, a large external capacitor Css 135 can be used to form a slow VOUT slope to prevent large inrush currents that can cause damage to the device or reduce power VIN (e.g., system reset). However, a VOUT slope that is too slow may not be suitable for applications that benefit from faster power-on to meet power-on sequence timing requirements. In some examples, the soft-start amplifier 137 is controlled based on a soft-start voltage. For example, when the soft start voltage on line 132 no longer meets the threshold (e.g., equal to or greater than the reference voltage), a logic "low" enable voltage is provided at the enable inputs 127A and 129A of the pull-down devices 127 and 129 to open the pull-down devices 127 and 129, and a logic "high" enable voltage on line 138 is provided at input 137C to enable the soft start amplifier 137 to close the MOSFET 119 with an adjustable output slope of (IREF / Css)*gain. In some examples, in the case of a small output capacitor COUT, the soft start amplifier 137 can be replaced with a fixed charge current driver. In some examples, the reference voltage VREF is selected based on the soft start amplifier headroom.

[0036] Any number and / or type of power supplies, generators, etc. may be used to generate the soft start voltage on lines 131, 132. For example, an example generator 139 includes an external capacitor 135 having terminals coupled to a charging source (e.g., a reference current source 136) and lines 131, 132. The external capacitor 135 is charged by the reference current source 136 and discharged to form either or both of the soft start voltages on lines 131, 132. In some examples, the gate 106C of the MOSFET 106 and the gate 119C of the MOSFET 119 have their own external capacitor 135. In some examples, the external capacitor is shared by the two channels and is discharged by the gate 140 before or as part of each channel transition. The external capacitor 135 is discharged by controlling the gate voltage on line 141 on the gate 140A of the gate 140.

[0037] To prevent (such as reducing, blocking, limiting, etc.) (a) a dip in the output voltage VOUT at the output 101 that may occur when the first channel A 107 is turned off before the second channel B 120 is turned on, and / or (b) a reverse current (e.g., a current flowing from the input 102, 103 to the opposite input 103, 102) that may occur when the second channel B 120 is turned on before the first channel A 107 is turned off, Figures 1A to 1C The example power multiplexer circuit 100 includes an example diode amplifier 142. The output 142A of the example diode amplifier 142 is connected to the gate 105C of the MOSFET 105. The example diode amplifier 142 controls the gate voltage on the line 109 at the gate 105C to adjust the output voltage VOUT at the input 142B to the voltage VINA-VOS1A at the input 142C. VOS1A is the voltage across the voltage source 143 (e.g., 40 millivolts (mV)). Under some load conditions, the diode amplifier 142 may become unstable. Accordingly, in some examples, the diode amplifier 142 is enabled only during the channel conversion operation. The enable input voltage on the line 144 received on the enable input 142D can be controlled to disable and enable the diode amplifier 142.

[0038] In order to prevent (such as reduce, block, limit, etc.) (a) a temporary drop in the output voltage VOUT at the output 101 that may occur when the first channel B 120 is turned off before the second channel A 107 is turned on, and / or (b) a reverse current (e.g., a current flowing from the input 103 to the input 102) that may occur when the second channel A 107 is turned on before the first channel B 120 is turned off, Figures 1A to 1C The example power multiplexer circuit 100 includes an example diode amplifier 145. The output 145A of the example diode amplifier 145 is connected to the gate 118C of the MOSFET 118. The example diode amplifier 145 adjusts the gate voltage on the line 122 at the gate 118C to adjust the output voltage VOUT at the input 145B to the voltage VINB-VOS1B at the input 145C. VOS1B is the voltage across the voltage source 146 (e.g., 40mV). Under some load conditions, the diode amplifier 145 may become unstable. Accordingly, in some examples, the diode amplifier 145 is enabled only during the channel conversion operation. The enable input voltage on the line 147 received on the enable input 145D can be controlled to disable and enable the diode amplifier 145.

[0039] If necessary, to stabilize the example diode amplifier 142, Figures 1A to 1CThe example power multiplexer circuit 100 includes an example boost comparator 148, a pulse generator (e.g., an example one-shot generator 149), and an example boost driver 150. When the output voltage VOUT at input 148A decreases below the voltage VINA-VOS2A at input 148B (e.g., because VOS2>VOS1, indicating a potential unstable diode amplifier 142 or VOUT drops), the example boost comparator 148 outputs a logic "low" voltage on line 151 at output 148C. A logic gate (e.g., an AND gate 152) calculates the logic "and" of the voltage on line 151 at input 152A and the enable voltage on line 153 at input 152B. The logic "low" voltage on line 151 causes the enable voltage on line 144 to become a logic "low" voltage, thereby disabling the diode amplifier 142. VOS2A is the voltage across the voltage source 154, which in some examples is greater than VOS1A.

[0040] A logic "low" voltage on line 151 at input 149A of one-shot generator 149 causes one-shot generator 149 to form a pulse 155 (e.g., 5 microseconds long) on ​​output 149B. Pulse 155 at input 149A of example boost driver 150 causes boost driver 150 to output a pulsed gate voltage on line 109, thereby turning on MOSFET 105 for a period of time. For example, 5 microseconds, which is selected to be the time required for VOUT to increase to greater than VIN-VOS1 (VOUT>VIN-VOS1) to stabilize diode amplifier 142. For example, when VOUT>VIN-VOS1, diode amplifier 142 turns off MOSFET 105, and thus diode amplifier 142 cannot regulate VOUT to exceed VIN-VOS1 for stability. Instead, VOUT needs to be discharged below VIN-VOS1 to enable diode amplifier 142 feedback loop to be engaged again, thereby turning on MOSFET 105. In the event that the diode amplifier 142 is unstable again or VOUT drops due to a load transient, the boost comparator 148 trips and the cycle repeats until the soft start amplifier 137 of the other channel controls the output voltage VOUT and increases VOUT to greater than VIN-VOS1 (the diode amplifier 142 loop is cut off). When the output voltage VOUT at the output 101 rises above the voltage VINA-VOS2A, the example boost comparator 148 outputs a logic "high" voltage on line 151 from the output 148C, which causes the output 152C of the AND gate 152 to become a logic "high" voltage on line 144, thereby re-enabling the diode amplifier 142.

[0041] If necessary, to stabilize the example diode amplifier 145, Figures 1A to 1CThe example power multiplexer circuit 100 includes an example boost comparator 156, a pulse generator (e.g., an example one-shot generator 157), and an example boost driver 158. When the output voltage VOUT at input 156A decreases below the voltage VINB-VOS2B at input 156B (e.g., indicating a potential unstable diode amplifier 145 or VOUT drop), the example boost comparator 156 outputs a logic "low" voltage on line 159 from output 156C. A logic gate (e.g., an AND gate 160) calculates the logic "and" of the voltage on line 159 at input 159A and the enable voltage on line 161 at input 160B. The logic "low" voltage on line 159 causes the enable voltage on line 147 to become a logic "low" voltage, thereby disabling the diode amplifier 145. VOS2B is the voltage across the voltage source 162.

[0042] The logic "low" voltage on line 159 at input 157A of the example one-shot generator 157 causes the one-shot generator 157 to form a pulse (e.g., 5 microseconds long) on ​​line 163 from output 157B. The pulse on line 163 at input 158A of the example boost driver 158 causes the boost driver 158 to output a pulsed gate voltage on line 122, thereby turning on the MOSFET 118 for a period of time (e.g., 5 microseconds), thereby stabilizing the diode amplifier 145. When the output voltage VOUT at the output 101 rises above the voltage VINA-VOS2B, the example boost comparator 156 outputs a logic "high" voltage on line 159 from output 156C, which causes the output 160C of the AND gate 160 to become a logic "high" voltage, thereby re-enabling the diode amplifier 145.

[0043] To control the operation, Figures 1A to 1C The example power multiplexer circuit 100 includes an example controller 164. The example controller 164 implements one or more state machines 165 to control at least Figures 1A to 1C The example controller 164 receives an input 166 (such as a voltage, etc.) and provides an output or causes an output voltage 167 (such as the voltage on lines 110, 113, 115, 117, 123, 126, 128, 130, 134, 138, 153, 161, etc.) to control the state of the power multiplexer circuit 100.

[0044] The example state machine(s) 165 may be implemented by, for example, hardware logic and / or machine-readable instructions stored on any number and / or type of non-transitory computer-readable storage devices or non-transitory storage disks, such as non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory), volatile memory (e.g., synchronous dynamic random access memory (SDRAM), dynamic random access memory (DRAM), etc.) including hardware logic and / or machine-readable instructions. Dynamic Random Access Memory and / or any other type of random access memory (RAM) device), etc. Figures 1A to 1C The example controller 164 may include, for example, one or more of a logic circuit, a programmable processor, a programmable controller, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a programmable logic device (PLD), an Advanced RISC Machine (ARM) processor, a field programmable logic device (FPLD), etc.

[0045] The example controller 164 of the illustrated example includes a memory 168, which includes a local memory 168A (e.g., cache) and a main memory 168B including a volatile memory 168C and / or a non-volatile memory 168D via, for example, a bus. The volatile memory 168C can be implemented by SDRAM, DRAM, RDRAM, and / or any other type of random access memory device. The non-volatile memory 168D can be implemented by flash memory and / or any other desired type of memory device. Access to the memory is controlled by a memory controller (not shown).

[0046] The coded instructions 168E of the state machine 165 and Figure 2 and Fig. 8A The coded instructions to FIG. 8C may be stored in main memory 168B, volatile memory 168C, non-volatile memory 168D, and / or a removable, non-transitory computer-readable storage medium such as a CD-ROM or DVD.

[0047] Despite Figures 1A to 1C An example power multiplexer circuit 100 is shown in FIG. 1 , but may be combined, allocated, rearranged, omitted, eliminated, and / or implemented in any manner. Figures 1A to 1C One or more of the elements, processes, components and / or devices shown in FIG. Figures 1A to 1C The example power multiplexer circuit 100 may include in addition to or instead of Figures 1A to 1COne or more elements, processes and / or devices of the elements, processes and / or devices shown in the example, and / or may include any or all of more than one of the illustrated elements, processes and devices. For example, some conversion aspects of the power multiplexer may be omitted when not needed, not wanted, etc. In some examples, communication, coupling, etc. are indirectly through one or more intermediate components. In some examples, the intermediate components do not change the signal or information integrity of the communication. Indirect communication does not require direct physical (e.g., wired) communication and / or constant communication.

[0048] Figure 2 It is used for operation Figures 1A to 1C A state diagram 200 of the operation of an example state machine of the example power multiplexer circuit 100 is provided for implementing Figure 2 The state machine of state diagram 200 may be implemented as a Figures 1A to 1C The state diagram 200 may be an executable program or a portion of an executable program for execution by a processor. The program may be implemented in software (e.g., machine readable instructions) stored in any number and / or type of non-transitory computer readable storage devices or non-transitory storage disks including hardware logic and / or machine readable instructions, such as non-volatile memory (e.g., ROM, EEPROM, flash memory), volatile memory (e.g., SDRAM, DRAM, etc.), or a combination thereof. and / or any other type of RAM device), etc.

[0049] An example processor may be, for example, one or more of a programmable processor, a programmable controller, a DSP, an ASIC, an ARM processor, etc. Additionally and / or alternatively, the state diagram 200 may be implemented by one or more hardware circuits (such as discrete and / or integrated analog and / or digital circuit systems, PLDs, FPGAs, ASICs, comparators, operational amplifiers (op-amps), logic circuits, etc.) configured to perform corresponding operations without executing software or firmware. Although reference is made to Figure 2 The state diagram 200 shown in illustrative embodiments describes an example state machine, but many other methods of operating the power multiplexer circuit 100 may alternatively be used. For example, the order of execution of the states may be changed, and / or some of the described states may be changed, eliminated, or combined.

[0050] Will refer to FIG. 3A to FIG. 3C , FIG. 4A to FIG. 4C , FIG. 5A to FIG. 5C and FIG. 6A to FIG. 6C right Figure 2 An example state diagram 200 is described. FIG. 3A to FIG. 3C , FIG. 4A to FIG. 4C , FIG. 5A to FIG. 5C and FIG. 6A to FIG. 6C Corresponding to Figure 2 States 202 , 204 , 206 , and 208 of state diagram 200 . FIG. 3A to FIG. 3C , FIG. 4A to FIG. 4C , FIG. 5A to FIG. 5C and FIG. 6A to FIG. 6C and Figures 1A to 1C The same except that different components, devices, etc. are cross-hatched to indicate which components, devices, etc. are enabled, active, etc. for the state to which the figure is associated. For example, Figure 2 The "Channel A on" state 202 in FIG. 3A to FIG. 3C ) indicates that the pull-down devices 127, 129 are enabled to turn off the channel B 120. Therefore, the pull-down devices 127 and 129 are enabled in FIG. 3A to FIG. 3C Similarly, in the "Channel A On" state 202, the soft start amplifiers 133 and 137 are disabled, and thus FIG. 3A to FIG. 3C For simplicity of illustration, FIG. 3A to FIG. 3C , FIG. 4A to FIG. 4C , FIG. 5A to FIG. 5C and FIG. 6A to FIG. 6C Only components, devices, etc. that are enabled in a state are shown. All other components, devices, etc. are disabled. If a component, device, etc. is enabled in one state, and the power multiplexer circuit 100 transitions to another state in which the component, device, etc. is disabled, the component, device, etc. is disabled at the time of the state transition.

[0051] Figure 2 The example state diagram 200 depicts the state of the circuit 107 ( Figures 1A to 1C Input 102) to channel B 120 ( Figures 1A to 1C The channel conversion of the input 103). FIG. 3A to FIG. 3C , controller 164 enables pull-down devices 127 and 129 to turn off MOSFETs 118 and 119 to disable channel B 120, and enables drivers 108 and 111 to turn on MOSFETs 105 and 106, thereby coupling input 102 to output 101. All devices associated with the conversion (e.g., soft-start amplifiers 133 and 137, diode amplifiers 142 and 145, and boost comparators 148 and 156) are disabled.

[0052] When channel B 120 is enabled (block 210) and the input voltage VINB at input 103 is greater than the input voltage VINA at input 102 (block 212), the controller 164 switches the power multiplexer circuit 100 to FIG. 4A to FIG. 4C 2. The "conversion" state 204 shown in FIG. In the "conversion" state 204, the driver 111, the driver 121, the soft start amplifier 137, the diode amplifier 142, and the boost comparator 148 are enabled. The drivers 108 and 124 and the pull-down devices 127, 114, 116, and 129 are disabled. The soft start amplifier 137 is enabled to gradually turn on the MOSFET 119, thereby controlling (such as reducing, limiting, etc.) the inrush current. The diode amplifier 142 and the boost comparator 148 are enabled to control (such as reducing, limiting, blocking, etc.) the reverse current and / or the output voltage drop, which may cause circuit damage and / or circuit instability. The use of the soft start amplifier 137, the diode amplifier 142, and the boost comparator 148 allows the power multiplexer circuit 100 to switch from channel A to channel B under a wide range of load conditions and without undesirable channel switching behavior.

[0053] Figure 7 In the "conversion" state 204 Figures 1A to 1C 1. Example operation of the power multiplexer circuit 100. Figure 7 In the illustrated example of FIG. 1 , the power multiplexer circuit 100 is switching from input 102 (VIN1) to input 103 (VIN2). During phase 702 of the transition, when the soft start voltage on line 132 is higher than the reference voltage VREF (see Fig. 8A8C ), the soft start amplifier 137 is enabled, the diode amplifier 142 is enabled, and the boost comparator 148 monitors the output voltage VOUT at the output 101. During stage 702, the soft start amplifier 137 turns off the MOSFET 119 by keeping the gate voltage on the gate 119C less than VOUT+Vt of the MOSFET 119. The soft start amplifier 137 gradually turns on the MOSFET 119, thereby managing (such as reducing, limiting, etc.) the inrush current. In the illustrated example, when the output voltage VOUT at the output 101 decreases below VIN1-VOS2 between time t1 and time t2, the boost comparator 148 triggers the one-shot generator 149 and the boost driver 150 to temporarily boost the output voltage VOUT between the rising edges of the one-shot signal at time t2 and time t3. The diode amplifier 142 is enabled to control (such as reduce, limit, block, etc.) reverse current and / or output voltage drop, which can cause circuit damage and / or circuit instability. The boost comparator 148 is enabled to detect and limit the drop of the output voltage VOUT at the output 101, which can indicate the instability associated with the diode amplifier 142. Such instability can be caused by output load conditions. Using the soft start amplifier 137, the diode amplifier 142 and the boost comparator 148 allows the power multiplexer circuit 100 to switch from channel A to channel B under a wide range of load conditions and without undesirable channel conversion behavior.

[0054] After stage 702, soft start amplifier 137 increases the gate voltage on gate 119C to above VOUT+Vt and increases VOUT at a rate of (IREF / Css)*Gain, gradually turning on MOSFET 119 over time, thereby gradually increasing the output voltage VOUT at output 101 over time.

[0055] Back to Figure 2 When MOSFET 119 is turned on (block 214), controller 164 switches power multiplexer circuit 100 to FIG. 5A to FIG. 5C 206. In some examples, determining when MOSFET 119 has turned on includes a comparator comparing the Vgs voltage between gate 119C and source 119B to a reference voltage (e.g., 3V) and / or a comparator comparing the Css voltage to a reference voltage (e.g., 4V). In some examples, the reference voltages are selected to turn on MOSFET 106 and MOSFET 119 under the highest expected VINA and VINB conditions. FIG. 5A to FIG. 5CIn the "Channel B on" state 206 of FIG. 1 , drivers 121 and 124 are enabled to turn on MOSFETs 118 and 119, respectively, thereby coupling input 103 to output 101. Drivers 108 and 111 associated with channel A 107 are disabled. Pull-down device 114 is enabled to turn off MOSFET 105, and pull-down device 116 is enabled to turn off MOSFET 106. All devices associated with the conversion (e.g., soft-start amplifiers 133 and 137, diode amplifiers 142 and 145, and boost comparators 148 and 156) are disabled.

[0056] Returning to block 212, in the event that the input voltage VINB at the input 103 is not greater than the input voltage VINA at the input 102 (block 212), the controller switches the power multiplexer circuit 100 to FIG. 6A to FIG. 6C The controller 164 then switches the power multiplexer circuit 100 to the "Channel B On" state 206 described above. In the "Channel B Off" state 208, the pull-down devices 114, 116, 127, and 129 are enabled, and all other devices and components are disabled, so that neither the input voltage VINA nor the input voltage VINB is connected to the output 101, thereby discharging VOUT through Rout (output load). VOUT is discharged, and when the input voltage VINB at the input 103 is equal to or greater than the output voltage VOUT at the output 101 (block 216), the controller 164 transitions the power multiplexer circuit 100 to the "Channel B On" state 206 described above.

[0057] Fig. 8A FIG. 8C is a diagram showing an operation Figures 1A to 1C A state diagram 800 of an example state machine of an example power multiplexer circuit 100 is shown. The state diagram 800 may be implemented to operate Figures 1A to 1C The state diagram 800 may be implemented in hardware logic, machine readable instructions, a hardware implemented state machine, and / or any combination thereof, of the example power multiplexer circuit 100. The state diagram 800 may be an executable program or a portion of an executable program for execution by a processor. The program may be implemented in software (e.g., machine readable instructions) stored in any number and / or type of non-transitory computer readable storage devices or non-transitory storage disks, such as non-volatile memory (e.g., ROM, EEPROM, flash memory), volatile memory (e.g., SDRAM, DRAM, and / or any other type of RAM device), etc. The example processor may be, for example, one or more of a programmable processor, a programmable controller, a DSP, an ASIC, an ARM processor, etc. Additionally and / or alternatively, the state diagram 800 may be implemented by one or more hardware circuits (such as discrete and / or integrated analog and / or digital circuit systems, PLDs, FPGAs, ASICs, comparators, operational amplifiers (op-amps), logic circuits, etc.) configured to perform corresponding operations without executing software or firmware. Although reference is made to Fig. 8A 8C describes an example state machine, but many other methods of operating the power multiplexer circuit 100 may alternatively be used. For example, the order of execution of the states may be changed, and / or some of the states may be changed, eliminated, or combined.

[0058] For simplicity of illustration, Fig. 8A 8C , only components, devices, etc. that are enabled in the state are shown. All other components, devices, etc. are disabled. If a component, device, etc. is enabled in one state, and the power multiplexer circuit 100 transitions to another state in which the component, device, etc. is disabled, the component, device, etc. is disabled at the time of the state transition.

[0059] Starting from the "Gate A Pull Down" state 802, the pull-down devices 114, 116, 127 and 129 are closed to prevent the input voltage from coupling to the gate through the Cgd parasitic capacitance. When the soft start signal SS on line 131 exceeds the reference voltage VREF (block 804), the controller 164 transitions the power multiplexer circuit 100 to the "Soft Start A" state 806.

[0060] In the "soft start A" state 806, the power multiplexer circuit 100 is in a configuration in which channel A 107 is turned on by enabling the driver 108, the soft start amplifier 133, the pull-down device 127, and the pull-down device 129. When the MOSFET 106 is turned on (block 808), the controller 164 transitions the power multiplexer circuit 100 to the "channel A on" state 810. In the "channel A on" state 810, the power multiplexer circuit 100 is in a configuration in which the channel A 107 is turned on by enabling the driver 108, the soft start amplifier 133, the pull-down device 127, and the pull-down device 129. When the MOSFET 106 is turned on (block 808), the controller 164 transitions the power multiplexer circuit 100 to the "channel A on" state 810. FIG. 3A to FIG. 3C Soft-start amplifier 133 is enabled to gradually turn on MOSFET 106, thereby managing (such as reducing, limiting, etc.) the inrush current.

[0061] In the case where channel B 120 is enabled (block 812) and VINB < VINA (block 814), the controller transitions the power multiplexer circuit 100 to a "2 channels off" state 816, in which the pull-down devices 114, 116, 127, and 129 are enabled until VINB ≥ VOUT (block 818). When VINB ≥ VOUT (block 818), the controller 164 transitions the power multiplexer circuit 100 to a "channel B on" state 820. In the "channel B on" state 820, the power multiplexer circuit 100 is in FIG. 5A to FIG. 5C The configuration shown in .

[0062] Returning to block 814, in the case of VINB>VINA (block 814), the controller 164 transitions the power multiplexer circuit 100 to the "Gate B Pull Down" state 822. Because channel A 107 was previously turned on in the "Gate B Pull Down" state 822, drivers 108, 111 are enabled to keep channel A turned on in state 822, while pull-down devices 127 and 129 are enabled to remove parasitic coupling with input VINB. When the soft start signal SS on lines 131, 132 exceeds the reference voltage VREF (block 824), the controller 164 transitions the power multiplexer circuit 100 to the "Soft Start B" state 826.

[0063] In the "soft start B" state 826, the power multiplexer circuit 100 is in FIG. 4A to FIG. 4C . In the configuration shown in the "soft start B" state 826, the soft start amplifier 137 is enabled to gradually turn on the MOSFET 119, thereby controlling (such as reducing, limiting, etc.) the inrush current. The diode amplifier 142 is enabled to control (such as reducing, limiting, blocking, etc.) the reverse current and / or the output voltage drop, which can cause circuit damage and / or circuit instability. The boost comparator 148 is enabled to detect and limit the drop in the output voltage VOUT at the output 101, which can indicate the instability associated with the diode amplifier 142. Such instability can be caused by output load conditions. The use of the soft start amplifier 137, the diode amplifier 142 and the boost comparator 148 allows the power multiplexer circuit 100 to switch from channel A to channel B under a wide range of load conditions and without undesirable channel conversion behavior.

[0064] When MOSFET 119 is turned on (block 828), controller 164 switches power multiplexer circuit 100 to FIG. 5A to FIG. 5C The “Channel B on” state 820 is shown in FIG.

[0065] Despite Figures 1A to 1CAn example power multiplexer circuit 100 is shown in FIG. 1 , but the power multiplexer may include additional circuitry and / or may include Figures 1A to 1C For example, if the output Cout and Rout conditions are constrained, the boost comparator 148, the one-shot generator 149, and the boost driver 150 may not be needed for the diode amplifier 142 stability.

[0066] As used herein, the phrase "at least" is open-ended when used as a transitional term, such as in the foreword of a claim. When used, the term "and / or", for example, in a form such as A, B, and / or C, refers to any combination or subset of A, B, C, such as: (a) only A; (b) only B; (c) only C; (d) A and B; (e) A and C; (f) B and C; and (g) A and B and C. As used herein in the context of describing structures, components, items, objects, and / or things, the phrase "at least one of A and B" refers to embodiments that include any of the following: (a) at least one A; (b) at least one B; and (c) at least one A and at least one B. Similarly, as used herein in the context of describing structures, components, items, objects, and / or things, the phrase "at least one of A or B" refers to embodiments that include any of the following: (a) at least one A; (b) at least one B; and (c) at least one A and at least one B. As used herein in the context of describing the performance or execution of processes, instructions, actions, activities, and / or steps, the phrase "at least one of A and B" refers to embodiments that include any of the following: (a) at least one A; (b) at least one B; and (c) at least one A and at least one B. Similarly, as used herein in the context of describing the performance or execution of processes, instructions, actions, activities, and / or steps, the phrase "at least one of A or B" refers to embodiments that include any of the following: (a) at least one A; (b) at least one B; and (c) at least one A and at least one B.

[0067] Example channel switching power multiplexer circuits and methods of operation thereof are described herein.Additional examples and combinations thereof include at least the following.

[0068] Example 1 is a power multiplexer, which includes a first transistor, a second transistor, a third transistor, a fourth transistor, a diode amplifier and a soft-start amplifier, wherein the first transistor is coupled to a first input, the second transistor is coupled to the first transistor to selectively couple a first voltage at the first input to an output, the third transistor is coupled to a second input, the fourth transistor is coupled to the third transistor to couple a second voltage at the second input to the output, the diode amplifier is used to selectively provide a third voltage to a gate of the first transistor to block reverse current, and the soft-start amplifier is used to provide a fourth voltage to a gate of the fourth transistor to turn on the fourth transistor with a constant slope.

[0069] Example 2 is a power multiplexer according to Example 1, further comprising a comparator and a one-shot generator, wherein the comparator is used to detect a drop in the fifth voltage at the output when the diode amplifier provides the third voltage to the gate of the first transistor, and the one-shot generator is used to form a pulse to temporarily turn on the first transistor when the diode amplifier provides the third voltage to the gate of the first transistor.

[0070] Example 3 is a power multiplexer according to Example 1, wherein the first transistor is connected to the second transistor to enable current to flow bidirectionally between the first input and the output.

[0071] Example 4 is a power multiplexer according to Example 1, further comprising a second soft start amplifier and a capacitor, wherein the second soft start amplifier is used to provide a fifth voltage to the gate of the second transistor to turn on the second transistor with a constant slope, and the capacitor is coupled to the ground and coupled to the input of the soft start amplifier and the input of the second soft start amplifier.

[0072] Example 5 is a power multiplexer according to Example 1, further comprising a controller for switching the power multiplexer from (a) a first state to (b) a second state, in which the first voltage at the first input is coupled to the output, and in the second state, the second voltage at the second input is coupled to the output by enabling the diode amplifier and enabling the soft start amplifier.

[0073] Example 6 is the power multiplexer of Example 5, wherein the controller is to disable the diode amplifier and disable the soft start amplifier.

[0074] Example 7 is a power multiplexer according to Example 6, further comprising a second diode amplifier and a second soft-start amplifier, wherein the second diode amplifier is used to provide a fifth voltage to the gate of the third transistor to block reverse current, and the second soft-start amplifier is used to provide a sixth voltage to the gate of the second transistor to turn on the second transistor with a constant slope, wherein the controller switches the power multiplexer from the first state to the second state by enabling the second diode amplifier and enabling the second soft-start amplifier.

[0075] Example 8 is a power multiplexer according to Example 1, further comprising a first driver, a second driver, a first pull-down device, a third driver, a fourth driver, a second pull-down device, and a controller, wherein the first driver is coupled to a gate of the first transistor, the second driver is coupled to a gate of the second transistor, the first pull-down device is coupled to the gate of the second transistor, the third driver is coupled to the gate of the third transistor, the fourth driver is coupled to the gate of the fourth transistor, the second pull-down device is coupled to the gate of the fourth transistor, and the controller is configured to:

[0076] in a first state, enabling the first driver, enabling the second driver, disabling the third driver, disabling the fourth driver, disabling the soft start amplifier, disabling the second diode amplifier, disabling the first pull-down device, and enabling the second pull-down device to couple the first voltage at the first input to the output;

[0077] in a second state, disabling the first driver, disabling the second driver, enabling the third driver, enabling the fourth driver, disabling the soft start amplifier, disabling the diode amplifier, enabling the first pull-down device, and disabling the second pull-down device to couple the second voltage at the second input to the output; and

[0078] The power multiplexer is transitioned from the first state to the second state by disabling the first pull-down device, enabling the diode amplifier, enabling the soft start amplifier, disabling the first driver, enabling the second driver, enabling the third driver, and disabling the fourth driver.

[0079] Example 9 is a method of controlling a power multiplexer circuit, the method comprising: enabling a soft start amplifier to turn on the second transistor, the second transistor having a drain connected to the drain of the first transistor to form a first channel between a first input and an output; enabling a diode amplifier to adjust a gate voltage of a third transistor, the third transistor having a drain connected to the drain of a fourth transistor to form a second channel between a second input and an output; and, when the first transistor is already turned on, disabling the soft start amplifier, enabling a first driver to keep the first transistor turned on, and disabling the diode amplifier.

[0080] Example 10 is a method of controlling the power multiplexer circuit according to Example 9, further comprising enabling a second driver to keep the second transistor turned on when the soft start amplifier is enabled.

[0081] Example 11 is a method of controlling the power multiplexer circuit according to Example 9, disabling the diode amplifier and enabling a boost driver to form a pulsed gate voltage of the third transistor when the output voltage at the output meets a threshold.

[0082] Example 12 is a method of controlling the power multiplexer circuit according to Example 9, further comprising enabling a pull-down device to disable the third transistor and the fourth transistor when the first transistor is turned on.

[0083] Example 13 is a method of controlling the power multiplexer circuit according to Example 9, wherein the diode amplifier adjusts the gate voltage of the third transistor based on a comparison of an output voltage at the output and an input voltage.

[0084] Example 14 is a method of controlling the power multiplexer circuit according to Example 9, further comprising charging and discharging a capacitor to generate an input of the soft start amplifier.

[0085] Example 15 is a power multiplexer circuit, which includes a first transistor, a second transistor, a third transistor, a fourth transistor, a first amplifier, a second amplifier, a capacitor, and a controller, wherein the first transistor has a source coupled to a first power multiplexer input, the second transistor has a drain coupled to the drain of the first transistor and a source coupled to a power multiplexer output, the third transistor has a source coupled to a second power supply input, the fourth transistor has a drain coupled to the drain of the third transistor and a source coupled to the power multiplexer input, the first amplifier has an output coupled to a gate of the first transistor, a first input coupled to the first power multiplexer input via a first voltage source, and a second input coupled to the power multiplexer output, the second amplifier has an output coupled to the gate of the fourth transistor, the capacitor has a first terminal coupled to the input of the second amplifier and a charging source, and the controller is coupled to an enable input of the first amplifier and an enable input of the second amplifier.

[0086] Example 16 is a power multiplexer circuit according to Example 15, wherein the first transistor is a first metal oxide semiconductor field effect transistor (MOSFET), the second transistor is a second MOSFET, the third transistor is a third MOSFET, and the fourth transistor is a fourth MOSFET.

[0087] Example 17 is a power multiplexer circuit according to Example 16, further comprising: a comparator having a first input, a second input, and an output, the first input being coupled to the power multiplexer output, the second input being coupled to the first power multiplexer via a second voltage source; and

[0088] A logic gate having a first input coupled to the output of the comparator, an enable input coupled to the controller, and an output coupled to the enable input of the first amplifier.

[0089] Example 18 is a power multiplexer circuit according to Example 17, further comprising a pulse generator and a driver, wherein the pulse generator has an input coupled to the output of the comparator, and the driver has an input coupled to the output of the pulse generator and an output coupled to the gate of the first MOSFET.

[0090] Example 19 is a power multiplexer circuit according to Example 18, further comprising a first driver, a second driver, a third driver, a fourth driver, a first pull-down device, and a second pull-down device, wherein the first driver has an output coupled to the gate of the first MOSFET, the second driver has an output coupled to the gate of the second MOSFET, the third driver has an output coupled to the gate of the third MOSFET, the fourth driver has an output coupled to the gate of the fourth MOSFET, the first pull-down device has an output coupled to the gate of the second MOSFET, and the second pull-down device has an output coupled to the gate of the fourth MOSFET.

[0091] Any references, including publications, patent applications, and patents, cited herein are hereby incorporated by reference in their entirety to the same extent as if each reference were individually and specifically indicated to be incorporated by reference and were set forth in its entirety herein.

[0092] Modifications are possible in the described embodiments, and other embodiments are possible within the scope of the claims.

Claims

1. A power multiplexer, wherein include: a first transistor coupled to a first input; a second transistor coupled between the first transistor and an output of the power multiplexer to selectively couple a first voltage at the first input to an output; a third transistor coupled to the second input; a fourth transistor coupled between the third transistor and an output of the power multiplexer to selectively couple a second voltage at the second input to the output; a first diode amplifier having a first input coupled to the first input via a voltage source, a second input coupled to the output, and an output coupled to the gate of the first transistor for providing a third voltage to the gate of the first transistor by monitoring a voltage at the output during an input voltage switching operation; a first soft-start amplifier, the first soft-start amplifier being used for providing a fourth voltage to a gate of the fourth transistor to turn on the fourth transistor with a constant slope; a second diode amplifier having one input coupled to the first input via a voltage source, another input coupled to the output, and an output coupled to the gate of the third transistor for providing a fifth voltage to the gate of the third transistor by monitoring the voltage at the output during an input voltage switching operation; as well as A second soft start amplifier is used for providing a sixth voltage to the gate of the second transistor to turn on the second transistor with a constant slope.

2. The power multiplexer according to claim 1, further comprising: include: a comparator for detecting a drop in a seventh voltage at the output when the first diode amplifier provides the third voltage to the gate of the first transistor; as well as A one-shot generator is used for forming a pulse to temporarily turn on the first transistor in response to the output of the comparator. 3 . The power multiplexer of claim 1 , wherein the first transistor is connected to the second transistor to allow current to flow bidirectionally between the first input and the output.

4. The power multiplexer according to claim 1, further comprising: include: A capacitor is coupled to ground and to an input of the first soft start amplifier and an input of the second soft start amplifier.

5. The power multiplexer of claim 1 , further comprising a controller that switches the power multiplexer from (a) a first state in which the first voltage at the first input is coupled to the output to (b) a second state in which the second voltage at the second input is coupled to the output by: enables the first diode amplifier, and The first soft start amplifier is enabled.

6. The power multiplexer of claim 5, wherein the controller: disabling the first diode amplifier; and Disable the first soft-start amplifier.

7. The power multiplexer according to claim 6, The controller switches the power multiplexer from the second state to the first state by: enables the second diode amplifier, and Enable the second soft start amplifier.

8. The power multiplexer according to claim 1, further comprising: include: a first driver coupled to a gate of the first transistor; a second driver coupled to a gate of the second transistor; a first pull-down device coupled to the gate of the second transistor; a third driver coupled to a gate of the third transistor; a fourth driver coupled to the gate of the fourth transistor; a second pull-down device coupled to the gate of the fourth transistor; as well as A controller, the controller being used to: in a first state, enabling the first driver, enabling the second driver, disabling the third driver, disabling the fourth driver, disabling the first soft start amplifier, disabling the first diode amplifier, disabling the first pull-down device, and enabling the second pull-down device, to couple the first voltage at the first input to the output; in a second state, disabling the first driver, disabling the second driver, enabling the third driver, enabling the fourth driver, disabling the first soft start amplifier, disabling the first diode amplifier, enabling the first pull-down device, and disabling the second pull-down device, to couple the second voltage at the second input to the output; and The power multiplexer is transitioned from the first state to the second state by disabling the first pull-down device, disabling the second pull-down device, enabling the first diode amplifier, enabling the first soft start amplifier, disabling the first driver, enabling the second driver, enabling the third driver, and disabling the fourth driver.

9. A method for controlling a power multiplexer circuit, the method include: Make sure the first soft-start amplifier and the first diode amplifier are disabled; enabling a second soft start amplifier to turn on a first transistor having a drain connected to a drain of the second transistor to form a first channel between the first input and the output; enabling a second diode amplifier to adjust a gate voltage of a third transistor having a drain connected to a drain of a fourth transistor to form a second channel between the second input and the output; as well as When the first transistor is turned on: disabling the second soft-start amplifier, enabling a first driver to keep the first transistor turned on, and Disable the second diode amplifier. 10 . The method of controlling the power multiplexer circuit of claim 9 , further comprising enabling a second driver to keep the second transistor turned on when the second soft-start amplifier is enabled.

11. The method of controlling the power multiplexer circuit of claim 9, disabling the second diode amplifier and enabling a boost driver to form a pulsed gate voltage of the third transistor when the output voltage at the output meets a threshold.

12. The method of controlling the power multiplexer circuit of claim 9, further comprising enabling a pull-down device to disable the third transistor and the fourth transistor when the first transistor is turned on.

13. The method of controlling the power multiplexer circuit of claim 9, wherein the second diode amplifier adjusts the gate voltage of the third transistor based on a comparison of an output voltage at the output and an input voltage.

14. The method of controlling the power multiplexer circuit of claim 9, further comprising charging and discharging a capacitor to generate an input to the second soft start amplifier.

Images