Semiconductor structure and method for forming the same

Abstract

A semiconductor structure and a method for forming the same, wherein the method comprises: providing a substrate, wherein the substrate surface has a sacrificial film; forming a first barrier layer on the surface of the sacrificial film; forming a first opening in the first barrier layer, wherein the first opening exposes the surface of the sacrificial film; after forming the first opening, using the first barrier layer as a mask, ion implantation is performed on the sacrificial film, so that the sacrificial film exposed by the first opening forms a doped sacrificial layer, and the sacrificial film at the bottom of the first barrier layer forms an undoped sacrificial layer. The method is conducive to improving the accuracy of pattern transfer, thereby forming a semiconductor structure with better performance.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor structure and a forming method thereof. Background Art

[0002] In the semiconductor integrated circuit manufacturing process, a semiconductor structure is formed on a semiconductor substrate through a series of processes such as deposition, photolithography, etching, etc. Among them, the photolithography process is to form the required pattern in the photoresist, obtain a patterned photoresist, and define the area to be etched. The etching process is used to transfer the pattern in the patterned photoresist to the layer to be etched.

[0003] However, in the process of forming semiconductor structures using conventional techniques, the accuracy of pattern transfer needs to be improved. Summary of the invention

[0004] The technical problem solved by the present invention is to provide a semiconductor structure and a method for forming the same, so as to improve the accuracy of pattern transfer and improve the performance of the formed semiconductor structure.

[0005] In order to solve the above technical problems, the technical solution of the present invention provides a method for forming a semiconductor structure, including: providing a substrate, wherein the surface of the substrate has a sacrificial film; forming a first barrier layer on the surface of the sacrificial film; forming a first opening in the first barrier layer, wherein the first opening exposes the surface of the sacrificial film; after forming the first opening, using the first barrier layer as a mask, ion implanting the sacrificial film, so that the sacrificial film exposed by the first opening forms a doped sacrificial layer, and the sacrificial film at the bottom of the first barrier layer forms an undoped sacrificial layer.

[0006] Optionally, the method further includes: after forming the doped sacrificial layer and the undoped sacrificial layer, removing the first barrier layer; and after removing the first barrier layer, removing the undoped sacrificial layer.

[0007] Optionally, a first wet etching process is used to remove the first barrier layer; parameters of the first wet etching process include: an etching solution includes hydrofluoric acid and hydrogen peroxide.

[0008] Optionally, a second wet etching process is used to remove the undoped sacrificial layer; parameters of the second wet etching process include: etching solution includes: hydrofluoric acid, hydrogen peroxide and ammonia water.

[0009] Optionally, the material of the first barrier layer includes silicon oxide, silicon nitride or silicon oxynitride.

[0010] Optionally, the formation process of the first barrier layer includes: plasma enhanced chemical vapor deposition process; the parameters of the plasma enhanced chemical vapor deposition process include: the introduced gases include: silane, nitrogen, ammonia and nitrous oxide, the gas flow rate is 500 standard ml / min to 2000 standard ml / min, the RF power is 100 watts to 250 watts, and the time is 5 seconds to 10 seconds.

[0011] Optionally, the thickness of the first barrier layer is in the range of 5 nanometers to 10 nanometers.

[0012] Optionally, the process parameters for ion implantation into the sacrificial film include: doping energy of 10KeV to 30KeV, doping dose of 1E7atoms / cm 2 ~3E7atoms / cm 2 , the doping time is 30 seconds to 120 seconds.

[0013] Optionally, it also includes: after forming the first barrier layer, before forming the first opening in the first barrier layer, forming a second barrier layer on the surface of the first barrier layer, the second barrier layer having a second opening exposing the surface of the first barrier layer, and the position of the second opening corresponds to the position of the first opening; the method for forming the semiconductor structure also includes: after forming the first opening and the second opening, using the first barrier layer and the second barrier layer as masks to perform ion implantation on the sacrificial film.

[0014] Optionally, the method for forming the first opening and the second opening includes: forming a patterned layer on the surface of the second barrier layer, the patterned layer exposing a portion of the surface of the second barrier layer; using the patterned layer as a mask, etching the second barrier layer until the surface of the first barrier layer is exposed, and forming the second opening in the second barrier layer; after forming the second opening, using the second barrier layer as a mask, etching the first barrier layer until the surface of the sacrificial film is exposed, and forming the first opening in the first barrier layer.

[0015] Optionally, an etching process for etching the second barrier layer using the patterned layer as a mask and an etching process for etching the first barrier layer using the second barrier layer as a mask are the same etching process.

[0016] Optionally, the etching process includes: a dry etching process; the parameters of the dry etching process include: the gases used include: CHxFy, where 1<x<4, 1<y<4, and x and y are natural numbers, nitrogen, hydrogen and argon, the RF power is 50 watts to 200 watts, the temperature is 40 degrees Celsius to 60 degrees Celsius, and the time is 5 seconds to 20 seconds.

[0017] Optionally, the material of the first barrier layer is different from the material of the second barrier layer; the material of the second barrier layer includes: an organic material containing carbon and oxygen.

[0018] Optionally, the material of the sacrificial film includes: amorphous silicon, amorphous carbon, polysilicon, silicon oxide, silicon oxycarbide or silicon oxyhydrogencarbide.

[0019] Optionally, the substrate includes: a single-layer structure or a multi-layer structure.

[0020] Optionally, when the substrate is a multi-layer structure, the substrate includes a substrate and a hard mask layer located on the substrate.

[0021] Correspondingly, the technical solution of the present invention also provides a semiconductor structure formed by adopting any of the above methods.

[0022] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0023] In the method for forming a semiconductor structure provided by the technical solution of the present invention, a first barrier layer is formed on the surface of the sacrificial film. During the process of ion implantation into the sacrificial film, the first barrier layer can effectively block ions from entering the first barrier layer, thereby preventing ions from diffusing into the sacrificial film covered by the first barrier layer. Therefore, after ion implantation into the sacrificial film, the pattern accuracy of the formed doped sacrificial layer can be higher, which is beneficial to improving the accuracy of pattern transfer, thereby forming a semiconductor structure with better performance.

[0024] Furthermore, the first barrier layer is removed by a first wet etching process, which has a relatively high etching selectivity for the doped sacrificial layer and the first barrier layer, thereby reducing etching damage to the doped sacrificial layer while removing the first barrier layer, thereby facilitating improving the accuracy of pattern transfer.

[0025] Furthermore, the undoped sacrificial layer is removed by a second wet etching process, which has a relatively high etching selectivity for the doped sacrificial layer and the undoped sacrificial layer, thereby facilitating the removal of the undoped sacrificial layer while reducing etching damage to the doped sacrificial layer, thereby facilitating improving the accuracy of pattern transfer.

[0026] Furthermore, the method for forming the semiconductor structure also includes: after forming the first barrier layer, before forming the first opening in the first barrier layer, forming a second barrier layer on the surface of the first barrier layer. Since the second barrier layer is usually an organic material containing carbon and oxygen, the hardness of the second barrier layer formed by the organic material is less than the hardness of the first barrier layer. At the same time, relative to the first barrier layer, the hardness of the second barrier layer is closer to the hardness of the patterned layer. Therefore, in the process of etching the second barrier layer using the patterned layer as a mask, it is beneficial to stably transfer the pattern in the patterned layer to the second barrier layer, thereby facilitating the stable transfer of the pattern in the second barrier layer to the first barrier layer, thereby improving the accuracy of the pattern transfer and making the formed semiconductor structure have better performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figures 1 to 4 It is a schematic structural diagram of each step of a method for forming a semiconductor structure;

[0028] Figures 5 to 11 It is a schematic cross-sectional structure diagram of each step of the semiconductor structure forming method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] As described in the background art, the performance of existing semiconductor structures is poor.

[0030] The following is a detailed description of the reasons for the poor performance of the semiconductor structure with reference to the accompanying drawings. Figures 1 to 4 The present invention is a structural schematic diagram of each step of a semiconductor structure forming method.

[0031] Please refer to Figure 1 , providing a substrate 100, wherein a sacrificial film 110 is provided on a surface of the substrate 100.

[0032] Please refer to Figure 2 A barrier layer 120 is formed on the surface of the sacrificial film 110 , and an opening 130 is provided in the barrier layer 120 to expose a portion of the surface of the sacrificial film 110 .

[0033] Please refer to Figure 3 , using the barrier layer 120 as a mask, ion implantation is performed on the sacrificial film 110 , so that the sacrificial film 110 exposed by the opening forms a doped sacrificial layer 141 , and the sacrificial film 110 at the bottom of the barrier layer 120 forms an undoped sacrificial layer 142 .

[0034] Please refer to Figure 4 , the undoped sacrificial layer 142 and the barrier layer 120 are removed.

[0035] In the above method, the method for forming the opening 130 in the barrier layer 120 includes: forming a patterned layer (not shown in the figure) on the surface of the barrier layer 120, wherein the patterned layer exposes a portion of the surface of the barrier layer 120; using the patterned layer as a mask, etching the barrier layer 120 until the surface of the sacrificial film 110 is exposed to form the opening 130. Usually, the material of the barrier layer 120 is an organic material containing carbon and oxygen. The organic material has good fluidity, which is conducive to forming a barrier layer 120 with a flat surface, thereby facilitating the formation of a patterned layer on the surface of the barrier layer 120 with a flat surface, and further facilitating the accurate transfer of the pattern of the patterned layer to the barrier layer 120.

[0036] However, due to the poor density of the blocking layer 120, during the process of ion implantation into the sacrificial film 110, the blocking layer 120 cannot effectively block the ions, so that the injected ions exist not only in the sacrificial film 110 at the bottom of the opening 130, but also in the blocking layer 120, and the ions in the blocking layer 120 are easy to further diffuse into the sacrificial film 110 at the bottom of the blocking layer 120, that is, after the ion implantation, the sacrificial film doped with ions is not only located at the bottom of the opening 130, but also at the bottom of the blocking layer 120, resulting in poor graphic accuracy of the formed doped sacrificial layer 141.

[0037] To solve the technical problem, an embodiment of the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate, wherein the surface of the substrate has a sacrificial film; forming a first barrier layer on the surface of the sacrificial film, wherein the material of the first barrier layer includes silicon, oxygen and nitrogen; forming a first opening in the first barrier layer, wherein the first opening exposes the surface of the sacrificial film; after forming the first opening, using the first barrier layer as a mask, ion implantation is performed on the sacrificial film, so that the sacrificial film exposed by the first opening forms a doped sacrificial layer, and the sacrificial film at the bottom of the first barrier layer forms an undoped sacrificial layer. The method is conducive to improving the accuracy of pattern transfer.

[0038] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0039] Figures 5 to 11 It is a schematic cross-sectional structure diagram of each step of the method for forming a semiconductor structure according to an embodiment of the present invention.

[0040] Please refer to Figure 5 , providing a substrate 200, wherein a sacrificial film 210 is provided on the surface of the substrate 200.

[0041] The substrate 200 includes a single-layer structure or a multi-layer structure.

[0042] In this embodiment, the base 200 is a multi-layer structure, and the base 200 includes: a substrate 201 and a hard mask layer 202 located on the substrate 201 .

[0043] The material of the substrate 201 is a semiconductor material. In this embodiment, the material of the substrate 201 is silicon. In other embodiments, the material of the substrate includes silicon carbide, silicon germanium, a multinary semiconductor material composed of group III-V elements, silicon on insulator (SOI) or germanium on insulator. Among them, the multinary semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs or InGaAsP.

[0044] In this embodiment, the hard mask layer 202 includes: a first hard mask portion (not shown) located on the surface of the substrate 201 and a second hard mask portion (not shown) located on the surface of the first hard mask portion. The sacrificial film 210 is located on the surface of the second hard mask portion.

[0045] The material of the first hard mask portion is nitrogen-doped silicon carbide; the first hard mask portion has good bonding ability with the substrate 201. When the substrate 201 is subsequently etched using the etched first hard mask portion as a mask, the first hard mask portion is not prone to peeling or warping. Therefore, the first hard mask portion has a good ability to maintain the etched pattern, which is beneficial to improving the accuracy of the pattern transfer.

[0046] The material of the second hard mask portion is titanium nitride, and the second hard mask portion has good bonding ability with the first hard mask portion. The second hard mask portion can protect the surface of the first hard mask portion when the substrate 201 is subsequently etched, so that the first hard mask portion will not be thinned. Moreover, the physical strength of the first hard mask portion is relatively large. When the substrate 201 is subsequently etched, the patterns of the first hard mask portion and the second hard mask portion can remain stable, which is beneficial to further improve the accuracy of pattern transfer.

[0047] The material of the sacrificial film 210 includes: amorphous silicon, amorphous carbon, polysilicon, silicon oxide, silicon oxycarbide or silicon oxyhydrogencarbide.

[0048] In this embodiment, the sacrificial film 210 is made of amorphous silicon.

[0049] Please refer to Figure 6 , forming a first barrier layer 220 on the surface of the sacrificial film 210 .

[0050] The first barrier layer 220 is used as a barrier layer for subsequent ion implantation into the sacrificial film 210 .

[0051] The material of the first barrier layer 220 includes silicon oxide, silicon nitride or silicon oxynitride.

[0052] In this embodiment, the material of the first barrier layer 220 is silicon oxynitride.

[0053] The formation process of the first barrier layer 220 includes: a plasma enhanced chemical vapor deposition process; the parameters of the plasma enhanced chemical vapor deposition process include: the gases introduced include: silane, nitrogen, ammonia and nitrous oxide, the gas flow rate is 500 standard ml / min to 2000 standard ml / min, the RF power is 100 watts to 250 watts, and the time is 5 seconds to 10 seconds.

[0054] The plasma enhanced chemical vapor deposition process has good film forming quality, which is conducive to forming a first barrier layer 220 with high density and physical strength. Therefore, during the subsequent ion injection process, the first barrier layer 220 with high density and physical strength can fully block ions from entering the sacrificial film 210 at the bottom of the first barrier layer.

[0055] The thickness of the first barrier layer 220 is in a range of 5 nanometers to 10 nanometers.

[0056] The significance of selecting the thickness range is that: if the thickness of the first barrier layer 220 is less than 5 nanometers, the first barrier layer 220 that is too thin still cannot fully block the ions from entering the sacrificial film 210 at the bottom of the first barrier layer 220, resulting in poor accuracy of pattern transfer; if the thickness of the first barrier layer 220 is greater than 10 nanometers, on the one hand, while the first barrier layer 220 can ensure that ions are fully prevented from entering the sacrificial film 210 covered by the first barrier layer 220, forming an overly thick first barrier layer 220 will increase process cost and process time accordingly; on the other hand, after the subsequent formation of the doped sacrificial layer, the process time for removing the first barrier layer 220 is also increased accordingly, which is not conducive to improving production efficiency.

[0057] Please refer to Figure 7 , a second barrier layer 230 is formed on the surface of the first barrier layer 220 .

[0058] The material of the second barrier layer 230 includes: an organic material containing carbon and oxygen.

[0059] The second barrier layer 230 is formed by a process including a spin coating process, a chemical vapor deposition process or a physical vapor deposition process.

[0060] Since the hardness of the second barrier layer 230 is less than that of the first barrier layer 220, and, relative to the first barrier layer 220, the hardness of the second barrier layer 230 is closer to the hardness of the subsequently formed patterned layer, therefore, in the process of etching the second barrier layer 230 and the first barrier layer 220 located at the bottom of the second barrier layer 230 using the patterned layer as a mask, it is beneficial for the pattern in the patterned layer to be stably transferred to the second barrier layer 230, thereby, the pattern in the second barrier layer 230 is stably transferred to the first barrier layer 220, so as to improve the accuracy of the pattern transfer.

[0061] In other embodiments, the second barrier layer is not formed.

[0062] Next, a first opening is formed in the first barrier layer 220 , wherein the first opening exposes the surface of the sacrificial film 210 .

[0063] In this embodiment, after forming the first barrier layer 220 and the second barrier layer 230, a first opening is formed in the first barrier layer 220, and the first opening exposes the surface of the sacrificial film 210; a second opening is formed in the second barrier layer 230, and the bottom of the second opening exposes the first opening. For details on the process of forming the first opening and the second opening, please refer to Figures 8 to 9 .

[0064] Please refer to Figure 8 , a patterned layer 240 is formed on the surface of the second barrier layer 230 , and the patterned layer 240 exposes a portion of the surface of the second barrier layer 230 .

[0065] The patterned layer 240 is used as a mask for subsequently forming the first opening and the second opening.

[0066] The material of the patterning layer 240 includes: photoresist.

[0067] The process of forming the patterned layer 240 includes a spin coating process.

[0068] Please refer to Fig. 9 , using the patterned layer 240 as a mask, etching the second barrier layer 230 until the surface of the first barrier layer 220 is exposed, and forming the second opening 252 in the second barrier layer 230; after forming the second opening 252, using the second barrier layer 230 as a mask, etching the first barrier layer 220 until the surface of the sacrificial film 210 is exposed, and forming the first opening 251 in the first barrier layer 220.

[0069] The first opening 251 and the second opening 252 are used to define the position and size of a doped sacrificial layer to be formed subsequently.

[0070] In this embodiment, the etching process of etching the second barrier layer 230 using the patterned layer 240 as a mask and the etching process of etching the first barrier layer 220 using the second barrier layer 230 as a mask are the same etching process.

[0071] The etching process includes: a dry etching process; the parameters of the dry etching process include: the gases used include: CHxFy, where 1<x<4, 1<y<4, and x and y are natural numbers, nitrogen, hydrogen and argon, the RF power is 50 watts to 200 watts, the temperature is 40 degrees Celsius to 60 degrees Celsius, and the time is 5 seconds to 20 seconds.

[0072] By etching the first barrier layer 220 and the second barrier layer 230 through the dry etching process, it is advantageous to form the first opening 251 and the second opening 252 with good sidewall morphology, that is, the sidewall of the first opening 251 is preferably perpendicular to the surface of the substrate 200, and the sidewall of the second opening 252 is preferably perpendicular to the surface of the substrate 200. In addition, since the material density of the first barrier layer 220 is good, the sidewall of the first opening 251 formed in the first barrier layer 220 can be well perpendicular to the surface of the substrate 200, and the inclination is low, which is beneficial to the accuracy of pattern transfer.

[0073] The method for forming a semiconductor structure further includes: after forming the first opening 251 and the second opening 252 , removing the patterned layer 240 .

[0074] Please refer to Fig.10 After forming the first opening 251, ion implantation is performed on the sacrificial film 210 using the first barrier layer 220 as a mask, so that the sacrificial film 210 exposed by the first opening 251 forms a doped sacrificial layer 261, and the sacrificial film 210 at the bottom of the first barrier layer 220 forms an undoped sacrificial layer 262.

[0075] In this embodiment, after forming the first opening 251 and the second opening 252, the sacrificial film 210 is ion implanted using the first barrier layer 220 and the second barrier layer 230 as masks, so that the sacrificial film 210 exposed by the first opening 251 and the second opening 252 forms a doped sacrificial layer 261, and the sacrificial film 210 at the bottom of the first barrier layer 220 and the second barrier layer 230 forms an undoped sacrificial layer 262.

[0076] The ions implanted include boron ions, phosphorus ions or arsenic ions.

[0077] The parameters of the ion implantation process include: doping energy of 10KeV to 30KeV, doping dose of 1E7atoms / cm 2 ~3E7atoms / cm 2, the doping time is 30 seconds to 120 seconds.

[0078] The significance of selecting the injection energy is that: if the doping energy is less than 10KeV, the depth of the injected ions into the sacrificial film 210 is shallow, resulting in the doped sacrificial layer 261 formed in the direction perpendicular to the substrate 200 not being able to penetrate the entire sacrificial film 210, failing to meet the process requirements, resulting in poor accuracy of pattern transfer; if the doping energy is greater than 30KeV, the excessive energy is likely to cause damage to the atoms in the substrate 201 material, resulting in reduced performance of the formed semiconductor structure.

[0079] The significance of selecting the implantation dose range is that if the doping dose is less than 1E7 atoms / cm 2 , the concentration of ions in the doped sacrificial layer 261 is low, so that the performance difference between the doped sacrificial layer 261 and the undoped sacrificial layer 262 is small, which is not conducive to the subsequent etching process to have a good etching selectivity for the doped sacrificial layer 261 and the undoped sacrificial layer 262, and is not conducive to improving the accuracy of pattern transfer; if the doping dose is greater than 3E7atoms / cm 2 , which is not conducive to cost reduction.

[0080] The first barrier layer 220 is formed on the surface of the sacrificial film 210. During the ion implantation process of the sacrificial film 210, the first barrier layer 220 can effectively block ions from entering the first barrier layer 220, thereby preventing ions from diffusing into the sacrificial film 210 covered by the first barrier layer 220. Therefore, after the ion implantation of the sacrificial film 210, the pattern accuracy of the formed doped sacrificial layer 261 can be higher, which is beneficial to improving the accuracy of pattern transfer, thereby forming a semiconductor structure with better performance.

[0081] Please refer to Fig.11 After forming the doped sacrificial layer 261 and the undoped sacrificial layer 262 , the first barrier layer 220 is removed; after removing the first barrier layer 220 , the undoped sacrificial layer 262 is removed.

[0082] In this embodiment, a first wet etching process is used to remove the first barrier layer 220 .

[0083] The parameters of the first wet etching process include: the etching solution includes hydrofluoric acid and hydrogen peroxide.

[0084] It should be noted that, in this embodiment, the first wet etching process removes the first barrier layer 220 while also removing the second barrier layer 230 .

[0085] In this embodiment, a second wet etching process is used to remove the undoped sacrificial layer 262 .

[0086] The parameters of the second wet etching process include: the etching solution includes: hydrofluoric acid, hydrogen peroxide and ammonia water.

[0087] The first wet etching process is used to remove the first barrier layer 220. The first wet etching process has a relatively high etching selectivity for the doped sacrificial layer 261 and the first barrier layer 220, so that while removing the first barrier layer 220, etching damage to the doped sacrificial layer 261 is reduced, thereby improving the accuracy of pattern transfer.

[0088] The undoped sacrificial layer 262 is removed by a second wet etching process. The second wet etching process has a relatively high etching selectivity for the doped sacrificial layer 261 and the undoped sacrificial layer 262, thereby facilitating the removal of the undoped sacrificial layer 262 while reducing etching damage to the doped sacrificial layer 261, thereby facilitating improving the accuracy of pattern transfer.

[0089] In this embodiment, after removing the first barrier layer 220, the second barrier layer 230 and the undoped sacrificial layer 262, the method for forming the semiconductor structure further includes: using the doped sacrificial layer 261 as a mask, continuing to etch the substrate 201 and the hard mask layer 202 located on the surface of the substrate 201, further realizing pattern transfer, and forming a pattern in the substrate 201.

[0090] Correspondingly, an embodiment of the present invention further provides a semiconductor structure formed by the above method.

[0091] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: Providing a substrate, wherein a sacrificial film is provided on a surface of the substrate; forming a first barrier layer on the surface of the sacrificial film; forming a first opening in the first barrier layer, wherein the first opening exposes a surface of the sacrificial film; After forming the first opening, using the first barrier layer as a mask, ion implantation is performed on the sacrificial film, so that the sacrificial film exposed by the first opening forms a doped sacrificial layer, and the sacrificial film at the bottom of the first barrier layer forms an undoped sacrificial layer, and the doped sacrificial layer serves as a mask for subsequent pattern transfer; After forming a first barrier layer and before forming a first opening in the first barrier layer, forming a second barrier layer on the surface of the first barrier layer, wherein the second barrier layer has a second opening exposing the surface of the first barrier layer, and the position of the second opening corresponds to the position of the first opening; The hardness of the second barrier layer is less than that of the first barrier layer; relative to the first barrier layer, the hardness of the second barrier layer is closer to the hardness of the patterned layer used to form the second opening; The material of the first barrier layer includes silicon oxide, silicon nitride or silicon oxynitride.

2. The method for forming a semiconductor structure according to claim 1, wherein: Also includes: After forming the doped sacrificial layer and the undoped sacrificial layer, the first barrier layer is removed; after removing the first barrier layer, the undoped sacrificial layer is removed.

3. The method for forming a semiconductor structure according to claim 2, wherein: The first barrier layer is removed by a first wet etching process; parameters of the first wet etching process include: an etching solution includes hydrofluoric acid and hydrogen peroxide.

4. The method for forming a semiconductor structure according to claim 2, wherein: Using a second wet etching process to remove the undoped sacrificial layer; The parameters of the second wet etching process include: the etching solution includes: hydrofluoric acid, hydrogen peroxide and ammonia water.

5. The method for forming a semiconductor structure according to claim 1, wherein: The formation process of the first barrier layer includes: plasma enhanced chemical vapor deposition process; the parameters of the plasma enhanced chemical vapor deposition process include: the gases introduced include: silane, nitrogen, ammonia and nitrous oxide, the gas flow rate is 500 standard ml / min~2000 standard ml / min, the RF power is 100 watts~250 watts, and the time is 5 seconds~10 seconds.

6. The method for forming a semiconductor structure according to claim 1, wherein: The thickness of the first barrier layer is in the range of 5 nanometers to 10 nanometers.

7. The method for forming a semiconductor structure according to claim 1, wherein: The process parameters for ion implantation of the sacrificial film include: doping energy of 10KeV~30KeV, doping dose of 1E7atoms / cm 2 ~3E7atoms / cm 2 , the doping time is 30 seconds to 120 seconds.

8. The method for forming a semiconductor structure according to claim 1, wherein: The method for forming a semiconductor structure further includes: after forming the first opening and the second opening, performing ion implantation on the sacrificial film using the first barrier layer and the second barrier layer as masks.

9. The method for forming a semiconductor structure according to claim 8, wherein: The method for forming the first opening and the second opening includes: forming the patterned layer on the surface of the second barrier layer, the patterned layer exposing a portion of the surface of the second barrier layer; using the patterned layer as a mask, etching the second barrier layer until the surface of the first barrier layer is exposed, and forming the second opening in the second barrier layer; after forming the second opening, using the second barrier layer as a mask, etching the first barrier layer until the surface of the sacrificial film is exposed, and forming the first opening in the first barrier layer.

10. The method for forming a semiconductor structure according to claim 9, wherein: The etching process of etching the second barrier layer using the patterned layer as a mask is the same etching process as the etching process of etching the first barrier layer using the second barrier layer as a mask.

11. The method for forming a semiconductor structure according to claim 10, wherein: The etching process includes: a dry etching process; the parameters of the dry etching process include: the gas used includes: CH x F y , where 1<x<4, 1<y<4, and x and y are natural numbers, nitrogen, hydrogen and argon, the RF power is 50 watts to 200 watts, the temperature is 40 degrees Celsius to 60 degrees Celsius, and the time is 5 seconds to 20 seconds.

12. The method for forming a semiconductor structure according to claim 8, wherein: The material of the first barrier layer is different from the material of the second barrier layer; the material of the second barrier layer includes: an organic material containing carbon and oxygen.

13. The method for forming a semiconductor structure according to claim 1, wherein: The material of the sacrificial film includes: amorphous silicon, amorphous carbon, polysilicon, silicon oxide, silicon oxycarbide or silicon oxyhydrogencarbide.

14. The method for forming a semiconductor structure according to claim 1, wherein: The substrate includes: a single-layer structure or a multi-layer structure.

15. The method for forming a semiconductor structure according to claim 14, wherein: When the substrate is a multi-layer structure, the substrate includes a substrate and a hard mask layer located on the substrate.

16. A semiconductor structure formed by the method of any one of claims 1 to 15.

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