Electronic device

Abstract

An electronic device is provided, including: an electronic module; a sensing unit divided into a hole region overlapping the electronic module, an effective region surrounding the hole region, and a peripheral region adjacent to the effective region. A first sensing electrode and a second sensing electrode are disposed in the effective region and insulated from each other. The first sensing electrode includes: a first main pattern; a first adjacent pattern having an area smaller than that of the first main pattern; and a hole pattern connected to an adjacent first adjacent pattern. The second sensing electrode includes: a second main pattern; a second adjacent pattern adjacent to the hole region and having an area smaller than that of the second main pattern; a second connection pattern connected to the second main pattern; and a wiring pattern connected to an adjacent second adjacent pattern. The hole pattern is disposed in the hole region, and the wiring pattern is disposed in the peripheral region.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0159987, filed on December 4, 2019, which is incorporated herein by reference for all purposes as if fully set forth herein. TECHNICAL FIELD

[0002] Exemplary embodiments of the present invention relate to an electronic device, and more particularly, to an electronic device in which a hole is defined in a stack with an electronic module and detects an external input. BACKGROUND

[0003] An electronic device is activated by an electrical signal. The electronic device is composed of various electronic components such as an electronic panel and an electronic module. The electronic panel can include a display unit for displaying an image or a sensing unit for detecting an external input. The electronic components can be electrically interconnected by signal lines arranged in various ways.

[0004] The display unit includes a light emitting element for generating an image. The sensing unit can include a sensing electrode for detecting an external input. The sensing electrode is disposed in an active area. The sensing unit is designed to provide uniform sensitivity to the entire active area.

[0005] The above information disclosed in this BACKGROUND section is only for the understanding of the background of the present inventive concept, and, therefore, it can contain information that does not constitute prior art. SUMMARY

[0006] Exemplary embodiments of the present disclosure provide an electronic device having improved reliability.

[0007] Additional features of the inventive concept will be set forth in the description that follows, and in part will be apparent from the description, or can be learned by practice of the inventive concept.

[0008] Exemplary embodiments of the inventive concept provide an electronic device including an electronic module; and a sensing unit divided into a hole region in a stack with the electronic module, an active region surrounding the hole region, and a peripheral region adjacent to the active region, and including a first sensing electrode and a second sensing electrode disposed in the active region and insulated from each other, wherein the first sensing electrode includes a first main pattern, a first adjacent pattern having an area smaller than that of the first main pattern, and a hole pattern connected to an adjacent first adjacent pattern, wherein the second sensing electrode includes a second main pattern, a second adjacent pattern adjacent to the hole region and having an area smaller than that of the second main pattern, a second connection pattern connected to the second main pattern, and a wiring pattern connected to an adjacent second adjacent pattern, wherein the hole pattern is disposed in the hole region, and the wiring pattern is disposed in the peripheral region.

[0009] The sensing unit can be defined by a first detection insulating layer, a first conductive layer disposed on the first detection insulating layer, a second detection insulating layer covering the first conductive layer and having a plurality of first contact holes superposed with the active area, and a second conductive layer disposed on the second detection insulating layer. The second connection pattern can be included in the first conductive layer, and the first main pattern, the first adjacent pattern, the second main pattern, and the second adjacent pattern can be included in the second conductive layer, and the second connection pattern can be connected to the second main pattern through the first contact holes.

[0010] The wiring pattern can be disposed on the same layer as the first adjacent pattern.

[0011] The hole pattern can be disposed on the same layer as the second adjacent pattern.

[0012] The wiring pattern can extend in the same direction as the direction in which the second adjacent pattern is arranged.

[0013] Among the first adjacent patterns, the first adjacent pattern disposed between the second adjacent patterns connected to the wiring pattern can be spaced apart from the wiring pattern in a planar direction.

[0014] Among the second adjacent patterns, the second adjacent pattern disposed between the first adjacent patterns connected to the hole pattern can be spaced apart from the hole pattern in a planar direction.

[0015] The electronic device can further include a crack detection circuit including a crack detection line disposed in the peripheral area, a crack detection pattern disposed in the hole area, and a connection line connecting the crack detection line and the crack detection pattern.

[0016] The electronic device can further include a wiring dummy pattern disposed between the crack detection line and the wiring pattern, and the connection line can pass through between the wiring dummy patterns.

[0017] The electronic device can further include an anti-static pattern disposed in the hole area and disposed between the crack detection pattern and the hole pattern.

[0018] The hole pattern can surround at least a portion of the crack detection pattern.

[0019] Each of the first and second sensing electrodes can include a mesh line defining a mesh opening portion.

[0020] The electronic device can include a display unit disposed below the sensing unit and including a first electrode, a second electrode facing the first electrode, and a light emitting layer disposed between the first and second electrodes, and each of the light emitting layers can be superposed with a corresponding mesh opening portion.

[0021] Each of the first main patterns can include a center pattern extending in one direction, and a branch pattern connected to the center pattern and extending in a slant direction of the one direction, wherein each of the second main patterns can surround a portion of the center pattern and the branch pattern of a corresponding one of the first main patterns.

[0022] The electronic module can include a first electronic module and a second electronic module, wherein the hole region can include a first hole region superposed with the first electronic module, and a second hole region superposed with the second electronic module.

[0023] The electronic module can include at least one of an image input module, an image output module, an optical detection module, and an optical output module.

[0024] Another exemplary embodiment of the inventive concept provides an electronic device including a display unit including a plurality of pixels, an electronic module disposed under the display unit, a sensing unit divided into a hole region superposed with the electronic module, an active region surrounding the hole region, and a peripheral region adjacent to the active region, and including a first sensing electrode and a second sensing electrode disposed in the active region and insulated from each other, and a module hole defined to pass through at least a portion of the display unit and the sensing unit superposed with the hole region. The first sensing electrode includes a hole pattern connecting first adjacent patterns cut by the module hole, wherein the second sensing electrode includes a wiring pattern connecting second adjacent patterns cut by the module hole, wherein the hole pattern is disposed in the hole region, and the wiring pattern is disposed in the peripheral region.

[0025] The first sensing electrode can include a first main pattern having an area greater than an area of the first adjacent pattern, wherein the second sensing electrode can include a second main pattern having an area greater than an area of the second adjacent pattern, and a second connection pattern connecting the main patterns.

[0026] Among the first adjacent patterns, the first adjacent pattern disposed between the second adjacent patterns connected with the wiring pattern can be spaced apart from the wiring pattern in a plane.

[0027] Among the second adjacent patterns, the second adjacent pattern disposed between the first adjacent patterns connected with the hole pattern can be spaced apart from the hole pattern in a plane.

[0028] The electronic device can further include a crack detection circuit including a crack detection line disposed in the peripheral region, a crack detection pattern surrounding the module hole, and a connection line connecting the crack detection line and the crack detection pattern.

[0029] The electronic device can further include a wiring dummy pattern disposed between the crack detection line and the wiring pattern, wherein the connection line can pass through between the wiring dummy pattern.

[0030] It will be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF DRAWINGS

[0031] The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the application and together with the description serve to explain the inventive concepts.

[0032] Figure 1 is an assembled perspective view of an electronic device according to an exemplary embodiment of the inventive concept.

[0033] Figure 2 is an exploded perspective view of an electronic device according to an exemplary embodiment of the inventive concept.

[0034] Figure 3 is a block diagram of an electronic device according to an exemplary embodiment of the inventive concept.

[0035] Figure 4A is a plan view of a display unit according to an exemplary embodiment of the inventive concept.

[0036] Figure 4B is Figure 2 is a magnified view of a region XX' shown in FIG.

[0037] Figure 5A is a plan view of a sensing unit according to an exemplary embodiment of the inventive concept.

[0038] Figure 5B is a magnified view of a sensing unit according to an exemplary embodiment of the inventive concept.

[0039] Figure 6 is a cross-sectional view showing a partial region of an electronic panel according to an exemplary embodiment of the inventive concept.

[0040] Figure 7A is a plan view of an electronic device according to an exemplary embodiment of the inventive concept.

[0041] Figure 7B is Figure 7A is a magnified view of a region YY' shown in FIG.

[0042] Figure 7C is a cross-sectional view showing a partial region of an electronic panel according to an exemplary embodiment of the inventive concept.

[0043] Figure 8 is an enlarged view of a sensing unit adjacent to a hole area according to an exemplary embodiment of the inventive concept.

[0044] Figure 9 is a plan view showing a crack detection circuit according to an exemplary embodiment of the inventive concept.

[0045] Figure 10A is Figure 8 is an enlarged plan view of a region TT' shown in

[0046] Figure 10B is a cross-sectional view taken along a line I-I' shown in Figure 10A

[0047] Figure 11A is Figure 8 is an enlarged plan view of a region QQ' shown in

[0048] Figure 11B is a cross-sectional view taken along a line II-II' shown in Figure 11A

[0049] Figure 12 is an enlarged view of a sensing unit adjacent to a hole area according to an exemplary embodiment of the inventive concept.

[0050] Figure 13 is an enlarged view of a sensing unit according to an exemplary embodiment of the inventive concept.

[0051] Figure 14 is a cross-sectional view taken along a line III-III' shown in Figure 13 DETAILED DESCRIPTION

[0052] In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of various exemplary embodiments of the present invention. Flowever, it will be apparent to one skilled in the art that various exemplary embodiments can be practiced without some or all of these specific details. In other instances, well known structures and devices are not shown in detail in order to avoid obscuring various exemplary embodiments. Also, various exemplary embodiments can be different from one another, but need not be. For example, a specific shape, structure, or characteristic need not be employed in every exemplary embodiment. In addition, various exemplary embodiments can be implemented in a different order, or in a different manner.

[0053] ​​​Unless otherwise stated, the exemplary embodiments shown are to be understood as providing exemplary features of variations of details that can be implemented in practice to embody the inventive concept. Accordingly, unless otherwise stated, features, components, modules, layers, films, panels, regions and / or aspects of various embodiments (hereinafter referred to collectively as “elements”) can additionally be combined, separated, interchanged, and / or rearranged, without departing from the inventive concept.

[0054] Generally, the use of cross-hatching and / or shading in the drawings is intended to illustrate the boundaries of the adjacent elements. As such, unless otherwise stipulated, the presence of cross-hatching or shading in no way lessens the scope of any claims. Moreover, in the drawings, the size and relative sizes of elements and regions can be exaggerated for clarity and / or descriptive purposes. When exemplary embodiments can be practiced differently, a particular process sequence can be performed in an order different than described. For example, two here-consecutively described processes can be executed substantially simultaneously or in the opposite order than described. Also, like reference numerals indicate like elements.

[0055] When an element or layer is referred to as being “on” another element or layer, “connected to” or “coupled to” another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer, or one or more intervening elements or layers can be present. In contrast, when an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers present. To that end, the term “connected” can refer to a physical connection, an electrical connection, and / or a fluidic connection, with or without intervening elements. Also, the D1 axis, the D2 axis, and the D3 axis are not limited to three axes of a rectangular coordinate system such as an x-axis, a y-axis, and a z-axis, but can be interpreted in a broader sense. For example, the D1 axis, the D2 axis, and the D3 axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purpose of the present disclosure, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” can be interpreted as any one of X, Y, and Z, or an arbitrary combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ, for example. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0056] Although the terms "first," "second," etc. can be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Therefore, a first element discussed below could be termed a second element without departing from the teachings disclosed.

[0057] Spatially relative terms, such as "under", "below", "lower", "above", "upper", "on", "over", "side" (e.g., as in "sidewall"), and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientations depicted in the figures. For example, if a device in the figures is turned over, elements described as "below" or "under" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. Moreover, the device can be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0058] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, the use of the terms "including", "containing", "comprising", "having" and / or "including" and / or variations thereof in the specification are used broadly and encompass the presence of zero or more of the stated features, integers, steps, operations, elements, components and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. It is also noted that, as used herein, the terms "substantially", "approximately" and other similar terms are used as synonyms for "about", and are intended to have a flexible meaning that is dependent on the context in which the term is used. Thus, for example, "substantially parallel" is intended to mean that the two elements are parallel to each other to within a few degrees, and "approximately parallel" is intended to mean that the two elements are parallel to each other to within a few degrees, unless otherwise indicated.

[0059] Here, various example embodiments are described with reference to cross-sectional and / or exploded illustrations that are schematic illustrations of idealized embodiments and / or intermediate structures. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, examples embodiments disclosed herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. In this manner, the regions illustrated in the figures can not have perfectly sharp angles, but are to include a tolerance resulting from manufacturing processes. In this manner, the regions illustrated in the figures are schematic and are not to be construed as limited to the precise shapes illustrated.

[0060] As is conventional in the art, some of the example embodiments are described in terms of functional blocks, units, and / or modules, and are shown by blocks and diagrams in the drawings. Those skilled in the art will appreciate that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hardwired circuits, memory elements, wired circuits, and the like which perform the various functions described in this disclosure. When the blocks, units, and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled by software (e.g., microcode) to perform various functions discussed herein, and can optionally be driven by firmware and / or software. It is also contemplated that each block, unit, and / or module can be implemented by dedicated hardware as well, or a combination of dedicated hardware to perform some functions and a processor (e.g., one or more programmed microprocessors and associated circuitry) to perform other functions. In addition, each block, unit, and / or module of some of the example embodiments can be physically separated into two or more interacting and discrete blocks, units, and / or modules without departing from the scope of the inventive concepts. Furthermore, blocks, units, and / or modules of some of the example embodiments can be physically combined into more complex blocks, units, and / or modules without departing from the scope of the inventive concepts.

[0061] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be apparent to those skilled in the art that the terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0062] Figure 1 is an assembled perspective view of an electronic device according to example embodiments of inventive concepts. Figure 2 is an exploded perspective view of an electronic device according to example embodiments of inventive concepts. Figure 3 is a block diagram of an electronic device according to example embodiments of inventive concepts.

[0063] Referring to Figure 1 The electronic device EA can be a device that is activated in response to an electrical signal. The electronic device EA can include various embodiments. For example, the electronic device EA can include a tablet, a notebook computer, a computer, a smart television, etc. In the example embodiments described in this disclosure, the electronic device EA is shown as an example with respect to a smart phone.

[0064] The electronic device EA can display the image IM toward the third direction DR3 on the display surface FS parallel to the first direction DR1 and the second direction DR2. The display surface FS on which the image IM is displayed can correspond to a front surface of the electronic device EA, and can correspond to the front surface FS of the window 100. Hereinafter, the same reference numerals will be used for the display surface and the front surface of the electronic device EA and the front surface of the window 100. The image IM can include a still image as well as a dynamic image. In Figure 1 In the middle, a clock and a plurality of icons are shown as examples of the image IM.

[0065] In the present exemplary embodiment, the front surface (or upper surface) and the rear surface (or lower surface) of each member are defined with reference to the direction in which the image IM is displayed. The front surface and the rear surface face each other in the third direction DR3, and the normal direction of each of the front surface and the rear surface can be parallel to the third direction DR3. The separation distance between the front surface and the rear surface in the third direction DR3 can correspond to the thickness of the electronic device EA in the third direction DR3. Further, as a relative concept, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 can be converted to other directions. Hereinafter, the first direction to the third direction of the directions indicated by the respective first direction DR1, the second direction DR2, and the third direction DR3 are denoted by the same reference numerals.

[0066] The electronic device EA according to the exemplary embodiment of the inventive concept can detect a user input TC applied from the outside. The user input TC can be provided in various forms. For example, the user input TC can include an external input (e.g., hovering) applied close to the electronic device EA or at a predetermined distance from the electronic device EA, and a contact through a part of the body such as a user's hand. Further, the user input TC can have various forms such as force, pressure, and light, and is not limited to any one embodiment.

[0067] In addition, the electronic device EA can detect the user input TC applied to the side surface or the rear surface of the electronic device EA according to the structure of the electronic device EA, but is not limited to any one embodiment.

[0068] In the present exemplary embodiment, the electronic device EA can include a predetermined hole area HA. The hole area HA can be an area overlapping a module hole MH passing through the electronic panel 200 described later, and can be an area overlapping the electronic module 400. The electronic device EA can receive an external signal required for the electronic module 400 through the hole area HA, or can provide a signal output from the electronic module 400 to the outside. According to the inventive concept, because the hole area HA is disposed to overlap the transmission area TA, a separate area provided to provide the hole area HA outside the transmission area TA can be omitted. Accordingly, it is possible to reduce the area of the bezel area BZA. A detailed description thereof will be provided later.

[0069] Referring to Figure 2 , the electronic device EA includes a window 100, an electronic panel 200, an electronic module 400, and a housing unit 500. In the exemplary embodiment, the window 100 and the housing unit 500 are combined to form an appearance of the electronic device EA.

[0070] The window 100 can include an insulating panel. For example, the window 100 can be composed of glass, plastic, or a combination thereof.

[0071] As described above, a front surface FS of the window 100 defines a front surface of the electronic device EA. The transmission area TA can be an optically transparent area. For example, the transmission area TA can be an area having a visible light transmittance of about 90% or more.

[0072] The bezel area BZA can be an area having a lower transmittance compared to the transmission area TA. A shape of the bezel area BZA is defined by the transmission area TA. The bezel area BZA is adjacent to the transmission area TA, and can surround the transmission area TA.

[0073] The bezel area BZA can have a predetermined color. The bezel area BZA covers a peripheral area NAA of the electronic panel 200 to prevent the peripheral area NAA from being visually recognized from the outside. On the other hand, this is shown by way of example only, and in other exemplary embodiments of the inventive concept, the bezel area BZA can be omitted in the window 100.

[0074] The electronic panel 200 can display an image IM, and detect a user input TC. The electronic panel 200 includes a front surface including an active area AA and a peripheral area NAA. The active area AA can be an area activated according to an electrical signal.

[0075] In the present exemplary embodiment, the active area AA is an area in which the image IM is displayed, and is also an area in which the user input TC is detected. The transmissive area TA can at least overlap the active area AA. For example, the transmissive area TA overlaps the front surface or at least a portion of the active area AA. Accordingly, the user can view the image IM or provide the user input TC through the transmissive area TA. However, this is illustratively shown, and the area in which the image IM is displayed and the area in which the user input TC is detected in the active area AA can be separated from each other, such that the inventive concept is not limited to any one embodiment.

[0076] The peripheral area NAA can be an area covered by the bezel area BZA. The peripheral area NAA is adjacent to the active area AA. The peripheral area NAA can surround the active area AA. A driving circuit, a driving wire, etc. for driving the active area AA can be disposed in the peripheral area NAA.

[0077] In the peripheral area NAA, various signal lines for providing an electrical signal to the active area AA, a pad (or called a "land") PD, or an electronic element can be disposed. The peripheral area NAA can be covered by the bezel area BZA and is not visible from the outside.

[0078] In the illustrated exemplary embodiment, the electronic panel 200 is assembled in a flat state in which the active area AA and the peripheral area NAA face the window 100. However, the inventive concept is not so limited, and a portion of the peripheral area NAA of the electronic panel 200 can be bent. At this time, a portion of the peripheral area NAA is directed toward the rear surface of the electronic device EA, such that the bezel area BZA at the front surface of the electronic device EA can be reduced. Alternatively, the electronic panel 200 can be assembled in a state in which a portion of the active area AA is also bent. Alternatively, in the electronic panel 200 according to the inventive concept, the peripheral area NAA can be omitted.

[0079] The electronic panel 200 includes a display unit 210 and a sensing unit 220. The display unit 210 can substantially have a configuration for generating the image IM. The image IM generated by the display unit 210 is visually recognized from the outside through the transmissive area TA.

[0080] The sensing unit 220 detects the user input TC applied from the outside. As described above, the sensing unit 220 can detect the user input TC provided to the window 100.

[0081] A predetermined hole area HA can be defined in the electronic panel 200. The hole area HA can have a relatively high transmittance with respect to the same area as compared to the active area AA. The hole area HA is defined in a plan at a position overlapping the electronic module 400 described later.

[0082] At least a portion of the hole region HA can be surrounded by the active region AA. In the present exemplary embodiment, the hole region HA is spaced apart from the peripheral region NAA. It is illustrated that the hole region HA is defined within the active region AA such that all edges thereof are surrounded by the active region AA.

[0083] The electronic panel 200 can include a module hole MH defined in the hole region HA and penetrating the electronic panel 200. The module hole MH can penetrate at least one of the display unit 210 and the sensing unit 220. An edge of the hole region HA can extend along an edge of the module hole MH while being substantially spaced apart from the edge of the module hole MH by a predetermined distance. A shape of the edge of the hole region HA can correspond to the module hole MH.

[0084] The circuit board 300 can be connected to the electronic panel 200. The circuit board 300 can include a flexible board CF and a main board MF. The flexible board CF can include an insulating film and a conductive wiring mounted on the insulating film. The conductive wiring is connected to the pad PD to electrically connect the circuit board 300 and the electronic panel 200.

[0085] In the present exemplary embodiment, the flexible board CF can be assembled in a bent state. Accordingly, the main board MF is disposed on the rear surface of the electronic panel 200 such that it can be stably accommodated in a space provided by the housing unit 500. Meanwhile, in the present exemplary embodiment, the flexible board CF can be omitted, in which case the main board MF can be directly connected to the electronic panel 200.

[0086] The main board MF can include a signal line and an electronic element, which are not illustrated. The electronic element can be connected to the signal line and electrically connected to the electronic panel 200. The electronic element generates various electric signals (e.g., a signal for generating the image IM or a signal for detecting the user input TC), or can process a detected signal. Meanwhile, according to the inventive concept, a plurality of main boards MF can be disposed corresponding to each of the electric signals for generation and processing.

[0087] In the electronic device EA according to the inventive concept, a driving circuit for providing an electric signal to the active region AA can be directly mounted on the electronic panel 200. At this time, the driving circuit can be mounted in the form of a chip, or can be formed together with the pixel PX. At this time, a region of the circuit board 300 can be reduced or omitted. The electronic device EA according to the inventive concept can include various embodiments, and is not limited to any one embodiment.

[0088] The electronic module 400 is disposed below the window 100. The electronic module 400 can be superposed on the module hole MH in a plan view and superposed on the hole region HA. The electronic module 400 can receive an external input transmitted through the hole region HA, or provide an output through the hole region HA.

[0089] In the electronic module 400, a receiving unit for receiving an external input or an output unit for providing an output can be overlapped with the hole area HA in a plane. Some or all of the electronic module 400 can be accommodated in the hole area HA or the module hole MH. According to the inventive concept, the electronic module 400 is disposed to be overlapped with the active area AA, thereby preventing an increase in the bezel area BZA.

[0090] Referring to Figure 3 , the electronic device EA can include the electronic panel 200, the power supply module PM, the first electronic module EM1, and the second electronic module EM2. The electronic panel 200, the power supply module PM, the first electronic module EM1, and the second electronic module EM2 can be electrically connected to each other. Figure 3 The display unit 210 and the sensing unit 220 in the configuration of the electronic panel 200 are illustratively shown in

[0091] The first electronic module EM1 and the second electronic module EM2 include various functional modules for operating the electronic device EA. The first electronic module EM1 can be directly mounted on a mother board electrically connected to the electronic panel 200, or can be mounted on a separate board and electrically connected to the mother board through a connector (not shown) or the like.

[0092] The first electronic module EM1 can include a control module CM, a wireless communication module TM, an image input module IIM, an audio input module AIM, a memory MM, and an external interface IF. Some modules can not be mounted on the mother board, but can be electrically connected to the mother board through a flexible circuit board.

[0093] The control module CM controls the overall operation of the electronic device EA. The control module CM can be a microprocessor. For example, the control module CM activates or deactivates the electronic panel 200. The control module CM can control other modules such as the image input module IIM or the audio input module AIM according to a touch signal received from the electronic panel 200.

[0094] The wireless communication module TM can wirelessly transmit / receive a wireless signal to / from another terminal using a Bluetooth or Wi-Fi line. The wireless communication module TM can transmit / receive a voice signal using a general communication line. The wireless communication module TM includes a transmission unit TM1 for modulating and transmitting a signal to be transmitted and a reception unit TM2 for demodulating a received signal.

[0095] The image input module IIM processes an image signal and converts it into image data that can be displayed on the electronic panel 200. The audio input module AIM receives an external audio signal through a microphone and converts it into electric voice data in a recording mode, a voice recognition mode, or the like.

[0096] The external interface IF serves as an interface for an external charger, a wired / wireless data port, a card slot (e.g., a card slot for a memory card, a SIM / UIM card).

[0097] The second electronic module EM2 can include an audio output module AOM, a light emitting module LM, a light receiving module LRM, and a camera module CMM. The configuration can be directly mounted on a mother board, or mounted on a separate substrate and electrically connected to the electronic panel 200 through a connector (not shown) or electrically connected to the first electronic module EM1.

[0098] The audio output module AOM converts audio data received from the wireless communication module TM or audio data stored in the memory MM, and externally outputs the converted audio data.

[0099] The light emitting module LM generates and outputs light. The light emitting module LM can output infrared rays. For example, the light emitting module LM can include an LED element. For example, the light receiving module LRM can detect infrared rays. The light receiving module LRM can be activated when infrared rays of a predetermined level (horizontal) or higher are detected. The light receiving module LRM can include a CMOS sensor. After infrared light generated by the light emitting module LM is output, the infrared light is reflected by an external object (e.g., a user's finger or face), and the reflected infrared light can be incident on the light receiving module LRM. The camera module CMM captures an image of the outside.

[0100] The electronic module 400 according to an exemplary embodiment of the inventive concept can include at least one of the configuration of the first electronic module EM1 and the second electronic module EM2. For example, the electronic module 400 can include at least one of a camera, a speaker, a light detection sensor, and a heat detection sensor. The electronic module 400 can detect an external object through infrared rays received through the hole area HA, or provide a sound signal such as a voice to the outside through the hole area HA. The electronic module 400 can include a plurality of configurations, and is not limited to any one embodiment.

[0101] Accordingly, the electronic module 400 disposed in overlay with the hole area HA can easily visualize an external object through the hole area HA, and an output signal generated by the electronic module 400 can be easily transmitted to the outside. Although not shown in the drawings, the electronic device EA according to the inventive concept can further include a transparent member disposed between the electronic module 400 and the electronic panel 200. The transparent member can be an optically transparent film so that an external input transmitted through the module hole MH is transmitted to the electronic module 400 through the transparent member. The transparent member can be attached to a rear surface of the electronic panel 200, or can be disposed between the electronic panel 200 and the electronic module 400 without a separate adhesive layer. The electronic device EA according to the inventive concept can have various structures and is not limited to any one embodiment.

[0102] According to the inventive concept, the electronic module 400 can be assembled to be in overlay with the transmissive area TA in a plane. Accordingly, an increase in the bezel area BZA caused by accommodation of the electronic module 400 can be prevented, thereby improving the aesthetic appearance of the electronic device EA.

[0103] Figure 4A is a plan view of a display unit according to an exemplary embodiment of the inventive concept. Figure 4B is Figure 2 is a magnified view of the area XX' shown in Figure 5A is a plan view of a sensing unit according to an exemplary embodiment of the inventive concept. Figure 5B is a magnified view of a sensing unit according to an exemplary embodiment of the inventive concept.

[0104] Figure 4A schematically shows a signal circuit diagram, Figure 4B shows Figure 2 is a magnified view of the area XX' shown in Figures 4A-5B In Figures 4A-5B the inventive concept will be described below with reference to

[0105] As shown in Figure 4A the display unit 210 includes a base substrate BS, a plurality of pixels PX, a plurality of signal lines GL, DL, and PL, and a plurality of display pads DPD. The active area AA and the non-active area NAA can be areas that divide the base substrate BS. The base substrate BS can include an insulating substrate. For example, the base substrate BS can be composed of a glass substrate, a plastic substrate, or a combination thereof.

[0106] The signal lines GL, DL, and PL are connected to the pixel PX to transmit an electric signal to the pixel PX. Among the signal lines, the scan line GL, the data line DL, and the power supply line PL are included in the display unit 210. However, this is shown by way of example. The signal lines GL, DL, and PL can also include at least one of an initialization voltage line and a light emission control line, but the inventive concept is not limited to any one embodiment.

[0107] The pixel PX can be provided in the active area AA. In this exemplary embodiment, a signal circuit diagram of one of the plurality of pixels PX is enlarged and shown by way of example. The pixel PX can include a first thin film transistor TR1, a capacitor CP, a second thin film transistor TR2, and a light emitting element EE. The first thin film transistor TR1 can be a switching element for controlling the on-off of the pixel PX. The first thin film transistor TR1 can transmit or block a data signal transmitted through the data line DL in response to a scan signal transmitted through the scan line GL.

[0108] The capacitor CP is connected to the first thin film transistor TR1 and the power supply line PL. The capacitor CP is charged with an amount of charge corresponding to a difference between the data signal transmitted from the first thin film transistor TR1 and a first power supply signal applied to the power supply line PL.

[0109] The second thin film transistor TR2 is connected to the first thin film transistor TR1, the capacitor CP, and the light emitting element EE. The second thin film transistor TR2 controls a drive current flowing to the light emitting element EE corresponding to the amount of charge stored in the capacitor CP. The on-time of the second thin film transistor TR2 can be determined according to the amount of charge charged in the capacitor CP. The second thin film transistor TR2 provides the light emitting element EE with a first power supply signal transmitted through the power supply line PL during the on-time.

[0110] The light emitting element EE can generate light or control the amount of light according to an electric signal. For example, the light emitting element EE can include an organic light emitting element, a quantum dot light emitting element, an electrophoretic element, or an electrowetting element.

[0111] The light emitting element EE is connected to a power supply terminal VSS and is provided with a power supply signal (hereinafter referred to as a second power supply signal) different from the first power supply signal provided by the power supply line PL. A drive current corresponding to a difference between the electric signal provided from the second thin film transistor TR2 and the second power supply signal flows through the light emitting element EE, and the light emitting element EE generates light corresponding to the drive current.

[0112] Meanwhile, the pixel PX can include electronic components having various configurations and arrangements, and is not limited to any one specific embodiment. For example, the pixel PX can have an equivalent circuit including seven transistors and one capacitor.

[0113] The pixel PX is disposed around the module hole MH and can surround the module hole MH in the plane. In Figure 4B In the drawing, the hole area HA is shown by a dotted line for ease of illustration. The area XX' includes an area in which the module hole MH is defined. Hereinafter, the display unit 210 in the area in which the module hole MH is disposed will be described with reference to Figure 4B

[0114] As described above, the module hole MH can be defined in the effective area AA. Therefore, at least some of the pixels PX can be disposed adjacent to the module hole MH. Some of the pixels PX can surround the module hole MH.

[0115] On the other hand, a predetermined groove pattern GV can be defined in the hole area HA. The groove pattern GV is disposed along the edge of the module hole MH in the plane, and in this exemplary embodiment, it is shown in a circular ring shape that surrounds the module hole MH. However, this is shown by way of example. The groove pattern GV can have a shape different from the module hole MH, or have a polygonal shape, an elliptical shape, or a closed line shape including at least a portion of a curve, or have a shape including a plurality of partially broken patterns, and is not limited to any one particular embodiment.

[0116] The groove pattern GV corresponds to a portion recessed from the front surface of the display unit 210, and cuts off a path of moisture or oxygen that can penetrate into the pixel PX through the module hole MH. This will be described in detail later.

[0117] A plurality of signal lines SL1 and SL2 connected to the pixels PX can be disposed in the hole area HA. The signal lines SL1 and SL2 are connected to the pixels PX through the hole area HA. For ease of description, in Figure 4B In the drawing, the first signal line SL1 and the second signal line SL2 among the plurality of signal lines connected to the pixels PX are exemplarily shown.

[0118] Some of the pixels connected to the first signal line SL1 are arranged on the left side based on the module hole MH, and another portion is arranged on the right side based on the module hole MH. Therefore, even if some of the pixels in the same row connected to the first signal line SL1 are omitted from the module hole MH, they can be turned on / off by substantially the same gate signal.

[0119] The second signal line SL2 extends along the second direction DR2. The second signal line SL2 is connected to the same column of pixels PX arranged along the second direction DR2 among the pixels PX. The second signal line SL2 is illustratively described as corresponding to the data line DL.

[0120] ​Some of the pixels PX connected to the second signal line SL2 are arranged on the upper side based on the module hole MH, and the other part is arranged on the lower side based on the module hole MH. Accordingly, even if some of the pixels PX around the module hole MH are omitted, the pixels PX in the same column connected to the second signal line SL2 can receive a data signal through the same line.

[0121] The electronic panel 200 according to the inventive concept can further include a connection pattern disposed in the hole area HA. At this time, the first signal line SL1 can be disconnected in an area overlapped with the hole area HA. The disconnected portion of the first signal line SL1 can be connected through the connection pattern. Similarly, the second signal line SL2 can be disconnected in an area overlapped with the hole area HA, and a connection pattern connecting the disconnected portion of the second signal line SL2 can be further disposed.

[0122] Referring again to Figure 4A , the power supply pattern VDD is disposed in the peripheral area NAA. In this exemplary embodiment, the power supply pattern VDD is connected to a plurality of power supply lines PL. Accordingly, the display unit 210 includes the power supply pattern VDD, thereby providing the same first power supply signal to the plurality of pixels PX.

[0123] The display pad DPD can include first pads P1 and second pads P2. The plurality of first pads P1 can be connected to the data lines DL, respectively. The second pads P2 can be connected to the power supply pattern VDD and electrically connected to the power supply lines PL. The display unit 210 can provide the pixels PX with an electrical signal provided from the outside through the display pad DPD. The display pad DPD can further include pads for receiving an electrical signal other than the first pads P1 and the second pads P2, and is not limited to any specific embodiment.

[0124] Referring again to Figure 5A , the sensing unit 220 according to the inventive concept can detect a user input TC (see Figure 1 ) and obtain position and intensity information of the user input TC. The sensing unit 220 includes a plurality of first sensing electrodes TE1, a plurality of second sensing electrodes TE2, a plurality of detection lines TL1 and TL2, and a plurality of detection pads T1 and T2.

[0125] The first sensing electrodes TE1 and the second sensing electrodes TE2 are disposed in the active area AA. The sensing unit 220 can obtain information about the user input TC through a change in capacitance between the first sensing electrodes TE1 and the second sensing electrodes TE2.

[0126] The first sensing electrodes TE1 are arranged along the first direction DR1, and each of them extends along the second direction DR2. Each of the first sensing electrodes TE1 can include a first main pattern MP1, a first adjacent pattern IJ1, and a first connection pattern BP1. The first main pattern MP1 and the first connection pattern BP1 can be provided as a plurality of them.

[0127] The first main pattern MP1 is disposed in the active area AA. The first main pattern MP1 can be spaced apart from the module hole MH compared to the first adjacent pattern IJ1.

[0128] At least a portion of the first adjacent pattern IJ1 is disposed in the hole area HA. The first adjacent pattern IJ1 has an area smaller than that of the first main pattern MP1. For example, in a process of processing the module hole MH in the hole area HA overlaid with the electronic module 400 in the electronic panel 200, the first adjacent pattern IJ1 can be formed by removing a portion of the first main pattern MP1.

[0129] The first connection pattern BP1 extends along the second direction DR2. The first connection pattern BP1 is connected to the first main pattern MP1. The first connection pattern BP1 can be disposed between two first main patterns MP1 to connect the two first main patterns MP1. The first connection pattern BP1 can be integrally formed with the first main pattern MP1, but is not limited thereto. Alternatively, the first connection pattern BP1 is disposed between the first main pattern MP1 and the first adjacent pattern IJ1 to connect the first main pattern MP1 and the first adjacent pattern IJ1.

[0130] The second sensing electrodes TE2 are arranged along the second direction DR2, and each of them extends along the first direction DR1. Each of the second sensing electrodes TE2 can include a second main pattern MP2, a second adjacent pattern IJ2, and a second connection pattern BP2. A plurality of the second main patterns MP2 and the second connection patterns BP2 can be provided.

[0131] The second main pattern MP2 is disposed in the active area AA. The second main pattern MP2 can be spaced apart from the module hole MH compared to the second adjacent pattern IJ2. The second main pattern MP2 can be shaped to surround the first main pattern MP1. The second main pattern MP2 can be spaced apart from the first main pattern MP1.

[0132] In the present exemplary embodiment, the separation between the first main pattern MP1 and the second main pattern MP2 can be a separation in a cross section. The first main pattern MP1 and the second main pattern MP2 do not contact each other and can transmit and receive independent electrical signals.

[0133] At least a portion of the second proximity pattern IJ2 is disposed in the hole area HA. The second proximity pattern IJ2 has an area smaller than that of the second main pattern MP2. For example, in a process of processing the module hole MH in the hole area HA overlaid with the electronic module 400 in the electronic panel 200, the second proximity pattern IJ2 can be formed by removing a portion of the second main pattern MP2.

[0134] The second connection pattern BP2 extends along the first direction DR1. The second connection pattern BP2 is connected to the second main pattern MP2. The second connection pattern BP2 can be disposed between two second main patterns MP2 to connect the two second main patterns MP2. Optionally, the second connection pattern BP2 is disposed between the second main pattern MP2 and the second proximity pattern IJ2 to connect the second main pattern MP2 and the second proximity pattern IJ2.

[0135] Figure 5B A pattern for detecting one unit of a user input TC (see Figure 1 ) is exemplarily shown among the patterns included in the sensing electrodes TE1 and TE2.

[0136] According to the inventive concept, the first main pattern MP1 can include a center pattern MC and a branch pattern MB.

[0137] The first center pattern MC can extend in the second direction DR2. The branch pattern MB can extend from the center pattern MC in the fourth direction DR4 and the fifth direction DR5.

[0138] The second main pattern MP2 can surround the center pattern MC and a portion of the branch pattern MB. However, the second main pattern MP2 can be insulated from the first main pattern MP1.

[0139] The second connection pattern BP2 can be overlaid with a portion of the center pattern MC. Accordingly, the second connection pattern BP2 can be disposed on a different layer from the center pattern MC to avoid electrical interference with the center pattern MC, and the second connection pattern BP2 can be connected through a contact hole defined in an insulating layer disposed between the second connection pattern BP2 and the second main pattern MP2.

[0140] The sensing unit 220 according to the inventive concept can further include a dummy pattern DM disposed between the sensing electrodes TE1 and TE2 spaced apart from each other. The dummy pattern DM can have a floating pattern structure electrically insulated from the sensing electrodes TE1 and TE2. The dummy pattern DM can be disposed between the second main pattern MP2 and the center pattern MC and between the second main pattern MP2 and the branch pattern MB. However, the inventive concept is not limited thereto. The dummy pattern DM can be disposed in at least one of an inner side of the first main pattern MP1 and an inner side of the second main pattern MP2. The shape and number of the dummy pattern DM are not limited.

[0141] Referring again to Figure 5A , the detection lines TL1 and TL2 are disposed in the peripheral area NAA. The detection lines TL1 and TL2 can include first detection lines TL1 and second detection lines TL2.

[0142] The first detection lines TL1 are connected to the first sensing electrodes TE1, respectively. In the present embodiment, the first detection lines TL1 are connected to lower ends among both ends of the first sensing electrodes TE1, respectively. However, the inventive concept is not limited thereto, and the first detection lines TL1 can be connected to both ends of the first sensing electrodes TE1.

[0143] The second detection lines TL2 are connected to one of one end and the other end of the second sensing electrodes TE2. In the present exemplary embodiment, some of the second detection lines TL2 can be connected to left ends among both ends of the second sensing electrodes TE2, and the remaining second detection lines TL2 can be connected to right ends among both ends of the second sensing electrodes TE2.

[0144] The detection pads T1 and T2 are disposed in the peripheral area NAA. The detection pads T1 and T2 can include first detection pads T1 and second detection pads T2. The first detection pads T1 are connected to the first detection lines TL1, respectively, to supply external signals to the first sensing electrodes TE1. The second detection pads T2 are connected to the second detection lines TL2, respectively, to supply external signals to the second sensing electrodes TE2.

[0145] The electronic device EA according to the inventive concept can further include a crack detection circuit HCC. The crack detection circuit HCC receives electrical signals independently of the first sensing electrodes TE1 and the second sensing electrodes TE2. The crack detection circuit HCC can include a crack detection pattern HCP, a crack detection line HCL, and a connection line HCB connected to each other.

[0146] The crack detection pattern HCP can be disposed in the hole area HA. In the present embodiment, the crack detection pattern HCP can be shaped to surround an edge of the module hole MH. The crack detection pattern HCP includes a conductive material.

[0147] The crack detection line HCL is disposed in the peripheral area NAA. In the present exemplary embodiment, the crack detection line HCL can be disposed outside of the first detection lines TL1 and the second detection lines TL2.

[0148] The crack detection line HCL is electrically connected to the crack detection pattern HCP. The crack detection line HCL can include first and second lines HCL1 and HCL2 spaced apart from each other.

[0149] One end of the first line HCL1 is connected to the first pad H11, and one end of the second line HCL2 is connected to the second pad H12. The first pad H11 and the second pad H12 can be disposed at the left side with respect to the area in which the display pad DPD is disposed.

[0150] The other end of the first line HCL1 is connected to the third pad H21, and the other end of the second line HCL2 is connected to the fourth pad H22. The third pad H21 and the fourth pad H22 can be disposed on the right side with respect to the area in which the display pad DPD is disposed. The first pad H11 and the second pad H112 can be spaced apart from the third pad H21 and the fourth pad H22, and the display pad DPD is located between the first pad H11 and the second pad H112 and the third pad H21 and the fourth pad H22.

[0151] According to the inventive concept, it is possible to determine whether a damage such as a crack occurs in the hole area HA or the peripheral area NAA through the crack detection circuit HCC. In the crack detection circuit HCC, the first pad H11 and the third pad H21 can be input terminals, and the second pad H12 and the fourth pad H22 can be output terminals.

[0152] An electrical signal received through the first pad H11 can pass through the crack detection pattern HCP through the first line HCL1. Thereafter, the electrical signal output from the crack detection pattern HCP is output to the second pad H12 through the second line HCL2.

[0153] Similarly, an electrical signal received through the third pad H21 can pass through the crack detection pattern HCP through the first line HCL1. Thereafter, the electrical signal output from the crack detection pattern HCP is output to the fourth pad H22 through the second line HCL2.

[0154] For example, when a signal detected by each of the second pad H12 and the fourth pad H22 is detected as a defect such as a level lower than a reference signal or a zero level value, it is highly likely that both the first line HCL1 and the second line HCL2 are damaged or the crack detection pattern HCP is damaged. Accordingly, it is possible to determine whether a crack occurs in the hole area HA.

[0155] Alternatively, when a signal detected by only one of the second pad H12 and the fourth pad H22 is not detected as a defect, it is likely that the crack detection line HCL is damaged. Thereby, it is possible to determine whether a crack occurs in the peripheral area NAA. However, this is only an example, and the first pad H11 and the third pad H21 can be output terminals, and the second pad H12 and the fourth pad H22 can function as input terminals. The connection line HCB includes a first connection line HCB1 and a second connection line HCB2. The first connection line HCB1 connects the first line HCL1 to one end of the crack detection pattern HCP. The second connection line HCB2 connects the second line HCL2 to the other end of the crack detection pattern HCP.

[0156] In the inventive concept, the connection lines HCB provided in the peripheral area NAA and the connection lines HCB provided in the active area AA can have different shapes among the connection lines HCB. For example, the connection lines HCB provided in the peripheral area NAA can have the same shape as the crack detection line HCL, and the connection lines HCB provided in the active area AA can have the same shape as the dummy pattern DM (refer to FIG. 2) floating from the sensing electrodes TE1 and TE2. Figure 5B ) the same shape as the dummy pattern DM (refer to FIG. 2) floating from the sensing electrodes TE1 and TE2.

[0157] According to the inventive concept, by further including the crack detection circuit HCC, it is possible to easily detect whether a failure occurs in the sensing unit 220 (particularly, the hole area HA). Accordingly, the reliability of the electronic device is improved, and it is possible to determine whether the electronic device is defective without a separate test circuit or test device, thereby increasing process efficiency.

[0158] Figure 6 is a cross-sectional view of a portion of an electronic panel according to an exemplary embodiment of the inventive concept. Also, the same components as those described with reference to Figures 1-5B the same reference numerals are assigned to the same components, and a redundant description will be omitted.

[0159] As shown in Figure 6 , in the electronic panel 200, the display unit 210 and the sensing unit 220 can be stacked along the third direction DR3. The display unit 210 includes a base substrate BS, pixels PX, a plurality of insulating layers 10, 20, 30, 40, and 50, and a sealing layer 60.

[0160] The base substrate BS can be an insulating substrate. For example, the base substrate BS can include a plastic substrate or a glass substrate.

[0161] In this exemplary embodiment, among the configuration of the equivalent circuit diagram of the pixel PX shown in Figure 4A , a thin film transistor TR corresponding to the second thin film transistor TR2 and a light emitting element EE are exemplarily shown.

[0162] The insulating layers 10, 20, 30, 40, and 50 can include a first insulating layer 10, a second insulating layer 20, a third insulating layer 30, a fourth insulating layer 40, and a fifth insulating layer 50, which are sequentially stacked. Meanwhile, each of the first insulating layer 10, the second insulating layer 20, the third insulating layer 30, and the fourth insulating layer 40 can include an organic material and / or an inorganic material, and can have a single layer structure or a laminated structure.

[0163] The first insulating layer 10 is disposed on the base substrate BS to cover the front surface of the base substrate BS. The first insulating layer 10 can include a barrier layer 11 and / or a buffer layer 12. Accordingly, the first insulating layer 10 can prevent oxygen or moisture flowing through the base substrate BS from permeating into the pixel PX, or reduce the surface energy of the base substrate BS so that the pixel PX is stably formed on the base substrate BS. However, this is merely an example. In the electronic panel 200 according to the inventive concept, at least one of the barrier layer 11 and the buffer layer 12 can be omitted, a plurality of layers can have a stacked structure and are not limited to any one specific embodiment.

[0164] The thin film transistor TR is disposed on the first insulating layer 10. The thin film transistor TR includes a semiconductor pattern SP, a control electrode CE, an input electrode IE, and an output electrode OE. The semiconductor pattern SP is disposed on the first insulating layer 10. The semiconductor pattern SP can include a semiconductor material. The control electrode CE is spaced apart from the semiconductor pattern SP with the second insulating layer 20 therebetween. The control electrode CE can be connected to one electrode of the first thin film transistor TR1 (see Figure 4A ) and one electrode of the capacitor CP (see Figure 4A ).

[0165] The input electrode IE and the output electrode OE are disposed on the third insulating layer 30 and spaced apart from each other in a plan view. The input electrode IE and the output electrode OE penetrate the second insulating layer 20 and the third insulating layer 30 and are connected to one side and the other side of the semiconductor pattern SP, respectively.

[0166] The display unit 210 according to the inventive concept can further include an upper electrode UE. In the present exemplary embodiment, the third insulating layer 30 includes a lower layer 31 and an upper layer 32. However, this is merely an example, and the third insulating layer 30 according to the inventive concept can have a single layer structure and is not limited to any one specific embodiment.

[0167] The upper electrode UE is disposed between the lower layer 31 and the upper layer 32. The upper electrode UE can be superposed with the control electrode CE in a plan view. In the present exemplary embodiment, the upper electrode UE can receive the same electrical signal as the control electrode CE, or receive a different electrical signal from the control electrode CE to serve as one electrode of the capacitor. On the other hand, this is illustratively shown, and the upper electrode UE can be omitted and is not limited to any one specific embodiment in the electronic panel 200 according to the inventive concept.

[0168] The fourth insulating layer 40 is provided on the third insulating layer 30 to cover the input electrode IE and the output electrode OE. On the other hand, in the thin film transistor TR, the semiconductor pattern SP can be provided on the control electrode CE. Alternatively, the semiconductor pattern SP can be provided on the input electrode IE and the output electrode OE. Alternatively, the input electrode IE and the output electrode OE can be provided on the same layer as the semiconductor pattern SP and directly connected to the semiconductor pattern SP. The thin film transistor TR according to the inventive concept can be formed in various structures and is not limited to any one specific embodiment.

[0169] The light emitting element EE is provided on the fourth insulating layer 40. The light emitting element EE includes the first electrode E1, the light emitting layer EL, and the second electrode E2. A plurality of the first electrode E1 and the light emitting layer EL can be provided, and the second electrode E2 can be provided on the entire surface of the active area AA.

[0170] The first electrode E1 can be connected to the thin film transistor TR through the fourth insulating layer 40. Further, although not shown in the drawings, the electronic panel 200 can further include a separate connection electrode provided between the first electrode E1 and the thin film transistor TR, in which case the first electrode E1 can be electrically connected to the thin film transistor TR through the connection electrode.

[0171] The fifth insulating layer 50 is provided on the fourth insulating layer 40. The fifth insulating layer 50 can include an organic material and / or an inorganic material and can have a single layer structure or a laminated structure. An opening portion can be defined in the fifth insulating layer 50. The opening portion exposes at least a portion of the first electrode E1. The fifth insulating layer 50 can be a pixel definition layer.

[0172] The light emitting layer EL is provided between the first electrode E1 and the second electrode E2. The light emitting layer EL can include at least one light emitting layer. For example, the light emitting layer EL can include at least one of materials that emit red light, green light, and blue light, and can include a fluorescent material or a phosphorescent material. The light emitting layer EL can include an organic light emitting material or an inorganic light emitting material. The light emitting layer EL can emit light in response to a potential difference between the first electrode E1 and the second electrode E2.

[0173] In the present exemplary embodiment, the light emitting layer EL is shown as a layer having an overall shape superimposed with a plurality of opening portions. However, this is merely an example. The light emitting layer EL can be provided as a plurality of patterns corresponding to each of the opening portions, and is not limited to any one specific embodiment.

[0174] The light emitting layer EL can include a charge control layer in addition to the light emitting layer. The charge control layer controls the movement of charges to improve the light emitting efficiency and the lifespan of the light emitting element EE. At this time, the light emitting layer EL can include at least one of a hole transport material, a hole injection material, an electron transport material, and an electron injection material.

[0175] The second electrode E2 is disposed on the light emitting layer EL. The second electrode E2 can be opposite to the first electrode E1. The second electrode E2 can have an overall shape extending from the active area AA to the non-active area NAA. The second electrode E2 can be commonly disposed for a plurality of pixels. The light emitting element EE disposed in each pixel receives a common power voltage (hereinafter referred to as a second power voltage) through the second electrode E2.

[0176] The second electrode E2 can include a transparent conductive material or a semi-transparent conductive material. Accordingly, light generated in the light emitting layer EL can be easily emitted toward the third direction DR3 through the second electrode E2. However, this is merely an example. According to design, the light emitting element EE according to the inventive concept can be driven in a back surface light emitting system in which the first electrode E1 includes a transparent or semi-transparent material, or can be driven in a double-sided light emitting system in which light is emitted toward both the front surface and the back surface, but is not limited to any one specific embodiment.

[0177] The sealing layer 60 is disposed on the light emitting element EE to seal the light emitting element EE. Meanwhile, although not shown in the drawings, a cover layer covering the second electrode E2 can be further disposed between the second electrode E2 and the sealing layer 60.

[0178] The sealing layer 60 can include a first inorganic layer 61, an organic layer 62, and a second inorganic layer 63 stacked in sequence along the third direction DR3. However, the inventive concept is not limited thereto, and the sealing layer 60 can further include a plurality of inorganic layers and organic layers.

[0179] The first inorganic layer 61 can cover the second electrode E2. The first inorganic layer 61 can prevent external moisture or oxygen from permeating into the light emitting element EE. For example, the first inorganic layer 61 can include silicon nitride, silicon oxide, or a combination thereof. The first inorganic layer 61 can be formed by a chemical vapor deposition process.

[0180] The organic layer 62 can be disposed on and contact the first inorganic layer 61. The organic layer 62 can provide a flat surface on the first inorganic layer 61. Curves formed on the upper surface of the first inorganic layer 61 and particles present on the first inorganic layer 61 are covered by the organic layer 62, so that this can prevent the surface state of the upper surface of the first inorganic layer 61 from affecting the structure formed on the organic layer 62. In addition, the organic layer 62 can alleviate stress between contact layers. The organic layer 62 can include an organic material, and can be formed by a solution process such as a spin coating process, a slot coating process, or an inkjet process.

[0181] A second inorganic layer 63 is provided on the organic layer 62 to cover the organic layer 62. The second inorganic layer 63 can be stably formed on a relatively flat surface compared to being provided on the first inorganic layer 61. The second inorganic layer 63 encloses moisture or the like emitted from the organic layer 62 to prevent it from being introduced into the outside. The second inorganic layer 63 can include silicon nitride, silicon oxide, or a combination thereof. The second inorganic layer 63 can be formed by a chemical vapor deposition process.

[0182] According to the present exemplary embodiment, the hole region HA can include the module hole MH and a wiring region LA. The wiring region LA can be a region between the module hole MH and the active region AA. The wiring region LA can surround the module hole MH in a plan view. The light emitting element EE or the thin film transistor TR provided in the active region AA can be omitted in the wiring region LA. Accordingly, the transmittance can be relatively higher than that of the active region AA.

[0183] In the wiring region LA, the groove patterns GV1, GV2, and GV3, the dam portion DMP, and the signal lines SL1 and SL2 of the display unit 210 can be provided.

[0184] The groove patterns GV1, GV2, and GV3 can be defined to be spaced apart from each other. The groove patterns GV1, GV2, and GV3 can include a first groove pattern GV1, a second groove pattern GV2, and a third groove pattern GV3 sequentially formed in a direction from the active region AA to the module hole MH. Each of the first groove pattern GV1, the second groove pattern GV2, and the third groove pattern GV3 has a closed line shape surrounding the module hole MH, or has a broken line shape surrounding at least a portion of an edge of the module hole MH, and is not limited to any one embodiment.

[0185] Each of the groove patterns GV1, GV2, and GV3 can be defined by recessing a portion of the base substrate BS along a third direction DR3, which is a thickness direction of the base substrate BS. That is, each of the groove patterns GV1, GV2, and GV3 can be formed by removing at least a portion of the base substrate BS. The deposition pattern ELP can be provided in each of the groove patterns GV1, GV2, and GV3, and can be covered by at least one of the first inorganic layer 61 and the second inorganic layer 63. The deposition pattern ELP can include the same material as a material included in the light emitting layer EL.

[0186] The electronic panel 200 according to the inventive concept further includes the groove patterns GV1, GV2, and GV3, thereby blocking continuity between the deposition pattern ELP and the light emitting element EE. Thereby, damage to the element provided in the active region AA can be prevented by cutting off a penetration path of external moisture or oxygen.

[0187] Further, the deposition pattern ELP provided in each of the groove patterns GV1, GV2, and GV3 is covered by the first inorganic layer 61 or the second inorganic layer 63, so that it is possible to prevent the deposition pattern ELP from being transferred to other elements and affecting them during the manufacturing process of the electronic panel 200. Thus, it is possible to improve the process reliability of the electronic panel 200. On the other hand, this is illustratively shown, and in the electronic panel 200 according to the inventive concept, the groove patterns GV1, GV2, and GV3 can be provided or omitted individually, and are not limited to any one specific embodiment.

[0188] The dam portion DMP is provided in the wiring area LA to divide the formation area of the organic layer 62 into predetermined areas and prevent further extension. A plurality of dam portions DMP can be provided and disposed between the groove patterns GV1, GV2, and GV3. The dam portion DMP is shown as including a laminate structure of the first layer P11, the second layer P12, and the third layer P13. However, this is illustratively shown, and the dam portion DMP can have a single layer structure, and is not limited to any one specific embodiment.

[0189] The electronic panel 200 according to the inventive concept can further include a planarization layer YOC. The planarization layer YOC includes an organic substance. The planarization layer YOC is provided in the hole area HA. The planarization layer YOC covers the uneven surface defined by the dam portion DMP or the groove patterns GV1, GV2, and GV3 to provide a flat surface on the upper portion. Thus, it is possible to stably provide a flat surface even in the area in which the organic layer 62 is not provided in the hole area HA.

[0190] The sensing unit 220 according to the inventive concept can be defined by a plurality of conductive layers and a plurality of detection insulating layers 71, 72, and 73.

[0191] The first detection insulating layer 71 covers the planarization layer YOC. In the present embodiment, the first detection insulating layer 71 can cover the upper surface of the planarization layer YOC in the hole area HA and the upper surface of the second inorganic layer 63 in the active area AA.

[0192] The first conductive layer is provided on the first detection insulating layer 71. In the inventive concept, the first conductive layer can include the second connection pattern BP2 described above with reference to Figure 5B In addition, the anti-static pattern CSP and the additional hole pattern TC2 to be described later can be included.

[0193] The second detection insulating layer 72 is provided on the first detection insulating layer 71 to cover the first conductive layer.

[0194] The second conductive layer is provided on the second detection insulating layer 72. In the inventive concept, the second conductive layer can include the third connection pattern BP3 described above with reference to Figure 5AThe first sensing electrode TE1, the second sensing electrode TE2 except for the second connection pattern BP2, and the dummy pattern DM are described. In addition, the second conductive layer can include at least a portion of the crack detection pattern HCP and a remaining portion of the hole pattern TL1-H.

[0195] The third detection insulating layer 73 is disposed on the second detection insulating layer 72 to cover the second conductive layer. The third detection insulating layer 73 can have an overall shape overlapping the hole area HA and the active area AA.

[0196] Each of the first detection insulating layer 71, the second detection insulating layer 72, and the third detection insulating layer 73 can include an inorganic layer and / or an organic layer. In this exemplary embodiment, each of the first detection insulating layer 71, the second detection insulating layer 72, and the third detection insulating layer 73 is illustrated as a single layer, but can have a laminate structure including a plurality of layers in contact with each other, and is not limited to any one specific embodiment.

[0197] The patterns included in the second conductive layer can be formed at the same time through one mask, thereby simplifying the process and reducing the process cost. However, this is only an example, a portion of the crack detection pattern HCP can be disposed in the first conductive layer, and is not limited to any one specific embodiment.

[0198] Figure 7A is a plan view of an electronic device according to an exemplary embodiment of the inventive concept. Figure 7B is Figure 7A is an enlarged view of the area YY' illustrated in Figure 7C is a cross-sectional view of a portion of an electronic panel according to an exemplary embodiment of the inventive concept. The same components as described with reference to Figures 1-6 the same components are given the same reference numerals, and a redundant description will be omitted.

[0199] With reference to Figures 7A-7C , the electronic device EA-A according to an exemplary embodiment of the inventive concept can omit the module hole MH (see Figure 2 ) that physically penetrates the electronic panel 200-A. The hole area HA can include a module area MA and a wiring area LA.

[0200] The wiring area LA can be defined along an edge of the module area MA. The wiring area LA can surround the edge of the module area MA. The hole area HA can correspond to an area including the module area MA and the wiring area LA.

[0201] The module area MA can be a space in which an external signal input to the electronic module 400 or a signal output from the electronic module 400 is transmitted.

[0202] In the active area AA, the module area MA can be an area having a relatively high transmittance compared to an area in which the pixels PX are disposed. The electronic module 400 can detect an external object through the module area MA, or can easily provide an optical signal of an output to the outside.

[0203] In this exemplary embodiment, the module area MA can have a shape corresponding to the module hole MH described above. For example, the module area MA can have any shape of a circle, an ellipse, a polygon, or a polygon including curved sides on at least one side on a plane, and is not limited to any one specific embodiment.

[0204] At least one non-light emitting pixel NPX can be disposed in the module area MA according to an exemplary embodiment. For ease of explanation, Figure 7B Two non-light emitting pixels NPX and two pixels PX are shown. The non-light emitting pixel NPX can have a higher transmittance than the pixel PX. The non-light emitting pixel NPX can be formed by removing at least a portion of the configuration of the pixel PX.

[0205] For example, the non-light emitting pixel NPX can be formed by removing the thin film transistor TR from the pixel PX. Alternatively, the non-light emitting pixel NPX can be formed by removing the light emitting layer EL in the configuration of the pixel PX, or by removing a partial configuration of the thin film transistor TR, or by removing only the first electrode E1. Alternatively, the non-light emitting pixel NPX can be formed by removing all components of the pixel PX. At this time, the non-light emitting pixel NPX can be defined as a portion in which a plurality of insulating layers are stacked.

[0206] The non-light emitting pixel NPX according to an embodiment of the inventive concept can include various embodiments as long as it has a higher transmittance than the transmittance of the pixel PX. Furthermore, if the module area MA can have a relatively high transmittance with respect to its surroundings, it can be composed of a plurality of pixels PX and one non-light emitting pixel NPX, or it can be filled only with a plurality of non-light emitting pixels NPX, but is not limited to any one embodiment.

[0207] For example, as shown in FIG. 10A, Figure 7B The module area MA can be formed by removing the thin film transistor TR and the first electrode E1 of the pixel PX. In the module area MA, the insulating layer can be formed continuously in extension.

[0208] The base substrate BS, the first to fifth insulating layers 10, 20, 30, 40, and 50, the light emitting layer EL, the sealing layer 60, and the detection insulating layers 71, 72, and 73 can be superposed with the module area MA and unbroken in the hole area HA. The base substrate BS, the first to fifth insulating layers 10, 20, 30, 40, and 50, the light emitting layer EL, the sealing layer 60, and the detection insulating layers 71, 72, and 73 can be completely formed in the active area AA.

[0209] In the present exemplary embodiment, the second electrode E2 can be formed to be superposed with the module area MA. When the second electrode E2 is formed of a transmissive or semi-transmissive electrode, even if the second electrode E2 is superposed with the module area MA, the module area MA having a relatively high transmittance can be formed compared to the area in which the pixels PX are disposed.

[0210] The crack detection pattern HCP can be disposed in the wiring area LA and can surround the edge of the module area MA in a plan view. The crack detection pattern HCP is disposed along the edge of the module area MA, thereby preventing the transmittance of the module area MA from being lowered.

[0211] However, the inventive concept is not limited thereto, and the second electrode E2 can be removed from the module area MA.

[0212] According to the inventive concept, signal input / output between an electronic module (for example, an electronic module using infrared rays) that does not require high transmittance and an external signal passing through the module area MA (formed by removing an opaque structure) can be easily performed. Even if the electronic module 400 is disposed to be superposed with the electronic panel 200-A, signal input / output with the outside can be stably performed. In addition, the upper portion of the electronic module 400 with respect to the electronic panel 200-A is covered by the electronic panel 200-A, so that the electronic module 400 can be stably protected from external impact or inflow of contaminants.

[0213] Figure 8 FIG. 7 is a magnified view of a sensing unit adjacent to a hole area according to an exemplary embodiment of the inventive concept.

[0214] According to the inventive concept, the sensing unit 220 can include a hole pattern TL1-H connecting the first adjacent patterns IJ1-U1, IJ1-U2, IJ1-U3, IJ1-B1, IJ1-B2, and IJ1-B3, and a wiring pattern TL2-H connecting the second adjacent patterns IJ2-L and IJ2-R.

[0215] The hole pattern TL1-H can be spaced apart from the module hole MH, and the crack detection pattern HCP is interposed therebetween. During formation of the module hole MH, the hole pattern TL1-H can connect the first main pattern MP1 (see FIG. 6).Figure 5B ) first adjacent patterns IJ1-U1, IJ1-U2, IJ1-U3, IJ1-B1, IJ1-B2, and IJ1-B3 that are partially removed. According to the present exemplary embodiment, the hole pattern TL1-H can have a shape that surrounds at least a portion of the module hole MH. The first adjacent patterns IJ1-U1, IJ1-U2, IJ1-U3, IJ1-B1, IJ1-B2, and IJ1-B3 can have different areas.

[0216] The wiring pattern TL2-H can be provided in the peripheral area NAA. The wiring pattern TL2-H can be spaced apart from the crack detection line HCL. During formation of the module hole MH, the wiring pattern TL2-H can connect the second main pattern MP2 (see Figure 5B ) second adjacent patterns IJ2-L and IJ2-R that are partially removed.

[0217] According to the inventive concept, because the wiring pattern TL2-H is provided in the peripheral area NAA and the hole pattern TL1-H is provided in the hole area HA surrounded by the active area AA, electrical interference between the adjacent patterns that receive different signals can be minimized. For example, when the wiring pattern TL2-H that connects the second adjacent patterns IJ2-L and IJ2-R is provided in the hole area HA, parasitic capacitance can occur between the wiring pattern TL2-H and the first adjacent patterns IJ1-U1, IJ1-U2, IJ1-U3, IJ1-B1, IJ1-B2, and IJ1-B3.

[0218] According to the inventive concept, because the hole pattern for connecting the adjacent patterns included in each of the first and second sensing electrodes TE1 and TE2 is provided in a different area from the wiring pattern TL2-H, parasitic capacitance generated between the wiring pattern TL2-H and the first adjacent patterns IJ1-U1, IJ1-U2, IJ1-U3, IJ1-B1, IJ1-B2, and IJ1-B3 and parasitic capacitance generated between the hole pattern TL1-H and the second adjacent patterns IJ2-L and IJ2-R can be minimized.

[0219] According to the inventive concept, the sensing unit 220 can further include a wiring dummy pattern DML provided in the peripheral area NAA. The wiring dummy pattern DML can be provided between the crack detection line HCL and the wiring pattern TL2-H. The wiring dummy pattern DML can be included in the second conductive layer of the inventive concept in addition to the wiring pattern TL2-H. The shape of the wiring dummy pattern DML can be similar to that of the crack detection line HCL. If the wiring dummy pattern DML is a floating structure, the number and shape of the wiring dummy pattern DML are not limited thereto.

[0220] According to the present exemplary embodiment, a portion of the connection line HCB extending from the crack detection line HCL can pass between the dummy wiring patterns DML. For example, a first connection line HCB1 extending from a first line HCL1 and a second connection line HCB2 extending from a second line HCL2 can pass between the dummy wiring patterns DML and can be connected to the crack detection pattern HCP.

[0221] Figure 9 is a plan view showing a crack detection circuit according to an exemplary embodiment of the inventive concept.

[0222] Referring to Figure 9 , the crack detection circuit HCC according to the present exemplary embodiment can include a crack detection pattern HCP, a crack detection line HCL, and a connection line HCB connected to each other.

[0223] The crack detection line HCL includes a first line HCL1 and a second line HCL2. The first line HCL1 can include a crack connection pattern HCL-B.

[0224] The first line HCL1 and the second line HCL2 can be disposed on a second detection insulating layer 72 (see Figure 6 ). The crack connection pattern HCL-B can be disposed on a first detection insulating layer 71 (see Figure 6 ).

[0225] Accordingly, a point at which the first line HCL1 and the second line HCL2 overlap can be connected through the crack connection pattern HCL-B. For example, a point at which the second line HCL2 and the first line HCL1 overlap is disconnected. The crack connection pattern HCL-B can be connected to one end and the other end of the disconnected first line HCL1 through a crack contact hole H-CH defined in the second detection insulating layer 72.

[0226] The connection line HCB can include a first connection line HCB1 extending from the first line HCL1 and a second connection line HCB2 extending from the second line HCL2.

[0227] A portion of the connection line HCB can be formed as a part of the dummy pattern DM. For example, a first dummy line H-DM1 disposed between the first connection line HCB1 and the crack detection pattern HCP can constitute a portion of the first connection line HCB1. A second dummy line H-DM2 disposed between the second connection line HCB2 and the crack detection pattern HCP can constitute a portion of the second connection line HCB2.

[0228] The crack detection pattern HCP can include a first extension portion EX1, a second extension portion EX2, a third extension portion EX3, a first connection portion CP1, a second connection portion CP2, a first protrusion portion ST1, and a second protrusion portion ST2. The first extension portion EX1, the second extension portion EX2, the third extension portion EX3, the first connection portion CP1, the second connection portion CP2, the first protrusion portion ST1, and the second protrusion portion ST2 can be connected to each other to form an overall shape.

[0229] The first extension portion EX1 and the second extension portion EX2 face each other with respect to the virtual line. The first extension portion EX1 and the second extension portion EX2 are disposed in the hole area HA and extend along an edge of the hole area HA. The first extension portion EX1 to the third extension portion EX3 can be substantially disposed in the wiring area LA.

[0230] The first extension portion EX1 is disposed at a left side of the virtual line, and the second extension portion EX2 is disposed at a right side of the virtual line. The first extension portion EX1 can have a semicircular shape that protrudes to the left side, and the second extension portion EX2 can have a semicircular shape that protrudes to the right side. The first extension portion EX1 and the second extension portion EX2 can be symmetrical with respect to the virtual line.

[0231] The third extension portion EX3 can be spaced apart from the first extension portion EX1 and the second extension portion EX2. The third extension portion EX3 can be disposed closer to the module hole MH than the first extension portion EX1 and the second extension portion EX2. The third extension portion EX3 is disposed in the hole area HA and extends along an edge of the hole area HA. The first connection portion CP1 connects one end of the first extension portion EX1 and one end of the third extension portion EX3.

[0232] The second connection portion CP2 is spaced apart from the first connection portion CP1 to connect one end of the second extension portion EX2 and the other end of the third extension portion EX3.

[0233] The first connection portion CP1 and the second connection portion CP2 can face each other with the virtual line therebetween. Each of the first connection portion CP1 and the second connection portion CP2 can extend in a direction parallel to an extension direction of the virtual line. In the present embodiment, each of the first connection portion CP1 and the second connection portion CP2 can be parallel to the virtual line. The first connection portion CP1 and the second connection portion CP2 can be symmetrical with respect to the virtual line.

[0234] The first protruding portion ST1 is connected to the other end of the first extension portion EX1 and the first dummy line H-DM1. The second protruding portion ST2 is connected to the other end of the second extension portion EX2 and the second dummy line H-DM2. The first protruding portion ST1 and the second protruding portion ST2 can be symmetrical with respect to the virtual line.

[0235] However, this is only an example, and at least one of the protruding portions ST1 and ST2 can be omitted in the crack detection circuit HCC according to the inventive concept. In this case, the first connection line HCB1 or the second connection line HCB2 can be directly connected to the first extension portion EX1 or the second extension portion EX2, but is not limited to any one specific embodiment.

[0236] Figure 10A is Figure 8 An enlarged plan view of the region TT' shown in FIG. Figure 10B is a cross-sectional view taken along the line I-I' shown in FIG. Figure 10A ). Figure 6 ).

[0237] The sensing electrodes TE1 and TE2 (see Figure 5A ) according to the inventive concept can include mesh lines MSL1 and MSL2 extending in the fourth direction DR4 and the fifth direction DR5. The mesh lines MSL1 and MSL2 define mesh opening portions M-OP. Components described below as included in the sensing electrodes TE1 and TE2 are described as structures including the mesh lines MSL1 and MSL2. Each of the light emitting layers EL can overlap with a corresponding mesh opening portion M-OP.

[0238] In the present exemplary embodiment, the first adjacent patterns IJ1-U1 and IJ1-U3, the second adjacent pattern IJ2-L, the first dummy line H-DM1, the hole pattern TL1-H, and the crack detection pattern HCP can be included in the second conductive layer. In addition, the connection pattern FCNP1 connecting the additional hole pattern TC2, the anti-static pattern CSP, and the spaced hole pattern TL1-H can be included in the first conductive layer.

[0239] Referring to Figure 10A and Figure 10B , the hole pattern TL1-H according to the inventive concept can be connected to the first adjacent patterns IJ1-U1 and IJ1-U3. The hole pattern TL1-H can be spaced apart from the second adjacent pattern IJ2-L and the first dummy line H-DM1.

[0240] Because the hole pattern TL1-H and the crack detection pattern HCP are included in the second conductive layer of the inventive concept, electrical interference can occur at the intersection point. Accordingly, at the point where the hole pattern TL1-H and the crack detection pattern HCP intersect each other, the hole pattern TL1-H can include a connection pattern FCNP1 disposed on the first detection insulating layer 71 and an extension pattern FCNP2 disposed on the second detection insulating layer 72. The extension pattern FCNP2 and the connection pattern FCNP1 can be connected by a contact hole R-CH defined in the second detection insulating layer 72. Accordingly, the hole pattern TL1-H and the crack detection pattern HCP included in the second conductive layer of the inventive concept can transmit / receive different signals without electrical interference.

[0241] In addition, the first adjacent pattern IJ1-U1 can be connected to one end of the extension pattern FCNP2, and the other end of the extension pattern FCNP2 can be connected to the first adjacent pattern IJ1-U3 that receives the same signal.

[0242] Figure 10A The hole pattern TL1-H connected to the two first adjacent patterns IJ1-U1 and IJ1-U3 is shown by way of example, but the inventive concept is not limited thereto. The first adjacent pattern disposed around the hole area HA and receiving the same signal as the first adjacent patterns IJ1-U1 and IJ1-U3 can be connected to the hole pattern TL1-H.

[0243] According to the present exemplary embodiment, an additional hole pattern TC2, at least a portion of which is superposed with the hole pattern TL1-H and disposed on a different layer from the hole pattern TL1-H, can be further included. The hole pattern TL1-H can be disposed on the second detection insulating layer 72 (see Figure 6 ), and the additional hole pattern TC2 can be disposed on the first detection insulating layer 71 (see Figure 6 ). The additional hole pattern TC2 can be connected to the hole pattern TL1-H by a contact hole C-CH defined in the second detection insulating layer 72.

[0244] According to the present exemplary embodiment, an anti-static pattern CSP disposed between the crack detection pattern HCP and the hole pattern TL1-H can be further included. The anti-static pattern CSP can be disposed on the first detection insulating layer 71. The anti-static pattern CSP can prevent electrostatic current flowing in from the outside along the first dummy line H-DM1 from flowing into the hole area HA.

[0245] Figure 11A is an enlarged plan view of the area QQ' shown in Figure 8 . Figure 11B is a cross-sectional view taken along the line II-II' shown in Figure 11A .

[0246] In the present exemplary embodiment, the first proximity pattern IJ1-U3, the second proximity patterns IJ2-L and IJ2-R, the dummy lines H-DM1 and H-DM2, the wiring pattern TL2-H, the crack detection line HCL, the connection line HCB, and the wiring dummy pattern DML can be included in the second conductive layer. In addition, a portion of the wiring pattern TL2-H which overlaps the crack connection pattern HCL-B and the connection line HCB can be included in the first conductive layer.

[0247] Referring to Figure 11A and Figure 11B , the wiring pattern TL2-H according to the inventive concept can be connected to the second proximity patterns IJ2-L and IJ2-R. The wiring pattern TL2-H can be spaced apart from the first proximity pattern IJ1-U3 and the dummy lines H-DM1 and H-DM2.

[0248] Because the wiring pattern TL2-H and the connection line HCB are included on the second conductive layer of the inventive concept, electrical interference can occur at the intersection. Accordingly, at the point at which the wiring pattern TL2-H and the connection line HCB intersect each other, the wiring pattern TL2-H can include a connection pattern SCNP1 disposed on the first detection insulating layer 71 and an extension pattern SCNP2 disposed on the second detection insulating layer 72. The extension pattern SCNP2 and the connection pattern SCNP1 can be connected through a contact hole K-CH defined in the second detection insulating layer 72. Accordingly, the wiring pattern TL2-H and the connection line HCB included in the second conductive layer of the inventive concept can transmit / receive different signals without electrical interference.

[0249] In addition, one end of the extension pattern SCNP2 can be connected to the second proximity pattern IJ2-L, and the other end of the extension pattern SCNP2 can be connected to one end of the second proximity pattern IJ2-R which receives the same signal.

[0250] In the present exemplary embodiment, the wiring pattern TL2-H can extend in the same direction as a first direction DR1 in which the second proximity patterns IJ2-L and IJ2-R are arranged.

[0251] Figure 12 is a magnified view of a sensing unit adjacent to a hole region according to an exemplary embodiment of the inventive concept. Like reference numerals refer to like elements throughout Figures 1-11B , and redundant descriptions are omitted.

[0252] Although not shown in the drawings, the electronic device EA (see Figure 2 ) can include a plurality of electronic modules 400 (see Figure 2 ). Referring to Figure 12 , the electronic panel 200 (see Figure 2) can include a plurality of module holes MH1 and MH2 superimposed with the electronic module 400. The plurality of electronic modules 400 can include at least one of the above-described electronic modules EM1 and EM2 (see Figure 3 ) in FIGS. 1A and 1B.

[0253] The plurality of module holes MH1 and MH2 can be formed in the active area AA. The module holes MH1 and MH2 can include a first module hole MH1 and a second module hole MH2. The first module hole MH1 and the second module hole MH2 are defined to be spaced apart from each other in the first direction DR1.

[0254] According to this exemplary embodiment, in a process of forming the module holes MH1 and MH2, it can include crack detection circuits HCC1 and HCC2 for detecting whether a crack occurs in a region adjacent to the module holes MH1 and MH2. Components included in each of the crack detection circuits HCC1 and HCC2 can include the same components as the crack detection circuit HCC described with reference to Figure 9 FIGS. 2A and 2B.

[0255] The first crack detection circuit HCC1 can detect whether a crack occurs near the first module hole MH1, and the second crack detection circuit HCC2 can detect whether a crack occurs near the second module hole MH2.

[0256] According to the inventive concept, when the plurality of module holes MH1 and MH2 are formed, a hole pattern TL1-H1 is formed, which will connect each of first adjacent patterns IJ1-A and IJ1-B having a shape with a removed portion. For example, the first hole pattern TL1-H1 can connect the first adjacent pattern IJ1-A, which is partially removed when the first module hole MH1 is formed. The second hole pattern TL1-H2 can connect the first adjacent pattern IJ1-B, which receives a signal different from that of the first adjacent pattern IJ1-A, which is partially removed when the second module hole MH2 is formed.

[0257] Further, according to the inventive concept, when the plurality of module holes MH1 and MH2 are formed, a wiring pattern TL2-H1 including second adjacent patterns IJ2-A, IJ2-B, and IJ2-C having a removed portion is included.

[0258] According to the present exemplary embodiment, a plurality of module holes MH1 and MH2 superimposed with the electronic module are provided. As a result, even though the adjacent patterns having a shape with a portion thereof cut are included, by connecting the corresponding adjacent patterns and including the wiring pattern and the hole pattern arranged in different regions, the sensing unit 220 (see Figure 2 ) can be provided to reduce parasitic capacitance between patterns receiving different signals.

[0259] Figure 13 is a magnified view of a portion of the sensing unit according to an exemplary embodiment of the inventive concept. Figure 14 is a cross-sectional view taken along Figure 13 line III-III' shown in FIG. 3. Throughout the Figures 1-11B , like reference numerals refer to like elements, and redundant descriptions are omitted.

[0260] Referring to Figure 13 , according to the inventive concept, the detection lines TL-T superposed with the connection line HCB can be disposed in the peripheral area NAA. As to the detection lines TL-T, some of the first detection lines TL1 among the detection lines TL1 and TL2 described above with reference to Figure 5A may be connected to one end of the first sensing electrode TE1, and the remaining first detection lines TL1 can be connected to the other end of the first sensing electrode TE1. In this case, the detection lines TL-T among the first detection lines TL1 connected to the other end of the first sensing electrode TE1 can be superposed with the connection line HCB.

[0261] In this exemplary embodiment, the crack detection line HCL, the detection lines TL-T, the first adjacent patterns IJ1-A and IJ1-B, the first connection portion T-TL, the second adjacent patterns IJ2-A and IJ2-B, and the dummy lines H-DM1 and H-DM2 can be included in the second conductive layer of the inventive concept. In addition, the connection line HCB and the second connection portion R-TL can be included in the first conductive layer.

[0262] According to the present exemplary embodiment, the first adjacent patterns IJ1-A and IJ1-B can be connected to the detection lines TL-T through the first connection portion T-TL. The first connection portion T-TL can be spaced apart from the second adjacent patterns IJ2-A and IJ2-B. The second adjacent patterns IJ2-A and IJ2-B can transmit / receive a signal between the spaced apart second adjacent patterns IJ2-A and IJ2-B through the second connection portion R-TL included in the first conductive layer.

[0263] Referring to Figure 14 , as to the connection line HCB and the second connection portion R-TL included in the first conductive layer, the second connection portion R-TL includes a lower portion R-CB and an upper portion R-CU in a region superposed with the connection line HCB so as to avoid electrical interference. The lower portion R-CB and the upper portion R-CU can be connected to each other through a contact hole L-CH defined in the second detection insulating layer 72, and can be electrically insulated from the connection line HCB through the second detection insulating layer 72.

[0264] According to the inventive concept, since the patterns connected to a portion of the detection pattern that is cut are disposed in different regions, parasitic capacitance can be minimized. Accordingly, it is possible to provide an electronic device having improved reliability.

[0265] While certain example embodiments have been described herein, other embodiments and modifications will be apparent to those skilled in the art. Therefore, the scope of the inventive concept is not limited to such embodiments, but only to the scope of the appended claims and the full scope of equivalents and modifications as will be apparent to those ordinarily skilled in the art.

Claims

1. An electronic device comprising: an electronic module; and a sensing unit divided into a hole region overlapping the electronic module, an active region surrounding the hole region, and a peripheral region adjacent to the active region, and including first and second sensing electrodes insulated from each other, wherein: the first sensing electrode is disposed in the active region, and includes a first main pattern, first adjacent patterns having an area smaller than that of the first main pattern, and a hole pattern connected to adjacent first adjacent patterns; the second sensing electrode includes a second main pattern disposed in the active region, second adjacent patterns disposed in the active region and adjacent to the hole region and having an area smaller than that of the second main pattern, a second connection pattern connected to the second main pattern, and a wiring pattern connected to adjacent second adjacent patterns; and the hole pattern is disposed in the hole region, and the wiring pattern is disposed in the peripheral region. 2.The electronic device of claim 1, wherein: the sensing unit is defined by a first detection insulating layer, a first conductive layer disposed on the first detection insulating layer, a second detection insulating layer covering the first conductive layer and having a plurality of first contact holes overlapping the active region, and a second conductive layer disposed on the second detection insulating layer; the second connection pattern is included in the first conductive layer; the first main pattern, the first adjacent patterns, the second main pattern, and the second adjacent patterns are included in the second conductive layer; and the second connection pattern is connected to the second main pattern through the first contact holes. 3.The electronic device of claim 2, wherein, the wiring pattern is disposed on the same layer as the first adjacent patterns. 4.The electronic device of claim 2, wherein, the hole pattern is disposed on the same layer as the second adjacent patterns. 5.The electronic device of claim 1, wherein the wiring pattern extends in the same direction as the second adjacent patterns are arranged. 6.The electronic device of claim 1, wherein among the first adjacent patterns, a first adjacent pattern disposed between second adjacent patterns connected to the wiring pattern is spaced apart from the wiring pattern in a plane. 7.The electronic device of claim 1, wherein among the second adjacent patterns, a second adjacent pattern disposed between first adjacent patterns connected to the hole pattern is spaced apart from the hole pattern in a plane.

8. The electronic device of any of claims 1-7, wherein, The electronic device further comprises a crack detection circuit, the crack detection circuit comprising: a crack detection line disposed in the peripheral region; a crack detection pattern disposed in the hole region; and a connection line connecting the crack detection line and the crack detection pattern. 9.The electronic device of claim 8, wherein: the electronic device further comprises a wiring dummy pattern disposed between the crack detection line and the wiring pattern; and the connection line passes between the wiring dummy patterns. 10.The electronic device of claim 8, wherein The electronic device further comprises an anti-static pattern disposed in the hole region and disposed between the crack detection pattern and the hole pattern. 11.The electronic device of claim 8, wherein The hole pattern surrounds at least a portion of the crack detection pattern.

12. The electronic device of any of claims 1-7, wherein, Each of the first and second sensing electrodes includes a mesh line defining a mesh open portion. 13.The electronic device of claim 12, wherein, The electronic device further includes a display unit disposed below the sensing unit and including a first electrode, a second electrode facing the first electrode, and a light emitting layer disposed between the first and second electrodes, wherein each of the light emitting layers overlaps a corresponding mesh open portion. 14.The electronic device of claim 1, wherein: Each of the first main patterns includes a center pattern extending in one direction and a branch pattern connected to the center pattern and extending in a slanted direction of the one direction; and Each of the second main patterns surrounds a portion of the center pattern and the branch pattern of a corresponding one of the first main patterns. 15.The electronic device of claim 1, wherein: The electronic module includes a first electronic module and a second electronic module; and The hole region includes a first hole region overlapping the first electronic module and a second hole region overlapping the second electronic module. 16.The electronic device of claim 1, wherein, The electronic module includes at least one of an image input module, an image output module, an optical detection module, and an optical output module. 17.An electronic device, the electronic device comprising: a display unit including a plurality of pixels; an electronic module disposed below the display unit; a sensing unit divided into a hole region overlapping the electronic module, an active region surrounding the hole region, and a peripheral region adjacent to the active region, and including first and second sensing electrodes insulated from each other, wherein the first sensing electrode is disposed in the active region; and a module hole defined through at least a portion of the display unit and the sensing unit overlapping the hole region, wherein: The first sensing electrode includes a hole pattern connected to a first adjacent pattern cut by the module hole; The second sensing electrode includes a wiring pattern connected to a second adjacent pattern cut by the module hole; and The second adjacent pattern is disposed in the active region, the hole pattern is disposed in the hole region, and the wiring pattern is disposed in the peripheral region. 18.The electronic device of claim 17, wherein: The first sensing electrode includes a first main pattern having an area greater than an area of the first adjacent pattern; and The second sensing electrode includes a second main pattern having an area greater than an area of the second adjacent pattern, and a second connection pattern connecting the main patterns. 19.The electronic device of claim 17, wherein, Among the first adjacent patterns, a first adjacent pattern disposed between second adjacent patterns connected to the wiring pattern is spaced apart from the wiring pattern in a plane. 20.The electronic device of claim 17, wherein, Among the second adjacent patterns, a second adjacent pattern disposed between first adjacent patterns connected to the hole pattern is spaced apart from the hole pattern in a plane. 21.The electronic device of claim 18, wherein, The electronic device further includes a crack detection circuit, the crack detection circuit including: a crack detection line disposed in the peripheral region; a crack detection pattern surrounding the module hole; and a connection line connecting the crack detection line and the crack detection pattern. 22.The electronic device of claim 21, wherein: The electronic device further includes a wiring dummy pattern disposed between the crack detection line and the wiring pattern, and The connection line passes between the wiring dummy patterns.

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