A PCB board and a processing method for trial drilling of the PCB board

Abstract

A processing method for trial drilling of a PCB board, comprising the steps of: marking a marking area with a specification of 3mm×3mm on the 1st to Nth core boards, and setting the distance between the (N-1)th marking area and the Nth marking area to 4 mil; on the (N-1)th core board, performing a hollowing process on the areas corresponding to the 1st to (N-2)th marking areas and the Nth marking area; on the Nth core board, performing a hollowing process on the area corresponding to the 1st to (N-1)th marking areas; etching a center pad on the first copper layer of the marking area of each core board; etching a center substrate circle on the second copper layer of the marking area of each core board, and the center of the center substrate circle coincides with the center of the center pad; sandwiching a dielectric layer between the (N-1)th core board and the Nth core board; drilling after pressing from top to bottom. This processing method for trial drilling of a PCB board improves the inspection effect of the first board deviation during drilling of high-layer boards, improves the drilling alignment accuracy, and improves the problem of inner layer short circuit caused by drilling deviation.

Description

Technical Field

[0001] The present invention relates to the technical field of printed circuit board processing, and particularly to a printed circuit board (PCB) and a processing method for trial drilling of the PCB. Background Art

[0002] For ultra-high layer PCB, the drilling layer deviation effect is inspected by the method of trial drilling of the first board. Due to factors such as the high number of layers / copper thickness of the ultra-high layer PCB and the influence of the penetration effect of X-RAY inspection, it is very difficult to identify the actual deviation effect of the trial drilling relative to each layer; especially for high-layer boards with a small hole-to-line distance, it is easy to cause batch drilling deviation and short-circuit problems due to the inability to identify after drilling deviation. Summary of the Invention

[0003] The present invention provides a PCB and a processing method for trial drilling of the PCB, which solve the technical problems existing in the above-mentioned prior art. The processing method for trial drilling of the PCB improves the inspection effect of the deviation of the first board during drilling of high-layer boards, improves the drilling alignment accuracy, and improves the problem of inner layer short circuit caused by drilling deviation.

[0004] In order to achieve the above object, the present invention provides the following technical solutions:

[0005] A processing method for trial drilling of a PCB, which includes the following steps: The PCB includes N core boards, where N is a natural number and N≥2. The processing method for trial drilling of the PCB includes the following steps: S1: Mark a (N-1)-th marking area with a specification of 3mm×3mm on the (N-1)-th core board; mark an N-th marking area with a specification of 3mm×3mm on the N-th core board, and the distance between the (N-1)-th marking area and the N-th marking area is set to 4 mil;

[0006] S2: Perform a hollowing-out process on the area corresponding to the 1st to (N-2)-th marking areas and the N-th marking area on the (N-1)-th core board; perform a hollowing-out process on the area corresponding to the 1st to (N-1)-th marking areas on the N-th core board; S3: Etch a center pad on the first copper layer of the marking area of each core board; etch a center substrate ring on the second copper layer of the marking area of each core board, and the center of the center substrate ring coincides with the center of the center pad; S4: Interpose a dielectric layer between the (N-1)-th core board and the N-th core board; S5: Press from top to bottom; S6: Drill from top to bottom to form the PCB.

[0007] Further, the diameter of the center pad is 12 mil larger than the diameter of the through hole, and the diameter of the center substrate ring is 8 mil larger than the diameter of the center pad.

[0008] Further, between S4 and S5, there is also step S41: an upper dielectric layer and an upper copper foil layer are sequentially arranged on the upper surface of the first core board, and a lower dielectric layer and a lower copper foil layer are sequentially arranged on the lower surface of the Nth core board.

[0009] Further, the diameter of the central pad is 16 mil larger than the diameter of the through hole, and the diameter of the central substrate ring is 16 mil larger than the diameter of the central pad.

[0010] A PCB board includes N core boards, where N is a natural number and N≥2; the (N - 1)th core board includes a (N - 1)th marking area and a (N - 1)th hollowing area of 3mm×3mm; the Nth core board includes an Nth marking area and an Nth hollowing area of 3mm×3mm, and the distance between the (N - 1)th marking area and the Nth marking area is set to 4 mil; the (N - 1)th hollowing area is formed by hollowing the area corresponding to the 1st to (N - 2)th marking areas and the Nth marking area on the (N - 1)th core board; the Nth hollowing area is formed by hollowing the area corresponding to the 1st to (N - 1)th marking areas on the Nth core board; a central pad is provided on the first copper layer of the marking area of each core board; a central substrate ring is provided on the second copper layer of the marking area of each core board, and the center of the central substrate ring coincides with the center of the central pad; a dielectric layer is sandwiched between the (N - 1)th core board and the Nth core board; the PCB board is provided with a through hole, and the center of the through hole coincides with the center of the central pad; the diameter of the central pad is 12 - 16 mil larger than the diameter of the through hole, and the diameter of the central substrate ring is 8 - 16 mil larger than the diameter of the central pad.

[0011] Further, the PCB board further includes: an upper dielectric layer and an upper copper foil layer are sequentially arranged on the upper surface of the first core board, and a lower dielectric layer and a lower copper foil layer are sequentially arranged on the lower surface of the Nth core board.

[0012] Further, the first copper layer of the marking area of the first core board faces upward, and the second copper layer of the marking area of the Nth core board faces downward.

[0013] Further, the second copper layer of the marking area of the first core board faces upward, and the second copper layer of the marking area of the Nth core board faces downward.

[0014] Advantages of the present invention:

[0015] The processing method for trial drilling of a PCB board provided by the present invention includes the following steps: S1: Mark the (N - 1)-th marked area with a specification of 3mm×3mm on the (N - 1)-th core board; mark the N-th marked area with a specification of 3mm×3mm on the N-th core board, and set the distance between the (N - 1)-th marked area and the N-th marked area to be 4 mil; S2: On the (N - 1)-th core board, perform a hollowing process on the areas corresponding to the 1st to (N - 2)-th marked areas and the N-th marked area; on the N-th core board, perform a hollowing process on the areas corresponding to the 1st to (N - 1)-th marked areas; S3: Etch a center pad on the first copper layer of the marked area of each core board; etch a center substrate ring on the second copper layer of the marked area of each core board, and the center of the center substrate ring coincides with the center of the center pad; S4: Sandwich a dielectric layer between the (N - 1)-th core board and the N-th core board; S5: Press from top to bottom; S6: Drill from top to bottom to form a PCB board.

[0016] From the above technical features, according to the above processing steps, layer by layer of core board marking, hollowing treatment, and the setting of the center pad and center substrate ring on each layer of core board are carried out for the first-board trial drilling. After the trial drilling, use X-RAY to check the trial drilling effect of the PCB board: Measure the single-sided solder ring width of the center pad of each core board after drilling. When the single-sided solder ring width of all core boards or a certain core board exceeds the set tolerance range, it is determined that the trial drilling is severely misaligned or exceeds the standard relative to the pattern of all core boards or a certain core board, and the drill tape needs to be adjusted to meet the alignment requirements; The processing method for trial drilling of this PCB board improves the inspection effect of the first-board misalignment of high-layer board drilling, improves the drilling alignment, and improves the problem of inner-layer short circuit caused by drilling misalignment. Description of the Drawings

[0017] Figure 1 It is a schematic diagram of the first-board structure of the processing method for trial drilling of a PCB board in Embodiment 1 of the present invention;

[0018] Figure 2 is Figure 1 the A-A cross-sectional view of;

[0019] Figure 3 It is a schematic diagram of the 3mm×3mm marked area of the processing method for trial drilling of a PCB board in Embodiment 1 of the present invention;

[0020] Figure 4 is Figure 3 the B-B cross-sectional view of;

[0021] Figure 5 It is a schematic diagram of the first-board structure of the processing method for trial drilling of a PCB board in Embodiment 2 of the present invention;

[0022] Figure 6 is Figure 5 the C-C cross-sectional view of.

[0023] In the figure, 10 - the first core board, 11 - the marking area, 111 - the central pad, 112 - the central substrate circle, 113 - the through hole, 12 - the hollowed - out area, 20 - the dielectric layer, 30 - the upper dielectric layer, 40 - the upper copper foil layer, 50 - the second core board, 51 - the marking area, 52 - the hollowed - out area, 60 - the third core board, 61 - the marking area, 62 - the hollowed - out area, 70 - the fourth core board, 71 - the marking area, 72 - the hollowed - out area, 80 - the lower dielectric layer, 90 - the lower copper foil layer, 100 - the first core board, 101 - the marking area, 102 - the hollowed - out area, 200 - the dielectric layer, 500 - the second core board, 501 - the marking area, 502 - the hollowed - out area, 600 - the third core board, 601 - the marking area, 602 - the hollowed - out area, 700 - the fourth core board, 701 - the marking area, 702 - the hollowed - out area Detailed implementation manners

[0024] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0025] Embodiment 1:

[0026] Refer to Figures 1 - 4 , Figure 1 which is the schematic diagram of the first - board structure of the processing method for the trial drilling of the PCB board in Embodiment 1 of the present invention, Figure 2 and Figure 1 is the A - A cross - sectional view of Figure 3 which is the schematic diagram of the 3mm×3mm marking area of the processing method for the trial drilling of the PCB board in Embodiment 1 of the present invention, Figure 4 and Figure 3 is the B - B cross - sectional view of

[0027] The processing method for the trial drilling of the PCB board provided by the present invention belongs to the technical field of circuit board processing. This processing method for the trial drilling of the PCB board improves the inspection effect of the offset of the first - board drilling of the high - layer board, enhances the drilling alignment accuracy, and improves the problem of inner - layer short - circuit caused by drilling offset.

[0028] In this embodiment, a PCB board is first provided. The PCB board includes N core boards, where N is a natural number and N≥2; Refer to Figures 1 - 4 , in this embodiment, it is preferably: the PCB board includes 4 core boards, and marks and hollows are provided at the four corners of each core board.

[0029] The first core board 10 includes marked areas 11 and hollowed areas 12 each with a size of 3mm×3mm provided at four diagonal corners; by the same token, the second core board 50 includes a marked area 51 and a hollowed area 52 with a size of 3mm×3mm, the third core board 60 includes a marked area 61 and a hollowed area 62 with a size of 3mm×3mm, and the fourth core board 70 includes a marked area 71 and a hollowed area 72 with a size of 3mm×3mm.

[0030] The projected edge distance L between two adjacent marked areas is set to 4 mil, as shown in Figure 1 , that is, the projected edge distance L between the right side of the hollowed area 12 and the left side of the hollowed area 52 is set to 4 mil, the projected edge distance L between the right side of the hollowed area 52 and the left side of the hollowed area 62 is set to 4 mil, and the projected edge distance L between the right side of the hollowed area 62 and the left side of the hollowed area 72 is set to 4 mil.

[0031] The hollowed area 12 is formed by hollowing out the area on the first core board 10 corresponding to the marked area 51 of the second core board 50, the marked area 61 of the third core board 60, and the marked area 71 of the fourth core board 70; by the same token, the hollowed area 52 is formed by hollowing out the area on the second core board 50 corresponding to the marked area 11 of the first core board 10, the marked area 61 of the third core board 60, and the marked area 71 of the fourth core board 70; the hollowed area 62 is formed by hollowing out the area on the third core board 60 corresponding to the marked area 11 of the first core board 10, the marked area 51 of the second core board 50, and the marked area 71 of the fourth core board 70; the hollowed area 72 is formed by hollowing out the area on the fourth core board 70 corresponding to the marked area 11 of the first core board 10, the marked area 51 of the second core board 50, and the marked area 61 of the third core board 60.

[0032] In this embodiment, a center pad is provided on the first copper layer of the marked area of each core board, and a center substrate ring is provided on the second copper layer of the marked area of each core board, as shown in Figure 3 and Figure 4, taking the setting of the marking area 11 on the first core board 10 as an example, the first copper layer of the marking area 11 is provided with a center pad 111, the second copper layer of the marking area 11 is provided with a center substrate ring 112, and the center of the center substrate ring 112 coincides with the center of the center pad 111. Among them, the upper copper layer and the lower copper layer of the marking area 11 are the first copper layer and the second copper layer respectively; the marking area 11 is also provided with a through hole 113, and the center of the through hole 113 coincides with the center of the center pad 111. Among them, the diameter of the center pad 111 is 12 - 16 mil larger than the diameter of the through hole 113, and the diameter of the center substrate ring 112 is 8 - 16 mil larger than the diameter of the center pad 111. Specifically, in this embodiment, the diameter of the center pad 111 is 44 mil, the diameter of the center substrate ring 112 is 52 mil, and the aperture of the through hole 113 is 32 mil.

[0033] In this embodiment, a dielectric layer 20 is interposed between adjacent core boards up and down. Specifically, a dielectric layer 20 is interposed between the first core board 10 and the second core board 50, a dielectric layer 20 is interposed between the second core board 50 and the third core board 60, and a dielectric layer 20 is interposed between the third core board 60 and the fourth core board 70.

[0034] In this embodiment, specifically refer to Figure 2 , the PCB board further includes: an upper dielectric layer 30 and an upper copper foil layer 40 are sequentially arranged on the upper surface of the first core board 10, and a lower dielectric layer 80 and a lower copper foil layer 90 are sequentially arranged on the lower surface of the fourth core board 70.

[0035] Furthermore, the first copper layer of the marking area 11 of the first core board 10 faces upward, and the second copper layers of the marking areas 51 of the second core board 50, 61 of the third core board 60, and 71 of the fourth core board 70 face downward.

[0036] In this embodiment, the processing method for trial drilling of the PCB board includes the following steps: select the first board,

[0037] S1: Mark the marking areas 11 with a specification of 3mm X 3mm at the four corners of the first core board 10; similarly, mark the marking areas 51 with a specification of 3mm X 3mm on the second core board 50, mark the marking areas 61 with a specification of 3mm X 3mm on the third core board 60, and mark the marking areas 71 with a specification of 3mm X 3mm on the fourth core board 70. The projection edge distance L between adjacent marking areas is set to 4 mil.

[0038] S2: Perform a hollowing process on the areas of the first core board 10 corresponding to the marking areas 51 of the second core board 50, the marking areas 61 of the third core board 60, and the marking areas 71 of the fourth core board 70 to form a hollow area 12; perform a hollowing process on the areas of the second core board 50 corresponding to the marking area 11 of the first core board 10, the marking areas 61 of the third core board 60, and the marking areas 71 of the fourth core board 70 to form a hollow area 52; perform a hollowing process on the areas of the third core board 60 corresponding to the marking area 11 of the first core board 10, the marking areas 51 of the second core board 50, and the marking areas 71 of the fourth core board 70 to form a hollow area 62; perform a hollowing process on the areas of the fourth core board 70 corresponding to the marking area 11 of the first core board 10, the marking areas 51 of the second core board 50, and the marking areas 61 of the third core board 60 to form a hollow area 72.

[0039] S3: Etch center pads on the first copper layer of the marking area of each core board; etch center substrate rings on the second copper layer of the marking area of each core board, and the centers of the center substrate rings coincide with the centers of the center pads; see Figure 3 and Figure 4 , taking the setting of the marking area 11 on the first core board 10 as an example, the first copper layer of this marking area 11 is provided with a center pad 111, the second copper layer of this marking area 11 is provided with a center substrate ring 112, and the center of the center substrate ring 112 coincides with the center of the center pad 111. Among them, the upper copper layer and the lower copper layer of this marking area 11 are the first copper layer and the second copper layer respectively.

[0040] S4: Sandwich a dielectric layer 20 between adjacent core boards up and down. Specifically, sandwich a dielectric layer 20 between the first core board 10 and the second core board 50, sandwich a dielectric layer 20 between the second core board 50 and the third core board 60, and sandwich a dielectric layer 20 between the third core board 60 and the fourth core board 70.

[0041] S5: Sequentially set an upper dielectric layer 30 and an upper copper foil layer 40 on the top of the first core board 10, and sequentially set a lower dielectric layer 80 and a lower copper foil layer 90 under the fourth core board 70 to form the outer layer of this PCB board, and N core boards serve as the inner layer of this PCB board, which is called an "outer layer copper foil structure".

[0042] S6: Press and laminate from top to bottom.

[0043] S7: Drill through holes 113 from top to bottom to process and form the above-mentioned PCB board.

[0044] Process the first board according to the above processing steps. After drilling, use X-RAY to check the drilling effect of the first board: Measure the single-sided solder ring width between the central base material circle 112 and the central pad 111 of each core board (theoretically 6 mil width on one side). When the single-sided solder ring width of all core boards or a certain core board ≤ 3 mil, it is determined that the trial drilling is severely misaligned or exceeds the standard relative to the pattern of all core boards or a certain core board, and the drill tape needs to be adjusted to meet the alignment requirements; after the first board is detected to be qualified, further process the PCB board. The processing method of the trial drilling of the PCB board improves the inspection effect of the misalignment of the first board in the drilling of high-layer boards, improves the drilling alignment, and improves the problem of inner layer short circuit caused by drilling misalignment.

[0045] Example 2:

[0046] See Figure 5 and Figure 6 , Figure 5 is a schematic diagram of the structure of the first board of the processing method of the trial drilling of the PCB board in the second embodiment of the present invention, Figure 6 is Figure 5 the C-C cross-sectional view of.

[0047] In this embodiment, the difference from the above-mentioned first embodiment is that the outer layer of the PCB board does not have a dielectric layer and a copper foil layer, but the first core board and the Nth core board are used as the outer layer of the PCB board, and the second to (N - 1)th core boards are used as the inner layer of the PCB board, which is called the "outer layer laminated core board structure". At this time, see Figure 5 and Figure 6 , the second copper layer of the marking area 101 of the first core board 100 faces upward, and the second copper layer of the marking area 701 of the fourth core board 700 faces downward.

[0048] Furthermore, in this embodiment, the diameter of the central pad 111 is 44 mil, the diameter of the central pad 111 is 48 mil, and the diameter of the central base material circle 112 is 64 mil.

[0049] The rest is the same as the above-mentioned first embodiment and will not be repeated.

[0050] Process the first board according to the above processing steps. After drilling, use X-RAY to check the drilling effect of the first board: measure the single-sided solder ring width between the central substrate ring 112 and the central pad 111 of each core board (theoretically 6 mil width on one side). When the single-sided solder ring width of all core boards or a certain core board ≤ 3 mil, it is judged that the trial drilling is severely misaligned or exceeds the standard with respect to the pattern of all core boards or a certain core board, and the drill tape needs to be adjusted to meet the alignment requirements; in addition, when measuring the single-sided width of the outer layer solder ring projection ≤ 5 mil during the outer layer pattern alignment, it is judged that the outer layer pattern is severely misaligned with the drilling, and the outer layer pattern data needs to be adjusted; after the first board is detected to be qualified, further realize the processing of the PCB board. The processing method of the trial drilling of this PCB board improves the inspection effect of the misalignment of the first board of the high-layer board drilling, improves the drilling alignment, and improves the problem of inner layer short circuit caused by drilling misalignment.

[0051] The above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. The present invention has been described in detail with reference to the preferred embodiments. Those skilled in the art should understand that any modifications or equivalent replacements of the technical solutions of the present invention, without departing from the purpose and scope of the present technical solution, should be covered within the scope of the claims of the present invention.

Claims

1. A processing method for trial drilling of a PCB board, characterized in that: the PCB board includes N core boards, and marks and hollowings are provided at the four corners of each core board; wherein, N is a natural number and N≥2, and the processing method for trial drilling of the PCB board includes the following steps: S1: Mark a (N - 1)-th marking area with a specification of 3mm×3mm on the (N - 1)-th core board; Mark a N-th marking area with a specification of 3mm×3mm on the N-th core board, and the distance between the (N - 1)-th marking area and the N-th marking area is set to 4 mil; S2: On the (N - 1)-th core board, perform hollowing treatment on the areas corresponding to the 1st to (N - 2)-th marking areas and the N-th marking area; On the N-th core board, perform hollowing treatment on the areas corresponding to the 1st to (N - 1)-th marking areas; the distance between the (N - 1)-th hollowing area and the N-th hollowing area is set to 4 mil; S3: Etch a center pad on the first copper layer of the marking area of each core board; Etch a center substrate circle on the second copper layer of the marking area of each core board, and the center of the center substrate circle coincides with the center of the center pad; S4: Interpose a dielectric layer between the (N - 1)-th core board and the N-th core board; S5: Press from top to bottom; S6: Drill from top to bottom to form the PCB board.

2. The processing method for trial drilling of a PCB board according to claim 1, characterized in that: the diameter of the center pad is 12 mil larger than the diameter of the through hole, and the diameter of the center substrate circle is 8 mil larger than the diameter of the center pad.

3. The processing method for trial drilling of a PCB board according to claim 1 or 2, characterized in that: Between S4 and S5, there is also step S41: Sequentially arrange an upper dielectric layer and an upper copper foil layer on the upper surface of the first core board, and sequentially arrange a lower dielectric layer and a lower copper foil layer on the lower surface of the N-th core board.

4. The processing method for trial drilling of a PCB board according to claim 1, characterized in that: the diameter of the center pad is 16 mil larger than the diameter of the through hole, and the diameter of the center substrate circle is 16 mil larger than the diameter of the center pad.

5. A PCB board, characterized in that: the PCB board is processed by using the processing method for trial drilling of a PCB board according to any one of claims 1 to 4; the (N - 1)-th core board includes a (N - 1)-th marking area and a (N - 1)-th hollowing area of 3mm×3mm; the N-th core board includes a N-th marking area and a N-th hollowing area of 3mm×3mm, and the distance between the (N - 1)-th marking area and the N-th marking area is set to 4 mil; the (N - 1)-th hollowing area is formed by performing hollowing treatment on the areas corresponding to the 1st to (N - 2)-th marking areas and the N-th marking area on the (N - 1)-th core board; the N-th hollowing area is formed by performing hollowing treatment on the areas corresponding to the 1st to (N - 1)-th marking areas on the N-th core board; The first copper layer of the marking area of each core board is provided with a center pad; A central substrate ring is provided on the second copper layer of the marked area of each of the core boards, and the center of the central substrate ring coincides with the center of the central pad; A dielectric layer is interposed between the (N - 1)th core board and the Nth core board; The PCB board is provided with a through hole, and the center of the through hole coincides with the center of the central pad; The diameter of the central pad is 12 - 16 mil larger than the diameter of the through hole, and the diameter of the central substrate ring is 8 - 16 mil larger than the diameter of the central pad.

6. The PCB board according to claim 5, wherein: The PCB board further includes: an upper dielectric layer and an upper copper foil layer are sequentially provided on the upper surface of the first core board, and a lower dielectric layer and a lower copper foil layer are sequentially provided on the lower surface of the Nth core board.

7. The PCB board according to claim 6, wherein: The first copper layer of the marked area of the first core board faces upward, and the second copper layer of the marked area of the Nth core board faces downward.

8. The PCB board according to claim 5, wherein: The second copper layer of the marked area of the first core board faces upward, and the second copper layer of the marked area of the Nth core board faces downward.

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