Display device and method for operating the same
By using the power manager in the display device to control the driving voltage of the panel in real time, adjusting the gate on voltage, cutoff voltage and initialization voltage according to the current difference, the problem of slow response speed of the display panel and poor driving current compensation is solved, and faster Response speed and more accurate brightness control.
Patent Information
- Application Number
- CN202011325984.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-11-26
- Filing Date
- 2020-11-24
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2040-11-24
AI Technical Summary
When the image of the existing display panel changes from black to white, the response speed slows down due to leakage current, the display brightness is lower than expected, and the driving current is prone to overcompensation or undercompensation.
By introducing a power manager into the display device, the current difference between the first current and the second current of the display panel is measured and calculated, and the panel driving voltage is controlled in real time according to the current difference, including the gate on voltage and the gate off voltage according to the current difference. Voltage and initialization voltage.
The response speed of the display panel is improved, preventing or reducing over-compensation and under-compensation of the drive current, thereby ensuring that the brightness of the image display is consistent with the expectations.
Smart Images

Figure CN112951155B_ABST
Abstract
Description
Technical Field
[0001] Aspects of example embodiments generally relate to a display device and a method of operating a display device. Background Art
[0002] Typically, a display device includes a display panel for displaying an image and a panel driver for driving the display panel. The display panel may receive a data voltage from the panel driver, may generate a driving current corresponding to the data voltage, and may display an image having a brightness corresponding to the data voltage based on the driving current. When an image to be displayed on the display panel is changed from a black image to a white image, the panel driver may change (e.g., may increase) the data voltage provided to the display panel, and the display panel may generate a driving current corresponding to the changed data voltage. However, due to leakage current generated inside the display panel, it may take a certain amount of time for the display panel to generate a driving current corresponding to the changed data voltage. Therefore, there is the following problem: the display panel displays an image having a brightness lower than the brightness corresponding to the changed data voltage during the certain amount of time. In other words, in order to display an image with a desired brightness, it is desirable to increase the response speed of the display panel.
[0003] In order to improve the response speed of the display panel, the comparison operation method calculates the driving current during the certain time period and increases the data voltage accordingly. However, the comparison operation method does not take into account the driving conditions of the display device (e.g., temperature changes of the display panel, characteristic differences of each pixel included in the display panel, etc.). Therefore, there may be a limitation that the driving current of the display panel is higher than the desired current level and / or the driving current of the display panel is lower than the desired current level. Undercompensation.
[0004] The above information disclosed in this Background section is for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not constitute prior art. Summary of the invention
[0005] One or more example embodiments of the present disclosure are directed to a display device having an improved response speed.
[0006] One or more example embodiments of the present disclosure relate to a method of operating a display apparatus.
[0007] According to one or more example embodiments of the present disclosure, a display device includes: a display panel including a plurality of pixels; a power manager configured to provide a first power supply voltage to the display panel through a first power supply line and to provide a second power supply voltage to the display panel through a second power supply line, and to measure a first current flowing through the first power supply line and a second current flowing through the second power supply line; and a panel driver configured to provide a panel driving voltage to the display panel and to control the panel driving voltage according to a current difference between the first current and the second current.
[0008] In example embodiments, each pixel may include at least one transistor, the panel driving voltage may include a gate-on voltage to turn on the transistor, and the panel driver may be configured to control the gate-on voltage according to the current difference.
[0009] In example embodiments, the transistor may be a positive channel metal oxide semiconductor (PMOS) transistor, and the panel driver may be configured to reduce the gate-on voltage when the current difference is greater than or equal to a reference current difference, and maintain the gate-on voltage when the current difference is less than the reference current difference.
[0010] In example embodiments, the panel driver may include a gate-on voltage table for storing a voltage level of a gate-on voltage corresponding to a current difference, and the panel driver may be configured to control the gate-on voltage using the gate-on voltage table to provide a gate-on voltage having a voltage level corresponding to the current difference.
[0011] In example embodiments, each pixel may include at least one transistor, the panel driving voltage may include a gate-off voltage to turn off the transistor, and the panel driver may be configured to control the gate-off voltage according to the current difference.
[0012] In example embodiments, the transistor may be a PMOS transistor, and the panel driver may be configured to reduce a gate-off voltage when the current difference is greater than or equal to a reference current difference, and maintain the gate-off voltage when the current difference is less than the reference current difference.
[0013] In example embodiments, the panel driver may include a gate-off voltage table for storing voltage levels of gate-off voltages corresponding to the current difference, and the panel driver may be configured to control the gate-off voltage using the gate-off voltage table to provide a gate-off voltage having a voltage level corresponding to the current difference.
[0014] In example embodiments, each pixel may include an organic light emitting diode, the panel driving voltage may include an initialization voltage to initialize the organic light emitting diode, and the panel driver may be configured to control the initialization voltage according to the current difference.
[0015] In example embodiments, the panel driver may be configured to increase the initialization voltage when the current difference is greater than or equal to a reference current difference, and maintain the initialization voltage when the current difference is less than the reference current difference.
[0016] In example embodiments, the panel driver may include an initialization voltage table for storing voltage levels of initialization voltages corresponding to the current differences, and the panel driver may be configured to control the initialization voltage using the initialization voltage table to provide the initialization voltage having a voltage level corresponding to the current difference.
[0017] In an example embodiment, the power manager may include: a first power circuit configured to provide a first power voltage to the display panel through a first power line; a second power circuit configured to provide a second power voltage to the display panel through a second power line; a first current measurement circuit connected to the first power line and configured to measure a first current; a second current measurement circuit connected to the second power line and configured to measure a second current; a leakage current calculator configured to calculate a current difference between the first current and the second current; and a compensation signal generator configured to generate a leakage current compensation signal according to the current difference. The panel driver may be configured to control the panel driving voltage in response to the leakage current compensation signal.
[0018] In example embodiments, the display panel may include a display substrate, the power manager may be located on a power management substrate at a first side of the display substrate, and the panel driver may be located on a panel driving substrate at a second side of the display substrate.
[0019] According to one or more example embodiments of the present disclosure, a display device includes: a display panel including a plurality of pixels; a power manager configured to provide a first power supply voltage to the display panel through a first power supply line and a second power supply voltage to the display panel through a second power supply line, and to measure a first current flowing through the first power supply line and a second current flowing through the second power supply line; and a panel driver configured to provide a gate-on voltage, a gate-off voltage, and an initialization voltage, and to control the gate-on voltage, the gate-off voltage, and the initialization voltage according to a current difference between the first current and the second current.
[0020] In an example embodiment, the panel driver may be configured to reduce the gate-on voltage, reduce the gate-off voltage, and increase the initialization voltage when the current difference is greater than or equal to a reference current difference, and the panel driver may be configured to maintain the gate-on voltage, the gate-off voltage, and the initialization voltage when the current difference is less than the reference current difference.
[0021] In an example embodiment, the panel driver may include a gate-on voltage table, a gate-off voltage table, and an initialization voltage table, the gate-on voltage table may be configured to store a first voltage level of the gate-on voltage corresponding to the current difference, the gate-off voltage table may be configured to store a second voltage level of the gate-off voltage corresponding to the current difference, the initialization voltage table may be configured to store a third voltage level of the initialization voltage corresponding to the current difference, and the panel driver may be configured to control the gate-on voltage using the gate-on voltage table to provide a gate-on voltage having a first voltage level corresponding to the current difference, control the gate-off voltage using the gate-off voltage table to provide a gate-off voltage having a second voltage level corresponding to the current difference, and control the initialization voltage using the initialization voltage table to provide an initialization voltage having a third voltage level corresponding to the current difference.
[0022] In an example embodiment, the power manager may include: a first power circuit configured to provide a first power voltage to the display panel through a first power line; a second power circuit configured to provide a second power voltage to the display panel through a second power line; a first current measurement circuit connected to the first power line and configured to measure a first current; a second current measurement circuit connected to the second power line and configured to measure a second current; a leakage current calculator configured to calculate a current difference between the first current and the second current; and a compensation signal generator configured to generate a leakage current compensation signal according to the current difference. The panel driver may be configured to control a gate-on voltage, a gate-off voltage, and an initialization voltage in response to the leakage current compensation signal.
[0023] According to one or more example embodiments of the present disclosure, a method for operating a display device includes: providing a first power supply voltage to a display panel through a first power supply line; providing a second power supply voltage to the display panel through a second power supply line; providing a panel driving voltage to the display panel; measuring a first current flowing through the first power supply line and a second current flowing through the second power supply line; and controlling the panel driving voltage based on a current difference between the first current and the second current.
[0024] In an example embodiment, the panel driving voltage may include a gate-on voltage to turn on the transistor, and controlling the panel driving voltage according to the current difference may include: reducing the gate-on voltage according to the current difference when the current difference is greater than or equal to a reference current difference; and maintaining the gate-on voltage according to the current difference when the current difference is less than the reference current difference.
[0025] In an example embodiment, the panel driving voltage may include a gate-off voltage to turn off the transistor, and controlling the panel driving voltage according to the current difference may include: reducing the gate-off voltage according to the current difference when the current difference is greater than or equal to a reference current difference; and maintaining the gate-off voltage according to the current difference when the current difference is less than the reference current difference.
[0026] In an example embodiment, the panel driving voltage may include an initialization voltage to initialize the organic light emitting diode, and controlling the panel driving voltage according to the current difference may include: increasing the initialization voltage according to the current difference when the current difference is greater than or equal to a reference current difference; and maintaining the initialization voltage according to the current difference when the current difference is less than the reference current difference.
[0027] According to one or more example embodiments of the present disclosure, a method for operating a display device can be provided, because the method can calculate the current difference between the first current flowing through the first power line and the second current flowing through the second power line, and can control the panel driving voltage (e.g., gate-on voltage, gate-off voltage, initialization voltage, etc.) provided to the display panel in real time or substantially in real time (e.g., near real time) according to (e.g., based on) the current difference, so the method can enable the display panel to generate a driving current having a current level corresponding to the data voltage. Therefore, the display device and the method for driving the display device according to one or more example embodiments can improve the response speed of the display panel, and can prevent or substantially prevent over-compensation and / or under-compensation of the driving current. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The above and other aspects and features of the present disclosure will become more apparent to those skilled in the art from the following detailed description of example embodiments with reference to the accompanying drawings.
[0029] Figure 1 is a diagram illustrating a display device according to one or more example embodiments.
[0030] Figure 2 It is shown Figure 1 A block diagram of a display device.
[0031] Figure 3 It is shown Figure 1 A block diagram of an example of a display panel included in a display device.
[0032] Figure 4 It is shown Figure 1 A circuit diagram of an example of a pixel included in a display device.
[0033] Figure 5 It is shown Figure 1 A block diagram of an example of a panel driver included in a display device.
[0034] Figure 6 It is shown Figure 1 A block diagram of an example of a power manager included in a display device.
[0035] Figure 7 is a graph showing a current difference between a first current and a second current.
[0036] Figure 8 It is shown based on Figure 7 Graph of the current difference and the driving current.
[0037] Fig. 9 It is shown Figure 5 FIG. 1 is a diagram of an example of a gate-on voltage table included in a panel driver.
[0038] Fig.10 It is shown Figure 5 FIG. 1 is a diagram of an example of a gate-off voltage table included in a panel driver.
[0039] Fig.11 It is shown Figure 5 FIG. 1 is a diagram of an example of an initialization voltage table included in a panel driver.
[0040] Fig.12 is a flowchart illustrating a method of operating a display apparatus according to one or more example embodiments.
[0041] Fig.13 is a block diagram illustrating an electronic device including a display device according to one or more example embodiments. DETAILED DESCRIPTION
[0042] Hereinafter, example embodiments will be described in more detail with reference to the accompanying drawings, in which similar reference numerals refer to similar elements throughout. However, the present disclosure may be implemented in various different forms and should not be construed as being limited to the embodiments shown herein. On the contrary, these embodiments are provided as examples so that the present disclosure will be thorough and complete, and will fully convey the various aspects and features of the present disclosure to those skilled in the art. Therefore, it is not necessary to describe the processing, elements and techniques that are not necessary for a person of ordinary skill in the art to fully understand the various aspects and features of the present disclosure. Unless otherwise stated, similar reference numerals represent similar elements throughout the drawings and written descriptions, and therefore, their descriptions may not be repeated.
[0043] In the accompanying drawings, for the sake of clarity, the relative sizes of elements, layers and zones may be exaggerated and / or simplified. For ease of explanation, spatial relative terms such as "below", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship between an element or feature as shown in the figure and another (multiple) element or another (multiple) feature. It will be understood that, in addition to the orientation depicted in the figure, spatial relative terms are intended to also cover different orientations of the device in use or operation. For example, if the device in the figure is flipped, the element described as "below" or "below" or "below" of other elements or features will then be oriented to "above" other elements or features. Therefore, the example terms "below" and "below" can cover the two orientations of above and below. The device can be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptors used in this article should be interpreted accordingly.
[0044] It will be understood that, although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the spirit and scope of the present disclosure, the first element, component, region, layer or part described below can be referred to as the second element, component, region, layer or part.
[0045] It will be understood that when an element or layer is referred to as being "on," "connected to" or "coupled to" another element or layer, it can be directly on, directly connected to or directly coupled to the other element or layer, or one or more intervening elements or layers may be present. Additionally, it will be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or one or more intervening elements or layers may also be present.
[0046] The wording used herein is for the purpose of describing a particular embodiment, and is not intended to be a limitation of the present disclosure. As used herein, the singular forms "one" and "an" are intended to also include plural forms, except where the context clearly indicates otherwise. It will also be understood that when used in this specification, the terms "comprise", "comprising", "include", and "including", "has", "have", and "having" indicate the presence of stated features, integral bodies, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integral bodies, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more associated listed items. When a statement such as "at least one of..." is after a series of elements, the elements of the entire series are modified and the individual elements in the series are not modified.
[0047] As used herein, the terms "substantially," "approximately," and similar terms are used as terms of approximation, and not as terms of degree, and are intended to account for the inherent variations in measurements or calculations that one of ordinary skill in the art would recognize. In addition, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure." As used herein, the terms "use," "in use," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized," respectively. Moreover, the term "exemplary" is intended to refer to an example or illustration.
[0048] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an ideal or overly rigid sense, except where explicitly defined herein.
[0049] Figure 1 is a diagram illustrating a display device according to one or more example embodiments of the present disclosure. Figure 2 It is shown Figure 1 A block diagram of a display device. Figure 3 It is shown Figure 1 A block diagram of an example of a display panel included in a display device. Figure 4 It is shown Figure 1 A circuit diagram of an example of a pixel included in a display device. Figure 5 It is shown Figure 1A block diagram of an example of a panel driver included in a display device. Figure 6 It is shown Figure 1 A block diagram of an example of a power manager included in a display device.
[0050] Reference Figures 1 to 6 , the display device 1000 may include a display panel 100, a power manager 300, and a panel driver 500. The display panel 100 may include a plurality of pixels PX. The power manager 300 may provide a first power supply voltage ELVDD to the display panel 100 through a first power supply line ELVDDL, may provide a second power supply voltage ELVSS to the display panel 100 through a second power supply line ELVSSL, and may measure a first current IELVDD flowing through the first power supply line ELVDDL and a second current IELVSS flowing through the second power supply line ELVSSL. The panel driver 500 may provide a panel driving voltage to the display panel 100, and may control the panel driving voltage according to (e.g., based on) a current difference LI between the first current IELVDD and the second current IELVSS.
[0051] In an example embodiment, if Figure 1 As shown in , the display panel 100 may include a display substrate 10. The power manager 300 may be provided on a power management substrate 30 located at a first side of the display substrate 10 (e.g., located on the first side of the display substrate 10). The panel driver 500 may be provided on a panel drive substrate 50 located at a second side of the display substrate 10 (e.g., located on the second side of the display substrate 10). For example, the power management substrate 30 may be located at the right side of the display substrate 10 (e.g., located on the right side of the display substrate 10), and the panel drive substrate 50 may be located at the lower side of the display substrate 10 (e.g., located on the lower side of the display substrate 10). Signals and voltages may be provided from the power manager 300 and the panel driver 500 to the display panel 100 through pads provided between the display substrate 10 and the power management substrate 30 and pads provided between the display substrate 10 and the panel drive substrate 50.
[0052] like Figure 3 As shown in , the display panel 100 may include a display portion (eg, display area) 110 including pixels PX, a gate driver 131 for providing a gate signal GS to the pixels PX, and an emission driver 133 for providing an emission signal EM to the pixels PX.
[0053] The gate driver 131 may be provided with a gate-on voltage VGL, a gate-off voltage VGH, and a gate control signal GCTRL, and may generate a gate signal GS. For example, the gate signal GS may include a first gate signal GW and a second gate signal GI. The gate signal GS may have a gate-on voltage VGL during an activation period of the gate signal GS, and may have a gate-off voltage VGH during an inactive period of the gate signal GS. For example, the activation period may correspond to (for example, may be) a period during which a transistor provided with the gate signal GS is turned on, and the inactive period may correspond to (for example, may be) a period during which a transistor provided with the gate signal GS is turned off. In some example embodiments, the gate driver 131 may be directly mounted on the display panel 100, or may be integrated into a peripheral portion (for example, a peripheral area or a non-display area) of the display panel 100. In other example embodiments, the gate driver 131 may be connected to the display panel 100 in the form of a chip on film (COF).
[0054] The emission driver 133 may be provided with a gate-on voltage VGL, a gate-off voltage VGH, and an emission control signal ECTRL, and may generate an emission signal EM. The emission signal EM may have a gate-on voltage VGL during an activation period of the emission signal EM, and may have a gate-off voltage VGH during an inactive period of the emission signal EM. For example, the activation period may correspond to (e.g., may be) a period during which a transistor provided with the emission signal EM is turned on, and the inactive period may correspond to (e.g., may be) a period during which a transistor provided with the emission signal EM is turned off. In some example embodiments, the emission driver 133 may be directly mounted on the display panel 100, or may be integrated into a peripheral portion (e.g., a peripheral area or a non-display area) of the display panel 100. In other example embodiments, the emission driver 133 may be connected to the display panel 100 in the form of a chip on film (COF).
[0055] like Figure 4 As shown in , each of the plurality of pixels PX may include a pixel circuit PC and an organic light emitting diode OLED electrically connected to the pixel circuit PC. The pixel circuit PC may include first to seventh transistors T1, T2, T3, T4, T5, T6 and T7 and a storage capacitor CST.
[0056] The storage capacitor CST may include a first terminal and a second terminal. The first terminal of the storage capacitor CST may be connected to the first transistor T1, and the second terminal of the storage capacitor CST may be provided with the first power supply voltage ELVDD. During the inactive period of the first gate signal GW, the storage capacitor CST may maintain or substantially maintain the voltage level of the gate terminal of the first transistor T1.
[0057] The first transistor T1 may include a gate terminal, a first terminal (e.g., a source terminal), and a second terminal (e.g., a drain terminal). The gate terminal of the first transistor T1 may be connected to the first terminal of the storage capacitor CST. The first terminal of the first transistor T1 may be connected to the second transistor T2, and therefore, the first terminal of the first transistor T1 may be provided with a data voltage DS. The second terminal of the first transistor T1 may be connected to the organic light emitting diode OLED through the sixth transistor T6. The first transistor T1 may provide a driving current ID to the organic light emitting diode OLED.
[0058] The second transistor T2 may include a gate terminal, a first terminal (e.g., a source terminal), and a second terminal (e.g., a drain terminal). The gate terminal of the second transistor T2 may be provided with a first gate signal GW, and the second transistor T2 may be turned on or off in response to the first gate signal GW. The first terminal of the second transistor T2 may be provided with a data voltage DS. During a period in which the second transistor T2 is turned on, the second terminal of the second transistor T2 may provide the data voltage DS to the first terminal of the first transistor T1.
[0059] The third transistor T3 may include a gate terminal, a first terminal (e.g., a source terminal), and a second terminal (e.g., a drain terminal). The gate terminal of the third transistor T3 may be provided with a first gate signal GW. The first terminal of the third transistor T3 may be connected to the gate terminal of the first transistor T1. The second terminal of the third transistor T3 may be connected to the second terminal of the first transistor T1.
[0060] When the third transistor T3 is turned on in response to the first gate signal GW, the third transistor T3 may cause the first transistor T1 to be diode-connected. When the first transistor T1 is diode-connected, a voltage difference corresponding to the threshold voltage of the first transistor T1 may appear between the gate terminal of the first transistor T1 and the first terminal of the first transistor T1. Therefore, a voltage obtained by adding the data voltage DS supplied to the first terminal of the first transistor T1 during the period in which the third transistor T3 is turned on to the voltage difference corresponding to the threshold voltage may be supplied to the gate terminal of the first transistor T1. Therefore, the third transistor T3 may compensate for the threshold voltage of the first transistor T1.
[0061] The fourth transistor T4 may include a gate terminal, a first terminal (e.g., a source terminal), and a second terminal (e.g., a drain terminal). The gate terminal of the fourth transistor T4 may be provided with a second gate signal GI. The first terminal of the fourth transistor T4 may be provided with an initialization voltage VINT. The second terminal of the fourth transistor T4 may be connected to the gate terminal of the first transistor T1.
[0062] The fourth transistor T4 may be turned on or off in response to the second gate signal GI. During the period in which the fourth transistor T4 is turned on, the initialization voltage VINT may be provided to the gate terminal of the first transistor T1. Therefore, the fourth transistor T4 may initialize the gate terminal of the first transistor T1 to the initialization voltage VINT.
[0063] The fifth transistor T5 may include a gate terminal, a first terminal (e.g., a source terminal), and a second terminal (e.g., a drain terminal). The gate terminal of the fifth transistor T5 may be provided with an emission signal EM. The first terminal of the fifth transistor T5 may be provided with a first power supply voltage ELVDD. When the fifth transistor T5 is turned on in response to the emission signal EM, the fifth transistor T5 may provide the first power supply voltage ELVDD to the first transistor T1.
[0064] The sixth transistor T6 may include a gate terminal, a first terminal (e.g., a source terminal), and a second terminal (e.g., a drain terminal). The gate terminal of the sixth transistor T6 may be provided with an emission signal EM. The first terminal of the sixth transistor T6 may be connected to the second terminal of the first transistor T1. When the sixth transistor T6 is turned on in response to the emission signal EM, the sixth transistor T6 may transmit the drive current ID to the organic light emitting diode OLED.
[0065] The seventh transistor T7 may include a gate terminal, a first terminal (e.g., a source terminal), and a second terminal (e.g., a drain terminal). The gate terminal of the seventh transistor T7 may be provided with a second gate signal GI. The first terminal of the seventh transistor T7 may be provided with an initialization voltage VINT. The second terminal of the seventh transistor T7 may be connected to a first terminal of the organic light emitting diode OLED. When the seventh transistor T7 is turned on in response to the second gate signal GI, the seventh transistor T7 may provide the initialization voltage VINT to the organic light emitting diode OLED. In other words, the seventh transistor T7 may provide the initialization voltage VINT to the parasitic capacitor C_EL of the organic light emitting diode OLED, and the initialization voltage VINT may initialize the parasitic capacitor C_EL of the organic light emitting diode OLED (e.g., may discharge the parasitic capacitor C_EL of the organic light emitting diode OLED).
[0066] In various embodiments, each of the first to seventh transistors T1, T2, T3, T4, T5, T6, and T7 may be a PMOS transistor or a negative channel metal oxide semiconductor (NMOS) transistor. For example, in the case where the fifth transistor T5 is a PMOS transistor, the fifth transistor T5 may be turned on when the emission signal EM has a negative voltage level, and may be turned off when the emission signal EM has a positive voltage level. On the other hand, in the case where the fifth transistor T5 is an NMOS transistor, the fifth transistor T5 may be turned on when the emission signal EM has a positive voltage level, and may be turned off when the emission signal EM has a negative voltage level.
[0067] The voltage that turns on the transistor may be defined as a gate-on voltage. For example, when the transistor is a PMOS transistor, the gate-on voltage VGL may have a negative voltage level. Hereinafter, for ease of description, transistors (e.g., T2, T3, T4, T5, T6, and T7) provided with a gate signal GS or an emission signal EM are described as PMOS transistors, but the present disclosure is not limited thereto.
[0068] It is obvious to those skilled in the art that Figure 4 The connection structure of the pixel circuit PC shown in FIG. 1 is an illustrative example, and therefore, various modifications may be made. For example, when the pixel circuit PC does not include the third to seventh transistors T3, T4, T5, T6, and T7, Figure 4 The connection structure of other components in the pixel circuit PC shown in FIG. 1 may be variously modified to form a suitable connection structure of the components in the pixel circuit PC.
[0069] The organic light emitting diode OLED may include a first terminal (e.g., an anode terminal) and a second terminal (e.g., a cathode terminal). The first terminal of the organic light emitting diode OLED may be connected to the first transistor T1 through the sixth transistor T6, and the second terminal of the organic light emitting diode OLED may be provided with a second power supply voltage ELVSS. The organic light emitting diode OLED may be provided with a driving current ID from the first transistor T1. When the organic light emitting diode OLED emits light according to (e.g., based on) the driving current ID, the parasitic capacitor C_EL may be charged by a voltage provided to the organic light emitting diode OLED. Therefore, the current provided from the first transistor T1 may be divided into a leakage current provided to the parasitic capacitor C_EL and a driving current ID provided to the organic light emitting diode OLED. In other words, when the leakage current is provided to the parasitic capacitor C_EL, the organic light emitting diode OLED may be provided with a driving current ID that is less than (e.g., lower than) a desired current corresponding to the data voltage DS provided by the first transistor T1. Therefore, the display panel 100 may display an image having a brightness lower than a desired brightness corresponding to the data voltage DS. On the other hand, in the display device 1000 according to one or more example embodiments of the present disclosure, although a leakage current may be provided to the parasitic capacitor C_EL, by controlling the panel driving voltage so that the driving current ID approaches (e.g., increases to or decreases to) a desired current level corresponding to the data voltage DS, the display panel 100 may display an image having a brightness that is the same as or substantially the same as (e.g., close to or near) the desired brightness corresponding to the data voltage DS.
[0070] like Figure 5 As shown in , the panel driver 500 may be provided with input image data RGB and a control signal CTRL from an external device (e.g., a graphics processor), and may be provided with a leakage current compensation signal LCS from the power manager 300. The panel driver 500 may generate a gate control signal GCTRL, an emission control signal ECTRL, a data voltage DS, and a panel driving voltage based on the provided data and signals, and may provide the gate control signal GCTRL, the emission control signal ECTRL, the data voltage DS, and the panel driving voltage to the display panel 100. The panel driving voltage may include a gate-on voltage VGL, a gate-off voltage VGH, and an initialization voltage VINT.
[0071] For example, the panel driver 500 may include a panel driving voltage generator 510, a timing controller 530, and a data driver 550. In example embodiments, the panel driver 500 may be disposed on a display driving substrate 50 located at (e.g., located on) the second side of the display substrate 10. For example, the panel driving substrate 50 may be located below the display substrate 10, and signals and voltages generated by the panel driving voltage generator 510, the timing controller 530, and the data driver 550 may be provided to the display panel 100 through pads that electrically connect the panel driving substrate 50 and the display substrate 10 to each other.
[0072] The panel driving voltage generator 510 may generate a gate-on voltage VGL, a gate-off voltage VGH, and an initialization voltage VINT. In addition, the panel driving voltage generator 510 may control the gate-on voltage VGL, the gate-off voltage VGH, and the initialization voltage VINT according to (e.g., based on) a leakage current compensation signal LCS. The leakage current compensation signal LCS may be generated according to (e.g., based on) a current difference LI between the first current IELVDD and the second current IELVSS. In other words, the gate-on voltage VGL, the gate-off voltage VGH, and the initialization voltage VINT may be controlled according to (e.g., based on) a current difference LI between the first current IELVDD and the second current IELVSS, which will be referred to below. Figures 7 to 11 Let's describe it in more detail.
[0073] The timing controller 530 may be provided with input image data RGB and a control signal CTRL from an external device, and may be provided with a leakage current compensation signal LCS from the power manager 300. For example, the input image data RGB may correspond to (e.g., may be) RGB image data including red image data, green image data, and blue image data. The control signal CTRL may include a vertical synchronization signal, a horizontal synchronization signal, an input data enable signal, a main clock signal, etc. The timing controller 530 may generate image data RGB', a data control signal DCTRL, a gate control signal GCTRL, and an emission control signal ECTRL according to (e.g., based on) the input image data RGB, the control signal CTRL, and the leakage current compensation signal LCS.
[0074] The data driver 550 may generate a data voltage DS according to (e.g., based on) the image data RGB' and the data control signal DCTRL provided from the timing controller 530, and may provide the data voltage DS to the pixel PX. In an example embodiment, the data driver 550 may be connected to the display panel 100 in the form of a chip-on-film (COF). In another example embodiment, the data driver 550 may be directly mounted on the display panel 100, or may be integrated into a peripheral portion (e.g., a peripheral area or a non-display area) of the display panel 100.
[0075] like Figure 6 As shown in , the power manager 300 may provide the first power voltage ELVDD to the display panel 100 through the first power line ELVDDL, and provide the second power voltage ELVSS to the display panel 100 through the second power line ELVSSL. In addition, the power manager 300 may measure the first current IELVDD flowing through the first power line ELVDDL and the second current IELVSS flowing through the second power line ELVSSL. In addition, the power manager 300 may generate a leakage current compensation signal LCS according to (e.g., based on) the current difference LI between the first current IELVDD and the second current IELVSS, and may provide the leakage current compensation signal LCS to the panel driver 500. In an example embodiment, the power manager 300 may be disposed on a power management substrate 30 located at (e.g., on) a first side of the display substrate 10. For example, as described above, the power management substrate 30 may be located at (e.g., on) the right side of the display substrate 10.
[0076] For example, the power manager 300 may include a first power circuit 311 and a second power circuit 313. The first power circuit 311 may provide a first power voltage ELVDD to the display panel 100 through a first power line ELVDDL. The second power circuit 313 may provide a second power voltage ELVSS to the display panel 100 through a second power line ELVSSL. In example embodiments, the first power voltage ELVDD may be a high power voltage, the second power voltage ELVSS may be a low power voltage, and the first power voltage ELVDD may be higher than the second power voltage ELVSS.
[0077] In some embodiments, the power manager 300 may further include a first current measurement circuit 321, a second current measurement circuit 323, a leakage current calculator 330, and a compensation signal generator 350. The first current measurement circuit 321 may be connected to the first power line ELVDDL, and may measure a first current IELVDD flowing through the first power line ELVDDL. The second current measurement circuit 323 may be connected to the second power line ELVSSL, and may measure a second current IELVSS flowing through the second power line ELVSSL. The leakage current calculator 330 may calculate a current difference LI between the first current IELVDD and the second current IELVSS. The compensation signal generator 350 may be provided with the current difference LI, and may generate a leakage current compensation signal LCS. The compensation signal generator 350 may provide the leakage current compensation signal LCS to the panel driver 500.
[0078] Figure 7 is a graph showing a current difference between a first current and a second current. Figure 8 It is shown based on Figure 7 Graph of the current difference and the driving current.
[0079] Reference Figure 2 , Figure 4 , Figure 6 , Figure 7 and Figure 8, the comparison display device may include a display panel and a panel driver. The display panel may be provided with a data voltage from the panel driver, may generate a first drive current ID1 corresponding to the data voltage, and may display an image having a brightness corresponding to the data voltage during a first normal period NP1. However, when an image to be displayed on the display panel changes (for example, when the image changes from a black image to a white image), the panel driver provides the changed data voltage to the display panel, and the display panel may generate a changed second drive current ID2. In this case, when a leakage current occurs inside the display panel, a first current difference LI1 may occur between a first current provided to (or input to) the display panel and a second current provided (or output) from the display panel, and a certain time may be required to generate the changed second drive current ID2. The certain time may be a first transition period TP1 between the first normal period NP1 and the second normal period NP2. In other words, the response speed of the display panel may be delayed due to the leakage current. In addition, in order to improve the response speed of the display panel, the comparative display device may use an operation method for calculating the driving current during the first transition period TP1 and increasing the data voltage accordingly, but the operation method of the comparative display device does not consider the driving conditions of the comparative display device (e.g., temperature changes of the display panel, characteristic differences of each pixel included in the display panel, etc.). Therefore, the operation method of the comparative display device may result in overcompensation of the driving current of the display panel having a current level higher than the desired current level, and / or undercompensation of the driving current having a current level lower than the desired current level.
[0080] Fig. 9 It is shown Figure 5 FIG. 1 is a diagram of an example of a gate-on voltage table included in a panel driver. Fig.10 It is shown Figure 5 FIG. 1 is a diagram of an example of a gate-off voltage table included in a panel driver. Fig.11 It is shown Figure 5 FIG. 1 is a diagram of an example of an initialization voltage table included in a panel driver.
[0081] Reference Figure 2 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 and Fig. 9 , the panel driver 500 according to one or more example embodiments of the present disclosure may control the gate-on voltage VGL according to (eg, based on) the current difference LI.
[0082] For example, the panel driving voltage generator 510 may be provided with the leakage current compensation signal LCS from the power manager 300 and may control the gate-on voltage VGL in response to the leakage current compensation signal LCS. In other words, the panel driving voltage generator 510 may control the gate-on voltage VGL according to (eg, based on) the first current difference LI1.
[0083] In an example embodiment, when the first current difference LI1 is greater than or equal to the reference current difference, the panel driving voltage generator 510 may reduce the gate-on voltage VGL. For example, when the reference current difference is about 2 mA and the first current difference LI1 is about 2.83 mA, the panel driving voltage generator 510 may reduce the gate-on voltage VGL. In another example, when the first current difference LI1 is less than the reference current difference, the panel driving voltage generator 510 may maintain or substantially maintain the gate-on voltage VGL. For example, when the reference current difference is about 2 mA and the first current difference LI1 is about 1 mA, the panel driving voltage generator 510 may maintain the gate-on voltage VGL at the previously generated gate-on voltage VGL. The reference current difference may be appropriately determined (e.g., set or predetermined) as needed or desired.
[0084] In another example embodiment, the panel driving voltage generator 510 may include a gate-on voltage table VGL_TB for storing a first voltage level of the gate-on voltage VGL corresponding to the first current difference LI1. In this case, the panel driving voltage generator 510 may control the gate-on voltage VGL using the gate-on voltage table VGL_TB so that the gate-on voltage VGL has a first voltage level corresponding to the first current difference LI1. For example, Fig. 9 As shown in FIG. , when the first current difference LI1 (eg, corresponding to Fig. 9 ) is about 0 mA, the first voltage level of the gate-on voltage VGL generated by the panel driving voltage generator 510 may be about -10 V. In another example, when the first current difference LI1 is about 2.83 mA, the first voltage level of the gate-on voltage VGL generated by the panel driving voltage generator 510 may be about -10.4 V.
[0085] Since the panel driving voltage generator 510 can control the gate-on voltage VGL according to (e.g., based on) the first current difference LI1, the conduction characteristics of the transistor supplied with the gate-on voltage VGL can be improved. Since the conduction characteristics of the transistor supplied with the gate-on voltage VGL in the pixel circuit PC are improved, the transistor can transmit more current, and the driving current ID of the display panel 100 can be increased. Therefore, since the gate-on voltage VGL supplied to the display panel 100 is controlled, as shown in FIG. Figure 7As shown in , the first current difference LI1 can be reduced to the second current difference LI2 by the controlled gate-on voltage VGL, and the first transition period TP1 can be shortened to the second transition period TP2 by the controlled gate-on voltage VGL. Figure 8 As shown in , the time for changing from the first driving current ID1 to the second driving current ID2 can be reduced (eg, can be shortened).
[0086] Reference Figure 2 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 and Fig.10 , the panel driver 500 according to one or more example embodiments of the present disclosure may control the gate-off voltage VGH according to (eg, based on) the current difference LI.
[0087] For example, the panel driving voltage generator 510 may be provided with the leakage current compensation signal LCS from the power manager 300 and may control the gate-off voltage VGH in response to the leakage current compensation signal LCS. In other words, the panel driving voltage generator 510 may control the gate-off voltage VGH according to (eg, based on) the first current difference LI1.
[0088] In an example embodiment, when the first current difference LI1 is greater than or equal to the reference current difference, the panel driving voltage generator 510 may reduce the gate-off voltage VGH. For example, when the reference current difference is about 7 mA and the first current difference LI1 is about 7.08 mA, the panel driving voltage generator 510 may reduce the gate-off voltage VGH. In another example, when the first current difference LI1 is less than (e.g., lower than) the reference current difference, the panel driving voltage generator 510 may maintain or substantially maintain the gate-off voltage VGH. For example, when the reference current difference is about 7 mA and the first current difference LI1 is about 6 mA, the panel driving voltage generator 510 may maintain or substantially maintain the gate-off voltage VGH at the previously generated gate-off voltage VGH. The reference current difference may be appropriately determined (e.g., set or predetermined) as needed or desired.
[0089] In another example embodiment, the panel driving voltage generator 510 may include a gate-off voltage table VGH_TB for storing a second voltage level of the gate-off voltage VGH corresponding to the first current difference LI1. In this case, the panel driving voltage generator 510 may control the gate-off voltage VGH using the gate-off voltage table VGH_TB so that the gate-off voltage VGH has a second voltage level corresponding to the first current difference LI1. For example, Fig.10 As shown in FIG. , when the first current difference LI1 (eg, corresponding to Fig.10) is about 0 mA, the second voltage level of the gate-off voltage VGH generated by the panel driving voltage generator 510 may be about 6 V. In another example, when the first current difference LI1 is about 7.08 mA, the second voltage level of the gate-off voltage VGH generated by the panel driving voltage generator 510 may be about 5.5 V.
[0090] Since the panel driving voltage generator 510 can control the gate-off voltage VGH according to (e.g., based on) the first current difference LI1, the cut-off characteristic of the transistor provided with the gate-off voltage VGH can be weakened. Since the cut-off characteristic of the transistor provided with the gate-off voltage VGH in the pixel circuit PC is weakened, the transistor can transmit current even during the inactive period, and the driving current ID of the display panel 100 can be increased. Therefore, since the gate-off voltage VGH provided to the display panel 100 is controlled, as shown in FIG. Figure 7 As shown in , the first current difference LI1 can be reduced to the second current difference LI2 by the controlled gate-off voltage VGH, and the first transition period TP1 can be shortened to the second transition period TP2 by the controlled gate-off voltage VGH. Figure 8 As shown in , the time for changing from the first driving current ID1 to the second driving current ID2 can be reduced (eg, can be shortened).
[0091] Although the transistor provided with the gate-on voltage VGL and the gate-off voltage VGH is described as a PMOS transistor, the present disclosure is not limited thereto. For example, in the case where the transistor provided with the gate-on voltage VGL and the gate-off voltage VGH is an NMOS transistor, the panel driver 500 may increase the gate-on voltage VGL and / or the gate-off voltage VGH according to (e.g., based on) the current difference LI. In this case, since the gate-on voltage VGL and / or the gate-off voltage VGH are increased, the conduction characteristics of the transistor provided with the gate-on voltage VGL may be improved, and the cut-off characteristics of the transistor provided with the gate-off voltage VGH may be weakened.
[0092] Reference Figure 2 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 and Fig.11 , the panel driver 500 according to one or more example embodiments of the present disclosure may control the initialization voltage VINT according to (eg, based on) the current difference LI.
[0093] For example, the panel driving voltage generator 510 may be provided with the leakage current compensation signal LCS from the power manager 300 and may control the initialization voltage VINT in response to the leakage current compensation signal LCS. In other words, the panel driving voltage generator 510 may control the initialization voltage VINT according to (eg, based on) the first current difference LI1.
[0094] In an example embodiment, when the first current difference LI1 is greater than or equal to the reference current difference, the panel driving voltage generator 510 may increase the initialization voltage VINT. For example, when the reference current difference is about 5 mA and the first current difference LI1 is about 8 mA, the panel driving voltage generator 510 may increase the initialization voltage VINT. In another example, when the first current difference LI1 is less than the reference current difference, the panel driving voltage generator 510 may maintain or substantially maintain the initialization voltage VINT. For example, when the reference current difference is about 5 mA and the first current difference LI1 is about 4 mA, the panel driving voltage generator 510 may maintain or substantially maintain the initialization voltage VINT at the previously generated initialization voltage VINT. The reference current difference may be appropriately determined (e.g., set or predetermined) as needed or desired.
[0095] In another example embodiment, the panel driving voltage generator 510 may include an initialization voltage table VINT_TB for storing a third voltage level of the initialization voltage VINT corresponding to the first current difference LI1. In this case, the panel driving voltage generator 510 may control the initialization voltage VINT using the initialization voltage table VINT_TB so that the initialization voltage VINT has a third voltage level corresponding to the first current difference LI1. For example, Fig.11 As shown in FIG. , when the first current difference LI1 (eg, corresponding to Fig.11 ) is about 0 mA, the third voltage level of the initialization voltage VINT generated by the panel driving voltage generator 510 may be about -5 V. In another example, when the first current difference LI1 is about 8 mA, the third voltage level of the initialization voltage VINT generated by the panel driving voltage generator 510 may be about -4.5 V.
[0096] Since the panel driving voltage generator 510 may control the initialization voltage VINT according to (e.g., based on) the first current difference LI1, the parasitic capacitor C_EL of the organic light emitting diode OLED supplied with the initialization voltage VINT may be relatively less initialized (e.g., less discharged). Therefore, current may remain in the parasitic capacitor C_EL of the organic light emitting diode OLED, and the driving current ID of the display panel 100 may be increased. Since the initialization voltage VINT supplied to the display panel 100 is controlled, as shown in FIG. Figure 7As shown in FIG. 1 , the first current difference LI1 can be reduced to the second current difference LI2 by the controlled initialization voltage VINT, and the first transition period TP1 can be shortened to the second transition period TP2 by the controlled initialization voltage VINT. Figure 8 As shown in , the time for changing from the first driving current ID1 to the second driving current ID2 can be reduced (eg, can be shortened).
[0097] In order to improve the response speed of the display panel, the comparison operation method calculates the driving current during the first transition period TP1 and increases the data voltage accordingly. However, the comparison operation method does not take into account the driving conditions of the display device (e.g., temperature changes of the display panel, characteristic differences of each pixel included in the display panel, etc.). Therefore, the comparison operation method may cause the driving current of the display panel to have an overcompensation of a current level higher than the desired current level, and / or the driving current to have an undercompensation of a current level lower than the desired current level.
[0098] On the other hand, the display device 1000 according to one or more example embodiments of the present disclosure may calculate a first current difference LI1 corresponding to the leakage current during the transition period (which may correspond to (for example, may be) the current difference before compensation), and the display device 1000 may control the gate-on voltage VGL, the gate-off voltage VGH, and / or the initialization voltage VINT in real time based on the first current difference LI1. Therefore, during the second transition period TP2 which may correspond to (for example, may be) the transition period after compensation, the controlled gate-on voltage VGL, the controlled gate-off voltage VGH, and / or the controlled initialization voltage VINT may be provided to the display panel 100. Because the second transition period TP2 is shortened, the response speed of the display panel 100 may be improved. In addition, because the display device 1000 may control the gate-on voltage VGL, the gate-off voltage VGH, and / or the initialization voltage VINT according to (for example, based on) the current difference LI measured in real time, the display device 1000 may prevent or substantially prevent over-compensation and / or under-compensation of the driving current ID.
[0099] Although the panel driver 500 according to one or more example embodiments of the present disclosure is described as controlling any one or more of the gate-on voltage VGL, the gate-off voltage VGH, and the initialization voltage VINT, the present disclosure is not limited thereto. For example, in some embodiments, the panel driver 500 may control each of the gate-on voltage VGL, the gate-off voltage VGH, and the initialization voltage VINT together according to (e.g., based on) the current difference LI between the first current IELVDD and the second current IELVSS.
[0100] In example embodiments, when the current difference LI is greater than or equal to the reference current difference, the panel driver 500 may reduce the gate-on voltage VGL, may reduce the gate-off voltage VGH, and / or may increase the initialization voltage VINT. In addition, when the current difference LI is less than the reference current difference, the panel driver 500 may maintain or substantially maintain the gate-on voltage VGL, the gate-off voltage VGH, and / or the initialization voltage VINT.
[0101] In another example embodiment, the panel driver 500 may include a gate-on voltage table for storing a first voltage level of a gate-on voltage VGL corresponding to the current difference L1, a gate-off voltage table for storing a second voltage level of a gate-off voltage VGH corresponding to the current difference L1, and / or an initialization voltage table for storing a third voltage level of an initialization voltage VINT corresponding to the current difference L1. The panel driver 500 may control the gate-on voltage VGL, the gate-off voltage VGH, and / or the initialization voltage VINT using the gate-on voltage table, the gate-off voltage table, and / or the initialization voltage table, respectively.
[0102] Fig.12 is a flowchart illustrating a method of operating a display apparatus according to one or more example embodiments.
[0103] Reference Figure 2 , Figure 3 , Figure 5 , Figure 6 and Fig.12 In a method of operating a display device according to one or more example embodiments, the power manager 300 may provide a first power voltage ELVDD to the display panel 100 through a first power line ELVDDL (S110). In addition, the power manager 300 may provide a second power voltage ELVSS to the display panel 100 through a second power line ELVSSL (S130). In example embodiments, the first power voltage ELVDD may be a high power voltage for driving the pixel PX, the second power voltage ELVSS may be a low power voltage for driving the pixel PX, and the first power voltage ELVDD may be higher than the second power voltage ELVSS.
[0104] The panel driver 500 may provide a panel driving voltage to the display panel 100 (S150). In example embodiments, the panel driving voltage may include a gate-on voltage VGL, a gate-off voltage VGH, and / or an initialization voltage VINT.
[0105] The power manager 300 may measure a first current IELVDD flowing through the first power line ELVDDL and a second current IELVSS flowing through the second power line ELVSSL (S170). For example, the power manager 300 may include a first current measurement circuit 321 and a second current measurement circuit 323 electrically connected to the first power line ELVDDL and the second power line ELVSSL, respectively. The power manager 300 may calculate a current difference LI between the first current IELVDD and the second current IELVSS (S190). For example, the power manager 300 may include a leakage current calculator 330 to calculate the current difference LI.
[0106] In an example embodiment, the panel driver 500 may compare the current difference LI and the reference current difference to determine whether the current difference LI is greater than or equal to the reference current difference (S210). When the current difference LI is less than the reference current difference (S210: No), the panel driver 500 may maintain or substantially maintain the panel driving voltage so that the panel driver 500 provides the panel driving voltage to the display panel 100 (S150). On the other hand, when the current difference LI is greater than or equal to the reference current difference (S210: Yes), the panel driver 500 may control the panel driving voltage according to (e.g., based on) the current difference LI (S230). Figures 1 to 11 A method in which the panel driver 500 controls the panel driving voltage according to (eg, based on) the current difference LI is described, and thus, a redundant description thereof may not be repeated.
[0107] Fig.13 is a block diagram illustrating an electronic device including a display device according to one or more example embodiments.
[0108] Reference Fig.13 , the electronic device 1100 may include a processor 1110, a memory device 1120, a storage device 1130, an input / output (I / O) device 1140, a power supply 1150, and an OLED display device 1160. The electronic device 1100 may also include a plurality of ports for communicating with a video card, a sound card, a memory card, a universal serial bus (USB) device, other electronic devices, and the like.
[0109] The processor 1110 may perform various computing functions or tasks. The processor 1110 may be an application processor (AP), a microprocessor, a central processing unit (CPU), etc. The processor 1110 may be connected to other components via an address bus, a control bus, a data bus, etc. In addition, in some example embodiments, the processor 1110 may also be connected to an expansion bus, such as, for example, a peripheral component interconnect (PCI) bus.
[0110] The memory device 1120 may store data used for the operation of the electronic device 1100. For example, the memory device 1120 may include: at least one non-volatile memory device, such as an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, a flash memory device, a phase change random access memory (PRAM) device, a resistive random access memory (RRAM) device, a nano-floating gate memory (NFGM) device, a polymer random access memory (PoRAM) device, a magnetic random access memory (MRAM) device, a ferroelectric random access memory (FRAM) device, etc.; and / or at least one volatile memory device, such as a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, a mobile dynamic random access memory (mobile DRAM) device, etc.
[0111] The storage device 1130 may be a solid state drive (SSD) device, a hard disk drive (HDD) device, a CD-ROM device, etc. The I / O device 1140 may be an input device (e.g., such as a keyboard, a keypad, a mouse, a touch screen, etc.) and an output device (e.g., such as a printer, a speaker, etc.). The power supply 1150 may supply power for the operation of the electronic device 1100. The OLED display device 1160 may be connected to other components via a bus or other communication link.
[0112] For example, the electronic device 1100 can be applied to mobile phones, smart phones, tablet computers, digital TVs, 3D TVs, personal computers (PCs), home appliances, laptop computers, personal digital assistants (PDAs), portable multimedia players (PMPs), digital cameras, music players, portable game consoles, navigation devices, etc.
[0113] One or more exemplary embodiments of the present disclosure may be applied to a display device and an electronic device using the display device. For example, one or more exemplary embodiments of the present disclosure may be applied to a cellular phone, a smart phone, a video phone, a smart board, a smart watch, a tablet PC, a car navigation system, a television, a computer monitor, a notebook computer, etc.
[0114] Although some example embodiments have been described, it will be readily appreciated by those skilled in the art that various modifications may be made to the example embodiments without departing from the spirit and scope of the present disclosure. It will be understood that, unless otherwise described, the description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Therefore, it will be understood that the foregoing is an illustration of various example embodiments and is not to be construed as being limited to the specific example embodiments disclosed herein, and that various modifications to the disclosed example embodiments as well as other example embodiments are intended to be included within the spirit and scope of the present disclosure as defined in the appended claims and their equivalents.
Claims
1. A display device, comprising: A display panel including a plurality of pixels; a power manager configured to provide a first power supply voltage to the display panel through a first power supply line and a second power supply voltage to the display panel through a second power supply line, and to measure a first current flowing through the first power supply line and a second current flowing through the second power supply line; as well as a panel driver configured to provide a panel driving voltage to the display panel and control the panel driving voltage according to a current difference between the first current and the second current, The panel driving voltage includes at least one of a gate-on voltage, a gate-off voltage and an initialization voltage.
2. The display device according to claim 1, wherein: Each of the pixels comprises at least one transistor, wherein the panel driving voltage includes the gate-on voltage to turn on the transistor, and The panel driver is configured to control the gate turn-on voltage according to the current difference.
3. The display device according to claim 2, wherein: The transistor is a positive channel metal oxide semiconductor transistor, and The panel driver is configured to reduce the gate-on voltage when the current difference is greater than or equal to a reference current difference, and maintain the gate-on voltage when the current difference is less than the reference current difference.
4. The display device according to claim 2, wherein: The panel driver includes a gate-on voltage table for storing a voltage level of the gate-on voltage corresponding to the current difference; and The panel driver is configured to control the gate-on voltage using the gate-on voltage table to provide the gate-on voltage having the voltage level corresponding to the current difference.
5. The display device according to claim 1, wherein: Each of the pixels comprises at least one transistor, wherein the panel driving voltage includes the gate cut-off voltage to cut off the transistor, and Wherein, the panel driver is configured to control the gate-off voltage according to the current difference.
6. The display device according to claim 5, wherein: The transistor is a positive channel metal oxide semiconductor transistor, and The panel driver is configured to reduce the gate-off voltage when the current difference is greater than or equal to a reference current difference, and maintain the gate-off voltage when the current difference is less than the reference current difference.
7. The display device according to claim 1, wherein: Each of the pixels comprises an organic light emitting diode, wherein the panel driving voltage includes the initialization voltage to initialize the organic light emitting diode, and Wherein, the panel driver is configured to control the initialization voltage according to the current difference.
8. The display device according to claim 7, wherein: The panel driver is configured to increase the initialization voltage when the current difference is greater than or equal to a reference current difference, and to maintain the initialization voltage when the current difference is less than the reference current difference.
9. The display device according to claim 1, wherein: The power manager comprises: a first power supply circuit configured to provide the first power supply voltage to the display panel through the first power supply line; a second power supply circuit configured to provide the second power supply voltage to the display panel through the second power supply line; a first current measurement circuit connected to the first power line and configured to measure the first current; a second current measurement circuit connected to the second power line and configured to measure the second current; a leakage current calculator configured to calculate the current difference between the first current and the second current; and a compensation signal generator configured to generate a leakage current compensation signal according to the current difference, The panel driver is configured to control the panel driving voltage in response to the leakage current compensation signal.
10. A method for operating a display device, comprising: providing a first power supply voltage to the display panel via a first power supply line; providing a second power supply voltage to the display panel via a second power supply line; providing a panel driving voltage to the display panel; measuring a first current flowing through the first power line and a second current flowing through the second power line; as well as controlling the panel driving voltage according to a current difference between the first current and the second current, The panel driving voltage includes at least one of a gate-on voltage, a gate-off voltage and an initialization voltage.
Citation Information
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