A varistor and a method for preparing the same

Abstract

The present invention provides a varistor and a preparation method thereof, wherein the varistor comprises at least one layer of resistor layer stacked, the resistor layer comprises a substrate, at least one side of the substrate surface is a patch surface, at least two electrode layers are arranged on the patch surface, an insulating region is formed between adjacent electrode layers and between the electrode layer and the edge of the substrate, an inorganic material layer is arranged in the insulating region, and a permeation layer is formed on the side of the substrate in contact with the inorganic material layer. The present invention forms a series and parallel loop relationship between multiple electrode layers and the substrate, discharges between the electrode layers, and reduces the heat generated by the resistor; and by providing multiple layers of resistor layers, the heat dissipation performance of the resistor is further improved, the heat generation is reduced, and the lightning strike performance of the varistor is effectively improved; in addition, the permeation layer formed effectively prevents arcing and flashover during use, and improves the reliability of the varistor during use.

Description

Technical Field

[0001] The present invention belongs to the technical field of varistor, and in particular relates to a varistor and a preparation method thereof. Background Art

[0002] Varistor is a voltage-limiting protection device. By utilizing the nonlinear characteristics of varistor, when overvoltage appears between the two poles of varistor, varistor can clamp the voltage to a relatively fixed voltage value, thereby protecting the subsequent circuit. It is mainly used in power supply system, security system, communication system, automotive electronic system or household appliances, etc.

[0003] The varistors commonly used in the industry are lead-type structures, which are not conducive to miniaturization and occupy a relatively large area. They are not suitable for surface mounting, cannot achieve production automation, and cannot meet the requirements of electronic integration. Therefore, the overvoltage protection field needs a low-cost, small-volume, and automated production-compliant chip varistor.

[0004] CN111312460A discloses a sheet varistor, which includes two functional layers in a body, namely a first functional layer and a second functional layer, and the two functional layers have substantially the same electrostatic capacitance. In the sheet varistor, the body is made highly resistive from the outer surface by an alkali metal containing portion, but the alkali metal containing portion does not reach the first functional layer and the second functional layer. Therefore, the alkali metal containing portion does not affect the electrostatic capacitance of the first functional layer and the second functional layer, and suppresses the parasitic capacitance of the sheet varistor. Therefore, the sheet varistor includes two functional layers that suppress capacitance deviation.

[0005] CN110911073A discloses a laminated chip varistor and a method for making the same, the method comprising the following steps: S1, forming a first side electrode layer on a lower substrate of a glass ceramic material; S2, forming a hollow cavity structure layer of a glass ceramic material on the first side electrode layer, the hollow cavity structure layer having a circle of continuous peripheral walls, and an intermediate cavity surrounded by the peripheral walls; S3, filling the intermediate cavity with a varistor filling layer; S4, forming a second side electrode layer on the hollow cavity structure layer and the varistor filling layer; S5, forming an upper substrate of a glass ceramic material on the electrode layer formed last; S6, completing the preparation of the finished product after processing. The laminated chip varistor of the invention not only does not need to undergo any complex surface treatment process, but also can effectively improve the surface insulation characteristics of the product, and is conducive to improving the product's through-current, energy or varistor voltage.

[0006] CN203673907U discloses a cut-off protection type varistor, including a zinc oxide varistor ceramic, an upper copper foot, a lower copper foot, an epoxy resin surface layer and an elastic copper foot, wherein the upper copper foot and the lower copper foot are respectively arranged on the upper and lower surfaces of the zinc oxide varistor ceramic, the epoxy resin surface layer wraps the body, and an exposed window is arranged on the surface of the upper copper foot opposite to the center of the body, wherein the elastic copper foot comprises a welding inner end formed by bending, an elastic landslide section of an inclined surface, a horizontal positioning section and an external connection end, the welding inner end of the elastic copper foot is welded to the surface of the upper copper foot in the exposed window by low-temperature solder, the elastic landslide section is provided with a forked foot, the forked foot is separated at the inner end of the elastic landslide section and connected at the outer end, forming an inclined surface with a slope greater than the elastic landslide section. The resistor enables a preset plastic partition slider to automatically slide to completely disconnect the welding point between the upper surface of the upper copper foot and the elastic copper foot, so as to completely disconnect the current of the cut-off protection type varistor.

[0007] Existing varistors all have the problems of large size, poor reliability, complex preparation process and high cost. Therefore, how to ensure that the varistors have the characteristics of small size and low cost while also having the characteristics of simple preparation process and high reliability has become a problem that urgently needs to be solved. Summary of the invention

[0008] In view of the deficiencies in the prior art, the purpose of the present invention is to provide a varistor and a method for preparing the same, which effectively prevents arcing and flashover during use by forming a permeable layer, thereby improving the reliability of the varistor during use, and has the characteristics of small size, high reliability, simple preparation process and low cost.

[0009] To achieve this object, the present invention adopts the following technical solutions:

[0010] In a first aspect, the present invention provides a varistor, comprising at least one stacked resistor layer, wherein the resistor layer comprises a substrate, at least one surface of the substrate being a patch surface, at least two electrode layers being spaced apart on the patch surface, an insulating region being formed between adjacent electrode layers and between the electrode layers and edges of the substrate, an inorganic material layer being provided in the insulating region, and a permeation layer being formed on the side of the substrate in contact with the inorganic material layer.

[0011] The present invention forms a loop series and parallel relationship between multiple electrode layers and a substrate, and forms a series-parallel relationship through the electrodes on the surface of the substrate. The current will pass through the inside of the substrate to form a horizontal and vertical discharge mode, which effectively plays a shunting effect and reduces the heat generated by the resistor; and by setting a multi-layer resistor layer, the heat dissipation performance of the resistor is further improved, the heat generation is reduced, and the lightning strike performance of the varistor is effectively improved; in addition, the formed permeable layer effectively prevents arcing and flashover during use, improves the reliability of the varistor during use, and can achieve the effect of multiple varistors, with the characteristics of small size, high reliability, simple preparation process and low cost.

[0012] It is well known to those skilled in the art that electrode layers are provided on both sides of a varistor. In the present invention, an electrode layer must also be provided on the side that is not the patch surface. It is a common electrode layer in a conventional varistor, that is, a common electrode layer is stacked on the side of the substrate that is not the patch surface, and the common electrode layer covers the surface of the substrate.

[0013] It should be noted that, among them, the parallel relationship, for example, the electrode layers located on the same patch surface constitute a parallel relationship; the series relationship, for example, the current flows through the electrode layers on the patch surface in sequence, then enters the fair electrode surface through the substrate, and then enters the substrate from the common electrode surface and enters the electrode layer adjacent to the above-mentioned electrode layer, thus forming a series relationship.

[0014] As a preferred technical solution of the present invention, the distance between adjacent electrode layers is greater than or equal to the thickness of the varistor.

[0015] The present invention controls the distance between adjacent electrode layers to be greater than or equal to the thickness of the varistor, thereby meeting the requirement of an effective safety distance and further improving the stability and reliability of the varistor.

[0016] Preferably, the distance between adjacent electrode layers is 0.76-6.4 mm, for example, the distance is 0.76 mm, 0.8 mm, 0.9 mm, 1.0 mm, 1.1 mm, 1.2 mm, 1.3 mm, 1.4 mm, 1.52 mm, 1.9 mm, 2.3 mm, 2.7 mm, 3.1 mm, 3.5 mm, 3.9 mm, 4.3 mm, 4.7 mm, 5.1 mm, 5.5 mm, 5.9 mm or 6.4 mm.

[0017] Preferably, the thickness of the varistor is 0.76-3.2 mm, for example, the thickness is 0.76 mm, 1.0 mm, 1.3 mm, 1.6 mm, 1.9 mm, 2.2 mm, 2.5 mm, 2.8 mm, 3.0 mm or 3.2 mm.

[0018] As a preferred technical solution of the present invention, the insulating region between adjacent electrode layers is bent in a serpentine shape.

[0019] The present invention provides serpentine-shaped insulating areas, and discharges are generated between the serpentine insulating areas, which can better improve the current carrying capacity of lightning and further improve the reliability of the varistor.

[0020] As a preferred technical solution of the present invention, the varistor includes at least two stacked resistor layers.

[0021] The present invention sets at least two resistance layers, and the total thickness of the multi-layer resistance layers is the same as the designed thickness of the varistor. Through the structure of the multi-layer resistance layers, the electrode layers on different layers are connected in series and in parallel, so that the current can pass through the electrode layers on each resistance layer to achieve the shunting function, thereby improving the current capacity.

[0022] Preferably, the thicknesses of the resistance layers are the same or different.

[0023] As a preferred technical solution of the present invention, on each layer of the resistance layer, the shapes of the insulating areas on the patch surface are the same or different.

[0024] Preferably, on each layer of the resistance layer, the insulating area on the patch surface has the same shape.

[0025] It should be noted that the present invention does not make specific requirements and special limitations on the materials of the substrate, electrode layer and inorganic material layer. Those skilled in the art can reasonably select the materials of the substrate, electrode layer and inorganic material layer according to actual needs. For example, the material of the substrate includes one or a combination of at least two of ZnO, Bi2O3, Co2O3, Sb2O3, MnO2, MnCO3, NiO, AgNO3, AlNO3, rare earth oxides or polymer conductive composite materials; the material of the electrode layer includes one or a combination of at least two of copper, silver, aluminum, nickel or palladium-silver alloy; the material of the inorganic material layer includes inorganic non-metallic silicon material, which can be glass.

[0026] As a preferred technical solution of the present invention, the varistor is in the shape of a cuboid or a cylinder.

[0027] In a second aspect, the present invention provides a method for preparing the varistor as described in the first aspect, the preparation method comprising:

[0028] Electrode layers are arranged at intervals on the patch surface of the substrate, and inorganic material layers are sintered in the insulating area. After sintering, the inorganic material layer penetrates into the substrate to form a penetration layer, thereby preparing the varistor.

[0029] As a preferred technical solution of the present invention, the preparation method specifically comprises the following steps:

[0030] (I) attaching the electrode layers to the patch surface of the substrate respectively, and coating the inorganic material on the insulating area;

[0031] (II) sintering the substrate coated with the inorganic material to form an inorganic material layer, and forming a permeation layer on the side of the substrate in contact with the inorganic material layer after sintering to obtain the resistor layer;

[0032] (III) After the resistance layer is encapsulated, the varistor is prepared.

[0033] As a preferred technical solution of the present invention, the varistor includes at least two resistance layers, and steps (I) and (II) are repeated at least twice. The varistor is prepared by stacking at least two resistance layers.

[0034] Preferably, the surface of the insulating region is modified.

[0035] Preferably, the modification method comprises laser etching or mechanical processing.

[0036] The present invention improves the surface roughness of the insulating area by modifying the surface of the insulating area, thereby further improving the penetration effect and promoting the formation of the penetration layer.

[0037] Preferably, the sintering temperature of the inorganic material layer is 400-850°C, for example, the temperature is 400°C, 450°C, 500°C, 550°C, 600°C, 650°C, 700°C, 750°C, 800°C or 850°C, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0038] The present invention has the advantages of good adhesion and high insulation performance by setting the sintering temperature at 400-850°C. If the sintering temperature is lower than 400°C, there is a problem of poor insulation performance due to insufficient adhesion; if the sintering temperature is higher than 850°C, there is a problem of carbonization or melting of the insulating material.

[0039] The numerical range described in the present invention not only includes the point values ​​listed above, but also includes any point values ​​between the above numerical ranges that are not listed. Due to space limitations and for the sake of simplicity, the present invention no longer exhaustively lists the specific point values ​​included in the range.

[0040] Compared with the prior art, the present invention has the following beneficial effects:

[0041] The present invention forms a loop series and parallel relationship between multiple electrode layers and a substrate, and forms a series-parallel relationship through the electrodes on the surface of the substrate. The current will pass through the inside of the substrate to form a horizontal and vertical discharge mode, which effectively plays a shunting effect and reduces the heat generated by the resistor; and by setting a multi-layer resistor layer, the heat dissipation performance of the resistor is further improved, the heat generation is reduced, and the lightning strike performance of the varistor is effectively improved; in addition, the formed permeable layer effectively prevents arcing and flashover during use, improves the reliability of the varistor during use, and can achieve the effect of multiple varistors, with the characteristics of small size, high reliability, simple preparation process and low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 This is a schematic diagram of the structure of the varistor provided in Example 1 of the present invention;

[0043] Figure 2 A schematic diagram of the structure of the varistor provided in Example 2 of the present invention;

[0044] Figure 3 A schematic diagram of the structure of the varistor provided in Example 3 of the present invention;

[0045] Figure 4 A schematic diagram of the structure of a varistor provided in Embodiment 4 of the present invention;

[0046] Figure 5 This is a schematic diagram of the structure of the varistor provided in Example 5 of the present invention;

[0047] Figure 6 This is a schematic diagram of the structure of the varistor provided in Example 6 of the present invention.

[0048] Among them, 1-electrode layer; 2-insulating area; 3-substrate. DETAILED DESCRIPTION

[0049] It should be understood that, in the description of the present invention, the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0050] It should be noted that in the description of the present invention, unless otherwise clearly specified and limited, the terms "disposed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood by specific circumstances.

[0051] The technical solution of the present invention is further illustrated below through specific implementation methods.

[0052] In a specific embodiment, the present invention provides a varistor, the varistor includes at least one stacked resistor layer, the resistor layer includes a substrate 3, at least one side of the substrate 3 is a patch surface, at least two electrode layers 1 are arranged on the patch surface, and an insulating region 2 is formed between adjacent electrode layers 1 and between the electrode layer 1 and the edge of the substrate 3, the insulating region 2 is provided with an inorganic material layer, and the side of the substrate 3 in contact with the inorganic material layer forms a permeation layer. Among them, a common electrode layer is stacked on the side of the substrate 3 that is not the patch surface, and the common electrode layer covers the surface of the substrate 3.

[0053] The present invention forms a loop series and parallel relationship between multiple electrode layers 1 and a substrate 3, discharges between the electrode layers 1, and reduces the heat generated by the resistor; and by providing multiple layers of resistor layers, the heat dissipation performance of the resistor is further improved, the heat generation is reduced, and the lightning strike performance of the varistor is effectively improved; in addition, the formed permeable layer effectively prevents arcing and flashover during use, thereby improving the reliability of the varistor during use, and has the characteristics of small size, high reliability, simple preparation process and low cost.

[0054] Furthermore, the distance between adjacent electrode layers 1 is greater than or equal to the thickness of the varistor, and further, the distance between adjacent electrode layers 1 is 0.76 to 6.4 mm, and the thickness of the varistor is 0.76 to 3.2 mm. The present invention controls the distance between adjacent electrode layers 1 to be greater than or equal to the thickness of the varistor, thereby meeting the requirement of the effective safety distance and further improving the stability and reliability of the varistor.

[0055] Furthermore, the insulating area 2 between adjacent electrode layers 1 is bent in a serpentine shape. By setting the insulating area 2 bent in a serpentine shape, discharge will occur between the serpentine insulating areas 2, which can better improve the current carrying capacity of lightning and further improve the reliability of the varistor.

[0056] Further, the varistor includes at least two stacked resistor layers, the resistor layers have the same or different thicknesses, and the shapes of the insulating regions 2 on the patch surface on each resistor layer are the same or different. Further, the shapes of the insulating regions 2 on the patch surface on each resistor layer are the same. In the present invention, by providing at least two resistor layers, the total thickness of the multilayer resistor layers is the same as the designed thickness of the varistor, and by using the structure of the multilayer resistor layers, the electrode layers 1 on different layers are connected in series and in parallel, so that the current passes through the electrode layers 1 on each resistor layer to realize the shunting function, thereby improving the current carrying capacity.

[0057] Furthermore, the varistor is in the shape of a cuboid or a cylinder.

[0058] In another specific embodiment, the present invention provides a method for preparing the above-mentioned varistor, and the preparation method specifically comprises the following steps:

[0059] (I) The electrode layers 1 are mounted on the mounting surfaces of the substrate 3, the surface of the insulating region is modified by laser etching or mechanical processing, and an inorganic material is coated on the insulating region 2;

[0060] (II) sintering the substrate 3 coated with the inorganic material to form an inorganic material layer, the sintering temperature is 400-850° C., and after sintering, a permeation layer is formed on the side of the substrate 3 in contact with the inorganic material layer to obtain the resistor layer;

[0061] (III) After the resistance layer is encapsulated, the varistor is prepared.

[0062] The varistor comprises at least two resistance layers, and steps (I) and (II) are repeated at least twice, and at least two resistance layers are stacked to prepare the varistor.

[0063] Example 1

[0064] This embodiment provides a varistor, based on a varistor provided in a specific implementation manner, wherein, Figure 1 As shown, the varistor is a rectangular parallelepiped with a single resistor layer. One side of the substrate 3 is a patch surface, on which two electrode layers 1 are arranged at intervals, and the other side is provided with a common electrode layer. The distance between adjacent electrode layers 1 is 2.8 mm, and the thickness of the varistor is 1.4 mm. The material of the substrate 3 is zinc oxide; the material of the electrode layer 1 is copper; and the inorganic material is glass.

[0065] This embodiment also provides a method for preparing the above-mentioned varistor, and the preparation method specifically comprises the following steps:

[0066] (I) The electrode layers 1 are mounted on the mounting surfaces of the substrate 3, the surface of the insulating region is modified by laser etching, and an inorganic material is coated on the insulating region 2;

[0067] (II) sintering the substrate 3 coated with the inorganic material to form an inorganic material layer, the sintering temperature is 650° C., and after sintering, a permeation layer is formed on the side of the substrate 3 in contact with the inorganic material layer to obtain the resistor layer;

[0068] (III) After the resistance layer is encapsulated, the varistor is prepared.

[0069] Example 2

[0070] This embodiment provides a varistor, based on a varistor provided in a specific implementation manner, wherein, Figure 2 As shown, the varistor is a rectangular parallelepiped with a single resistor layer. One side of the substrate 3 is a patch surface, on which three electrode layers 1 are arranged at intervals, and the other side is provided with a common electrode layer. The distance between adjacent electrode layers 1 is 0.9 mm, and the thickness of the varistor is 1.8 mm. The material of the substrate 3 is lanthanum oxide; the material of the electrode layer 1 is silver; and the inorganic material is glass.

[0071] This embodiment also provides a method for preparing the above-mentioned varistor, and the preparation method specifically comprises the following steps:

[0072] (I) The electrode layers 1 are mounted on the mounting surfaces of the substrate 3, the surface of the insulating region is mechanically modified, and an inorganic material is coated on the insulating region 2;

[0073] (II) sintering the substrate 3 coated with the inorganic material to form an inorganic material layer, the sintering temperature is 400° C. After sintering, a permeation layer is formed on the side of the substrate 3 in contact with the inorganic material layer, thereby obtaining the resistor layer;

[0074] (III) After the resistance layer is encapsulated, the varistor is prepared.

[0075] Example 3

[0076] This embodiment provides a varistor, based on a varistor provided in a specific implementation manner, wherein, Figure 3 The varistor is a rectangular parallelepiped with a single resistor layer. One side of the substrate 3 is a patch surface, on which two electrode layers 1 are arranged at intervals, and the other side is provided with a common electrode layer. The distance between adjacent electrode layers 1 is 4.6 mm, and the thickness of the varistor is 2.3 mm. The material of the substrate 3 is zinc oxide; the material of the electrode layer 1 is palladium silver alloy; and the inorganic material is glass.

[0077] This embodiment also provides a method for preparing the above-mentioned varistor, and the preparation method specifically comprises the following steps:

[0078] (I) The electrode layers 1 are mounted on the mounting surfaces of the substrate 3, the surface of the insulating region is modified by laser etching, and an inorganic material is coated on the insulating region 2;

[0079] (II) sintering the substrate 3 coated with the inorganic material to form an inorganic material layer, the sintering temperature is 850° C., and after sintering, a permeation layer is formed on the side of the substrate 3 in contact with the inorganic material layer to obtain the resistor layer;

[0080] (III) After the resistance layer is encapsulated, the varistor is prepared.

[0081] Example 4

[0082] This embodiment provides a varistor, based on a varistor provided in a specific implementation manner, wherein, Figure 4 The serpentine bend shown in the figure is cylindrical and has a single resistor layer. One side of the substrate 3 is a patch surface, on which two electrode layers 1 are arranged at intervals, and the other side is provided with a common electrode layer. The distance between adjacent electrode layers 1 is 3.2 mm, and the thickness of the varistor is 1.6 mm. The material of the substrate 3 is zinc oxide; the material of the electrode layer 1 is copper; and the inorganic material is glass.

[0083] This embodiment also provides a method for preparing the above-mentioned varistor, and the preparation method specifically comprises the following steps:

[0084] (I) The electrode layers 1 are mounted on the mounting surfaces of the substrate 3, the surface of the insulating region is mechanically modified, and an inorganic material is coated on the insulating region 2;

[0085] (II) sintering the substrate 3 coated with the inorganic material to form an inorganic material layer, the sintering temperature is 550° C., and after sintering, a permeation layer is formed on the side of the substrate 3 in contact with the inorganic material layer to obtain the resistor layer;

[0086] (III) After the resistance layer is encapsulated, the varistor is prepared.

[0087] Example 5

[0088] This embodiment provides a varistor, based on a varistor provided in a specific implementation manner, wherein, Figure 5 As shown, the varistor is cylindrical and has a single resistor layer. One side of the substrate 3 is a patch surface, on which two electrode layers 1 are arranged at intervals, and the other side is provided with a common electrode layer. The distance between adjacent electrode layers 1 is 6.4 mm, and the thickness of the varistor is 3.2 mm. The material of the substrate 3 is zinc oxide; the material of the electrode layer 1 is copper; and the inorganic material is glass.

[0089] This embodiment also provides a method for preparing the above-mentioned varistor, and the preparation method specifically comprises the following steps:

[0090] (I) The electrode layers 1 are mounted on the mounting surfaces of the substrate 3, the surface of the insulating region is mechanically modified, and an inorganic material is coated on the insulating region 2;

[0091] (II) sintering the substrate 3 coated with the inorganic material to form an inorganic material layer, the sintering temperature is 750° C., and after sintering, a permeation layer is formed on the side of the substrate 3 in contact with the inorganic material layer to obtain the resistor layer;

[0092] (III) After the resistance layer is encapsulated, the varistor is prepared.

[0093] Example 6

[0094] This embodiment provides a varistor, based on a varistor provided in a specific implementation manner, wherein, Figure 6 As shown, the varistor is a rectangular parallelepiped with three resistor layers of the same thickness. Both sides of the substrate 3 are patch surfaces, and two electrode layers 1 are arranged on the patch surfaces. The distance between adjacent electrode layers 1 is 0.76 mm, and the thickness of the varistor is 0.76 mm. The material of the substrate 3 is a polymer conductive composite material; the material of the electrode layer 1 is silver; and the inorganic material is glass.

[0095] This embodiment also provides a method for preparing the above-mentioned varistor, and the preparation method specifically comprises the following steps:

[0096] (I) The electrode layers 1 are mounted on the mounting surfaces of the substrate 3, the surface of the insulating region is modified by laser etching, and an inorganic material is coated on the insulating region 2;

[0097] (II) sintering the substrate 3 coated with the inorganic material to form an inorganic material layer at a sintering temperature of 600° C. After sintering, a permeation layer is formed on the side of the substrate 3 in contact with the inorganic material layer to obtain the resistor layer;

[0098] (III) Repeat steps (I) and (II) three times, and prepare the varistor after stacking and packaging the three resistance layers.

[0099] Comparative Example 1

[0100] This comparative example provides a varistor. Compared with Example 1, the difference is that both sides of the varistor are configured as common electrode layers, and the preparation method and size parameters are exactly the same as those of Example 1.

[0101] The varistors prepared in Example 1 and Comparative Example 1 were tested using a lightning protection component tester (FC-2G). The varistor voltage of Example 1 was 240V, and the varistor voltage of Comparative Example 1 was 480V.

[0102] In addition, the designed current capacity of the varistor is 2kV / 1kA. The varistor model EKT3225-471H in the prior art is used, and its size is 8mm*6.4mm*5mm, while the varistor provided by the present application is 7.2mm*4.15mm*1.5mm, and the overall volume is reduced. Especially in the LED industry, the requirements for the thickness and cross-sectional area of ​​the varistor are very high, and a varistor with a small thickness and a small footprint is urgently needed. It can be explained that the present invention forms a loop series and parallel relationship between multiple electrode layers 1 and the substrate 3, and discharges between the electrode layers 1 to reduce the heat generated by the resistor; and by providing a multi-layer resistor layer, the heat dissipation performance of the resistor is further improved, the heat generation is reduced, and the lightning strike performance of the varistor is effectively improved; in addition, the formed penetration layer effectively prevents arcing and flashover during use, thereby improving the reliability of the varistor during use, and has the characteristics of small size, high reliability, simple preparation process and low cost.

[0103] The applicant declares that the above is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Those skilled in the art should understand that any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention shall fall within the protection scope and disclosure scope of the present invention.

Claims

1. A varistor, It is characterized in that The varistor comprises at least one stacked resistor layer, the resistor layer comprises a substrate, at least one side of the substrate is a patch surface, at least two electrode layers are arranged at intervals on the patch surface, an insulating region is formed between adjacent electrode layers and between the electrode layer and the edge of the substrate, an inorganic material layer is arranged in the insulating region, and a permeation layer is formed on the side of the substrate in contact with the inorganic material layer; The insulating area between adjacent electrode layers is bent in a serpentine shape.

2. The varistor according to claim 1, It is characterized in that The distance between adjacent electrode layers is greater than or equal to the thickness of the varistor.

3. The varistor according to claim 1, It is characterized in that The distance between adjacent electrode layers is 0.76-6.4 mm.

4. The varistor according to claim 1, It is characterized in that The thickness of the varistor is 0.76-3.2 mm.

5. The varistor according to claim 1, It is characterized in that The varistor comprises at least two resistor layers which are stacked.

6. The varistor according to claim 1, It is characterized in that The thickness of the resistance layers may be the same or different.

7. The varistor according to claim 1, It is characterized in that On each of the resistance layers, the shapes of the insulating areas on the patch surface are the same or different.

8. The varistor according to claim 7, It is characterized in that On each of the resistance layers, the insulating area on the patch surface has the same shape.

9. The varistor according to claim 1, It is characterized in that The varistor is in the shape of a cuboid or a cylinder.

10. A method for preparing the varistor according to any one of claims 1 to 9, It is characterized in that The preparation method comprises: Electrode layers are arranged at intervals on the patch surface of the substrate, and inorganic material layers are sintered in the insulating area. After sintering, the inorganic material layer penetrates into the substrate to form a permeation layer, thereby preparing the varistor.

11. The preparation method according to claim 10, It is characterized in that The preparation method specifically comprises the following steps: (I) attaching the electrode layers to the patch surface of the substrate respectively, and coating the inorganic material on the insulating area; (II) sintering the substrate coated with the inorganic material to form an inorganic material layer, and forming a permeation layer on the side of the substrate in contact with the inorganic material layer after sintering to obtain the resistor layer; (III) After the resistance layer is encapsulated, the varistor is prepared.

12. The preparation method according to claim 11, It is characterized in that The varistor comprises at least two resistance layers, and steps (I) and (II) are repeated at least twice, and the varistor is prepared by stacking at least two resistance layers.

13. The preparation method according to claim 10, It is characterized in that The surface of the insulating region is modified.

14. The preparation method according to claim 13, It is characterized in that The modification method includes laser etching or mechanical processing.

15. The preparation method according to claim 10, It is characterized in that The sintering temperature of the inorganic material layer is 400-850°C.

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