Method and apparatus for substrate manufacturing

Abstract

Methods and apparatus for substrate manufacturing are provided herein. For example, the apparatus can include a cluster tool including a vacuum transfer module (VTM) configured to receive a silicon substrate having a polysilicon plug (poly plug) in a vacuum condition and transfer the substrate to and from a plurality of processing chambers without breaking vacuum, each processing chamber independently connected to the VTM to perform a corresponding one of a plurality of DRAM bit line processes on the substrate, the plurality of processing chambers including a pre-clean chamber configured to remove native oxide from a surface of the substrate, a barrier metal deposition chamber configured to deposit a barrier metal on a surface of the poly plug on the silicon substrate, a barrier layer deposition chamber configured to deposit at least one material on a surface of the barrier metal, a bit line metal deposition chamber configured to deposit at least one material on a surface of the barrier layer, and a hard mask deposition chamber configured to deposit at least one material on a surface of the bit line metal.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to methods and apparatuses for substrate manufacturing, and more particularly to cluster tools and methods for dynamic random access memory (DRAM) bit line stack processes. BACKGROUND

[0002] Conventional DRAM bit line stack processes use multiple different / independent tools to perform corresponding processes on a substrate (e.g., wafer) having a polysilicon plug (poly plug) that is pre-fabricated on the substrate. For example, processes typically performed on the substrate can include one or more types of pre-clean processes, barrier metal deposition, barrier layer deposition, bit line metal deposition, hard mask deposition, etc.

[0003] The inventors have observed that oxidation on deposited films, which can result from exposing the substrate to atmospheric pressure conditions, can occur after poly plug fabrication and can continue to occur after each subsequent process performed on the substrate (e.g., poly plug to barrier metal deposition, barrier metal deposition to barrier layer deposition, barrier layer deposition to bit line metal deposition, etc.). Oxidation can result in resistive defects (i.e., lack of ohmic contact) on the substrate, as well as degradation of material properties of the substrate.

[0004] Accordingly, the inventors provide improved methods and apparatuses for processing substrates for, e.g., DRAM bit line stack processes. SUMMARY

[0005] Methods and apparatuses for substrate manufacturing are provided herein. According to aspects of the present disclosure, a cluster tool for performing DRAM bit line stack processes on a substrate after poly plug fabrication is provided. In some embodiments, the cluster tool includes a front end module, a vacuum transfer module (VTM), and a plurality of processing chambers each independently connected to the VTM to receive the substrate and perform a corresponding one of a plurality of DRAM bit line processes on the substrate.

[0006] According to aspects of the present disclosure, a method for performing DRAM bit line stack processes on a substrate after poly plug fabrication is provided. In some embodiments, the method includes loading the substrate into a front end module of a cluster tool, and transferring the substrate from the front end module to at least one of a plurality of processing chambers of the cluster tool using a VTM of the cluster tool, and performing at least one of a plurality of DRAM bit line processes on the substrate.

[0007] According to aspects of the present disclosure, a non-transitory computer-readable storage medium having a plurality of instructions stored thereon is provided. When executed by a processor, the plurality of instructions perform a method for performing a DRAM bitline stacking process on a substrate after poly plug fabrication. In some embodiments, the method includes loading the substrate into a front-end module of a cluster tool, transferring the substrate from the front-end module to at least one of a plurality of processing chambers using a VTM of the cluster tool, and performing at least one of a plurality of DRAM bitline processes on the substrate.

[0008] Other and further embodiments of the present disclosure are described below. BRIEF DESCRIPTION OF THE DRAWINGS

[0009]

[0014] Embodiments of the present disclosure, briefly summarized above and discussed in greater detail below, may be understood by reference to the illustrative embodiments of the disclosure depicted in the accompanying drawings, in which:

[0010] Figure 1 is a diagram of a cluster tool in accordance with at least some embodiments of the present disclosure.

[0011] Figure 2 is a flow chart of a method for substrate manufacturing according to at least some embodiments of the present disclosure; and

[0012] Figure 3 is a diagram of a substrate according to at least some embodiments of the present disclosure.

[0013] To facilitate understanding, identical reference numerals have been used, where possible, to denote identical elements common to the various figures. The figures are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be beneficially incorporated into other embodiments without further description. DETAILED DESCRIPTION

[0014] Methods and apparatus for substrate fabrication are described herein. More specifically, Figure 1 FIG2 is a diagram of a cluster tool 100 configured for substrate fabrication (eg, after poly plug fabrication) according to at least some embodiments of the present disclosure. The cluster tool 100 includes one or more vacuum transfer modules (VTMs; Figure 1 101 and VTM 102 shown in FIG), a front end module 104, a plurality of processing chambers / modules 106, 108, 110, 112, 114, 116, and 118, and a process controller 120 (controller 120). In embodiments having more than one VTM (such as Figure 1 ), one or more through chambers may be provided to facilitate vacuum transfer from one VTM to another. Figure 1In an embodiment consistent with that shown in FIG, two through chambers (e.g., through chamber 140 and through chamber 142) may be provided. Non-limiting examples of cluster tools suitable for modification according to the present disclosure include the ® ... Series of processing tools.

[0015] The front end module 104 includes a load port 122 that is configured to receive one or more substrates to be processed using the cluster tool 100, for example, from a FOUP (front opening unified pod) or other suitable substrate-containing box or carrier. The load port 122 may include three loading zones 124a to 124c that may be used to load one or more substrates. However, more or fewer loading zones may be used. For illustration purposes, Figure 3 A schematic side view of a portion of a substrate 300 is shown having a poly plug 302 (eg, processed outside of the cluster tool 100 ) and a number of additional layers fabricated within the cluster tool 100 as described below.

[0016] The front-end module 104 includes an atmospheric transfer module (ATM) 126 for transferring substrates loaded into the load port 122. More specifically, the ATM 126 includes one or more robot arms 128 (shown in phantom) configured to transfer substrates from the loading areas 124a to 124c to the ATM 126 via doors 135 (shown in phantom) connecting the ATM 126 to the load port 122. Typically, there is one door for each load port (124a to 124c) to allow transfer of substrates from the corresponding load port to the ATM 126. The robot arms 128 are also configured to transfer substrates from the ATM 126 to the airlocks 130a and 130b via doors 132 (shown in phantom, one door 132 for each airlock) connecting the ATM 126 to the airlocks 130a and 130b. The number of airlocks may be more or less than two, but two airlocks ( 130 a and 130 b ) are shown for illustration purposes only, with each airlock having a door for connecting it to the ATM 126 .

[0017] The airlocks 130a, 130b can be maintained under atmospheric or vacuum pressure environments under control of the controller 120 and act as an intermediate or temporary holding space for substrates to be transferred to / from the VTM 101, 102. The VTM 101 includes a robot 138 (shown in dashed line) configured to transfer substrates from the airlocks 130a, 130b to one or more of the plurality of processing chambers 106, 108, or to one or more of the through-chambers 140 and 142 without interrupting the vacuum, i.e., while maintaining the vacuum pressure environment within the VTM 102 and the plurality of processing chambers 106, 108, and the through-chambers 140 and 142. The VTM 102 includes a robot 138 (shown in dashed line) configured to transfer substrates from the airlocks 130a, 130b to one or more of the plurality of processing chambers 106, 108, 110, 112, 114, 116, and 118 without interrupting the vacuum, i.e., while maintaining the vacuum pressure environment within the VTM 102 and the plurality of processing chambers 106, 108, 110, 112, 114, 116, and 118.

[0018] In certain embodiments, the airlocks 130a, 130b can be omitted and the controller 120 can be configured to move substrates directly from the ATM 126 to the VTM 102.

[0019] A door 134 (e.g., a slit valve door) connects each respective airlock 130a, 130b to the VTM 101. Similarly, a door 136 (e.g., a slit valve door) connects each processing module to the VTM (e.g., VTM 101 or VTM 102) to which the respective processing module is coupled. The plurality of processing chambers 106, 108, 110, 112, 114, 116, and 118 are configured to perform one or more processes typically associated with substrates after fabrication of a polycrystalline plug as described herein.

[0020] The controller 120 controls the overall operation of the cluster tool 100 and includes a memory 121 to store data or commands / instructions related to the operation of the cluster tool 100. For example, the controller 120 controls the robotic arms 128, 138, 139 of the ATM 126, the VTM 101, the VTM 102, respectively, for transferring substrates to / from the VTM 101 and between the VTM 101 and the VTM 102. The controller 120 controls the opening and closing of the doors 132, 134, 136 and controls the pressure of the airlocks 130a, 130b, e.g., to maintain an atmospheric / vacuum pressure environment within the airlocks 130a, 130b as needed for the substrate transfer process. The controller 120 also controls the operation of the various processing chambers 106, 108, 110, 112, 114, 116 and 118 for performing the operations associated therewith, as described in more detail below.

[0021] Figure 2 A method for performing one or more DRAM bit line stack processes after a polysilicon plug fabrication using the cluster tool 100. For illustration purposes, Figure 3 A schematic side view of a portion of a substrate 300 including a polysilicon plug 302, e.g., after the polysilicon plug 302 has been formed on the substrate 300 outside of the cluster tool 100, is shown. Prior to performing the method of Figure 2 The substrate 300 can be loaded into the load port 122 via one or more of the load zones 124a-c. Under the control of the controller 120, the robotic arm 128 of the ATM 126 can transfer the substrate 300 having the polysilicon plug 302 from the load zone 124a to the ATM 126.

[0022] The controller 120 can determine whether at least one of the airlocks 130a, 130b is at an atmospheric pressure environment depending on whether one or both of the airlocks 130a, 130b is used. For illustration purposes, it is assumed that only the airlock 130a is used. If the controller 120 determines that the airlock 130a is at an atmospheric pressure environment, the controller 120 can open the door (a portion of 132) connecting the ATM 126 to the airlock 130a. Conversely, if the controller 120 determines that the airlock 130a is not at an atmospheric pressure environment, the controller 120 can adjust the pressure within the airlock 130a to an atmospheric pressure environment (e.g., via a pressure control valve operably connected to the airlocks 130a, 130b and controlled by the controller 120) and can recheck the pressure within the airlock 130a.

[0023] The controller can instruct the robot 128 to transfer the substrate 300 from the ATM 126 to the airlock 130a, close the door 132, and adjust the pressure within the airlock 130a to a vacuum pressure environment, e.g., matching or substantially matching the vacuum pressure environment inside the VTM 101.

[0024] The controller 120 can determine whether the airlock 130a is at a vacuum pressure environment. If the controller 120 determines that the airlock 130a is at a vacuum pressure environment, the controller can open the door 134 connecting the VTM 101 to the airlock 130a. Conversely, if the controller 120 determines that the airlock 130a is not at a vacuum pressure environment, the controller 120 can adjust the pressure within the airlock 130a to a vacuum pressure environment (e.g., via a pressure control valve, which can be operatively connected to the airlocks 130a, 130b and controlled by the controller 120) and recheck the pressure within the airlock 130a.

[0025] At 200, the controller 120 instructs the robot 138 to transfer the substrate 300 from the airlock 130a to the VTM 101 via the door 134 and close the door 134. Alternatively, the door 134 can remain open, e.g., to receive an outbound substrate after processing within the cluster tool 100 is complete.

[0026] At 202, the controller 120 instructs the robot 138 to transfer the substrate 300 to one or more of the processing chambers so that fabrication of the substrate can be completed - i.e., the bit line stack process on top of the polysilicon plug 302 on the substrate 300 is completed. For example, at 202, the controller 120 can instruct the robot 138 to open the door 136 corresponding to the processing chamber 106. Once opened, the controller 120 can instruct the robot 138 to transfer the substrate 300 (without breaking vacuum, i.e., while maintaining a vacuum pressure environment within the VTM 101 and the VTM 102 while transferring the substrate 300 between the processing chambers 106, 108, 110, 112, and 114) to a pre-clean chamber, e.g., the processing chamber 106. The processing chamber 106 can be used to perform one or more pre-clean processes to remove contaminants that can be present on the substrate 300, e.g., native oxides that can be present on the substrate 300. One such pre-clean chamber is the SiCoNi® Pre-Clean Chamber, commercially available from Applied Materials, Inc., of Santa Clara, California. TM processing tool.

[0027] Next, at 204, the controller 120 opens the door 136 and instructs the robot arm 138 to transfer the substrate 300 to the next processing chamber. For example, at 204, the controller 120 can instruct the robot arm 138 to transfer the substrate 300 from the pre-clean chamber to the barrier metal deposition chamber without breaking vacuum. For example, the controller 120 can instruct the robot arm 138 to transfer the substrate from the processing chamber 106 to, for example, the processing chamber 108 under vacuum. The processing chamber 108 is configured to perform a barrier metal deposition process on the substrate 300 (e.g., depositing a barrier metal 304 on top of the cleaned substrate 300 and the polycrystalline plug 302). The barrier metal can be one of titanium (Ti) or tantalum (Ta).

[0028] Next, at 206, the controller 120 can instruct the robot arm 138 to transfer the substrate 300 from the barrier metal deposition chamber to the barrier layer deposition chamber without breaking vacuum. For example, the controller 120 can instruct the robot arm 138 to transfer the substrate from the processing chamber 108 to either of the through-chambers 140, 142 under vacuum, at which point the robot arm 139 inside the VTM 102 can pick up the substrate 300 and move it to, for example, the processing chamber 110. The processing chamber 110 is configured to perform a barrier layer deposition process on the substrate 300 (e.g., depositing a barrier layer 306 on top of the barrier metal 304). The barrier layer can be one of titanium nitride (TiN), tantalum nitride (TaN), or tungsten nitride (WN).

[0029] Next, at 208, the controller 120 can instruct the robot arm 139 to transfer the substrate 300 from the processing chamber 110 to, for example, the processing chamber 112 without breaking vacuum. The processing chamber 112 is configured to perform a bit line metal deposition process on the substrate 300 (e.g., depositing a bit line metal layer 308 on top of the barrier layer 306 deposited at 206). The bit line metal can be one of tungsten (W), molybdenum (Mo), ruthenium (Ru), iridium (Ir), or rhodium (Rh).

[0030] Next, at 210, the controller 120 can instruct the robot arm 139 to transfer the substrate 300 from the processing chamber 112 to, for example, the processing chamber 114 without breaking vacuum. The processing chamber 114 is configured to perform a hard mask deposition process on the substrate 300 (e.g., depositing a hard mask layer 310 on top of the bit line metal layer 308 deposited at 208). The hard mask can be one of silicon nitride (SiN), silicon oxide (SiO), or silicon carbide (SiC).

[0031] In some embodiments, an anneal process can be performed on the substrate 300 after deposition of the blocking metal 304 and before deposition of the blocking layer 306 on top of the blocking metal 304, as shown at 205. The anneal process can be any suitable anneal process, such as a rapid thermal processing (RTP) anneal. For example, the substrate 300 can first be transferred to a processing chamber 116 prior to being transferred from the processing chamber 108 to the processing chamber 110. The processing chamber 116 is configured to perform the anneal process on the substrate 300. After the anneal process, the annealed substrate 300 including the blocking metal 304 can be transferred from the anneal chamber (e.g., the processing chamber 116) to the blocking layer deposition chamber (e.g., the processing chamber 110) under vacuum, for example, using the robotic arm 139.

[0032] Alternatively or in combination, an anneal process can be performed on the substrate 300 after deposition of the bit line metal layer 308 and before deposition of the hard mask layer 310 on top of the bit line metal layer 308, as shown at 209a. For example, the substrate 300 can first be transferred to a processing chamber 116 (i.e., an anneal chamber) prior to being transferred from the processing chamber 112 to the processing chamber 114. The anneal process can be performed on the substrate 300 having the bit line metal layer 308 deposited thereon as described above, or another anneal process if an anneal was previously performed at 205. In some embodiments where the anneal process is performed at 209a, the annealed substrate 300 can be transferred to another processing chamber for deposition of an optional capping layer 309 on the bit line metal layer 308, as shown at 209b. For example, the annealed substrate 300 including the bit line metal layer 308 can be transferred from the anneal chamber (e.g., the processing chamber 116) to a capping layer deposition chamber (e.g., the processing chamber 118) under vacuum, for example, using the robotic arm 139, for deposition of the capping layer on top of the annealed bit line metal layer 308.

[0033] In some embodiments, after deposition of the bit line metal, some metals, such as ruthenium (Ru), are grain growth materials. The inventors have observed that subsequent deposition of a hard mask layer on top of these bit line metals at high temperatures will undesirably result in poor surface roughness. The inventors have observed that annealing the bit line metal layer after deposition of a low temperature capping layer prior to deposition of the hard mask layer can advantageously improve the surface roughness of the bit line metal layer. By performing each of the above sequences in an integrated tool (e.g., the cluster tool 100), it is further advantageously avoided that the bit line metal oxidizes during the anneal for grain growth.

[0034] Additional processes not described herein can also be performed on the substrate 300, or some of the processes described herein can be omitted.

[0035] After the above-described processes associated with the processing chambers 108, 110, 112, and 114 (and chambers 116, 118, if used) have been performed on the substrate 300, the substrate 300 is transferred from the VTM 102 back to the load port 122, e.g., using the robot 139 in the VTM 102 to transfer the substrate 300 to the through-chamber 140, 142, and the robot 138 in the VTM 101 to transfer the substrate 300 from the through-chamber 140, 142 to one of the airlocks 130a, 130b. The robot 128 can then be used to return the substrate 300 to an empty slot of a FOUP in the load port 122.

[0036] The cluster tool 100 and method of use described herein advantageously allow a user to perform multiple DRAM bit line processes on a polycrystalline plug using a single machine configured to maintain a vacuum pressure environment throughout the DRAM bit line processes. Thus, the likelihood of oxidation occurring on the substrate 300 after fabrication of the substrate (if not eliminated) is reduced. Additionally, because a vacuum pressure environment is maintained throughout the DRAM bit line processes, the selection of bit line metal material is not limited by the grain growth characteristics of the metal.

[0037] While the foregoing is directed to implementations of the present disclosure, other and further implementations of the disclosure can be devised without departing from the basic scope thereof.

Claims

1. A cluster tool for performing a dynamic random access memory (DRAM) bit line stacking process, the cluster tool comprising: a vacuum transfer module (VTM) configured to receive a substrate having polysilicon plugs formed thereon under vacuum conditions and transfer the substrate to and from a plurality of processing chambers without breaking vacuum, each processing chamber independently connected to the VTM to perform a corresponding one of a plurality of DRAM bit line processes on the substrate, the plurality of processing chambers comprising: a pre-clean chamber configured to remove native oxide from a surface of the polysilicon plug; a barrier metal deposition chamber configured to deposit a barrier metal on the polysilicon plug; a barrier layer deposition chamber configured to deposit a barrier layer on the barrier metal; a bit line metal deposition chamber configured to deposit a bit line metal layer on the barrier layer; an annealing chamber configured to perform an annealing process on the substrate after depositing the bit line metal layer; and A hard mask deposition chamber is configured to deposit a hard mask layer on the annealed surface of the substrate.

2. The cluster tool of claim 1 , wherein the plurality of processing chambers further comprises: A capping chamber is configured to deposit a cap layer on the surface of the substrate.

3. The cluster tool of claim 1, wherein the barrier metal deposition chamber is configured to deposit the barrier metal comprising at least one of titanium (Ti) or tantalum (Ta).

4. The cluster tool of claim 1, wherein the barrier layer deposition chamber is configured to deposit the barrier layer comprising at least one of titanium nitride (TiN), tantalum nitride (TaN), or tungsten nitride (WN).

5. The cluster tool of claim 1, wherein the bitline metal deposition chamber is configured to deposit the bitline metal layer comprising at least one of tungsten (W), molybdenum (Mo), ruthenium (Ru), iridium (Ir), or rhodium (Rh).

6. The cluster tool of any one of claims 1 to 5, wherein the hard mask deposition chamber is configured to deposit the hard mask layer comprising at least one of silicon nitride (SiN), silicon oxide (SiO), or silicon carbide (SiC).

7. The cluster tool of claim 1, wherein the cluster tool further comprises a controller configured to control the plurality of processing chambers.

8. The cluster tool of claim 7 , wherein the controller comprises a non-transitory computer-readable storage medium having a plurality of instructions stored thereon, the plurality of instructions when executed by the controller performing a method for performing the DRAM bit line stacking process, the method comprising: receiving the substrate with the polysilicon plugs at the VTM of the cluster tool under vacuum conditions; transferring the substrate from the VTM to the pre-clean chamber and removing the native oxide from the surface of the polysilicon plug without breaking vacuum; transferring the substrate from the pre-cleaning chamber to the barrier metal deposition chamber without breaking vacuum and depositing the barrier metal on the polysilicon plug; transferring the substrate from the barrier metal deposition chamber to the barrier layer deposition chamber and depositing the barrier layer on the barrier metal without breaking vacuum; transferring the substrate from the barrier layer deposition chamber to the bit line metal deposition chamber and depositing the bit line metal layer on the barrier layer without breaking vacuum; transferring the substrate from the bit line metal deposition chamber to an annealing chamber and performing an annealing process on the substrate without breaking vacuum; and The substrate is transferred from the bit line metal deposition chamber to the hard mask deposition chamber without breaking vacuum and the hard mask layer is deposited on the bit line metal layer.

9. A method for performing a dynamic random access memory (DRAM) bit line stacking process, the method comprising: receiving the substrate with the polysilicon plug in a vacuum transfer module (VTM) of the cluster tool under vacuum conditions; transferring the substrate from the VTM to a pre-clean chamber without breaking vacuum and removing native oxide from surfaces of the polysilicon plugs on the substrate; transferring the substrate from the pre-cleaning chamber to a barrier metal deposition chamber without breaking vacuum and depositing a barrier metal on the polysilicon plug; transferring the substrate from the barrier metal deposition chamber to a barrier layer deposition chamber without breaking vacuum and depositing a barrier layer on the barrier metal; transferring the substrate from the barrier layer deposition chamber to a bit line metal deposition chamber without breaking vacuum and depositing a bit line metal layer on the barrier layer; transferring the substrate from the bit line metal deposition chamber to an annealing chamber and performing an annealing process on the substrate without breaking vacuum; and The substrate is transferred from the annealing chamber to a hard mask deposition chamber without breaking vacuum and a hard mask layer is deposited on the bit line metal layer.

10. The method of claim 9, further comprising transferring the substrate from the barrier metal deposition chamber to an annealing chamber without breaking vacuum and performing an annealing process on the substrate before transferring the substrate from the barrier metal deposition chamber to the barrier layer deposition chamber without breaking vacuum.

11. The method of claim 9, further comprising, before transferring the substrate from the bitline metal deposition chamber to the hard mask deposition chamber without breaking vacuum: The substrate is transferred from the annealing chamber to a capping chamber without breaking vacuum and a capping layer is deposited on the bit line metal layer. 12 . The method of claim 9 , wherein the barrier metal deposited by the barrier metal deposition chamber comprises at least one of titanium (Ti) or tantalum (Ta). 13 . The method of claim 9 , wherein the barrier layer deposited by the barrier layer deposition chamber comprises at least one of titanium nitride (TiN), tantalum nitride (TaN), or tungsten nitride (WN). 14 . The method of claim 9 , wherein the bit line metal layer deposited by the bit line metal deposition chamber comprises at least one of tungsten (W), molybdenum (Mo), ruthenium (Ru), iridium (Ir), or rhodium (Rh). 15 . The method of claim 9 , wherein the hard mask layer deposited by the hard mask deposition chamber comprises at least one of silicon nitride (SiN), silicon oxide (SiO), or silicon carbide (SiC).

16. The method of claim 9, wherein a controller of the cluster tool is used to control transferring the substrate to and from the pre-cleaning chamber, the barrier metal deposition chamber, the barrier layer deposition chamber, the bit line metal deposition chamber, and the hard mask deposition chamber.

17. The method of any one of claims 9 to 14 or 16, wherein the VTM comprises at least one airlock and a robotic arm, and receiving the substrate at the VTM comprises transferring the substrate from the at least one airlock to the VTM using the robotic arm without breaking vacuum.

18. A non-transitory computer-readable storage medium having a plurality of instructions stored thereon, which when executed by a processor perform a method for performing a dynamic random access memory (DRAM) bit line stacking process, the method comprising: receiving a substrate including polysilicon plugs at a vacuum transfer module (VTM) of a cluster tool under vacuum conditions; transferring the substrate from the VTM to a pre-clean chamber without breaking vacuum and removing native oxide from a surface of the substrate; transferring the substrate from the pre-cleaning chamber to a barrier metal deposition chamber without breaking vacuum and depositing a barrier metal on the polysilicon plug; transferring the substrate from the barrier metal deposition chamber to a barrier layer deposition chamber without breaking vacuum and depositing a barrier layer on the barrier metal; transferring the substrate from the barrier layer deposition chamber to a bit line metal deposition chamber without breaking vacuum and depositing a bit line metal layer on the barrier layer; transferring the substrate from the bit line metal deposition chamber to an annealing chamber and performing an annealing process on the substrate without breaking vacuum; as well as The substrate is transferred from the annealing chamber to a hard mask deposition chamber without breaking vacuum and a hard mask layer is deposited on a surface of the bit line metal layer.

19. The non-transitory computer-readable storage medium of claim 18, further comprising at least one of the following: Before transferring the substrate from the barrier metal deposition chamber to the barrier layer deposition chamber, transferring the substrate from the barrier metal deposition chamber to an annealing chamber without breaking vacuum and performing an annealing process on the substrate; or Before transferring the substrate from the annealing chamber to the hard mask deposition chamber, the substrate is transferred from the annealing chamber to a capping chamber and a cap layer is deposited on the surface of the substrate without breaking vacuum.

20. The non-transitory computer-readable storage medium of any one of claims 18 or 19, wherein the barrier metal deposited by the barrier metal deposition chamber comprises at least one of titanium (Ti) or tantalum (Ta), wherein the barrier layer deposited in the barrier layer deposition chamber comprises at least one of titanium nitride (TiN), tantalum nitride (TaN), or tungsten nitride (WN), wherein the bit line metal layer deposited by the bit line metal deposition chamber comprises at least one of tungsten (W), molybdenum (Mo), ruthenium (Ru), iridium (Ir), or rhodium (Rh), and The hard mask layer deposited by the hard mask deposition chamber includes at least one of silicon nitride (SiN), silicon oxide (SiO), or silicon carbide (SiC).

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