Semiconductor components

Abstract

According to one embodiment of the present disclosure, a first semiconductor element includes: an element substrate, which includes an element area and a peripheral area outside the element area, and the element area is set by stacking a wiring layer and a first semiconductor layer including a compound semiconductor material; a read-out circuit substrate, which faces the first semiconductor layer across the wiring layer and is electrically connected to the first semiconductor layer across the wiring layer; a first electrode, which is arranged on the wiring layer and is electrically connected to the first semiconductor layer; a second electrode, which faces the first electrode across the first semiconductor layer; and an insulating layer, which is arranged on the second electrode and has a non-reducing property.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor element used in, for example, an infrared sensor or the like. Background Art

[0002] In recent years, image sensors (infrared sensors) with sensitivity in the infrared region have been commercialized. The semiconductor element used in the infrared sensor has a photoelectric conversion layer including a III-V semiconductor such as InGaAs (indium gallium arsenide). This photoelectric conversion layer generates electric charge by absorbing infrared light (performs photoelectric conversion).

[0003] In Patent Document 1, InGaAs epitaxially grown on a growth substrate including InP (indium phosphide) is used as a photoelectric conversion layer.

[0004] Reference List

[0005] Patent Literature

[0006] Patent Document 1: Japanese Unexamined Patent Application Publication (Japanese translation of PCT application) No. JP2014-521216 Summary of the invention

[0007] At the same time, there is a need to improve the manufacturing yield of such semiconductor elements.

[0008] It is desirable to provide a semiconductor element that enables improvement in manufacturing yield.

[0009] According to an embodiment of the present disclosure, a first semiconductor element includes: an element substrate, which includes an element region and a peripheral region outside the element region, in which a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked; a readout circuit substrate, which is opposite to the first semiconductor layer across the wiring layer and is electrically connected to the first semiconductor layer across the wiring layer; a first electrode, which is arranged in the wiring layer and is electrically connected to the first semiconductor layer; a second electrode, which is opposite to the first electrode across the first semiconductor layer; and an insulating layer, which is arranged on the second electrode and has a non-reducing property.

[0010] In the first semiconductor element according to the embodiment of the present disclosure, the insulating layer having non-reducing properties is provided on the second electrode having light-transmitting properties. This improves the adhesion between the second electrode and the insulating layer.

[0011] According to an embodiment of the present disclosure, a second semiconductor element includes: an element substrate, which includes an element region and a peripheral region outside the element region, in which a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked; a readout circuit substrate, which is opposite to the first semiconductor layer across the wiring layer and is electrically connected to the first semiconductor layer across the wiring layer; a first electrode, which is arranged in the wiring layer and is electrically connected to the first semiconductor layer; a second electrode, which is opposite to the first electrode across the first semiconductor layer; an insulating layer, which is arranged on the second electrode and has an opening near the peripheral region in the element region; and a conductive film, which includes aluminum (Al), and the conductive film is arranged above the insulating layer and is electrically connected to the second electrode through the opening.

[0012] In the second semiconductor element according to the embodiment of the present disclosure, a conductive film to be provided on the insulating layer and electrically connected to the second electrode via an opening provided near the peripheral region in the element region is formed using aluminum (Al). This allows the thickness of the conductive film to be reduced.

[0013] According to an embodiment of the present disclosure, a third semiconductor element includes: an element substrate, which includes an element area and a peripheral area outside the element area, in which a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked; a read-out circuit substrate, which is opposite to the first semiconductor layer across the wiring layer and electrically connected to the first semiconductor layer across the wiring layer; a first electrode, which is arranged in the wiring layer and electrically connected to the first semiconductor layer; a second electrode, which is opposite to the first electrode across the first semiconductor layer; an insulating layer, which is arranged on the second electrode and has an opening near the peripheral area in the element area; a conductive film, which is arranged above the insulating layer and electrically connected to the second electrode through the opening; and a light-shielding film, which is arranged on the conductive film and includes a black resist.

[0014] In the third semiconductor element according to the embodiment of the present disclosure, a light shielding film including a black resist is further provided on the conductive film provided on the insulating layer and electrically connected to the second electrode via an opening provided near the peripheral region in the element region. This allows the thickness of the conductive film to be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a schematic cross-sectional view showing an example of a configuration of a light receiving element according to a first embodiment of the present disclosure.

[0016] Figure 2 It is shown Figure 1 A schematic plan view of the overall outline configuration of a light receiving element is shown.

[0017] Figure 3 is a schematic cross-sectional view showing another example of the configuration of the light receiving element according to the first embodiment of the present disclosure.

[0018] Figure 4 It is shown Figure 3 A schematic cross-sectional view showing another configuration example of the configuration of the light receiving element shown.

[0019] Figure 5 is a schematic cross-sectional view showing another example of the configuration of the light receiving element according to the first embodiment of the present disclosure.

[0020] Figure 6 is a schematic cross-sectional view showing another example of the configuration of the light receiving element according to the first embodiment of the present disclosure.

[0021] Fig. 7A Is used to describe Figure 1 Schematic cross-sectional views showing steps of a method for manufacturing a light receiving element are shown.

[0022] Figure 7B It shows Fig. 7A Schematic cross-sectional view of the following steps.

[0023] Figure 7C It shows Figure 7B Schematic cross-sectional view of the following steps.

[0024] Figure 8 It is shown Figure 7C A schematic plan view of an example of the steps.

[0025] Fig. 9 It shows Figure 8 A schematic plan view of another example (1) of the structure of the semiconductor layer is shown.

[0026] Fig. 10A It is shown Figure 8 A schematic plan view of another example (2) of the structure of the semiconductor layer is shown.

[0027] Fig. 10B It is shown along Fig. 10A Schematic diagram of the cross-sectional structure along line BB shown.

[0028] Fig.11A It shows Figure 7C Schematic cross-sectional view of the following steps.

[0029] Fig. 11B It shows Fig.11A Schematic cross-sectional view of the following steps.

[0030] Fig. 12A It is shown Fig.11ASchematic diagram of an example of the steps of planar construction is shown.

[0031] Fig. 12B It is shown Fig. 11B Schematic diagram of an example of the steps of planar construction is shown.

[0032] Fig.13A It is shown Fig.11A A schematic diagram of another example (1) of the planar configuration of the steps shown.

[0033] Fig. 13B It is shown Fig. 11B A schematic diagram of another example (1) of the planar configuration of the steps shown.

[0034] Fig.14A It is shown Fig.11A A schematic diagram of another example (2) of the planar configuration of the steps shown.

[0035] Fig. 14B It is shown Fig. 11B A schematic diagram of another example (2) of the planar configuration of the steps shown.

[0036] Fig.15 It is shown Fig. 11B A schematic cross-sectional view of another example of the step (1) is shown.

[0037] Fig.16 It is shown Fig. 11B A schematic cross-sectional view of another example of the step (2) is shown.

[0038] Fig.17A It is shown Fig. 11B Schematic cross-sectional view of the following steps.

[0039] Fig. 17B It is shown Fig.17A Schematic cross-sectional view of the following steps.

[0040] Fig. 17C It is shown Fig. 17B Schematic cross-sectional view of the following steps.

[0041] Fig.17D It is shown Fig. 17C Schematic cross-sectional view of the following steps.

[0042] Fig.17E It is shown Fig.17D Schematic cross-sectional view of the following steps.

[0043] Fig.17F It is shown Fig.17E Schematic cross-sectional view of the following steps.

[0044] Figure 17GIt is shown Fig.17F Schematic cross-sectional view of the following steps.

[0045] Fig.17H It is shown Figure 17G Schematic cross-sectional view of the following steps.

[0046] Fig.17I It is shown Fig.17H Schematic cross-sectional view of the following steps.

[0047] Fig.17J It is shown Fig.17I Schematic cross-sectional view of the following steps.

[0048] Fig.18 is a schematic cross-sectional view showing a configuration of a light receiving element according to a second embodiment of the present disclosure.

[0049] Fig.19 is a characteristic diagram showing the relationship between wavelength and transmittance in each metal.

[0050] Fig. 20 It is a characteristic diagram showing the relationship between wavelength and reflectivity in various conductive films.

[0051] Fig.21 It is a characteristic diagram showing the relationship between the film thickness of various conductive films and the warpage amount of the Si substrate.

[0052] Fig. 22 is a schematic cross-sectional view illustrating an example of a configuration of a light receiving element according to a third embodiment of the present disclosure.

[0053] Fig.23 is a schematic cross-sectional view showing another example of the configuration of the light receiving element according to the third embodiment of the present disclosure.

[0054] Fig.24 is a schematic cross-sectional view showing another example of the configuration of the light receiving element according to the third embodiment of the present disclosure.

[0055] Fig.25 is a schematic cross-sectional view showing another example of the configuration of the light receiving element according to the third embodiment of the present disclosure.

[0056] Fig.26 is a schematic cross-sectional view showing another example of the configuration of the light receiving element according to Modification 1 of the present disclosure.

[0057] Fig.27A Is used to describe Fig.26 Schematic cross-sectional views showing steps of a method for manufacturing a light receiving element are shown.

[0058] Fig.27B It is shown Fig.27A Schematic cross-sectional view of the following steps.

[0059] Fig.28 It is shown Fig.27B A schematic cross-sectional view of another example of the step (1) is shown.

[0060] Fig.29 It is shown Fig.27B A schematic cross-sectional view of another example of the step (2) is shown.

[0061] Fig. 30A It is shown Fig.27B Schematic cross-sectional view of the following steps.

[0062] Fig. 30B It is shown Fig. 30A Schematic cross-sectional view of the following steps.

[0063] Fig.31 : is a schematic cross-sectional view showing an outline configuration of a light receiving element according to Modification 2 of the present disclosure.

[0064] Fig.32A Schematic cross-sectional views for describing steps of a method of manufacturing a light receiving element according to Modification 3 of the present disclosure.

[0065] Fig.32B It is shown Fig.32A Schematic cross-sectional view of the following steps.

[0066] Fig.32C It is shown Fig.32B Schematic cross-sectional view of the following steps.

[0067] Fig.32D It is shown Fig.32C Schematic cross-sectional view of the following steps.

[0068] Fig.32E It is shown Fig.32D Schematic cross-sectional view of the following steps.

[0069] Fig.33 is shown by Fig.32E A schematic cross-sectional view of the configuration of the main part of the light receiving element completed after the steps.

[0070] Fig.34A yes Fig.32E An enlarged schematic cross-sectional view of the portion shown (1).

[0071] Fig.34B yes Fig.33 An enlarged schematic cross-sectional view of the portion shown (1).

[0072] Fig.34CIt is shown Fig.34A A schematic cross-sectional view of another example of the shape of the opening is shown.

[0073] Fig.35A yes Fig.32E An enlarged schematic cross-sectional view of the portion shown (2).

[0074] Fig.35B yes Fig.33 An enlarged schematic cross-sectional view of the portion shown (2).

[0075] Fig.35C It is shown Fig.35A A schematic cross-sectional view of another example of the shape of the opening is shown.

[0076] Fig.36A yes Fig.32E An enlarged schematic cross-sectional view of the portion shown (3).

[0077] Fig.36B yes Fig.33 An enlarged schematic cross-sectional view of the portion shown (3).

[0078] Fig.36C It is shown Fig.36A A schematic cross-sectional view of another example of the shape of the opening is shown.

[0079] Fig.36D yes Fig.32E An enlarged schematic cross-sectional view of the portion shown (4).

[0080] Fig.37 : is a schematic cross-sectional view showing an example of a configuration of a light receiving element according to Modification 4 of the present disclosure.

[0081] Fig.38 : is a schematic cross-sectional view showing another example of the configuration of the light receiving element according to Modification 4 of the present disclosure.

[0082] Fig.39 : is a schematic cross-sectional view showing an example of a configuration of a light receiving element according to Modification 5 of the present disclosure.

[0083] Fig.40 : is a functional block diagram showing an example of an electronic device (camera) using an imaging element.

[0084] Fig.41 is a diagram showing an example of a schematic configuration of an endoscopic surgery system.

[0085] Fig.42 is a block diagram showing an example of the functional configuration of a camera head and a camera control unit (CCU).

[0086] Fig.43is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0087] Fig.44 It is a diagram for assisting in explaining an example of the installation positions of the vehicle exterior information detection unit and the imaging unit. DETAILED DESCRIPTION

[0088] Hereinafter, embodiments of the present disclosure are described in detail with reference to the accompanying drawings. The following description is directed to specific examples of the present disclosure, and the present disclosure is not limited to the following embodiments. In addition, the present disclosure is not limited to the arrangement, size, size ratio, etc. of the various components shown in the accompanying drawings. It should be noted that the description will be given in the following order.

[0089] 1. First Embodiment (Example of a Light Receiving Element Including a Non-Reducing Layer on a Second Electrode)

[0090] 1-1. Structure of light receiving element

[0091] 1-2. Method for manufacturing light receiving element

[0092] 1-3. Operation of light receiving element

[0093] 1-4. Action and Effect

[0094] 2. Second Embodiment (Example of Forming a Conductive Film Using a Conductive Material Including Al)

[0095] 3. Third Embodiment (Example of Providing Black Resist on Conductive Film)

[0096] 4. Modification 1

[0097] 5. Modification 2

[0098] 6. Modification 3

[0099] 7. Modification 4

[0100] 8. Modification 5

[0101] 9. Application Example 1 (Example of an imaging element)

[0102] 10. Application Example 2 (Example of Electronic Device)

[0103] 11. Practical application example 1 (Practical application example of endoscopic surgery system)

[0104] 12. Practical application example 2 (Practical application example of mobile objects)

[0105] <1. First Embodiment>

[0106] Figure 1An example of a cross-sectional configuration of a semiconductor element (light receiving element 1 ) according to the first embodiment of the present disclosure is schematically shown. Figure 2 Schematically shows Figure 1 The overall planar structure of the light receiving element 1 is shown. Note that Figure 1 Shown along Figure 2 The cross-sectional structure of the line II shown in FIG. The light receiving element 1 is applied to, for example, an infrared sensor using a compound semiconductor material such as a III-V semiconductor, and has a photoelectric conversion function for, for example, light with a wavelength ranging from a visible light region (for example, greater than or equal to 380 nm and less than 780 nm) to a short infrared region (for example, greater than or equal to 780 nm and less than 2400 nm). The light receiving element 1 is provided with, for example, a plurality of light receiving unit regions (pixels P) arranged two-dimensionally. Figure 1 A cross-sectional configuration of a portion corresponding to three pixels P is shown.

[0107] (1-1. Structure of Light Receiving Element)

[0108] like Figure 2 As shown, the light receiving element 1 includes an element region R1 in the middle portion and a peripheral region R2 disposed outside the element region R1 and surrounding the element region R1. The light receiving element 1 includes a conductive film 15B disposed to extend from the element region R1 to the peripheral region R2. The conductive film 15B has an opening in a region facing the middle portion of the element region R1.

[0109] like Figure 1 As shown, the light receiving element 1 has a stacked structure of an element substrate 10 and a readout circuit substrate 20. One surface of the element substrate 10 is a light incident surface (light incident surface S1), and the surface opposite to the light incident surface S1 (the other surface) is a bonding surface with the readout circuit substrate 20 (bonding surface S2).

[0110] The element substrate 10 includes a wiring layer 10W, a first electrode 11, a semiconductor layer 10S (first semiconductor layer), a second electrode 15, and passivation films 16A and 16B in order from a position close to the readout circuit substrate 20. The surface of the semiconductor layer 10S opposite to the wiring layer 10W and the end face (side face) of the semiconductor layer 10S are covered with an insulating film 17. The readout circuit substrate 20 is a so-called ROIC (readout integrated circuit), and includes a wiring layer 20W in contact with a bonding surface S2 of the element substrate 10, a multilayer wiring layer 22C, and a semiconductor substrate 21 opposite to the element substrate 10, wherein the wiring layer 20W and the multilayer wiring layer 22C are located between the element substrate 10 and the semiconductor substrate 21.

[0111] The element substrate 10 includes a semiconductor layer 10S in the element region R1. In other words, the region provided with the semiconductor layer 10S is the element region R1 of the light receiving element 1. In the element region R1, the region exposed from the conductive film 15B (the region opposite to the opening of the conductive film 15B) is the light receiving region. In the element region R1, the region located near the peripheral region R2 and covered by the conductive film 15B is an optical black (OPB, Optical Black) region R1B. The OPB region R1B is set to surround the light receiving region. The OPB region R1B is used to obtain a black level pixel signal. The element substrate 10 includes an embedded layer 18 and an insulating film 17 in the peripheral region R2. The peripheral region R2 is provided with through holes H1 and H2 that penetrate the element substrate 10 to reach the readout circuit substrate 20. In the light receiving element 1, light enters the semiconductor layer 10S from the light incident surface S1 of the element substrate 10 through the passivation films 16A and 16B, the second electrode 15 and the second contact layer 14. The signal charge photoelectrically converted in the semiconductor layer 10S moves through the first electrode 11 and the wiring layer 10W, and is read in the readout circuit substrate 20. The structure of each component will be described below.

[0112] The wiring layer 10W is arranged on the element region R1 and the peripheral region R2, and includes a bonding surface S2 with the readout circuit substrate 20. In the light receiving element 1, the bonding surface S2 of the element substrate 10 is arranged in the element region R1 and the peripheral region R2. For example, the bonding surface S2 in the element region R1 and the bonding surface S2 in the peripheral region R2 are coplanar. As described later, in the light receiving element 1, by providing the embedded layer 18, the bonding surface S2 can be formed in the peripheral region R2.

[0113] The wiring layer 10W includes, for example, a contact electrode 19E and a dummy electrode 19ED in the interlayer insulating films 19A and 19B. For example, the interlayer insulating film 19B is arranged on the readout circuit substrate 20 side, and the interlayer insulating film 19A is arranged on the first contact layer 12 side, and these interlayer insulating films 19A and 19B are stacked. The interlayer insulating films 19A and 19B each include, for example, an inorganic insulating material. Examples of inorganic insulating materials include silicon nitride (SiN), aluminum oxide (Al2O3), silicon oxide (SiO2), and hafnium oxide (HfO2). The interlayer insulating films 19A and 19B may include the same inorganic insulating material.

[0114] The contact electrode 19E is, for example, disposed in the element region R1. The contact electrode 19E is used to electrically connect the first electrode 11 and the readout circuit substrate 20 to each other, and is disposed for each pixel P in the element region R1. Each adjacent contact electrode 19E is electrically isolated from each other by the embedded layer 18 and the interlayer insulating films 19A and 19B. The contact electrode 19E includes, for example, a copper (Cu) pad and is exposed in the joint surface S2. The virtual electrode 19ED is, for example, disposed in the peripheral region R2. The virtual electrode 19ED is connected to the virtual electrode 22ED of the wiring layer 20W described later. By arranging the virtual electrode 19ED and the virtual electrode 22ED, the strength of the peripheral region R2 can be improved. For example, the virtual electrode 19ED is formed in the same step as the contact electrode 19E. The virtual electrode 19ED includes, for example, a copper (Cu) pad and is exposed in the joint surface S2.

[0115] The first electrode 11 provided between the contact electrode 19E and the semiconductor layer 10S is an electrode (anode) provided with a voltage for reading the signal charge (holes or electrons, for the sake of convenience of explanation, the signal charge is assumed to be holes for explanation below) generated in the photoelectric conversion layer 13, and is provided for each pixel P in the element region R1. The first electrode 11 is provided to fill the opening of the insulating film 17, and the first electrode 11 is in contact with the semiconductor layer 10S (more specifically, the diffusion region 12A described later). The first electrode 11 is, for example, larger than the opening of the insulating film 17, and a portion of the first electrode 11 is provided in the embedded layer 18. That is, the top surface of the first electrode 11 (the surface on the semiconductor layer 10S side) is in contact with the diffusion region 12A, and a portion of the bottom surface and the side surface of the first electrode 11 are in contact with the embedded layer 18. Each adjacent first electrode 11 is electrically isolated from each other by the insulating film 17 and the embedded layer 18.

[0116] The first electrode 11 includes, for example, any one of titanium (Ti), tungsten (W), titanium nitride (TiN), platinum (Pt), gold (Au), germanium (Ge), palladium (Pd), zinc (Zn), nickel (Ni), and aluminum (Al) as a single element, or an alloy containing at least one of them. The first electrode 11 may be a single film of such a constituent material, or may be a laminated film including a combination of two or more materials. For example, the first electrode 11 includes a laminated film of titanium and tungsten. The thickness of the first electrode 11 is, for example, several tens of nanometers to several hundred nanometers.

[0117] The semiconductor layer 10S includes, from a position close to the wiring layer 10W, for example, a first contact layer 12, a photoelectric conversion layer 13, and a second contact layer 14. The first contact layer 12, the photoelectric conversion layer 13, and the second contact layer 14 have the same planar shape as each other, and their end faces are arranged at the same position in a plan view.

[0118] The first contact layer 12 is provided, for example, to be shared by all pixels P, and is arranged between the insulating film 17 and the photoelectric conversion layer 13. The first contact layer 12 is used to electrically isolate each adjacent pixel P from each other, and, for example, a plurality of diffusion regions 12A are provided in the first contact layer 12. Dark current can be suppressed by using a compound semiconductor material having a band gap greater than the band gap of the compound semiconductor material constituting the photoelectric conversion layer 13 for the first contact layer 12. For example, n-type InP (indium phosphide) can be used for the first contact layer 12.

[0119] The diffusion regions 12A provided in the first contact layer 12 are separated from each other. Each pixel P is provided with a corresponding diffusion region 12A, and the first electrode 11 is connected to a corresponding diffusion region 12A. The diffusion region 12A is also provided in the OPB region R1B. The diffusion regions 12A are each used to read the signal charge generated in the photoelectric conversion layer 13 from a corresponding pixel P in the pixel P, and include, for example, p-type impurities. Examples of p-type impurities include Zn (zinc). In this way, a pn junction interface is formed between each diffusion region 12A and the first contact layer 12 other than the diffusion region 12A, thereby allowing each adjacent pixel P to be electrically isolated from each other. The diffusion region 12A is provided, for example, in the thickness direction of the first contact layer 12, and is also provided on a portion of the thickness direction of the photoelectric conversion layer 13.

[0120] For example, the photoelectric conversion layer 13 between the first electrode 11 and the second electrode 15, more specifically, the photoelectric conversion layer 13 between the first contact layer 12 and the second contact layer 14 is set to be shared by all pixels P. The photoelectric conversion layer 13 absorbs light of a predetermined wavelength to generate signal charges, and includes, for example, compound semiconductor materials such as i-type III-V semiconductors. Examples of compound semiconductor materials included in the photoelectric conversion layer 13 include InGaAs (indium gallium arsenide), InAsSb (indium antimony arsenide), InAs (indium arsenide), InSb (indium antimonide), and HgCdTe (mercury cadmium telluride). The photoelectric conversion layer 13 may include Ge (germanium). The photoelectric conversion layer 13 performs photoelectric conversion on light of a wavelength range, for example, from the visible light region to the short infrared region.

[0121] For example, the second contact layer 14 is set to be shared by all pixels P. The second contact layer 14 is set between the photoelectric conversion layer 13 and the second electrode 15, and contacts both of them. The second contact layer 14 is a region through which the charges released from the second electrode 15 migrate, and includes, for example, a compound semiconductor containing n-type impurities. For example, n-type InP (indium phosphide) can be used for the second contact layer 14.

[0122] For example, the second electrode 15 is used as an electrode shared by the pixels P, and is arranged on the second contact layer 14 (on the light incident side) in a manner of contacting the second contact layer 14. The second electrode 15 (cathode) is used to release the charges generated in the photoelectric conversion layer 13 that are not used as signal charges. For example, in the case where holes are to be read from the first electrode 11 as signal charges, electrons can be released, for example, by the second electrode 15. The second electrode 15 includes, for example, a conductive film capable of transmitting incident light such as infrared rays. For example, ITO (indium tin oxide), ITiO (In2O3-TiO2), etc. can be used for the second electrode 15. For example, as described in Modification Example 4 to be described later, the second electrode 15 can be arranged in a lattice shape to separate each adjacent pixel P. In this case, a conductive material with low light transmittance can be used for the second electrode 15.

[0123] The passivation films 16A and 16B cover the second electrode 15 from one side of the light incident surface S1. The passivation films 16A and 16B are preferably formed using a material that does not absorb light of a wavelength from the visible light region (e.g., greater than or equal to 380nm and less than 780nm) to the short infrared region (e.g., greater than or equal to 780nm and less than 2400nm). The passivation films 16A and 16B can be formed using the same material or different materials. In addition, the passivation films 16A and 16B can have an anti-reflection function. The passivation films 16A and 16B can be formed by, for example, an ALD (atomic layer deposition) method, a CVD (chemical vapor deposition) method, a PVD (physical vapor deposition) method, a coating method, etc.

[0124] As described above, the passivation film 16A is provided on the second electrode 15 and, for example, extends to the chip end E of the peripheral region R2. The passivation film 16A has an opening 16H in the OPB region R1B. Figure 2 As shown, the opening 16H is provided in a frame shape surrounding the light receiving area, for example. In a plan view, the opening 16H may be a hole having a quadrangular or circular shape, for example. The opening 16H of the passivation film 16A allows the conductive film 15B described later to be electrically connected to the second electrode 15.

[0125] The passivation film 16A is preferably formed using a non-reducing material. Examples of the non-reducing material include oxides (M x O y ), nitride (M x N y ) and nitrogen oxides (M x O y N z). M can be silicon (Si), titanium (Ti), hafnium (Hf), zirconium (Zr) or yttrium (Y). The letters x, y and z represent integers of 1 or greater. It should be noted that for silicon nitride (SiN), it is desirable to use a film forming method that does not use any reducing gas. Examples of such film forming methods include sputtering and coating. The passivation film 16A can be formed, for example, as a single-layer film of any of the above-mentioned materials. In the case where the passivation film 16A is set as a single-layer film, the film density of the single-layer film is preferably 2.0 g / cm 3 For example, although there is no specific upper limit for the film density, the film density is not higher than 8.0 g / cm 3 Note that film density is the mass divided by the volume of the film (g / cm 3 ) is defined and obtained, for example, by XRR measurement. Thus, a sealing function is added to the passivation film 16A. For example, the passivation film 16A may be formed as follows Figure 3 The film 16A1 and the film 16A2 shown in the figure are stacked in sequence. When the passivation film 16A is formed as a stacked film, it is preferable to use any one of the above materials to form the film 16A1 that is in direct contact with the second electrode 15. The thickness of the film 16A1 is, for example, 0.5 nm or more. For the film 16A2, it is preferable to use a material with high sealing properties, such as silicon nitride (SiN) or aluminum oxide (Al2O3). In addition, as Figure 4 As shown, the passivation film 16A may be provided as a multi-layer film in which three or more films 16A1 , 16A2 , 16A3 , 16A4 . . . , and 16AX are stacked on the second electrode 15 .

[0126] The passivation film 16B is provided to cover the passivation film 16A and the conductive film 15B, and similarly to the passivation film 16A, for example, extends to the chip end E of the peripheral region R2. For the passivation film 16B, for example, silicon nitride (SiN), aluminum oxide (Al2O3), silicon oxide (SiO2), tantalum oxide (Ta2O3), etc. can be used. It should be noted that, with respect to the passivation film 16B, there is no particular limitation on the film formation method of silicon nitride (SiN), and a silicon nitride (SiN) film can be formed by a plasma CVD method using a reducing gas instead of a sputtering method or a coating method.

[0127] The insulating film 17 is provided between the first contact layer 12 and the embedded layer 18, and covers the end surface of the first contact layer 12, the end surface of the photoelectric conversion layer 13, the end surface of the second contact layer 14, and the end surface of the second electrode 15. The insulating film 17 is in contact with the passivation film 16 in the peripheral region R2. The insulating film 17 includes, for example, silicon oxide (SiO X) or an oxide such as aluminum oxide (Al2O3). The insulating film 17 may be composed of a stacked structure including a plurality of films. The insulating film 17 may include, for example, an insulating material based on silicon (Si), such as silicon oxynitride (SiON), silicon oxide containing carbon (SiOC), silicon nitride (SiN), or silicon carbide (SiC). The thickness of the insulating film 17 is, for example, several tens of nanometers to several hundred nanometers.

[0128] The conductive film 15B is provided to extend from the OPB region R1B to the through hole H1 in the peripheral region R2. The conductive film 15B contacts the second electrode 15 at the opening 16H of the passivation film 16A provided in the OPB region R1B, and the conductive film 15B contacts the wiring (wiring 22CB described later) of the readout circuit substrate 20 through the through hole H1. This allows the voltage to be provided from the readout circuit substrate 20 to the second electrode 15 through the conductive film 15B. The conductive film 15B serves as a voltage supply path to the second electrode 15, and also has a function of serving as a light shielding film for forming the OPB region R1B. The conductive film 15B includes, for example, a metal material including tungsten (W), aluminum (Al), titanium (Ti), molybdenum (Mo), tantalum (Ta) or copper (Cu). The passivation film 16B may be provided on the conductive film 15B.

[0129] The adhesive layer B may be provided between the end of the second contact layer 14 and the second electrode 15. As described later, the adhesive layer B is used to form the light receiving element 1 and serves to bond the semiconductor layer 10S to a temporary substrate (described later). Figure 7C The adhesive layer B includes, for example, tetraethoxysilane (TEOS), silicon oxide (SiO2), etc. The adhesive layer B is, for example, arranged to have an increased width relative to the end face of the semiconductor layer 10S, and is covered with the embedding layer 18 together with the semiconductor layer 10S. The insulating film 17 is arranged between the adhesive layer B and the embedding layer 18.

[0130] Figure 5 and Figure 6 Each shows another example of the configuration of the adhesive layer B. The adhesive layer B may be provided over a wide area in the peripheral region R2, and may extend, for example, from the vicinity of the edge of the semiconductor layer 10S (element region R1) to a position between the through hole H1 and the through hole H2 ( Figure 5 Alternatively, the adhesive layer B may extend from the vicinity of the edge (element region R1) of the semiconductor layer 10S to the chip end (chip end E) ( Figure 6 ).

[0131] The embedding layer 18 is used to fill the temporary substrate (described later) in the manufacturing step of the light receiving element 1. Figure 7CThe formation of the embedded layer 18 suppresses the generation of defects in the manufacturing step due to the level difference between the semiconductor layer 10S and the temporary substrate 33, which will be described in detail later.

[0132] For example, the embedded layer 18 in the peripheral region R2 is arranged between the wiring layer 10W and the insulating film 17 and between the wiring layer 10W and the passivation film 16, and the thickness of the embedded layer 18 in the peripheral region R2 is equal to or greater than the thickness of the semiconductor layer 10S. Here, the embedded layer 18 is arranged to surround the semiconductor layer 10S, thereby forming a region (peripheral region R2) surrounding the semiconductor layer 10S. This enables the bonding surface S2 with the readout circuit substrate 20 to be arranged in the peripheral region R2. In the case where the bonding surface S2 is formed in the peripheral region R2, the thickness of the embedded layer 18 can be reduced, however, it is preferred that the embedded layer 18 covers the semiconductor layer 10S in the thickness direction, and the entire end face of the semiconductor layer 10S is covered by the embedded layer 18. By covering the entire end face of the semiconductor layer 10S with the embedded layer 18 through the insulating film 17, it is possible to effectively suppress water from entering the semiconductor layer 10S. The embedded layer 18 in the element region R1 is arranged between the semiconductor layer 10S and the wiring layer 10W to cover the first electrode 11.

[0133] The surface of the embedded layer 18 on the bonding surface S2 side is planarized, and the wiring layer 10W is provided on the planarized surface of the embedded layer 18 in the peripheral region R2. For the embedded layer 18, for example, an inorganic insulating material such as silicon oxide (SiOX), silicon nitride (SiN), silicon oxynitride (SiON), silicon oxide containing carbon (SiOC), or silicon carbide (SiC) can be used.

[0134] As described later, in the manufacturing steps of the light receiving element 1, the embedded layer 18 is formed, and then the wiring layer 10W (described later) including the interlayer insulating films 19A and 19B and the contact electrode 19E is formed over the embedded layer 18. Fig.17D The readout circuit substrate 20 including the wiring layer 20W is attached to the element substrate 10 including the wiring layer 10W (described later). Fig.17E) to form the light receiving element 1. At this time, the contact electrode 19E of the wiring layer 10W is connected to the contact electrode 22E of the wiring layer 20W. The contact electrodes 19E and 22E each include, for example, a Cu pad, and this direct bonding of the Cu pads connects the contact electrodes 19E and 22E to each other. When the contact electrode 19E is formed by a CMP (chemical mechanical polishing) method, the embedded layer 18 disposed under the copper film to be polished is required to have sufficient hardness to withstand the stress during polishing. In addition, in order to directly bond the Cu pads of the contact electrodes 19E and 22E to each other, it is necessary to form the element substrate 10 and the readout circuit substrate 20 to be very flat. Therefore, preferably, the embedded layer 18 disposed under the copper film has sufficient hardness to withstand the stress during polishing. Specifically, the constituent material of the embedded layer 18 is preferably a material having a hardness higher than that of a sealant or an organic material arranged around a wafer in a typical semiconductor package. Examples of materials having such high hardness include inorganic insulating materials. For example, forming a film of an inorganic insulating material by a CVD (Chemical Vapor Deposition) method, a sputtering method, or a coating method makes it possible to form the embedded layer 18 .

[0135] The embedded layer 18 is provided with through holes H1 and H2 penetrating the embedded layer 18. The through holes H1 and H2 penetrate the wiring layer 10W in addition to the embedded layer 18 to reach the readout circuit substrate 20. The through holes H1 and H2 have, for example, a quadrilateral planar shape, and a plurality of the through holes H1 and H2 are respectively provided to surround the element region R1 ( Figure 1 A). The through hole H1 is provided at a position closer to the element region R1 than the through hole H2, and the side wall and the bottom surface of each through hole H1 are covered by the conductive film 15B. The through hole H1 is used to connect the second electrode 15 (conductive film 15B) and the wiring (wiring 22CB described later) of the readout circuit substrate 20 to each other, and the through hole H1 is provided to penetrate the passivation film 16, the embedded layer 18, and the wiring layer 10W.

[0136] For example, the through hole H2 is set at a position closer to the chip end E than the through hole H1. The through hole H2 penetrates the passivation film 16, the embedding layer 18 and the wiring layer 10W to reach the pad electrode (the pad electrode 22P described later) of the readout circuit substrate 20. The through hole H2 allows the light receiving element 1 to be electrically connected to the outside. Neither the through hole H1 nor the through hole H2 may reach the readout circuit substrate 20. For example, the through holes H1 and H2 may reach the wiring of the wiring layer 10W, and the wiring may be connected to the wiring 22CB and the pad electrode 22P of the readout circuit substrate 20. The through hole H1 and the through hole H2 may penetrate the adhesive layer B ( Figure 5 and Figure 6 ).

[0137] The holes and electrons generated at the photoelectric conversion layer 13 are read from the first electrode 11 and the second electrode 15. In order to perform the reading operation at a high speed, the distance between the first electrode 11 and the second electrode 15 is preferably set to a distance sufficient for photoelectric conversion but not too far. That is, it is preferable to reduce the thickness of the element substrate 10. For example, the distance between the first electrode 11 and the second electrode 15 or the thickness of the element substrate 10 is 10 μm or less, further 7 μm or less, and further 5 μm or less.

[0138] The semiconductor substrate 21 of the readout circuit substrate 20 is opposite to the element substrate 10, and the wiring layer 20W and the multilayer wiring layer 22C are located between the semiconductor substrate 21 and the element substrate 10. The semiconductor substrate 21 includes, for example, silicon (Si). A plurality of transistors are provided near the surface of the semiconductor substrate 21 (the surface on the wiring layer 20W side). For example, a plurality of transistors are used to constitute a readout circuit (readout circuit) for each pixel P. The wiring layer 20W includes, for example, an interlayer insulating film 22A and an interlayer insulating film 22B in sequence from the element substrate 10 side, and these interlayer insulating films 22A and 22B are stacked. For example, a contact electrode 22E and a dummy electrode 22ED are provided in the interlayer insulating film 22A. The multilayer wiring layer 22C is provided in a manner opposite to the element substrate 10 across the wiring layer 20W. For example, a pad electrode 22P and a plurality of wirings 22CB are provided in the multilayer wiring layer 22C. The interlayer insulating films 22A and 22B each include, for example, an inorganic insulating material. Examples of the inorganic insulating material include silicon nitride (SiN), aluminum oxide (Al 2 O 3 ), silicon oxide (SiO 2 ), and hafnium oxide (HfO 2 ).

[0139] The contact electrode 22E is used to electrically connect the first electrode 11 and the wiring 22CB to each other, and is provided for each pixel P in the element region R1. The contact electrode 22E contacts the contact electrode 19E at the bonding surface S2 of the element substrate 10. Each adjacent contact electrode 22E is electrically isolated from each other by the interlayer insulating film 22A.

[0140] The dummy electrode 22ED provided in the peripheral region R2 contacts the dummy electrode 19ED at the bonding surface S2 of the element substrate 10. For example, the dummy electrode 22ED is formed in the same step as the contact electrode 22E. The contact electrode 22E and the dummy electrode 22ED each include, for example, a copper (Cu) pad, and are exposed in the surface of the readout circuit substrate 20 facing the element substrate 10. That is, for example, a Cu-Cu bond is established between the contact electrode 19E and the contact electrode 22E and between the dummy electrode 19ED and the dummy electrode 22ED. This enables the pixel P to be miniaturized, which will be described in detail later.

[0141] The wiring 22CB connected to the contact electrode 19E is connected to a transistor provided near the surface of the semiconductor substrate 21, thereby allowing the first electrode 11 and the readout circuit to be connected to each other for each pixel P. The wiring 22CB connected to the conductive film 15B via the through hole H1 is connected to a predetermined potential, for example. In this way, one of the charges generated in the photoelectric conversion layer 13 (for example, holes) is read in the readout circuit from the first electrode 11 via the contact electrodes 19E and 22E. The other charge (for example, electron) generated in the photoelectric conversion layer 13 is discharged from the second electrode 15 via the conductive film 15B to a predetermined potential.

[0142] The pad electrode 22P disposed in the peripheral region R2 is used to allow electrical connection to the outside. A through hole H2 that penetrates the element substrate 10 and reaches the pad electrode 22P is provided near the chip end E of the light receiving element 1, and the through hole H2 can be electrically connected to the outside. For example, the connection is established by methods such as wire bonding or bumps. For example, a predetermined potential can be provided to the second electrode 15 from an external terminal arranged in the through hole H2 via the wiring 22CB and the conductive film 15B of the readout circuit substrate 20 via the through hole H2. Due to the photoelectric conversion in the photoelectric conversion layer 13, the signal voltage read from the first electrode 11 can be read in the readout circuit of the semiconductor substrate 21 via the contact electrodes 19E and 22E, and the signal voltage can be output to the external terminal disposed in the through hole H2 through the readout circuit. For example, the signal voltage can be output to the external terminal via other circuits other than the readout circuit included in the readout circuit substrate 20. Other circuits refer to, for example, signal processing circuits, output circuits, and the like.

[0143] The thickness of the readout circuit substrate 20 is preferably greater than the thickness of the element substrate 10. For example, the thickness of the readout circuit substrate 20 is preferably more than twice the thickness of the element substrate 10, more preferably more than five times, and further preferably more than ten times. Alternatively, the thickness of the readout circuit substrate 20 is, for example, more than 100 μm, more than 150 μm, or more than 200 μm. The readout circuit substrate 20 having such a large thickness ensures the mechanical strength of the light receiving element 1. Note that the readout circuit substrate 20 may include only one layer of the semiconductor substrate 21 forming the circuit, or may include a substrate such as a supporting substrate in addition to the semiconductor substrate 21 forming the circuit.

[0144] (1-2. Method for manufacturing light receiving element)

[0145] For example, the light receiving element 1 can be manufactured in the following manner. 7A to 17J The manufacturing steps of the light receiving element 1 are shown in order of steps.

[0146] First, if Fig. 7AAs shown, for example, a semiconductor layer 10S is epitaxially grown on a growth substrate 31 including InP. The growth substrate 31 has a thickness of, for example, several hundred μm, and the semiconductor layer 10S has a thickness of, for example, several μm. Figure 7B As shown, the adhesive layer B is deposited on the semiconductor layer 10S. The diameter of the growth substrate 31 is, for example, less than 6 inches. For example, the semiconductor layer 10S is formed by epitaxially growing n-type InP to form the first contact layer 12, epitaxially growing i-type InGaAs to form the photoelectric conversion layer 13, and epitaxially growing n-type InP to form the second contact layer 14. For example, the semiconductor layer 10S can be formed after forming a buffer layer and a barrier layer on the growth substrate 31.

[0147] Then, if Figure 7C As shown, the growth substrate 31 formed with the semiconductor layer 10S is bonded to the temporary substrate 33 via the adhesive layer B. The temporary substrate 33 includes, for example, an insulating layer (insulating layer 33IA) and a substrate 33S. The insulating layer 33IA is provided between, for example, the adhesive layer B and the substrate 33S. For example, a substrate having a diameter larger than that of the growth substrate 31 is used as the temporary substrate 33, and a silicon (Si) substrate is used as the substrate 33S. The temporary substrate 33 has a diameter of, for example, eight inches to twelve inches. The small-diameter growth substrate 31 is bonded to the large-diameter temporary substrate 33, so that various devices for large-diameter substrates can be used when forming the element substrate 10. This makes it possible to bond the readout circuit substrate 20 and the element substrate 10 to each other using, for example, Cu-Cu bonding, thereby allowing miniaturization of the pixel P. The growth substrate 31 can be bonded to the temporary substrate 33 by plasma activation bonding, normal temperature bonding, bonding using an adhesive (adhesive bonding), etc. In this way, for example, a semiconductor layer 10S in the shape of a wafer is bonded to the temporary substrate 33. The thickness of the temporary substrate 33 is, for example, several hundred μm.

[0148] Figure 8 and Fig. 9 Examples of the planar configurations of the temporary substrate 33 and the semiconductor layer 10S (growth substrate 31) are shown respectively. The semiconductor layer 10S in a wafer state smaller than the temporary substrate 33 can be bonded to the temporary substrate 33 in a wafer state ( Figure 8 ), or a plurality of semiconductor layers 10S in a state where the chips are separated from each other may be bonded to a temporary substrate 33 in a wafer state ( Fig. 9 ).

[0149] Alternatively, if Fig. 10A and Fig. 10B As shown, the semiconductor layer 10S in a wafer state having the same size as the temporary substrate 33 may be bonded to the temporary substrate 33 in a wafer state. Fig. 10A 1 shows the planar configuration of the temporary substrate 33 and the semiconductor layer 10S (growth substrate 31 ), Fig. 10B Shown along Fig. 10A The cross-sectional structure of line BB.

[0150] like Fig.11A As shown, after the growth substrate 31 on which the semiconductor layer 10S is formed is bonded to the temporary substrate 33, the growth substrate 31 is removed. The removal of the growth substrate 31 can be performed by mechanical grinding, CMP (chemical mechanical polishing), wet etching, dry etching, etc. At this time, a portion of the growth substrate 31 may remain. In addition, the semiconductor layer 10S may be partially etched.

[0151] Then, if Fig. 11B As shown, for example, the semiconductor layer 10S is etched to a predetermined size according to the marking of the temporary substrate 33. This allows the semiconductor layer 10S to be formed in a state of a plurality of chips. Fig. 11B 2 and subsequent drawings show two semiconductor layers 10S among the semiconductor layers 10S in a multi-chip state.

[0152] Fig. 12A An example of a planar configuration of the semiconductor layer 10S before molding is shown, Fig. 12B Shown next Fig. 12A An example of a planar configuration of the semiconductor layer 10S after molding. Fig.13A Another example of the planar configuration of the semiconductor layer 10S before molding is shown. Fig. 13B Shown next Fig.13A Another example of the planar configuration of the semiconductor layer 10S after molding. Fig. 12A ) or the same size as the temporary substrate 33 ( Fig.13A ) is molded into a semiconductor layer 10S in a state of multiple chips.

[0153] Alternatively, if Fig.14A and Fig. 14B As shown, the plurality of semiconductor layers 10S in a chip state can be molded into a plurality of semiconductor layers 10S in a smaller chip state.

[0154] When etching the semiconductor layer 10S, for example, the adhesive layer B is etched together with the semiconductor layer 10S. The adhesive layer B may be maintained to have an increased width compared to the semiconductor layer 10S, and the adhesive layer B may extend around the semiconductor layer 10S ( Fig. 11B ).

[0155] Or, if Fig.15As shown, the adhesive layer B may be narrower than the semiconductor layer 10S, and there may be a gap between the semiconductor layer 10S and the temporary substrate 33. The adhesive layer B may be etched to have the same size as the semiconductor layer 10S.

[0156] like Fig.16 As shown, the adhesive layer B may not be etched when the semiconductor layer 10S is etched.

[0157] like Fig.17A As shown, after the semiconductor layer 10S is molded, a diffusion region 12A is formed in the semiconductor layer 10S for each pixel P. This allows element separation. In order to form the diffusion region 12A, for example, an insulating film 17 is used as a hard mask. Specifically, the insulating film 17 is formed to cover the top surface (the surface opposite to the bonding surface of the temporary substrate 33) and the side surface of the semiconductor layer 10S, and then, an opening is formed in the insulating film 17 covering the top surface of the semiconductor layer 10S by etching. After that, the gas phase diffusion of p-type impurities is performed using the insulating film 17 as a hard mask. This allows the diffusion region 12A to be formed in the selected area. The diffusion depth is, for example, several hundred nanometers, and substantially isotropic diffusion is performed. The diffusion region 12A can be formed by ion implantation or the like using a resist mask. Here, the diffusion region 12A is formed in the semiconductor layer 10S provided on the temporary substrate 33 of a large diameter, so that the pixel P can be miniaturized.

[0158] like Fig. 17B As shown, after the diffusion region 12A is provided in the semiconductor layer 10S, the first electrode 11 is formed on the semiconductor layer 10S. For example, the first electrode 11 is formed by forming a stacked film of titanium (Ti) / tungsten (W) in an opening provided in the insulating film 17 by a CVD method, a PVD method, an ALD method, a vapor deposition method, or the like, and then patterning the stacked film using photolithography and etching.

[0159] like Fig. 17C As shown, after forming the first electrode 11, an embedded layer 18 is formed on the entire surface of the temporary substrate 33. The embedded layer 18 is formed, for example, by forming a film of an insulating material to embed the semiconductor layer 10S on the entire surface of the temporary substrate 33, and then flattening the film of the insulating material by CMP (chemical mechanical polishing). This allows the embedded layer 18 to be formed covering the circumference (peripheral region R2) of the semiconductor layer 10S and the top surface (the surface farthest from the temporary substrate 33) of the semiconductor layer 10S. In the present embodiment, the embedded layer 18 is formed to fill the step difference between the semiconductor layer 10S and the temporary substrate 33, thereby suppressing the occurrence of defects in the manufacturing step caused by the level difference, which will be described in detail later.

[0160] like Fig.17DAs shown, after the embedded layer 18 is formed, a wiring layer 10W is formed, which is opposite to the semiconductor layer 10S via the embedded layer 18. For example, an interlayer insulating film 19A and an interlayer insulating film 19B are sequentially formed on the embedded layer 18, and then an opening is formed in the interlayer insulating film 19A and the interlayer insulating film 19B in the region opposite to the first electrode 11. A copper (Cu) film is formed in the opening of the interlayer insulating film 19A and the interlayer insulating film 19B by a vapor deposition method, a PVD method, a plating method, etc., and then the surface of the copper film is polished by, for example, a CMP method, thereby forming a contact electrode 19E. For example, in the same step as the step of forming the contact electrode 19E, a dummy electrode 19ED is formed in the peripheral region R2. Here, the wiring layer 10W is formed on a temporary substrate 33 of a large diameter, so various devices for substrates of a large diameter can be used.

[0161] like Fig.17E As shown, after forming the wiring layer 10W, the readout circuit substrate 20 is attached to the temporary substrate 33 via the wiring layer 10W. At this time, the wiring layer 20W is pre-formed in the readout circuit substrate 20. The wiring layer 20W of the readout circuit substrate 20 includes a contact electrode 22E and a dummy electrode 22ED. When the readout circuit substrate 20 is attached to the temporary substrate 33, for example, a Cu-Cu bond is established between the contact electrode 22E and the dummy electrode 22ED of the wiring layer 20W and the contact electrode 19E and the dummy electrode 19ED of the wiring layer 10W. More specifically, a bonding surface S2 is formed in the element region R1 to bond the contact electrode 19E and the contact electrode 22E to each other, and a bonding surface S2 is formed in the peripheral region R2 to bond the dummy electrode 19ED and the dummy electrode 22ED to each other. Here, the peripheral region R2 of the element substrate 10 is also bonded to the readout circuit substrate 20.

[0162] like Fig.17F As shown, after the readout circuit substrate 20 is attached to the temporary substrate 33, the temporary substrate 33 is removed. The temporary substrate 33 can be removed by using, for example, mechanical grinding, wet etching, dry etching, or the like.

[0163] like Figure 17G As shown, after removing the temporary substrate 33, the adhesive layer B and the like are also removed to expose the surface of the semiconductor layer 10S. At this time, unnecessary layers of the semiconductor layer 10S can be removed. In addition, the insulating layer 33IA or the insulating film 17 can be partially left in the region outside the opening of the semiconductor layer 10S, or the embedded layer 18 can be dug out halfway.

[0164] Then, if Fig.17H As shown in FIG. 1 , the second electrode 15 and the passivation film 16A are sequentially formed on the surface of the semiconductor layer 10S exposed by removing the temporary substrate 33 (the surface opposite to the surface provided with the wiring layer 10W). Fig.17I As shown, the through hole H1, the conductive film 15B, and the passivation film 16B are sequentially formed. This allows the second electrode 15 and the readout circuit substrate 20 to be electrically connected to each other.

[0165] Finally, if Fig.17J As shown in FIG. 1 , a through hole H2 is formed which penetrates the element substrate 10 and reaches the pad electrode 22P of the readout circuit substrate 20. Thus, the Figure 1 The light receiving element 1 is shown.

[0166] (1-3. Operation of Light Receiving Element)

[0167] In the light receiving element 1, when light (for example, light of wavelengths in the visible light region and the infrared light region) enters the photoelectric conversion layer 13 via the passivation films 16A and 16B, the second electrode 15, and the second contact layer 14, the light is absorbed by the photoelectric conversion layer 13. This generates pairs of holes (holes) and electrons (photoelectric conversion is performed) in the photoelectric conversion layer 13. At this time, for example, when a predetermined voltage is applied to the first electrode 11, a potential gradient is generated in the photoelectric conversion layer 13, so that one of the generated charges (for example, holes) migrates to the diffusion region 12A as a signal charge and is collected from the diffusion region 12A to the first electrode 11. The signal charge migrates to the semiconductor substrate 21 through the contact electrodes 19E and 22E, and is read for each pixel P.

[0168] (1-4. Function and Effect of Light Receiving Element)

[0169] In the light receiving element 1 of the present embodiment, the passivation film 16A provided on the light incident surface (surface S1) side of the semiconductor layer 10S on the second electrode 15 is formed using a non-reducing material. By forming the passivation film 16A using a non-reducing material, the adhesion between the second electrode 15 and the passivation film 16A is improved. This will be described below.

[0170] On the passivation film 16A, a wiring (conductive film 15B) for supplying a voltage from the readout circuit substrate 20 to the second electrode 15 is formed, and the wiring is also used as a light shielding film for the OPB (optical black) area R1B. However, the conductive film 15B peels off at the interface between the second electrode 15 and the passivation film 16A due to the stress during its formation, thus resulting in a decrease in the yield. For a typical light receiving element, the second electrode 15 is formed using an oxide transparent electrode material such as ITO, and the passivation film 16A is formed using silicon nitride (SiN). The cause of peeling off at the interface between the second electrode 15 and the passivation film 16A is believed to be low adhesion due to an adverse reaction between the film surfaces of ITO and SiN.

[0171] On the contrary, for the light receiving element 1 of the present embodiment, the passivation film 16A directly formed on the second electrode 15 is formed using a non-reducible material, specifically, the material is an oxide, nitride or oxynitride of Si, Ti, Hf, Zr, Y, etc. Therefore, the reactivity between the second electrode 15 and the passivation film 16A increases, and the adhesion improves. This reduces the occurrence of peeling at the interface between the second electrode 15 and the passivation film 16A caused by the stress when the conductive film 15B is formed. That is, the manufacturing yield rate can be improved.

[0172] Furthermore, stress when forming the conductive film 15B may cause deformation of the semiconductor layer 10S (specifically, the photoelectric conversion layer 13), thereby deteriorating dark time characteristics. However, as described above, by forming the passivation film 16A using a material having high adhesion to the second electrode 15, deterioration of dark time characteristics can be prevented.

[0173] As described above, according to the light receiving element 1 of the present embodiment, since the passivation film 16A directly provided on the second electrode 15 is formed using a non-reducing material, the adhesion between the second electrode 15 and the passivation film 16A is improved. Therefore, the occurrence of peeling at the interface between the second electrode 15 and the passivation film 16A is reduced, so that the manufacturing yield can be improved. In addition, the degradation of the dark time characteristic can be prevented.

[0174] The second and third embodiments and modifications of the first to third embodiments are described below. In the following description, the same components as those of the aforementioned first embodiment are denoted by the same reference numerals, and the description thereof is appropriately omitted.

[0175] <2. Second Embodiment>

[0176] Fig.18 The cross-sectional configuration of the light receiving element 2 according to the second embodiment of the present disclosure is schematically shown. As in the aforementioned first embodiment, for example, the light receiving element 2 is applied to an infrared sensor or the like using a compound semiconductor material such as a III-V semiconductor, and has a photoelectric conversion function for light having a wavelength ranging from a visible light region (for example, greater than or equal to 380 nm and less than 780 nm) to a short infrared region (for example, greater than or equal to 780 nm and less than 2400 nm). For the light receiving element 2, a conductive film 35B for supplying a voltage from the readout circuit substrate 20 to the second electrode 15 is formed using aluminum (Al).

[0177] The conductive film 35B is provided to extend from the OPB region R1B to the through hole H1 in the peripheral region R2. The conductive film 35B contacts the second electrode 15 at the opening 16H of the passivation film 16 provided in the OPB region R1B, and contacts the wiring (wiring 22CB described later) of the readout circuit substrate 20 through the through hole H1. This allows a voltage to be supplied from the readout circuit substrate 20 to the second electrode 15 via the conductive film 35B. The conductive film 35B serves as a voltage supply path to the second electrode 15, and also has a function of serving as a light shielding film forming the OPB region R1B.

[0178] For example, the conductive film 35B includes a material having low stress and high light shielding performance in the infrared region compared to a tungsten (W) film. Specifically, the conductive film 35B includes aluminum (Al). Preferably, the conductive film 35B is formed as a stacked film of a barrier metal and an Al film. This makes it possible to prevent oxidation of Al in the opening 16H in contact with the second electrode 15. Examples of barrier metals include a single layer film of titanium (Ti) or titanium nitride (TiN) and a stacked film of Ti / TiN. In addition, tantalum (Ta), tungsten (W) or molybdenum (Mo) or its nitride, etc. can be used as a material for the barrier metal.

[0179] Preferably, the conductive film 35B further has an anti-reflection structure on its surface. Specifically, it is preferred to stack a W film, for example, with a thickness of 30nm, on the Al film constituting the conductive film 35B. By stacking the W film on the Al film, the generation of ghosting is suppressed. In the case of a laminated film that is difficult to process Al / W, a silicon oxide (SiOx) film or a silicon nitride (SiN) film can be formed between the Al film and the W film. It should be noted that in the case where the intended purpose can be achieved by using a technology other than a metal film, the anti-reflection structure can be omitted, for example, as in the third embodiment described later, a light shielding film 37 including a black resist is provided on the conductive film 15B.

[0180] Similar to the above-mentioned passivation films 16A and 16B, the passivation film 36 covers the second electrode 15 from the side of the light incident surface S1. The passivation film 36 may have an anti-reflection function. For the passivation film 36, for example, silicon nitride (SiN), aluminum oxide (Al2O3), silicon oxide (SiO2), tantalum oxide (Ta2O3), etc. may be used.

[0181] In the light receiving element 2 of the present embodiment, the conductive film 35B is formed using Al, and the conductive film 35B is electrically connected to the second electrode via the opening 16H formed in the passivation film 16 near the peripheral region R2 in the element region R1. Forming the conductive film 35B using Al makes it possible to reduce the thickness of the conductive film 35B. This will be described below.

[0182] Fig.19The relationship between the wavelength and the transmittance in various metal films obtained by the transmission spectrum measurement of the metal films is shown. The desired light shielding performance of the conductive film 35B also serving as a light shielding film is obtained as follows.

[0183] (Formula 1) Required light shielding performance N [dB] = d [nm] × A [dB / nm]... (1)

[0184] (d: film thickness; A: light shielding performance; dB=20logT (T: transmittance)).

[0185] For example, it is assumed that the required light shielding performance in the near-infrared region (design wavelength: 1.5 μm) is -120 dB. The required film thickness in the case of using various metal films as the conductive film 35B is determined by the above equation (1): For example, at a wavelength of 1500 nm, a W film with a thickness of 60 nm has a light shielding performance of -31 dB, so in order to obtain a light shielding performance of -120 dB, the W film must have a thickness of 240 nm. In contrast, an Al film with a thickness of 60 nm has a light shielding performance of -81 dB at a wavelength of 1500 nm, so in order to obtain a light shielding performance of -120 dB, the thickness of the Al film needs to be 90 nm. Therefore, compared with the W film, the Al film can achieve the same level of light shielding performance with a smaller thickness.

[0186] As described above, according to the light receiving element 2 of the present embodiment, Al is used to form the conductive film 35B. Compared with the case where W is used to form the conductive film 15B as in the aforementioned first embodiment, this allows the thickness of the conductive film 35B to be reduced. That is, the generation of stress when the conductive film 35B is formed is reduced. Therefore, the manufacturing yield can be improved. In addition, the degradation of the characteristics in the dark can be prevented.

[0187] In addition, in the present embodiment, in order to prevent oxidation of Al constituting the conductive film 35B, a barrier metal is formed between the second electrode 15 and the conductive film 35B in the opening portion 16H in contact with the second electrode 15. This prevents oxidation of Al by, for example, an ITO film constituting the second electrode 15, thereby making the electrical connection between the second electrode 15 and the conductive film 35B stable and low in resistance.

[0188] In addition, in this embodiment, a W film is stacked on the Al film constituting the conductive film 35B as an antireflection structure. Fig. 20 The absolute reflectance of a single-layer film of Al, a single-layer film of W, and a stacked film of Al / W are shown. It can be seen that the stacked film of Al / W, in which a 30 nm thick W film is stacked on an Al film, provides a reflectance at the same level as the reflectance of the single-layer film of W, compared with the single-layer film of Al. This can suppress the generation of ghosting caused by stray light reflected by the conductive film 35B.

[0189] Table 1 summarizes the sputtering film forming conditions and film stresses of various metal films. Table 2 summarizes the parameters in the case of using various conductive films as the conductive film 35B. Fig.21 Table 2 shows the relationship between the film thickness of various conductive films and the warpage amount of the Si substrate.

[0190] [Table 1]

[0191]

[0192] [Table 2]

[0193]

[0194] Samples 1 and 2 are samples using W as comparative examples, and samples 3 to 5 are samples corresponding to the conductive film 35B of this embodiment. In the conductive film (samples 2, 4, and 5) including the barrier metal (Ti), the film thickness of W and Al is adjusted so that the total light shielding performance exceeds -120dB. The stress is expressed as the value obtained when each conductive film is formed by sputtering using the conditions of Table 1, and is expressed by the warpage of a silicon substrate of a φ200mm wafer size generated by synthesizing the stress value of the conductive film. When both the stress and the warpage are negative values, they indicate the compression direction, and when both the stress and the warpage are positive values, they indicate the expansion direction. It can be seen that the stress of samples 3 to 5 using Al is greatly reduced compared to the conductive films of samples 1 and 2 using W.

[0195] <3. Third embodiment>

[0196] Fig. 22 The cross-sectional configuration of the light receiving element (light receiving element 3) according to the third embodiment of the present disclosure is schematically shown. As in the above-mentioned first embodiment, the light receiving element 3 is applied to, for example, an infrared sensor using a compound semiconductor material such as a III-V semiconductor, and has a photoelectric conversion function for, for example, light with a wavelength ranging from a visible light region (for example, greater than or equal to 380nm and less than 780nm) to a short infrared region (for example, greater than or equal to 780nm and less than 2400nm). In the light receiving element 3, a light shielding film 37 containing, for example, a black resist is provided on the conductive film 15B.

[0197] The light shielding film 37 forms the OPB region R1B together with the conductive film 15B. The light shielding film 37 is formed using, for example, a black resist. For example, the end surface (surface 37S) of the light shielding film 37 on the element region R1 side extends further forward into the element region R1 than the end surface (surface 15S) of the conductive film 15B on the element region side. In other words, the end surface (surface 15S) of the conductive film 15B on the element region R1 side is covered by the light shielding film 37. The end surface structure of the conductive film 15B and the light shielding film 37 on the element region side is not limited to this. For example, Fig.23As shown, the end surface (surface 37S) of the light shielding film 37 on the element region R1 side and the end surface (surface 15S) of the conductive film 15B on the element region R1 side may be coplanar. Fig.24 As shown, the end surface (surface 15S) of the conductive film 15B on the element region R1 side may protrude further forward into the element region R1 than the end surface (surface 37S) of the light shielding film 37 on the element region R1 side. In addition, the light shielding film 37 may not necessarily be formed directly on the conductive film 15B. For example, Fig.25 As shown, a passivation film 36B may be formed between the conductive film 15B and the light shielding film 37 .

[0198] As described above, in the light receiving element 3 of the present embodiment, for example, a light shielding film 37 including a black resist is provided above the conductive film 15B. This makes it possible to reduce the thickness of the conductive film 15B. That is, the generation of stress during the formation of the conductive film 35B is reduced. Therefore, the manufacturing yield can be improved. In addition, the degradation of the characteristics in the dark can be prevented. Moreover, the occurrence of flare can be reduced.

[0199] It should be noted that although the second and third embodiments have been described with reference to examples in which the passivation film 36 is formed using, for example, silicon nitride (SiN), aluminum oxide (Al2O3), silicon oxide (SiO2), tantalum oxide (Ta2O3), etc., this is non-restrictive. As the passivation film 16A in the aforementioned first embodiment, the light receiving element 2 and the light receiving element 3 can each be formed using oxides, nitrides or oxynitrides of Si, Ti, Hf, Zr, Y, etc. In addition, for example, the light receiving element 3 can have a structure in which the passivation film 16 constituting the light receiving element 1 and the conductive film 35B constituting the light receiving element 2 are combined. By combining the structures of the aforementioned first to third embodiments with each other, the manufacturing yield can be further improved. In addition, the degradation of the characteristics in the dark can be better prevented.

[0200] <4. Modification 1>

[0201] Fig.26 The cross-sectional configuration of the main part of the light receiving element (light receiving element 4) according to the modification 1 of the above-mentioned first to third embodiments is shown. In the light receiving element 4, the embedding layer 18 includes a first embedding layer 18A and a second embedding layer 18B stacked. Except for this point, the light receiving element 4 has a configuration and effect similar to those of the light receiving element 1. Note that in Fig.26 In the example, the Figure 1 The cross-sectional structure of the light receiving element 1 shown in FIG. Fig.26 In the figure, for simplicity, the passivation films 16A and 16B are collectively represented as the passivation film 16.

[0202] The first embedded layer 18A is provided in the peripheral region R2 and is provided on the light incident surface S1 side relative to the second embedded layer 18B. Specifically, the first embedded layer 18A is provided between the second embedded layer 18B and the passivation film 16 and covers the end surface of the semiconductor layer 10S.

[0203] The second embedded layer 18B is arranged to extend over the element region R1 and the peripheral region R2. The second embedded layer 18B in the element region R1 is arranged between the wiring layer 10W and the semiconductor layer 10S, and covers the bottom surface of the semiconductor layer 10S (the surface facing the readout circuit substrate 20) and the bottom surface and side surface of the first electrode 11. The second embedded layer 18B in the peripheral region R2 is arranged between the wiring layer 10W and the first embedded layer 18A. The constituent material of the first embedded layer 18A and the constituent material of the second embedded layer 18B may be the same or different. The thickness of the first embedded layer 18A and the thickness of the second embedded layer 18B may be the same or different.

[0204] The insulating film 17 is provided in substantially one plane on the element region R1 and the peripheral region R2. The insulating film 17 is provided between the semiconductor layer 10S and the second embedded layer 18B in the element region R1, and between the first embedded layer 18A and the second embedded layer 18B in the peripheral region R2.

[0205] Such a light receiving element 4 can be manufactured, for example, in the following manner. FIG. 27A to FIG. 30B The manufacturing steps of the light receiving element 4 are shown in order of steps.

[0206] First, in a manner similar to that described in the first embodiment above, the semiconductor layer 10S on the temporary substrate 33 is molded into the shape of a plurality of chips ( Fig. 14B ).

[0207] Next, if Fig.27A As shown, the first embedded layer 18A is formed on the entire surface of the temporary substrate 33. The first embedded layer 18A is formed by, for example, forming a film of an insulating material to embed the semiconductor layer 10S on the entire surface of the temporary substrate 33, and then flattening the film of the insulating material by CMP. The first embedded layer 18A covering the periphery of the semiconductor layer 10S is thus formed. At this time, the top surface of the semiconductor layer 10S may be exposed from the first embedded layer 18A.

[0208] like Fig.27B As shown, after the first embedded layer 18A is formed, the diffusion region 12A is formed in the semiconductor layer 10S using a mask formed of, for example, the insulating film 17. The insulating film 17 is formed on the first embedded layer 18A.

[0209] like Fig.28 As shown, the mask for forming the diffusion region 12A may be formed of the first embedded layer 18A, or as shown in FIG. Fig.29 As shown, it can be formed by the first embedded layer 18A and the insulating film 17.

[0210] like Fig. 30A As shown, after the diffusion region 12A is formed in the semiconductor layer 10S, the first electrode 11 is formed in the opening of the insulating layer 17 .

[0211] like Fig. 30B As shown, after forming the first electrode 11, the second embedded layer 18B is formed on the first embedded layer 18A to cover the first electrode 11. The second embedded layer 18B is formed by forming a film of an insulating material on the entire surface of the temporary substrate 33 and then flattening the film of the insulating material by CMP. The subsequent steps ( Fig.28 D to Fig.28 J) to complete the light receiving element 4.

[0212] As in the present modification, embedding layer 18 may be constituted by a stacked structure of first embedding layer 18A and second embedding layer 18B. In this case as well, similar effects to those of the above-described first embodiment can be obtained.

[0213] <5. Modification 2>

[0214] Fig.31 The cross-sectional configuration of the main part of the light receiving element (light receiving element 5) according to the second modification of the above-mentioned first to third embodiments is shown. The light receiving element 5 includes a color filter layer 41 and an on-chip lens (condenser lens) 42 on the light incident surface S1 (the surface opposite to the surface facing the readout circuit substrate 20) of the element substrate 10. Except for this point, the light receiving element 5 has a configuration and effect similar to those of the light receiving element 1. It should be noted that in Fig.31 In the example, the Figure 1 The cross-sectional structure of the light receiving element 1 shown in FIG. Fig.31 In the figure, for simplicity, the passivation films 16A and 16B are collectively represented as the passivation film 16.

[0215] For example, in the light receiving element 5, the color filter layer 41 and the on-chip lens 42 are sequentially arranged on the passivation film 16 of the element substrate 10 via the flattening film 16C. The color filter layer 41 may include an IR (infrared) filter. By providing the color filter layer 41, light receiving data of the corresponding wavelength can be obtained for each pixel P.

[0216] The on-chip lens 42 is used to converge the light entering the light receiving element 1 to the photoelectric conversion layer 13. The on-chip lens 42 includes, for example, organic materials, silicon oxide (SiO2), etc. In the light receiving element 5, the embedded layer 18 is arranged in the peripheral region R2, thereby reducing or eliminating the step difference of the element substrate 10 between the element region R1 and the peripheral region R2, thereby allowing the formation of a planar light incident surface S1. For example, this makes it possible to form the on-chip lens 42 with high precision by using a photolithography step. For example, the color filter layer 41 and the on-chip lens 42 are located at the terminal in the element region R1. The planarization film 16C arranged between the passivation film 16 and the color filter layer 41 is, for example, set to be from the element region R1 to the peripheral region R2, and is located at the terminal in the peripheral region R2. The color filter layer 41, the on-chip lens 42 and the planarization film 16C can be terminated at any position in the element region R1 or in the peripheral region R2, respectively.

[0217] As in this modification, the color filter layer 41 and the on-chip lens 42 can be provided on the light incident surface S1 of the element substrate 10. In this case, similar effects to those of the first embodiment described above can also be obtained. In addition, the on-chip lens 42 can be easily formed with high precision on the light incident surface S1 flattened by the embedding layer 18.

[0218] <6. Modification 3>

[0219] FIG. 32A to FIG. 32E The light receiving element ( Fig.33 The light receiving element 6 is formed by forming a cap layer ( Fig.32A The light receiving element 6 is manufactured by bonding the semiconductor layer 10S to the temporary substrate 33 via the cap layer 35. Except for this point, the light receiving element 6 has a similar structure to the light receiving element 1, and its operation and effect are also similar to those of the light receiving element 1. It should be noted that Fig.33 In the example, the Figure 1 The cross-sectional structure of the light receiving element 1 shown in FIG. Fig.33 In the figure, for simplicity, the passivation films 16A and 16B are collectively represented as the passivation film 16.

[0220] For example, the light receiving element 6 can be manufactured using the cover layer 35 in the following manner.

[0221] First, if Fig.32AAs shown, for example, a semiconductor layer 10S and a cap layer 35 including i-type InGaAs are sequentially formed by epitaxial growth on a growth substrate 31. As the semiconductor layer 10S, for example, a first contact layer 12 including n-type InP, a photoelectric conversion layer 13 including i-type or n-type InGaAs, and a second contact layer 14 including n-type InP are sequentially formed.

[0222] The cap layer 35 is used to prevent the semiconductor layer 10S and the adhesive layer B for bonding the semiconductor layer 10S to the temporary substrate 33 from directly contacting each other. If the steps are continued while the adhesive layer B remains in contact with the semiconductor layer 10S, the characteristics of the semiconductor layer 10S may deteriorate. Alternatively, the semiconductor layer 10S can be peeled off from the temporary substrate 33. The semiconductor layer 10S can also be peeled off from the adhesive layer B. By providing the cap layer 35 between the semiconductor layer 10S and the adhesive layer B, the occurrence of such characteristic degradation, such film peeling, etc. can be suppressed. For the cap layer 35, any semiconductor material that can be epitaxially grown on the semiconductor layer 10S (more specifically, the second contact layer 14) can be used. For example, InGaAs, InAsSb, etc. can be used.

[0223] After the cap layer 35 is formed on the semiconductor layer 10S, an adhesive layer B including, for example, silicon oxide (SiO 2 ) is formed on the cap layer 35 .

[0224] Then, if Fig.32B As shown, the growth substrate 31 is bonded to a temporary substrate 33 having a large diameter via an adhesive layer B. At this time, a cap layer 35 is interposed between the adhesive layer B and the second contact layer 14. For the adhesive layer B, for example, tetraethoxysilane (TEOS), silicon oxide (SiO2), etc. can be used.

[0225] Next, the same method as in the first embodiment (see FIG. 11A to FIG. 17C ) in a similar manner, the growth substrate 31 is removed in sequence, the semiconductor layer 10S is molded, the diffusion region 12A is formed by impurity diffusion, the first electrode 11 is formed, and the embedded layer 18 is formed. Fig.32C As shown, the wiring layer 10W is formed on the embedded layer 18. In the present embodiment, the embedded layer 18 is formed to fill the step difference between the semiconductor layer 10S and the temporary substrate 33. As with the light receiving element 1, the occurrence of defects in the manufacturing steps caused by the level difference can be suppressed. In addition, while performing the steps of removing the growth substrate 31, forming the diffusion region 12A, forming the wiring layer 10W, etc., the cap layer 35 is placed between the adhesive layer B and the second contact layer 14. This can suppress the occurrence of degradation of the characteristics of the semiconductor layer 10S, film peeling, etc.

[0226] After forming the wiring layer 10W, in a manner similar to the above-described first embodiment, the temporary substrate 33 is attached to the readout circuit substrate 20 via the wiring layer 10W ( Fig.32D ).

[0227] Next, if Fig.32E As shown, the temporary substrate 33, the adhesive layer B and the cover layer 35 are removed in sequence to expose the second contact layer 14. The removal of the temporary substrate 33 is performed in a manner similar to the first embodiment described above. The adhesive layer B and the cover layer 35 can be removed by, for example, wet etching. For the wet etching of the adhesive layer B, for example, HF (hydrogen fluoride), BHF (buffered hydrogen fluoride), etc. can be used. For the wet etching of the cover layer 35, for example, a mixed solution of an acid and an oxidant can be used. As an acid, for example, HF, hydrochloric acid (HCl), phosphoric acid (H3PO4), etc. can be used. As an oxidant, for example, hydrogen peroxide water, ozone water, etc. can be used. The adhesive layer B and the cover layer 35 can be removed by dry etching, however, it is preferred to remove them by wet etching (described later).

[0228] Fig.34A yes Fig.32E 10S. For example, in a plan view, the area of ​​the region where the adhesive layer B and the cap layer 35 are to be removed is smaller than the area of ​​the semiconductor layer 10S. Therefore, the cap layer 35 and the adhesive layer B remain on the peripheral edge of the light incident surface S1 side (the surface opposite to the surface facing the readout circuit substrate 20) of the semiconductor layer 10S, more specifically, on the end of the second contact layer 14. It should be noted that the cap layer 35 may be recessed or protruded relative to the adhesive layer B.

[0229] The steps after removing the cover layer 35 are performed in a manner similar to that described in the first embodiment above (see FIG. 17H to FIG. 17J ) to complete the light receiving element 6.

[0230] Fig.33 An example of a cross-sectional configuration of a main portion of the light receiving element 6 manufactured in this manner is shown.

[0231] Fig.34B yes Fig.33 1 is an example of an enlarged view of the portion R shown. As shown in the figure, the second electrode 15 and the passivation film 16 can be formed under the condition that the cover layer 35 and the adhesive layer B are retained. At this time, the second electrode 15 is in contact with the second contact layer 14, and is in contact with the cover layer 35 and the adhesive layer B. The embedding layer 18 protrudes relative to the semiconductor layer 10S on the light incident surface S1 side (opposite to the readout circuit substrate 20) by an amount corresponding to the thickness of the cover layer 35 and the adhesive layer 13.

[0232] like Fig.34CAs shown, the opening formed by removing the adhesive layer B and the cap layer 35, that is, the opening exposing the second contact layer 14 preferably has a tapered shape. Forming the second electrode 15 in the opening having such a tapered shape improves the coverage of the second electrode 15. For example, the opening having a tapered shape is formed by removing the adhesive layer B and the cap layer 35 by wet etching. Therefore, it is preferred to remove the adhesive layer B and the cap layer 35 by wet etching.

[0233] Fig.35A yes Fig.32E Another example of an enlarged view of portion R is shown, and Fig.35B yes Fig.33 Another example of an enlarged view of the portion R shown. As shown in the figure, for example, in a plan view, the area of ​​the region where the adhesive layer B and the cover layer 35 are to be removed can be equal to the area of ​​the semiconductor layer 10S. Therefore, the cover layer 35 on the end of the second contact layer 14 is removed. In the light receiving element 6 thus formed, due to the cover layer 35, there is a displacement between the top surface of the second contact layer 14 (the surface on the light incident surface S1 side) and the bottom surface of the adhesive layer B (the surface on the readout circuit substrate 20 side) to form a level difference therebetween. In addition, the second electrode 15 is in contact with the second contact layer 14 and in contact with the adhesive layer B.

[0234] The opening formed by removing the adhesive layer B and the cover layer 35, that is, the opening exposing the second contact layer 14 preferably has a shape such as Fig.35C The tapered shape shown.

[0235] Fig.36A yes Fig.32E Another example of an enlarged view of the portion R shown, Fig.36B yes Fig.33 Another example of an enlarged view of the portion R shown. As shown in the figure, for example, in a plan view, the area of ​​the region where the adhesive layer B and the cap layer 35 are to be removed can be larger than the area of ​​the semiconductor layer 10S. Therefore, the cap layer 35 on the end of the second contact layer 14 is removed. In the light receiving element 6 formed in this way, a recess 18R caused by etching is formed between the end face of the semiconductor layer 10S and the embedding layer 18. In addition, the second electrode 15 contacts the second contact layer 14 and fills the recess 18R, and the second electrode 15 also contacts the adhesive layer B.

[0236] The opening formed by removing the adhesive layer B and the cover layer 35, that is, the opening exposing the second contact layer 14 preferably has a shape such as Fig.36C The tapered shape shown.

[0237] like Fig.36D As shown, the area of ​​the adhesive layer B and the cover layer 35 to be removed may be further enlarged so that the adhesive layer B is removed together with the cover layer 35 .

[0238] In the light receiving element 6 formed by such a method, the embedding layer 18 is also formed in a similar manner to the above-mentioned light receiving element 1, so it is possible to suppress the occurrence of defects in the manufacturing step due to the level difference between the semiconductor layer 10S and the temporary substrate 33. In addition, the formation of the cap layer 35 can prevent the semiconductor layer 10S (second contact layer 14) from contacting the adhesive layer B.

[0239] In the light receiving element 6, the cover layer 35 may remain on the end portion of the second contact layer 14 ( Figures 34A to 34C ), or the cover layer 35 may be completely removed. In the light receiving element 6 in which the cover layer 35 is completely removed, for example, or a level difference ( FIG. 35A to FIG. 35C ), or a recess 18R ( FIG. 36A to FIG. 36D ). In the light receiving element 6 , the embedding layer 18 protrudes by an amount corresponding to the thickness of the cap layer 35 and the adhesive layer B on the light incident surface S1 side relative to the semiconductor layer 10S.

[0240] <7. Modification 4>

[0241] Fig.37 and Fig.38 The cross-sectional structure of the light receiving element (light receiving element 7A and 7B) according to the modification 4 of the above-mentioned second and third embodiments is schematically shown. In the light receiving element 7A and 7B, the first contact layer 52, the photoelectric conversion layer 53 and the second contact layer 54 constitute the semiconductor layer 50S shared by a plurality of pixels P, and the second electrode 55 having a light shielding property is provided between each adjacent pixel P on the light incident surface S1 side of the semiconductor substrate 50S. In addition to this, the light receiving elements 7A and 7B have a similar structure to the light receiving element 1, and their functions and effects are also similar to those of the light receiving element 1.

[0242] As in the first embodiment described above, the element substrate 50 includes interlayer insulating films 58B and 58A, a first contact layer 52, a photoelectric conversion layer 53, a second contact layer 54, and a second electrode 55 in order from a position close to the readout circuit substrate 60. In addition, a passivation film 59 is provided on the second contact layer 54, the second electrode 55, the embedded layer 57, and the through electrode 57V. The interlayer insulating film 58 is provided with a wiring layer 50W including a first electrode 51. The wiring layer 50W includes contact electrodes 58EA and 58EB and a dummy electrode 58ED in the interlayer insulating films 58A and 58B. The surface of the semiconductor layer 50S opposite to the wiring layer 50W and the end face (side face) of the semiconductor layer 50S are covered by an insulating film 56. The readout circuit substrate 60 includes a wiring layer 60W in contact with the bonding surface S2 of the element substrate 50 and a semiconductor substrate 61 opposite to the element substrate 50 via the wiring layer 60W.

[0243] The second electrode 55 has a structure in which a cap layer 55A and a light shielding film 55B are stacked in sequence, and is, for example, arranged in a lattice shape between adjacent pixels P and arranged on the second contact layer 54 (light incident surface side). By arranging the second electrode 55 in a lattice shape, the resistance of electron extraction is reduced, the need to reduce the resistance of the second contact layer 54 is reduced, and the thickness of the second contact layer 54 can be reduced. Similar to the conductive film 35B of the second embodiment described above, the light shielding film 55B can be formed using, for example, an aluminum (Al) film. Alternatively, a tungsten (W) film, a copper (Cu) film, a silver (Ag) film, etc. can be used. Preferably, for example, the light shielding film 55B is stacked on the cap layer 55A via a barrier metal film such as a titanium (Ti) film, a titanium nitride (TiN) film, etc. Therefore, an ohmic contact is formed between the cap layer 55A and the light shielding film 55B.

[0244] For example, Fig.38 As shown, a light shielding film 37 including a black resist may be stacked on the light shielding film 55B in the vicinity of the peripheral region R2 in the element region R1.

[0245] The second electrode 55 is formed, for example, by patterning the light shielding film 55B by dry etching, and then patterning the cap layer 55A by wet etching using the light shielding film 55B as a metal mask. In the case where the cap layer 55A is patterned by wet etching as described above, the cross-sectional shape of the cap layer 55A (for example, N+InGaAs layer) patterned into a lattice shape has a characteristic that changes depending on the crystal plane orientation. Typically, an InGaAs / InP crystal in a 100 plane is processed into a reverse taper in the (011) plane cross-sectional direction, and is processed into a forward taper in a direction rotated 90° relative to the (011) plane.

[0246] As in the first embodiment described above, the readout circuit substrate 60 is a so-called ROIC (readout integrated circuit), and includes a wiring layer 60W in contact with the bonding surface S2 of the element substrate 50, and a semiconductor substrate 61 opposite to the element substrate 50 across the wiring layer 60W. The semiconductor substrate 61 is used to support the wiring layer 60W, and includes, for example, silicon (Si). The wiring layer 60W includes, for example, contact electrodes 62EA and 62EB in the interlayer insulating film 62 (62A and 62B), a dummy electrode 62ED, a pixel circuit 62CA, a wiring 62CB, and a pad electrode 62P. The interlayer insulating films 62A and 62B each include, for example, an inorganic insulating material. Examples of inorganic insulating materials include silicon nitride (SiN), aluminum oxide (Al2O3), silicon oxide (SiO2), and hafnium oxide (HfO2). The interlayer insulating films 62A and 62B can be formed using inorganic insulating materials different from each other or the same inorganic insulating material.

[0247] As described above, by forming a second electrode having a light-shielding property between adjacent pixels P, in addition to achieving the effect of the second embodiment described above, the leakage of light from adjacent pixel regions can also be reduced. In addition, the second electrode 55 has a stacked structure of a cap layer 55A and a light-shielding film 55B, and the cap layer 55A and the light-shielding film 55B are formed using, for example, a metal film. As described above, by providing a structure in which the cap layer 55A and the light-shielding film 55B are stacked in sequence, it is not necessary to form a transparent electrode or increase the thickness of the second contact layer 54. In addition, the damage to the photoelectric conversion unit (specifically, the second contact layer 54) when the light-shielding film 55B is patterned is reduced. Therefore, the sensitivity can be improved.

[0248] <8. Modification 5>

[0249] Fig.39 The cross-sectional configuration of a light receiving element (light receiving element 8) according to the fifth modification of the first to third embodiments described above is schematically shown. The light receiving element 8 has a laminated structure of an element substrate 10 including a compound semiconductor material and a semiconductor layer (a semiconductor layer 71S and a second semiconductor layer) including silicon (Si). Except for this point, the light receiving element 8 has a configuration similar to that of the light receiving element 1, and its operation and effects are also similar to those of the light receiving element 1. It should be noted that in Fig.39 In the example, the Figure 1 The cross-sectional structure of the light receiving element 1 shown in FIG. Fig.39 In the figure, for simplicity, the passivation films 16A and 16B are collectively represented as the passivation film 16.

[0250] The light receiving element 8 includes, in order on the light incident surface S1 of the element substrate 10 , a wiring layer 71W electrically connected to the semiconductor layer 71S, the semiconductor layer 71S, the color filter layer 41 , and an on-chip lens.

[0251] The semiconductor layer 71S is provided with a photodiode PD having a pn junction for each pixel P. The wiring layer 71W includes a plurality of wirings. For example, for each pixel P, the wiring layer 71W allows signal charges generated in the photodiode PD to migrate to the readout circuit substrate 20 .

[0252] The light receiving element 8 performs photoelectric conversion on light of wavelengths in, for example, the visible light region and the infrared light region. For example, light of a wavelength in the visible light region enters the semiconductor layer 71S via the on-chip lens 42 and the color filter layer 41, and is photoelectrically converted in the photodiode PD. At the same time, light of a wavelength in the infrared light region passes through the semiconductor layer 71S, and is photoelectrically converted in the photoelectric conversion layer 13 of the element substrate 10. The signal charge generated in the photodiode PD and the signal charge generated in the photoelectric conversion layer 13 are read on the readout circuit substrate 20.

[0253] Likewise, in the light receiving element 8 of the present embodiment, the embedding layer 18 is formed in a manner similar to that described above for the light receiving elements 1 and 2, and this makes it possible to suppress the occurrence of defects due to the step difference between the semiconductor layer 10S and the temporary substrate 33 in the manufacturing step. In addition, since the semiconductor layer 71S is stacked on the element substrate 10, it is possible to perform photoelectric conversion on light of wavelengths in the visible light region and the infrared light region in a single pixel P. This makes it possible to obtain more information from a single pixel P.

[0254] <9. Application Example 1>

[0255] The light receiving element 1 described in any of the above embodiments and the like (or the light receiving element 1, 2, 3, 4, 5, 6, 7A, 7B or 8 is hereinafter collectively referred to as the light receiving element 1) is applied to an imaging element, for example. The imaging element is, for example, an infrared image sensor.

[0256] <10. Application Example 2>

[0257] For example, the above-described imaging element can be applied to various types of electronic devices such as cameras that allow imaging of infrared regions. Fig.40 The schematic configuration of an electronic device 9 (camera) as an example is shown. The electronic device 9 is, for example, a camera capable of taking still images or moving images. The electronic device 9 includes an imaging element 9A composed of a light receiving element 1, an optical system (optical lens) 310, a shutter device 311, a driver 313, and a signal processor 312. The driver 313 drives the imaging element 9A and the shutter device 311.

[0258] The optical system 310 guides the image light (incident light) from the subject to the imaging element 9A. The optical system 310 may include a plurality of optical lenses. The shutter device 311 controls the period during which the imaging element 9A is irradiated with light and the period during which the light is blocked. The driver 313 controls the transmission operation of the imaging element 9A and the shutter operation of the shutter device 311. The signal processor 312 performs various signal processing on the signal output from the imaging element 9A. The image signal Dout that has been subjected to signal processing is stored in a storage medium such as a memory, or is output to a monitor, etc.

[0259] In addition, the light receiving element 1 described in the present embodiment and the like can also be applied to the following electronic devices (capsule endoscopes and mobile bodies such as vehicles).

[0260] <11. Practical Application Example 1 (Endoscopic Surgery System)>

[0261] The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure can be applied to an endoscopic surgery system.

[0262] Fig.41 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to an embodiment of the present disclosure (the present technology) can be applied.

[0263] exist Fig.41 , a state is shown in which a surgeon (physician) 11131 is using an endoscopic surgery system 11000 to perform surgery on a patient 11132 on a bed 11133. As shown in the figure, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical tools 11110 such as a pneumoperitoneum tube 11111 and an energy device 11112, a support arm device 11120 supporting the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are loaded.

[0264] The endoscope 11100 includes a lens barrel 11101 having a region of a predetermined length from its distal end to be inserted into a body cavity of a patient 11132, and a camera 11102 connected to the proximal end of the lens barrel 11101. In the illustrated example, the endoscope 11100 is shown to include a rigid endoscope having a rigid lens barrel 11101. However, the endoscope 11100 may also include a lens barrel 11101 having a flexible type as a flexible endoscope.

[0265] The lens barrel 11101 has an opening at its end, in which an objective lens is installed. The light source device 11203 is connected to the endoscope 11100, so that the light generated by the light source device 11203 is introduced into the end of the lens barrel 11101 through the light guide extending inside the lens barrel 11101 and irradiated toward the observation target in the body cavity of the patient 11132 through the objective lens. Note that the endoscope 11100 may be a forward-looking endoscope, or may be an oblique-looking endoscope or a side-looking endoscope.

[0266] The optical system and the imaging element are arranged inside the camera head 11102 so that the reflected light (observation light) from the observation target is focused on the imaging element through the optical system. The observation light is photoelectrically converted by the imaging element to generate an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observation image. The image signal is transmitted to the CCU 11201 as RAW data.

[0267] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), etc., and integrally controls the operations of the endoscope 11100 and the display device 11202. In addition, the CCU 11201 receives an image signal from the camera 11102, and performs various image processing such as development processing (demosaic processing) on ​​the image signal to display an image based on the image signal.

[0268] The display device 11202 displays an image based on an image signal subjected to image processing by the CCU 1121 under the control of the CCU 11201 .

[0269] The light source device 11203 includes a light source such as a light emitting diode (LED), and provides irradiation light to the endoscope 11100 when imaging the surgical field.

[0270] The input device 11204 is an input interface for the endoscopic surgery system 11000. The user can input various information or instructions to the endoscopic surgery system 11000 through the input device 11204. For example, the user can input instructions to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0271] The treatment tool control device 11205 controls the driving of the energy device 11112 to perform cauterization or cutting of tissues, sealing of blood vessels, etc. The pneumoperitoneum device 11206 delivers gas to the body cavity of the patient 11132 through the pneumoperitoneum tube 11111 to expand the body cavity, thereby ensuring the field of view of the endoscope 11100 and ensuring the working space of the surgeon. The recorder 11207 is a device capable of recording various information related to the operation. The printer 11208 is a device capable of printing various information related to the operation in various forms such as text, images, or graphics.

[0272] Note that when photographing the surgical site, the light source device 1203 that provides irradiation light to the endoscope 11100 may include a white light source, such as an LED, a laser light source, or a combination of the two. In the case where the white light source includes a combination of red, green, and blue (RGB) laser light sources, since the output intensity and output time can be controlled with high accuracy for each color (each wavelength), the light source device 11203 can perform white balance adjustment of the captured image. In addition, in this case, if the laser beams from the respective RGB laser sources are irradiated on the observation target in a time-division manner, and the driving of the imaging element of the camera 11102 is controlled synchronously with the irradiation time, it is also possible to capture images corresponding to the R, G, and B colors, respectively, in a time-division manner. According to this method, a color image can be obtained even if a color filter is not provided for the imaging element.

[0273] In addition, the light source device 11203 can be controlled so that the intensity of the light to be outputted is changed for each predetermined time. By controlling the driving of the imaging element of the camera 11102 in synchronization with the timing of the change in light intensity, images are acquired and synthesized in a time-division manner, and it is possible to create an image with a high dynamic range, such an image has no underexposed shadows and overexposed highlights.

[0274] In addition, the light source device 11203 can be configured to provide light of a predetermined wavelength band for special light observation. In special light observation, for example, by utilizing the wavelength dependence of the absorption of light in body tissues to irradiate a narrow band of light compared to the irradiation light (i.e., white light) during normal observation, narrow-band observation (narrow-band imaging) for imaging predetermined tissues such as blood vessels in the surface portion of the mucosa with high contrast is performed. Alternatively, in special light observation, fluorescence observation for acquiring images based on fluorescence generated by irradiation of excitation light can be performed. In fluorescence observation, fluorescence from human tissues can be observed by irradiating excitation light onto human tissues (autofluorescence observation), or a fluorescent image can be obtained by locally injecting a reagent such as indocyanine green (ICG) into human tissues and irradiating excitation light corresponding to the fluorescence wavelength of the reagent on the human tissues. The light source device 11203 can be configured to provide such narrow-band light and / or excitation light suitable for special light observation as described above.

[0275] Fig.42 It is shown Fig.41 A block diagram of an example of the functional configuration of the camera 11102 and the CCU 11201 shown in FIG.

[0276] The camera 11102 includes a lens unit 11401, an imaging unit 11402, a driving unit 11403, a communication unit 11404, and a camera control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 for communication.

[0277] The lens unit 11401 is an optical system, and is provided at a connection position with the lens barrel 11101. Observation light incident from the end of the lens barrel 11101 is guided to the camera 11102, and introduced into the lens unit 11401. The lens unit 11401 includes a combination of a plurality of lenses, including a zoom lens and a focus lens.

[0278] The number of imaging elements included in the imaging unit 11402 can be one (single-board type) or multiple (multi-board type). In the case where the imaging unit 11402 is constructed as a multi-board type, for example, image signals corresponding to R, G, and B, respectively, are generated by the imaging elements, and the image signals can be synthesized to obtain a color image. The imaging unit 11402 can also be constructed to have a pair of imaging elements for acquiring a right-eye image signal and a left-eye image signal for three-dimensional (3D) display. If 3D display is performed, the surgeon 11131 can more accurately understand the depth of body tissue in the surgical area. It should be noted that in the case where the imaging unit 11402 is constructed as a stereoscopic type, a plurality of systems of lens units 11401 are provided corresponding to the respective imaging elements.

[0279] In addition, the imaging unit 11402 may not necessarily be disposed on the camera head 11102. For example, the imaging unit 11402 may be disposed immediately after the objective lens inside the lens barrel 11101.

[0280] The driving unit 11403 includes an actuator, and moves the zoom lens and the focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera control unit 11405. Therefore, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

[0281] The communication unit 11404 includes a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal acquired from the imaging unit 11402 to the CCU 11201 through the transmission cable 11400 as RAW data.

[0282] In addition, the communication unit 11404 receives a control signal for controlling the driving of the camera 11102 from the CCU 11201, and provides the control signal to the camera control unit 11405. The control signal includes information related to imaging conditions, for example, information specifying a frame rate of an image to be captured, information specifying an exposure value when capturing an image, and / or information specifying a magnification and a focus of a captured image.

[0283] It should be noted that imaging conditions such as frame rate, exposure value, magnification, or focus may be specified by the user or may be automatically set based on the acquired image signal by the control unit 11413 of the CCU 11201. In the latter case, the endoscope 11100 has built-in automatic exposure (AE) function, automatic focus (AF) function, and automatic white balance (AWB) function.

[0284] The camera control unit 11405 controls the driving of the camera 11102 based on the control signal from the CCU 11201 received through the communication unit 11404 .

[0285] The communication unit 11411 includes a communication device for transmitting and receiving various information to and from the camera 11102. The communication unit 11411 receives an image signal transmitted from the camera 11102 through the transmission cable 11400.

[0286] Furthermore, the communication unit 11411 transmits a control signal for controlling the driving of the camera 11102 to the camera 11102. The image signal and the control signal may be transmitted through electrical communication, optical communication, or the like.

[0287] The image processing unit 11412 performs various image processing on the image signal in the form of RAW data transmitted from the camera 11102 .

[0288] The control unit 11413 performs various controls related to image capturing of the operation area, etc. through the endoscope 11100 and display of captured images obtained by image capturing of the operation area, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera 11102 .

[0289] In addition, the control unit 11413 controls the display device 11202 to display a captured image that images the surgical area, etc., based on the image signal that has been image-processed by the image processing unit 11412. Thus, the control unit 11413 can use various image recognition technologies to recognize various objects in the captured image. For example, the control unit 11413 can recognize surgical tools such as forceps, specific body areas, bleeding, and fog when the energy device 11112 is used, etc., by detecting the shape and color of the edge of the object included in the captured image. When the control unit 11413 controls the display device 11202 to display the captured image, the control unit 11413 can use the recognition result to display various surgical support information in a manner overlapping with the image of the surgical area. In the case where the surgical support information is displayed in an overlapping manner and provided to the surgeon 11131, the burden of the surgeon 11131 can be reduced, and the surgeon 11131 can perform the operation with certainty.

[0290] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 to each other is an electric signal cable for electric signal communication, an optical fiber for optical communication, or a composite cable for both electric communication and optical communication.

[0291] Here, in the example shown, although communication is performed by wired communication using the transmission cable 11400, communication between the camera 11102 and the CCU 11201 may be performed by wireless communication.

[0292] In the above, a description of an example of an endoscopic surgical system to which the technology according to the present disclosure can be applied has been given. The technology according to the present disclosure can be applied to the camera unit 11402 in the above-mentioned components. Applying the technology according to the present disclosure to the camera unit 11402 makes it possible to obtain a clearer image of the surgical area. Therefore, the surgeon can confirm the surgical area with certainty.

[0293] Note that the endoscopic surgery system has been described above as an example. The technology according to the present disclosure can also be applied to, for example, a microsurgery system or the like.

[0294] <12. Practical application example 2 (mobile object)>

[0295] The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure can be implemented in the form of a device to be installed on any kind of mobile body. Examples of mobile bodies may include automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, and robots.

[0296] Fig.43 : is a block diagram showing an example of a schematic configuration of a vehicle control system as an example of a moving body control system to which the technology according to the embodiment of the present disclosure can be applied.

[0297] The vehicle control system 12000 includes a plurality of electronic control units interconnected via a communication network 12001. Fig.43 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. In addition, a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown as the functional configuration of the integrated control unit 12050.

[0298] The drive system control unit 12010 controls the operation of the devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 is used as a control device for the following devices: a drive force generating device such as an internal combustion engine or a drive motor that generates the drive force of the vehicle, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating the braking force of the vehicle, etc.

[0299] The body system control unit 12020 controls the operation of various devices provided on the body according to various programs. For example, the body system control unit 12020 is used as a control device for a keyless entry system, a smart key system, a power window device, or various lights (such as headlights, reverse lights, brake lights, turn signal lights, or fog lights, etc.). In this case, radio waves transmitted from a mobile device that replaces the key or signals of various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls the door lock device, power window device, lights, etc. of the vehicle.

[0300] The vehicle exterior information detection unit 12030 detects information about the exterior of the vehicle including the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to the camera unit 12031. The vehicle exterior information detection unit 12030 causes the camera unit 12031 to capture an image of the exterior of the vehicle and receives the captured image. Based on the received image, the vehicle exterior information detection unit 12030 may perform a process of detecting an object such as a person, a vehicle, an obstacle, a sign, text on the road surface, or perform a process of detecting the distance thereof.

[0301] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 may output the electrical signal as an image, or may output the electrical signal as information about the measured distance. In addition, the light received by the imaging unit 12031 may be visible light, or may be invisible light such as infrared rays.

[0302] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver state detection unit 12041 that detects the state of the driver. The driver state detection unit 12041 includes, for example, a camera that takes a picture of the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or the driver's concentration level, or can determine whether the driver is dozing off.

[0303] The microcomputer 12051 can calculate the control target value of the driving force generating device, the steering mechanism or the braking device based on the information about the inside or outside of the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and output the control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform the coordinated control aimed at realizing the advanced driver assistance system (ADAS) function, which includes the collision avoidance or shock absorption of the vehicle, the following driving based on the following distance, the cruise control, the vehicle collision warning, the vehicle lane departure warning, etc.

[0304] In addition, the microcomputer 12051 can perform collaborative control intended for autonomous driving by controlling the driving force generating device, steering mechanism, and braking device based on information about the outside or inside of the vehicle obtained by the outside information detection unit 12030 or the inside information detection unit 12040, so that the vehicle can drive autonomously without relying on the driver's operation.

[0305] In addition, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information about the exterior of the vehicle obtained by the exterior information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control aimed at preventing glare by controlling the headlights to change from high beam to low beam, for example, based on the position of the preceding vehicle or the oncoming vehicle detected by the exterior information detection unit 12030.

[0306] The sound / image output unit 12052 transmits an output signal of at least one of sound and image to an output device capable of visually or auditorily notifying the occupants of the vehicle or the outside of the vehicle of the information. Fig.43 In the example of FIG. 1 , an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are shown as output devices. The display portion 12062 may include, for example, at least one of an in-vehicle display and a head-up display.

[0307] Fig.44 This is a diagram showing an example of the installation position of the camera unit 12031.

[0308] exist Fig.44 In the figure, the camera unit 12031 includes camera units 12101, 12102, 12103, 12104 and 12105.

[0309] The camera units 12101, 12102, 12103, 12104 and 12105 are, for example, arranged at positions on the front nose, rearview mirror, rear bumper and rear door of the vehicle 12100 and at positions on the upper part of the windshield inside the vehicle. The camera unit 12101 arranged at the front nose and the camera unit 12105 arranged at the upper part of the windshield inside the vehicle mainly obtain images of the front part of the vehicle 12100. The camera units 12102 and 12103 arranged at the rearview mirror mainly obtain images of the side of the vehicle 12100. The camera unit 12104 arranged at the rear bumper or rear door mainly obtains images of the rear part of the vehicle 12100. The camera unit 12105 arranged at the upper part of the windshield inside the vehicle is mainly used to detect vehicles ahead, pedestrians, obstacles, signals, traffic signs or lanes, etc.

[0310] By the way, Fig.44 An example of the photographing range of the camera units 12101 to 12104 is shown. The photographing range 12111 indicates the photographing range of the camera unit 12101 provided at the front nose. The photographing ranges 12112 and 12113 respectively indicate the photographing ranges of the camera units 12102 and 12103 provided at the rearview mirror. The photographing range 12114 indicates the photographing range of the camera unit 12104 provided at the rear bumper or the rear door. For example, a bird's-eye view image of the vehicle 12100 viewed from above is obtained by superimposing the image data photographed by the camera units 12101 to 12104.

[0311] At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0312] For example, the microcomputer 12051 can determine the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the time change of the distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, thereby extracting the nearest three-dimensional object that is particularly on the travel path of the vehicle 12100 and traveling at a predetermined speed (e.g., equal to or greater than 0 km / h) in the substantially same direction as the vehicle 12100 as the leading vehicle. In addition, the microcomputer 12051 can pre-set the following distance to be maintained ahead of the leading vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. Therefore, it is possible to perform cooperative control intended for autonomous driving, which allows the vehicle to travel autonomously without relying on the operation of the driver or the like.

[0313] For example, the microcomputer 12051 can classify the three-dimensional object data of the three-dimensional object into three-dimensional object data of two-wheeled vehicles, standard-sized vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on the distance information obtained from the camera units 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data to automatically avoid obstacles. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that can be visually recognized by the driver of the vehicle 12100 and obstacles that are difficult for the driver of the vehicle 12100 to visually recognize. Then, the microcomputer 12051 determines the collision risk representing the risk of collision with each obstacle. When the collision risk is equal to or greater than the set value and therefore there is a possibility of collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display unit 12062, and performs forced deceleration or evasive steering through the drive system control unit 12010. The microcomputer 12051 is thereby able to assist driving to avoid collisions.

[0314] At least one of the camera units 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 may identify pedestrians, for example, by determining whether there are pedestrians in the images captured by the camera units 12101 to 12104. Such identification of pedestrians is performed, for example, by extracting feature points in the captured images of the camera units 12101 to 12104 as infrared cameras; and determining whether it is a pedestrian by performing pattern matching processing on a series of feature points representing the outline of the object. When the microcomputer 12051 determines that there are pedestrians in the images captured by the camera units 12101 to 12104 and thus identifies the pedestrians, the sound / image output unit 12052 controls the display unit 12062 to display a square outline for emphasis so that it is superimposed on the identified pedestrian. The sound / image output unit 12052 may also control the display unit 12062 so that an icon representing a pedestrian or the like is displayed at a desired position.

[0315] In the above, a description of an example of a vehicle control system to which the technology according to the present disclosure can be applied has been given. The technology according to the present disclosure can be applied to the camera unit 12031 in the above-mentioned component structure. Applying the technology according to the present disclosure to the camera unit 12031 makes it possible to obtain a captured image that is easier to view. Therefore, the fatigue of the driver can be reduced.

[0316] In addition, the light receiving element 1 described in the present embodiment and the like may also be applicable to electronic devices including surveillance cameras, biometric authentication systems, thermal imagers, and the like. Examples of surveillance cameras may include night vision systems (night vision goggles). Applying the light receiving element 1 to surveillance cameras makes it possible to identify pedestrians, animals, and the like from a distance at night. In addition, applying the light receiving element 1 to a vehicle-mounted camera reduces the influence of headlights and weather. For example, an image can be captured by shooting without the influence of smoke, fog, and the like. In addition, the shape of an object can be identified. Furthermore, a thermal imager allows for non-contact temperature measurement. A thermal imager can detect temperature distribution and heat generation. In addition, the light receiving element 1 may be applicable to electronic devices that detect, for example, fire, water, gas, and the like.

[0317] Although the description has been made with reference to the first to third embodiments, Modifications 1 to 5, application examples, and actual application examples, the contents of the present disclosure are not limited to the aforementioned embodiments, etc., and may be modified in various ways. For example, the above-mentioned Modifications 1 to 3 and 5, which have been described as modifications of the aforementioned first embodiment, may also be used as modifications of each of the second and third embodiments.

[0318] In addition, the layer configuration of any light receiving element described in the aforementioned embodiments, etc. is illustrative, and any other layer may be further included. The materials and thicknesses of the various layers are also exemplary, and are not limited to those described above. For example, the aforementioned embodiments, etc. have been described with reference to an example in which the first contact layer 12, the photoelectric conversion layer 13, and the second contact layer 14 constitute the semiconductor layer 10S. However, it is sufficient for the semiconductor layer 10S to include the photoelectric conversion layer 13. For example, the first contact layer 12 and the second contact layer 14 may not be provided, or any other layer may be included.

[0319] In addition, for the sake of convenience, the above-mentioned embodiments and the like have been described with reference to an example in which the signal charges are holes, but the signal charges may be electrons. For example, the diffusion region may include n-type impurities.

[0320] In addition, the foregoing embodiments and the like have been described with reference to the light receiving element as a specific example of the semiconductor element according to the present technology, however, the semiconductor element according to the present technology may be different from the light receiving element. For example, the semiconductor element according to the present technology may be a light emitting element.

[0321] In addition, the effects described in the foregoing embodiments and the like are exemplary and non-limiting. Other effects may be achieved or may be further included.

[0322] It should be noted that the present disclosure may have a configuration as described below. According to the first semiconductor element of the present technology having the following configuration, an insulating layer having a non-reducing property is disposed on a second electrode having a light-transmitting property. This improves the adhesion between the second electrode and the insulating layer. According to the second semiconductor element of the present technology, a conductive film disposed on the insulating layer and electrically connected to the second electrode via an opening disposed near a peripheral region in the element region is formed using aluminum (Al). This allows the thickness of the conductive film to be reduced. According to the third semiconductor element of the present technology, a light-shielding film including a black resist is further provided on the conductive film disposed on the insulating layer and electrically connected to the second electrode via an opening disposed near a peripheral region in the element region. This allows the thickness of the conductive film to be reduced. Therefore, the manufacturing yield rate can be improved. (1)

[0324] A semiconductor device comprising:

[0325] An element substrate including an element region and a peripheral region outside the element region, wherein a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked in the element region;

[0326] a readout circuit substrate, which is opposite to the first semiconductor layer via the wiring layer and is electrically connected to the first semiconductor layer via the wiring layer;

[0327] a first electrode disposed in the wiring layer and electrically connected to the first semiconductor layer;

[0328] a second electrode facing the first electrode across the first semiconductor layer; and

[0329] The insulating layer is disposed on the second electrode and has a non-reducing property. (2)

[0331] The semiconductor element according to (1), wherein the insulating layer includes an oxide (M x O y ), nitride (M x N y ) and nitrogen oxides (M x O y N z ),

[0332] (M is any one of silicon (Si), titanium (Ti), hafnium (Hf), zirconium (Zr) and yttrium (Y), and x, y and z are integers of 1 or more). (3)

[0334] The semiconductor element according to (1) or (2), wherein the insulating layer includes a film having a film density of 2.0 g / cm 3 Above and 8.0g / cm 3 The following oxide film. (4)

[0336] The semiconductor element according to any one of (1) to (3), wherein the insulating layer has a multilayer structure. (5)

[0338] The semiconductor element according to any one of (1) to (4), wherein the insulating layer has an opening near the peripheral region in the element region,

[0339] The semiconductor element further includes a conductive film over the insulating layer near the peripheral region, the conductive film being electrically connected to the second electrode through the opening. (6)

[0341] The semiconductor element according to (5), wherein the conductive film includes aluminum (Al). (7)

[0343] The semiconductor element according to (6), further comprising a barrier metal in the opening and between the second electrode and the conductive film. (8)

[0345] The semiconductor element according to any one of (5) to (7), wherein the conductive film is provided so as to extend from the vicinity of the peripheral region in the element region to the peripheral region. (9)

[0347] The semiconductor device according to any one of (5) to (8), wherein:

[0348] The element substrate further includes a through hole in the peripheral region, the through hole penetrating the element substrate to reach the readout circuit substrate, and

[0349] The conductive film is electrically connected to the readout circuit substrate through the through hole. (10)

[0351] The semiconductor element according to any one of (5) to (9), wherein the conductive film has a light-shielding property. (11)

[0353] The semiconductor element according to any one of (5) to (10), further including a light-shielding film over the conductive film, the light-shielding film including a black resist. (12)

[0355] The semiconductor element according to (11), wherein an end surface of the light shielding film on the element region side extends further forward into the element region than an end surface of the conductive film on the element region side. (13)

[0357] The semiconductor element according to any one of (1) to (12), wherein the peripheral region of the element substrate has a bonding surface with the readout circuit substrate. (14)

[0359] The semiconductor element according to (13), wherein the element region of the element substrate is bonded to the readout circuit substrate on the same plane as the bonding surface of the peripheral region. (15)

[0361] The semiconductor element according to (13) or (14), wherein the element substrate further includes an embedded layer in the peripheral region, the embedded layer surrounding the first semiconductor layer. (16)

[0363] The semiconductor element according to any one of (1) to (15), wherein the compound semiconductor material absorbs light having a wavelength in an infrared region. (17)

[0365] The semiconductor element according to any one of (1) to (16), wherein the compound semiconductor material includes any one of InGaAs, InAsSb, InAs, InSb, and HgCdTe. (18)

[0367] The semiconductor element according to any one of (1) to (17), further including an on-chip lens on a surface of the first semiconductor layer opposite to a surface facing the readout circuit substrate. (19)

[0369] A semiconductor device comprising:

[0370] An element substrate including an element region and a peripheral region outside the element region, wherein a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked in the element region;

[0371] a readout circuit substrate, which is opposite to the first semiconductor layer via the wiring layer and is electrically connected to the first semiconductor layer via the wiring layer;

[0372] a first electrode disposed in the wiring layer and electrically connected to the first semiconductor layer;

[0373] a second electrode, which is opposite to the first electrode via the first semiconductor layer;

[0374] an insulating layer provided on the second electrode and having an opening near the peripheral region in the element region; and

[0375] A conductive film including aluminum (Al) is provided over the insulating layer and is electrically connected to the second electrode through the opening. (20)

[0377] A semiconductor device comprising:

[0378] An element substrate including an element region and a peripheral region outside the element region, wherein a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked in the element region;

[0379] a readout circuit substrate, which is opposite to the first semiconductor layer via the wiring layer and is electrically connected to the first semiconductor layer via the wiring layer;

[0380] a first electrode disposed in the wiring layer and electrically connected to the first semiconductor layer;

[0381] a second electrode, which is opposite to the first electrode via the first semiconductor layer;

[0382] an insulating layer disposed on the second electrode and having an opening near the peripheral region in the element region;

[0383] A conductive film disposed over the insulating layer and electrically connected to the second electrode through the opening; and

[0384] A light shielding film is provided on the conductive film and includes a black resist.

[0385] This application claims the benefit of Japanese Patent Application No. 2018-245180 filed with the Japan Patent Office on December 27, 2018, the entire contents of which are hereby incorporated by reference.

[0386] It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

Claims

1. A semiconductor device, comprising: An element substrate including an element region and a peripheral region outside the element region, wherein a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked in the element region; a readout circuit substrate, which is opposite to the first semiconductor layer via the wiring layer and is electrically connected to the first semiconductor layer via the wiring layer; a first electrode disposed in the wiring layer and electrically connected to the first semiconductor layer; a second electrode, which is opposite to the first electrode via the first semiconductor layer; and an insulating layer, which is disposed on the second electrode and has a non-reducing property, wherein the insulating layer has an opening near the peripheral area in the element area, and the semiconductor element also includes a conductive film above the insulating layer near the peripheral area, the conductive film is electrically connected to the second electrode through the opening, the conductive film is formed of aluminum, and a tungsten film is stacked on the conductive film.

2. The semiconductor element according to claim 1, wherein The insulating layer includes an oxide (M x O y ), nitride (M x N y ) and nitrogen oxides (M x O y N z ), M is any one of silicon (Si), titanium (Ti), hafnium (Hf), zirconium (Zr) and yttrium (Y), and x, y and z are integers of 1 or more.

3. The semiconductor element according to claim 1 or 2, wherein: The insulating layer is made of 2.0g / cm 3 Above and 8.0g / cm 3 An oxide film of the following film density is formed.

4. The semiconductor element according to claim 1 or 2, wherein: The insulating layer has a multi-layer structure.

5. The semiconductor device according to claim 1, wherein A barrier metal is also included in the opening and between the second electrode and the conductive film.

6. The semiconductor device according to claim 1, wherein The conductive film is provided to extend from the vicinity of the peripheral region in the element region to the peripheral region.

7. The semiconductor device according to claim 1, wherein The element substrate further includes a through hole in the peripheral region, the through hole penetrating the element substrate to reach the readout circuit substrate, and The conductive film is electrically connected to the readout circuit substrate via the through hole.

8. The semiconductor device according to claim 1, wherein The conductive film has a light-shielding property. 9 . The semiconductor element according to claim 1 , further comprising a light shielding film over the conductive film, the light shielding film being formed of a black resist.

10. The semiconductor element according to claim 9, wherein An end surface of the light shielding film on the device region side extends further forward into the device region than an end surface of the conductive film on the device region side.

11. The semiconductor element according to claim 1 or 2, wherein: The peripheral region of the element substrate has a bonding surface with the readout circuit substrate.

12. The semiconductor device according to claim 11, wherein The element region of the element substrate is bonded to the readout circuit substrate on the same plane as the bonding surface of the peripheral region.

13. The semiconductor device according to claim 11, wherein The element substrate further includes an embedded layer in the peripheral region, the embedded layer surrounding the first semiconductor layer.

14. The semiconductor element according to claim 1 or 2, wherein: The compound semiconductor material absorbs light of wavelengths in the infrared region.

15. The semiconductor element according to claim 1 or 2, wherein: The compound semiconductor material is any one of InGaAs, InAsSb, InAs, InSb and HgCdTe. 16 . The semiconductor element according to claim 1 , further comprising an on-chip lens on a surface side of the first semiconductor layer opposite to a surface facing the readout circuit substrate.

Images