System and method for determining semiconductor device characteristics

Abstract

Second harmonic generation (SHG) can be used to interrogate surfaces such as the surface of a layered semiconductor structure on a semiconductor wafer. In some cases, SHG is used to evaluate an interfacial region such as between a metal and an oxide. Multiple parameters (such as input polarization, output polarization, and the azimuthal angle of the incident beam) can affect the SHG signal. Therefore, these parameters vary for different types of patterns on the wafer. SHG metrology on multiple test structures can also assist in characterizing the sample.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims the benefit of the following applications under 35 U.S.C. § 119(e): U.S. Provisional Application No. 62 / 663,942, filed on April 27, 2018, entitled "METHODS TO EVALUATE PATTERNED WAFER BY OPTICAL SECOND HARMONIC GENERATION"; U.S. Provisional Application No. 62 / 663,925, filed on April 27, 2018, entitled "PARAMETRIC MODELING FOR INTERFACIAL ELECTRIC PROPERTIES BY SHG MEASUREMENT"; and U.S. Provisional Application No. 62 / 663,924, filed on April 27, 2018, entitled "TEST STRUCTURE DESIGN FOR DETECTION OF PROCESS INDUCED CHARGING BY OPTICAL SECOND HARMONIC GENERATION". FIELD OF THE INVENTION

[0003] This application relates to systems for wafer inspection, semiconductor metrology, material characterization, surface characterization, and / or interface analysis based on Second Harmonic Generation (SHG). BACKGROUND OF THE INVENTION

[0004] In a non-linear optical device, a beam input is output at the sum, difference, or harmonic frequencies of the input. Second Harmonic Generation (SHG) is a non-linear effect in which light of a frequency twice that of the incident source beam is emitted from a material at a certain angle. The process can be considered as two photons of energy E combining to produce a single photon of energy 2E of the incident radiation (i.e., generating light of twice the frequency (2ω) or half the wavelength).

[0005] "Optical Second-Harmonic Generation from Semiconductor Surfaces" by T.F. Heinz et al., published on page 452 of Advances in Laser Science III, edited by A.C. Tam, J.L. Cole, and W.C. Stwalley (American Institute of Physics, New York, 1988), provides an overview of the scientific investigations in which SHG techniques are employed. As reviewed, the SHG process does not occur in bulk materials with a center of symmetry (i.e., materials with inversion or center symmetry). For these materials, the SHG process can only be sensed at surfaces and / or interfaces where the inversion symmetry of the bulk material is broken. Thus, the SHG process has unique sensitivity to surface and interface properties.

[0006] With this understanding, the SHG effect is described in U.S. Patent No. 5,294,289 to Heinz et al. Other methods or "tools" that can be employed are also described in U.S. Patent No. 5,557,409 to Downer et al.; U.S. Patent Nos. 6,795,175, 6,781,686, 6,788,405, 6,819,844, 6,882,414, and 7,304,305 to Hunt; U.S. Patent No. 6,856,159 to Tolk et al.; and U.S. Patent No. 7,158,284 to Alles et al. However, the teachings of these patents do not appear to overcome some of the major obstacles faced in using SHG as a mature technology for semiconductor manufacturing and metrology. SUMMARY OF THE INVENTION

[0007] First Part

[0008] A SHG metrology tool is described, where, for the purpose of achieving sum frequency generation (SFG) (e.g., typically SHG), a pump light source and a probe light source with different power characteristics each excite electrons in a layered semiconductor substrate in different ways. For this method, the metrology characterization tool is provided with an "additional" integrated light source (e.g., an ultraviolet flash lamp or a laser) operating as a "pump" and a short or ultrashort pulse laser (e.g., a femtosecond solid-state laser) operating as a "probe" light source, and the two together induce a potential difference across one or more hetero-interfaces in a layered semiconductor device template. The utility is achieved by synergistically using or combining two different light sources for different purposes (by various time-offset and / or variable pump energy methods further described), which is different from a single-laser SHG or a dual-laser or multi-laser SFG system.

[0009] In one method, the pump is used as a pre-exciting or pre-excitation light source to reduce the total characterization time of certain materials. In many such embodiments, the time-dependent electric field is not mainly generated by the probe / detection laser. In a variant of this method, the pump is used to flash ultraviolet light across the entire wafer, and then the probe laser is used to rasterize or otherwise scan the entire wafer or a portion thereof, with a minimum probing time for each point (e.g., scanning as fast as the hardware can move the laser). Options in this regard include scanning line by line and making steps along (scanning) columns by wafer transfer. Another method can employ wafer rotation and scanning along the radius.

[0010] In another variant, the pump allows for rapid charging of the material interface at a sample point, and then the decay of this charged interface is observed by the probe in combination with the fast blocking and / or optical delay methods further described in the section titled "CHARGE DECAY MEASUREMENT SYSTEMS AND METHODS" of the second section of the U.S. Provisional Application No. 61 / 980,860, entitled "WAFER METROLOGY TECHNOLOGIES", filed on April 17, 2014. In any case, in various embodiments, the intention of the pump for pre-excitation is to inject charge carriers into, for example, a dielectric in an amount sufficient to affect the interface.

[0011] In another method, a pump laser is used as a post-exciting or post-excitation light source to affect the SHG signal already generated by the probe laser at the sample point. Yet another method employs a comparison / contrast of the SHG signals generated by the probe before and after the application of the pump laser energy. By treating the sample with the probe before pumping and measuring the SHG response, then applying radiation from the pump source, and then treating with the probe again, the difference in the SHG responses before and after pumping can be used to determine additional material properties, such as the trap density in the material dielectric.

[0012] In the various methods discussed herein, a time difference (i.e., in terms of before and / or after the pump source excites relative to the probe laser) is used to deliver an interrogation curve that reveals more information about the material interface.

[0013] In various methods, a pump source and a probe source are used simultaneously, and this combination is used to provide an SHG signal to determine the threshold injection carrier energy. Specifically, when using the probe laser for probing, the frequency of the tunable pump laser is increased. At a specific frequency, the SHG signal shows an inflection point (or a discontinuous region). The value corresponding to the pump laser frequency at the inflection point (or discontinuous region) can be related to the threshold injection carrier energy.

[0014] Various embodiments of the pump and probe system of the present invention also offer certain possibilities for hardware-based advantages. In an example where the pump is a flash lamp, significant cost savings can be achieved relative to a two-laser system. Whether provided as a flash lamp or a second laser, the combination of the pump and probe envisioned herein can also reduce the risk of optical damage to the substrate to be interrogated, because too strong illumination can degrade the quality of the dielectric and even the substrate if the threshold average power is exceeded. The threshold average power for causing optical damage to the substrate can be determined through experimental calibration studies.

[0015] To understand the latter possibility related to the hardware of the present invention, some background is provided. That is, both the pump energy and the probe energy can individually utilize such hardware to generate SHG signals. Although the pump source and the probe source do not need to operate together to generate SHG signals, in the method of the present invention, the relevant material properties are mainly obtained from the SHG intensity generated by the probe, because the pump usually does not have the peak power to properly drive the buried interface SHG. The time-dependent SHG intensity curve will vary based on the charge carrier distribution across the interface (e.g., between the dielectric layer and the substrate). The time required to inject carriers across the interface (e.g., between the dielectric layer and the semiconductor substrate) depends on the target average power of the sample. In some embodiments, only the probe can inject carriers across the interface between the dielectric and the substrate. In such embodiments, since the average power cannot be decoupled from the peak power, the time taken to reach such a target average power may be longer than in an implementation using a combination of pump and probe: this target average power allows carriers to be injected across the interface between the dielectric and the substrate without exceeding the optical damage threshold of the material. By using a light source with a high average power but a low peak power as the pump to inject carriers across the interface between the dielectric layer and the substrate before probing, the time to increase the average power can be saved without causing potential damage problems that may be caused by a high peak power at such an average power.

[0016] Therefore, compared with the pump, the probe of the present invention is generally a source with a relatively high peak power and a low average power. In other words, the probe laser is generally relatively weak. In one aspect, this allows for minimal interference with the natural electric field present at the substrate interface to generate an initial time-independent signal.

[0017] In the case of a high average power but a low peak power, the pump induces an electric field (E) by causing charge carriers to undergo energy level jumps at or across the material interface. By using a relatively high average power source as the pump and quickly "charging" the interface by providing at least enough energy for all available electrons to jump into the dielectric, a situation can occur where a probe laser with a high peak power (providing a high SHG conversion rate) but a low average power (due to short pulse durations and a limited number of such pulses) can quickly interrogate the surface to provide time-independent SHG signal data.

[0018] Accordingly, in various embodiments described herein, the time required for the probe laser to move electrons to higher energy levels or across an interface can be reduced, which can allow for faster evaluation of steady-state SHG signals and / or measurements of charge carrier time dynamics. This approach can also separate the influence of the SHG probe from its own influence on the electric field at the substrate interface. It also allows for faster or negligible time correlation in the SHG process and allows for faster acquisition of time-independent SHG data on at least a portion of the signal obtained from the probe beam. Similarly, on the other hand, it allows for faster and / or more precise determination of the threshold energy for injecting carriers into an interface (e.g., the interface between a semiconductor and a dielectric), as well as achieving high (higher) throughput in an in-line tool environment. Regardless of the context, the reduced available time provided can advantageously facilitate high-throughput testing in any type of in-line metrology tool in the semiconductor industry. For example, to apply a pre-existing SHG technique to generate a time-correlated curve on a device including a 10 nm silicon-on-insulator and a 25 nm buried oxide layer beneath it (10 nm device layer / 25 nm BOX SOI), it takes 6 to 12+ seconds per point. Using the pre-excitation described herein, depending on the material and pump / probe power, the time correlation can be generated in less than 1 second. This advancement will enable processing of surface areas more than 10 times greater on a given available time / wafers on the production line, or obtaining the same confidence level in 10% of the time. Although these numbers will vary depending on the material, layer thickness, and specific pump / probe power and wavelength, they should be illustrative.

[0019] Embodiments of the present invention include each method associated with the above method, the hardware for performing the method, and a production system incorporating the hardware and its products (including products produced by the process).

[0020] Second Part

[0021] To date, there have been many limitations in the use of SHG-based metrology tools. It is believed that this fact stems from the inability of existing systems to distinguish between detected interface properties. In other words, although existing SHG techniques provide a method for determining the location and presence of interface electroactivity anomalies, their methods rely on relative measurements and are not actually able to resolve electroactivity anomaly types (e.g., gettering contaminants such as copper vs. bond voids) and / or quantify the detected contaminants.

[0022] However, the systems and methods of the present invention are capable of capturing quantitative information in a variety of ways for the multiple determinations required for such activities. In these systems and methods, after charging a wafer sample with optical electromagnetic radiation (using a pulsed laser or flash lamp or other electromagnetic energy source or light source or otherwise at a specific location), multiple measurements are made to monitor the transient electric field decay associated with the heterogeneous interface of the decay cycle for control.

[0023] By using decay curve data generated and characterized using multiple points, spectral parameters of anomalies or problems at the sample points can be determined, so that defect types or contaminants can be distinguished and / or quantified. In summary, decay-related data is collected and used to provide such a system: through which charge carrier lifetime, trap energy, and / or trap charge density can be determined, so that defects and contaminants can be distinguished from each other or resolved, for species differentiation when contaminants are detected and / or for contaminant quantification when contaminants are detected.

[0024] This activity is determined on a site-by-site basis, typically by repeating the selected method to scan the entire wafer or other material sample or its area. As for the computer processing required to achieve such determination, it can occur "in real time" (i.e., output results without any significant delay during scanning) or through post-processing. However, in a variety of embodiments, the control software can run without delay to provide precise system timing to obtain the data of the present invention according to the methods described below.

[0025] Optionally, SHG signal generation is combined to monitor the charging of the sample material. In this case, the information obtained through this signal can be used for material analysis and determination.

[0026] In any case, the system embodiment can include an ultrafast pulsed laser having a fast shutter operating in the range of 10 2 seconds to picoseconds (10 -12 seconds). Such a system can be used to monitor the SHG signals generated by the surface and buried interfaces of thin film materials at the sample points after introducing multiple short blocking intervals. These intervals can be timed to monitor the field decay of interest.

[0027] The system of the present invention can also include an optical line delay. The delay line can be a fiber-based device, especially if coupled with dispersion compensation and polarization control optics. Alternatively, the delay line can be mirror-based and similar to the examples in USPN 6,147,799 granted to MacDonald, 6,356,377 granted to Bishop et al., or 6,751,374 granted to Wu et al. In any case, the system uses the delay to allow for measurements in the picosecond (10 -12 seconds) to femtosecond (10-15 seconds) and possibly up to a billion seconds (10 -18 seconds) to laser interrogate the material. Such interrogation may be useful for detecting multiple charge decay-related data points along a single decay curve.

[0028] The method of the present invention includes a method that involves measuring the SHG signal for decay data points obtained after successive charging events. In each charging event, the conditions for obtaining the SHG signal may vary. Additionally, the time intervals between successive charging events may vary. In this method, multiple data points (at least two, but typically three or more) can be correlated and represented as a single composite decay curve. Another method employs a minimally disruptive (i.e., the radiation used to generate the SHG signal does not significantly recharge the material) SHG signal interrogation event after a single charging event.

[0029] Another method for determining transient charge decay involves measuring the discharge current from the sample material (more precisely, the structure thereof that has been charged by optical radiation). Then the time correlation (kinetics) of this signal can be processed in the same manner as if SHG sensing had been employed. Additionally, as described above, this sensing can be performed over the span of one decay interval and / or over multiple decay intervals after charging to a given level. In any case, the hardware with specific electrodes for this purpose will be described in detail below.

[0030] Regarding charging or the charging level, when observing the charging dynamics over standard linear time or against a logarithmic time scale, it can be set to an apparent saturation point. As described above, the method of the present invention optionally observes, records, and analyzes the charging kinetics, as this can yield important information.

[0031] For successive charge / interrogation events, if the initial charge state of the sample is measured and the saturation level is not far from the initial charge state, the system can omit further or subsequent characterization. In this case, "not far" can be considered to mean a charge increase of about 1% to about 10% relative to the initial charge state determined by knowing when a given sampling time is used with the tools of the present invention.

[0032] In other words, the so-called "saturation" is a relative term. Using a linear time scale, the material will quickly appear saturated. However, if the SHG signal intensity related to charging is observed on a logarithmic scale between 10 and 100 seconds, the later part of saturation can be observed to occur with a different time constant and is relatively more gradual or time-consuming. Therefore, although the examples of the methods provided herein discuss charging to saturation, the delay and other timings can be considered to occur relative to apparent saturation. It is not necessary to wait for the entire time required for 100% saturation, as this may take unnecessary time. The instrument may be delayed until the time required to reach apparent saturation or until the time when important parameters can be extracted, regardless of the time required for complete saturation.

[0033] In addition, it should be understood that when monitoring the amount or degree of charging towards saturation (e.g., in combination with SHG monitoring), the methods and systems of the present invention can operate at charging and / or recharing levels less than saturation (as discussed above), while still generating meaningful decay curve information. However, without such measurements, when the approximate saturation level is a known parameter (e.g., through experience obtained with the tools of the present invention for a given material), the charging to saturation can be used as the target level.

[0034] Introducing a DC bias on the sample to be measured can also assist in the analysis of the material. Before any effect of the photoinduced voltage occurs, applying a DC bias will actively change the initial charge distribution at the interface. To this end, the sample to be measured can be mounted on top of a conductive chuck, which can be used as the ground for a cross-sample DC bias implemented using a probe on the top surface of the sample. Other ways of introducing an induced voltage bias without using a surface probe are also possible, as further described in the section entitled "FIEDD-BIASED SHG METROLOGY" of the United States Provisional Application No. 61 / 980,860, entitled "WAFER METROLOGY TECHNOLOGIES", filed on April 17, 2014, and referred to as Section IV.

[0035] In addition, in addition to the primary laser used for blocking analysis, the system of the present invention can also use a secondary light source to determine charge decay. Such a set of light sources can be used as a combination of radiation pump / probe, as further described in the section entitled "PUMP AND PROBE TYPE SHG METROLOGY" of the United States Provisional Application No. 61 / 980,860, entitled "WAFER METROLOGY TECHNOLOGIES", filed on April 17, 2014, and referred to as Section I.

[0036] All of the inventive embodiments herein include each method associated with the methods described herein alone or in combination with elements, components, or features in the cited co-pending patent applications, the hardware for performing the method, and a production system incorporating the hardware and its products (including products produced by the process).

[0037] Third Part

[0038] A variety of SHG-based systems based on field biasing (e.g., magnetic field biasing, DC biasing, and / or voltage biasing induced only by an alternating field, an alternating field capacitively coupled, and / or a varying magnetic field) and methods of using the same are described. These will be described in turn. They can be used independently and / or in a combined system. All of the inventive embodiments herein include each method associated with the methods described above, the hardware for performing the method, and a production system incorporating the hardware and its products (including products produced by the process).

[0039] Magnetic Field Bias

[0040] A static or varying magnetic field applied to a sample will cause a change in the second-order optical magnetization tensor of the material. Thus, a magnetic field can be used to increase the SHG signal from the sample to an optimal value. In addition, a varying magnetic field can be used to induce a bias voltage, as further discussed below.

[0041] Inductive Voltage Bias for Eliminating DC Contact Probe

[0042] Systems and methods are described for characterizing the SHG response of a layered semiconductor material that experiences a discrete electric field at its interface without using a contact bias probe in the system, which can synchronize the pulses of the probe laser and / or the gating of the detector with a predetermined amplitude of an alternating, variable, or pulsed bias voltage applied to the sample to generate a corresponding or coordinated induced voltage field at the surface to be interrogated.

[0043] The hardware of the present invention includes an SHG device (e.g., further described in the section titled "CHARGE DECAY MEASUREMENT SYSTEMS AND METHODS" of the second section of U.S. Provisional Application No. 61 / 980,860, titled "WAFERMETROLOGY TECHNOLOGIES", filed on April 17, 2014), and means (e.g., components configured to perform induction) for inducing a voltage on or along the "device" surface of a sample without contact. Such means or components can be achieved by contacting the backside of the probe or a conductive chuck (including a capacitive coupling probe with a power connection that also communicates with the backside contact probe or such a chuck) or by applying a varying magnetic field to the sample, with the aim of inducing an external voltage field across its multi-layer interface.

[0044] The transient electric field generated by a variable waveform (optionally, AC) power supply (by any of the above methods) induces an electric field across the interface of a multi-layer semiconductor material. The relationship between the voltage and the material interface electric field can be modeled through a transfer function or other means, including by considering various (capacitive or otherwise) external influences. Given a specific AC (or other) current amplitude and frequency, the output of this function can be used as a timing cue to simultaneously trigger the laser shutter and / or photon counter to perform SHG characterization of the test point, thereby obtaining a constant near-instantaneous value of the electric field amplitude at the interface. In this way, the system is capable of simulating a constant (DC) voltage applied through a contact electrical probe on the top side (i.e., at the device layer of the substrate).

[0045] In the case of directly applying AC to the backside of the sample, the system starts with a chuck in a "neutral" or grounded state, while the body and the device layer are at an equilibrium potential. Then, an alternating bias voltage is applied to the chuck, which is in galvanic contact with the body or the substrate layer of the multi-layer semiconductor material. Since the device layer is separated from the body by a buried oxide layer and is not directly connected to a conductor, an electric potential field or voltage will be generated (i.e., induced) between the device layer and the body layer.

[0046] Alternatively, one or more capacitive coupling probes located nearby (within about 1 mm to about 2 mm) but not contacting the top side of the sample can be used. In this regard, a preferred method is to set the size of the plate to cover (but not contact) the entire wafer, and small holes are provided on the plate for the incident laser to reach the sample after passing through the holes, and for the SHG beam to pass through the holes after leaving the sample.

[0047] In some embodiments, MEMS technology can be used to implement non-contact electrodes. For example, in one embodiment, a Si wafer can be oxidized on both sides. Then, spiral or grid electrodes can be set by deposition at one or more locations on the wafer. The oxide material on the back side of the wafer can be removed at those locations. In such an embodiment, the electromagnetic field applied to the electrodes can provide an induced bias for the wafer through near-field inductive coupling. The magnetic field generated by an external current can be used to generate a current on the wafer by inducing a current in the deposited electrodes. Other methods for implementing non-contact probes can also be used.

[0048] In any case, the SHG method can be used to interrogate the sample, for example, as further described in the section entitled "PUMP AND PROBE TYPE SHG METROLOGY" of the first section of U.S. Provisional Application No. 61 / 980,860, entitled "WAFER METROLOGY TECHNOLOGIES", filed on April 17, 2014. The same applies to other embodiments discussed below.

[0049] In any case, in the embodiments of the present invention, since it is desired to monitor SHG as a function of the cross-interface voltage, the SHG signal will be synchronized with the power supply. This synchronization can be achieved by varying the voltage over time to control one or more lasers for SHG signal generation and the SHG signal processing software, controlling one or more lasers individually, or only controlling the SHG signal processing software. The voltage of the chuck can also be controlled.

[0050] The advantage of this synchronization is that a voltage-biased SHG measurement similar to a DC-biased SHG measurement can be obtained without using a contact voltage bias probe on the front surface of the wafer. Without applying a DC bias, the system will use an AC bias synchronized with the SHG measurement and / or generation to collect SHG data at discrete points on the voltage cycle. The AC bias can be applied using near-field inductive coupling or through capacitive coupling of the sample. The SHG data collected using these bias techniques will yield the same material property information as DC-biased SHG.

[0051] To reduce noise or minimize noise and obtain a statistically relevant measure of the SHG intensity as a function of the cross-interface voltage, it may be desirable to have multiple photon counting windows, as further described below.

[0052] Inductive Voltage Bias for Characterizing Interface Leakage

[0053] Systems and methods are described for characterizing interfacial leakage current and / or carrier injection energy between layers of a layered (e.g., semiconductor) material using SHG and voltage variations (e.g., alternating, variable, and / or pulsed voltage or current signals or changing a magnetic field in a manner that induces a voltage change in the device layer of a sample) applied to the layered material.

[0054] The interfacial leakage current and / or charge carrier injection energy between layers can be characterized by measuring the SHG response obtained from optical pulses generated by a pulsed laser directed to a layered semiconductor / dielectric structure, either simultaneously with or shortly after applying an alternating, variable, or pulsed voltage to the layered semiconductor material. In some embodiments, the temporal evolution of the SHG signal from the interface can be measured as a function of the time constant of the decay of the induced voltage. This yields information about the charge carrier mobility at the interface.

[0055] Inductive Voltage Bias for Characterizing Threshold Carrier Injection Energy

[0056] Systems and methods are described for determining the energy threshold for dielectric materials used to optically induce charge carriers into a layered semiconductor material without using tunable wavelength laser excitation, but rather applying SHG measurements in conjunction with a varying electric field applied to the device layer of the sample. More specifically, to measure the threshold energy required to optically induce charge carriers into the dielectric, the material can be exposed to a substantially monochromatic incident photon beam to generate SHG, and then the voltage at the interface of the exposed layered semiconductor material is incrementally changed, such that the SHG signal count is measured at each incremental voltage change until a distinct inflection point or discontinuity or sudden change in slope is observed in the SHG response compared to the previous measurement. This change in slope can be a maximum or minimum (e.g., local maximum or minimum) or a cusp or step function, etc. The net charge change transfer resulting from all these processes can be described as the integral of the contributions of the third harmonic injection current, the "forward" leakage current flowing into the dielectric due to the strong electric field, and the "reverse" discharge leakage current. Substituting into the following equation: Q(t) = ∫(I χ +I E -I L )dt. Then, the kinetic characteristics (bending moment and saturation moment) of the curve shape will provide information for determining the threshold charge carrier injection energy.

[0057] All described inventive embodiments herein include each method associated with the methods described herein alone or in combination with elements, components, or features in the cited co-pending patent applications, the hardware for performing the method, and a production system incorporating the hardware and its products (including products produced by the process).

[0058] The systems, methods, and devices disclosed herein have numerous innovative aspects, none of which alone is responsible for the desired attributes disclosed herein. Multiple example systems and methods are provided below.

[0059] Evaluation of Patterned Wafers

[0060] Example 1: A system for optically interrogating a sample surface, comprising:

[0061] A light source configured to emit radiation having variable energy;

[0062] An optical detector configured to detect second harmonic generation (SHG) light by radiation from the interrogated surface, wherein the interrogated surface comprises a patterned structure having a plurality of regions; and

[0063] Control electronics configured to, for different regions:

[0064] Determine a set of interrogation conditions;

[0065] Receive a first SHG light signal based on the set of interrogation conditions;

[0066] Determine the characteristics of the SHG light detected in the region;

[0067] Update the set of interrogation conditions; and

[0068] Receive a second SHG light signal based on the updated set of interrogation conditions.

[0069] Example 2: The system according to Example 1, wherein the set of interrogation conditions includes an excitation polarization state, and the excitation polarization state includes a polarization state associated with the input light.

[0070] Example 3: The system according to Example 1 or 2, wherein the set of interrogation conditions includes an output polarization state, and the output polarization state includes a polarization state associated with the output signal.

[0071] Example 4: The system according to Example 1, 2, or 3, wherein the set of interrogation conditions includes the azimuth angle between the plane of incidence and the pattern direction.

[0072] Example 5: The system according to any one of the above examples, wherein the set of interrogation conditions includes:

[0073] An excitation polarization state, and the excitation polarization state includes a polarization state associated with the input light,

[0074] The output polarization state, which includes the polarization state associated with the output signal, and

[0075] the azimuth angle between the plane of incidence and the pattern direction.

[0076] Example 6: The system according to example 4 or 5, wherein the surface under interrogation is positioned by a rotating stage to select the azimuth angle.

[0077] Example 7: The system according to example 4, 5 or 6, wherein, in order to determine the set of interrogation conditions, the control electronics is configured to select the azimuth angle based on the structure of the pattern.

[0078] Example 8: The system according to any one of examples 4 to 7, wherein, in order to determine the set of interrogation conditions, the control electronics is configured to select the azimuth angle so as to increase the output signal.

[0079] Example 9: The system according to any one of examples 4 to 8, wherein, in order to update the set of interrogation conditions, the control electronics is configured to select the azimuth angle associated with reduced shadowing through the structure of the pattern.

[0080] Example 10 : The system according to example 9, wherein the structure includes grooves, and wherein, in order to update the set of interrogation conditions, the control electronics is configured to select the azimuth angle such that the plane of incidence is collinear with the length of the grooves.

[0081] Example 11: The system according to example 2 or 4, wherein, in order to update the set of interrogation conditions, the control electronics is configured to update the excitation polarization state so as to increase the output signal.

[0082] Example 12: The system according to example 3 or 4, wherein, in order to update the set of interrogation conditions, the control electronics is configured to update the output polarization state so as to increase the output signal.

[0083] Example 13: The system according to any one of the above examples, wherein determining the characteristics of the SHG light detected at the region includes determining whether the second SHG light signal is higher than the first SHG light signal.

[0084] Example 14:The system according to any one of the above examples, wherein determining the characteristics of the SHG light detected at the region includes determining whether the signal-to-noise ratio of the second SHG light signal is higher than the signal-to-noise ratio of the first SHG light signal. Example 15: The system according to any one of the above examples, wherein the intensity of the second SHG light signal is greater than the intensity of the first SHG light signal.

[0085] Example 16: A method of optically interrogating a sample surface, the method comprising:

[0086] Using a light source to provide radiation to the surface to be interrogated;

[0087] Using an optical detector to detect a second harmonic generation (SHG) effect signal generated by the radiation; and

[0088] Determining a set of interrogation conditions;

[0089] Receiving a first SHG light signal based on the set of interrogation conditions;

[0090] Determining the characteristics of the SHG light detected at a region of the surface;

[0091] Updating the set of interrogation conditions; and

[0092] Receiving a second SHG light signal based on the updated set of interrogation conditions.

[0093] Example 17: The method according to example 16, wherein the set of interrogation conditions includes an excitation polarization state, the excitation polarization state including a polarization state associated with the input light.

[0094] Example 18: The method according to example 16 or 17, wherein the set of interrogation conditions includes an output polarization state, the output polarization state including a polarization state associated with the output signal.

[0095] Example 19: The method according to example 16, 17 or 18, wherein the set of interrogation conditions includes the azimuth angle between the plane of incidence and the pattern direction.

[0096] Example 20: The method according to example 16, wherein the set of interrogation conditions includes:

[0097] An excitation polarization state, the excitation polarization state including a polarization state associated with the input light;

[0098] An output polarization state, the output polarization state including a polarization state associated with the output signal; and

[0099] The azimuth angle between the incident plane and the pattern orientation.

[0100] Example 21: The method according to example 19 or 20, wherein the surface under interrogation is positioned by a rotating stage to select the azimuth angle.

[0101] Example 22: The method according to any one of examples 19 to 21, wherein determining the set of interrogation conditions includes selecting the azimuth angle based on the pattern structure of the surface under interrogation.

[0102] Example 23: The method according to any one of examples 19 to 22, wherein updating the set of interrogation conditions includes selecting the azimuth angle associated with reduced shadowing by the pattern structure of the surface under interrogation.

[0103] Example 24: The method according to example 23, wherein the pattern structure includes grooves, and wherein updating the set of interrogation conditions includes selecting the azimuth angle such that the incident plane is collinear with the length of the grooves.

[0104] Example 25: The method according to example 17 or 20, wherein updating the set of interrogation conditions includes selecting the excitation polarization state such that the output signal is increased.

[0105] Example 26: The method according to example 18 or 20, wherein updating the set of interrogation conditions includes selecting the output polarization state such that the output signal is increased.

[0106] Example 27: The method according to any one of examples 16 to 26, wherein the intensity of the second SHG optical signal is greater than the intensity of the first SHG optical signal.

[0107] Example 28: The method according to any one of examples 16 to 27, wherein determining the characteristics of the SHG light detected at a region of the surface includes determining whether the second SHG optical signal is higher than the first SHG optical signal.

[0108] Example 29: The method according to any one of examples 16 to 28, wherein determining the characteristics of the SHG light detected at a region of the surface includes determining whether the signal-to-noise ratio of the second SHG optical signal is higher than the signal-to-noise ratio of the first SHG optical signal.

[0109] Example 30: The system according to any one of examples 1 to 15, wherein the system is configured to interrogate the sample online when the sample is in manufacturing or on a production line.

[0110] Example 31: The system according to any one of Examples 1 to 15 or 30 further includes a pump source to provide pump radiation to the sample.

[0111] Example 32: The method according to any one of Examples 16 to 29, wherein applying radiation to the surface to be interrogated includes applying pump radiation and probe radiation.

[0112] Example 33: The method according to any one of Examples 16 to 29 or 32, wherein the sample is interrogated online when the sample is in a manufacturing or production line.

[0113] Parameter Modeling

[0114] Example 1: A system for characterizing a sample using second harmonic generation, the system comprising:

[0115] A light source configured to propagate an interrogation beam to the sample, the interrogation beam generating light of second harmonic generation from the sample;

[0116] A detector configured to receive the light of second harmonic generation from the sample; and

[0117] An electronic device configured to obtain a characteristic of the sample based on a difference between a first intensity level of the light of second harmonic generation at a first time and a second intensity level of the light of second harmonic generation at a second time later than the first intensity level.

[0118] Example 2: The system according to Example 1, wherein the electronic device is configured to obtain a characteristic of the sample based on a ratio of the difference between the first intensity level of the light of second harmonic generation at the first time and the second intensity level of the light of second harmonic generation at a second time later than the first intensity level to the first intensity level of the light of second harmonic generation at the first time.

[0119] Example 3: The system according to Example 1 or 2 further includes obtaining at least one additional intensity level of the light of second harmonic generation between the first time and the second time.

[0120] Example 4: The system according to any one of Examples 1 to 3, wherein the obtained characteristic of the sample includes at least one of a thickness of an oxide layer of the sample, a number of bulk traps in the oxide layer, or a surface characteristic of the sample.

[0121] Example 5: A system according to any one of Examples 1 to 4, wherein the characteristics of the obtained sample include the thickness of the oxide layer of the sample.

[0122] Example 6: A system according to any one of Examples 1 to 5, wherein the characteristics of the obtained sample include the number of bulk traps in the oxide layer.

[0123] Example 7: A system according to any one of Examples 1 to 6, wherein the characteristics of the obtained sample include the surface properties of the sample.

[0124] Example 8: A method of using second harmonic generation to characterize a sample having an interface region, the method comprising:

[0125] Directing radiation from a light source of a metrology system onto the interface region;

[0126] Detecting, using an optical detection system of the metrology system, light generated by second harmonic generation from the interface region;

[0127] Determining characteristics of the sample based on an intensity level of the light generated by second harmonic generation.

[0128] Example 9: The method according to Example 8, wherein the interface region includes a junction between a semiconductor layer and an oxide layer, a junction between a metal and an oxide, or a junction between a first semiconductor region and a second semiconductor region.

[0129] Example 10: The method according to Example 8 or 9, wherein the characteristics of the sample determined based on the intensity level of the light generated by second harmonic generation include at least one of the amount of charge in the oxide layer of the sample, the amount of charge in the interface region of the sample, or information related to the interfacial bonding state of the sample.

[0130] Example 11: The method according to any one of Examples 8 to 10, wherein the characteristics of the sample determined based on the intensity level of the light generated by second harmonic generation include the amount of charge in the oxide layer of the sample.

[0131] Example 12: The method according to any one of Examples 8 to 11, wherein the characteristics of the sample determined based on the intensity level of the light generated by second harmonic generation include the amount of charge in the interface region of the sample.

[0132] Example 13:The method according to any one of Examples 8 to 12, wherein the characteristics of the sample determined based on the intensity level of the light generated by second harmonic generation include information related to the interfacial bonding state of the sample.

[0133] Example 14: A method for characterizing a sample having an interfacial region using second harmonic generation, the method comprising:

[0134] Directing radiation from a light source of a metrology system onto the interfacial region;

[0135] Detecting, using an optical detection system of the metrology system, light generated by second harmonic generation from the interfacial region;

[0136] Determining the characteristics of the sample based on a difference between a first intensity level of the light generated by second harmonic generation at a first time and a second intensity level of the light generated by second harmonic generation at a second time later than the first time.

[0137] Example 15: The method according to Example 14, wherein the electronic device is configured to obtain the characteristics of the sample based on a ratio of the difference between the first intensity level of the light generated by second harmonic generation at the first time and the second intensity level of the light generated by second harmonic generation at a second time later than the first time to the first intensity level of the light generated by second harmonic generation at the first time.

[0138] Example 16: The method according to Example 14 or 15, further comprising obtaining at least one additional intensity level of the light generated by second harmonic generation at a time between the first time and the second time.

[0139] Example 17: The method according to any one of Examples 14 to 16, wherein the characteristics of the sample obtained include at least one of the thickness of the oxide layer of the sample, the number of bulk traps in the oxide layer, or the surface characteristics of the sample. Example 18: The method according to any one of Examples 14 to 17, wherein the characteristics of the sample obtained include the thickness of the oxide layer of the sample.

[0140] Example 19: The method according to any one of Examples 14 to 18, wherein the characteristics of the sample obtained include the number of bulk traps in the oxide layer.

[0141] Example 20: The method according to any one of Examples 14 to 19, wherein the characteristics of the sample obtained include the surface characteristics of the sample.

[0142] Example 21: The system according to any one of Examples 1 to 8, wherein the system is configured to online characterize the sample when the sample is in a manufacturing or production line.

[0143] Example 22: The system according to any one of Examples 1 to 8 or 21, further comprising a pump source to provide pump radiation to the sample.

[0144] Example 23: The method according to any one of Examples 8 to 13, wherein directing radiation onto the interface region includes applying pump radiation and probe radiation.

[0145] Example 24: The method according to any one of Examples 8 to 13 or 23, wherein the sample is online characterized when the sample is in a manufacturing or production line.

[0146] Example 25: The method according to any one of Examples 14 to 20, wherein directing radiation onto the interface region includes applying pump radiation and probe radiation.

[0147] Example 26: The method according to any one of Examples 14 to 20 or 25, wherein the sample is online characterized when the sample is in a manufacturing or production line.

[0148] Test Structure

[0149] Example 1: A semiconductor device manufacturing structure, comprising:

[0150] A semiconductor substrate;

[0151] A test structure supported on the semiconductor substrate, the test structure comprising:

[0152] An oxide layer contacting the semiconductor to form an interface region;

[0153] A conductive region exposed to the surrounding environment; and

[0154] An interconnect that provides a circuit path between the conductive region exposed to the surrounding environment and the oxide layer, wherein the test structure is configured to receive a light beam from an optical metrology system at the interface region and generate second harmonic generation light that can be received by the optical metrology system.

[0155] Example 2: The semiconductor device manufacturing structure according to Example 1, wherein the interface region is formed by the oxide layer and the semiconductor substrate.

[0156] Example 3:The semiconductor device manufacturing structure according to Example 1, wherein the interface region is formed by the oxide layer and a semiconductor layer on the semiconductor substrate.

[0157] Example 4: The semiconductor device manufacturing structure according to any one of Examples 1 to 3, further comprising an integrated circuit device supported on the semiconductor substrate.

[0158] Example 5: The semiconductor device manufacturing structure according to any one of Examples 1 to 4, wherein the test structure is included in a space between two integrated circuits.

[0159] Example 6: The semiconductor device manufacturing structure according to any one of Examples 1 to 5, wherein the test structure is included in a space in which the semiconductor device manufacturing structure is cut to form a plurality of individual dies. Example 7: The semiconductor device manufacturing structure according to any one of Examples 1 to 6, wherein the test structure is not configured as a functional transistor.

[0160] Example 8: The semiconductor device manufacturing structure according to any one of Examples 1 to 7, wherein the test structure is not electrically connected to the integrated circuit.

[0161] Example 9: The semiconductor device manufacturing structure according to any one of Examples 1 to 8, wherein the interconnect is located on one side of the oxide layer, thereby providing optical access to the interface region.

[0162] Example 10: The semiconductor device manufacturing structure according to any one of Examples 1 to 9, wherein the test structure further comprises a barrier layer located above the oxide layer.

[0163] Example 11: The semiconductor device manufacturing structure according to Example 10, wherein the barrier layer comprises titanium nitride TiN. Example 12: The semiconductor device manufacturing structure according to any one of Examples 10 to 11, wherein the thickness of the barrier layer is between about 1 nm and about 5 nm.

[0164] Example 13: The semiconductor device manufacturing structure according to any one of Examples 1 to 12, further comprising a second test structure, the second test structure comprising:

[0165] A second oxide region contacting the semiconductor to form a second interface region;

[0166] Wherein, the second test structure is configured to receive a light beam from an optical metrology system at the second interface region and generate light for second harmonic generation that can be received by the optical metrology system.

[0167] Example 14: The semiconductor device manufacturing structure according to Example 13, wherein the second test structure is not electrically connected to an electrical contact pad exposed to the surrounding environment.

[0168] Example 15: The semiconductor device manufacturing structure according to Example 13 or 14, wherein the second test structure is included in a space between two integrated circuits.

[0169] Example 16: The semiconductor device manufacturing structure according to any one of Examples 13 to 15, wherein the test structure is included in a space in which the semiconductor device manufacturing structure is diced to form a plurality of individual die.

[0170] Example 17: The semiconductor device manufacturing structure according to any one of Examples 13 to 16, wherein the second test structure is not configured as a functional transistor.

[0171] Example 18: The semiconductor device manufacturing structure according to any one of Examples 13 to 17, wherein the second test structure is not electrically connected to the integrated circuit.

[0172] Example 19: The semiconductor device manufacturing structure according to any one of Examples 13 to 18, wherein the second test structure further includes a barrier layer located above the oxide layer.

[0173] Example 20: The semiconductor device manufacturing structure according to Example 19, wherein the barrier layer includes titanium nitride TiN. Example 21: The semiconductor device manufacturing structure according to any one of Examples 19 to 20, wherein the thickness of the barrier layer is between about 1 nm and about 5 nm.

[0174] Example 22: A system for characterizing a sample using second harmonic generation, the system comprising:

[0175] A metrology system, the metrology system comprising:

[0176] A light source configured to direct a light beam onto the sample;

[0177] A positioning system for changing the position at which the light beam is incident on the sample;

[0178] An optical detection system configured to receive light generated by second harmonic generation from the sample; and

[0179] An electronic device configured to use the positioning system to control the position at which the light beam is incident on the sample and to receive a signal from the optical detection system based on the light generated by second harmonic generation,

[0180] wherein the electronic device is configured to direct the light beam onto a test structure, the test structure comprising:

[0181] An oxide layer in contact with the semiconductor to form an interface region;

[0182] A conductive region exposed to the surrounding environment; and

[0183] An interconnect that provides a circuit path between the conductive region exposed to the surrounding environment and the oxide layer such that the light beam is incident on the interface region, and the interface region generates light generated by second harmonic generation that is received by the optical detection system.

[0184] Example 23: The system according to Example 22, wherein the electronic device is further configured to characterize a process-induced charging effect of the interface region based on the second harmonic generation signal from the test structure.

[0185] Example 24: The system according to Example 22, wherein the electronic device is further configured to determine a change in electrical characteristics of the interface region due to a process-induced charging effect based on the second harmonic generation signal from the test structure. Example 25: The system according to any one of Examples 22 to 24, wherein the electronic device is configured to direct the light beam onto a second test structure, the second test structure comprising a second oxide region in contact with the semiconductor to form a second interface region, such that the light beam is incident on the second interface region, and the second interface region generates light generated by second harmonic generation that is received by the optical detection system.

[0186] Example 26: The system according to Example 25, wherein the second test structure is not electrically connected to a conductive region exposed to the surrounding environment.

[0187] Example 27: The system according to Example 25 or 26, wherein the electronic device is further configured to characterize a process-induced charging effect of the interface region based on a comparison of the light generated by second harmonic generation from the test structure and the light generated by second harmonic generation from the second test structure.

[0188] Example 28:The system according to Example 25 or 26, wherein the electronic device is further configured to determine a change in the electrical characteristics of the interface region due to process-induced charging effects based on a comparison of the light generated by second harmonic generation from the test structure and the light generated by second harmonic generation from the second test structure.

[0189] Example 29: The system according to Example 25 or 26, wherein the electronic device is further configured to characterize the process-induced charging effects of the interface region based on a difference between the light generated by second harmonic generation from the test structure and the light generated by second harmonic generation from the second test structure.

[0190] Example 30: A method for determining a change in electrical characteristics associated with an interface region of a semiconductor device due to process-induced charging effects, the method comprising:

[0191] Providing a test structure comprising:

[0192] An interface region;

[0193] A dielectric material located above the interface region;

[0194] A conductive region located on a top surface of the dielectric material, the conductive region being exposed to the surrounding environment; and

[0195] An interconnect that provides an electrical connection between the interface region and the conductive region through the dielectric material;

[0196] Directing radiation from at least one light source of a metrology system onto the interface region; and

[0197] Detecting, by an optical detection system of the metrology system, light generated by second harmonic generation from the interface region.

[0198] Example 31: The method according to Example 30, wherein the interface region comprises a junction between a semiconductor layer and an oxide layer. Example 32: The method according to Example 30 or 31, further comprising determining a change in the electrical characteristics associated with the interface region.

[0199] Example 33: The method according to any one of Examples 30 to 32, further comprising:

[0200] Providing a second test structure comprising a second interface region;

[0201] Directing radiation from the at least one light source onto the second interface region; and

[0202] Light generated by second harmonic generation from the second interface region is detected by the optical detection system of the metrology system.

[0203] Example 34: The method according to Example 33, wherein the second interface region is not electrically connected to the conductive region.

[0204] Example 35: The method according to Example 33 or 34, further comprising determining a change in electrical characteristics associated with the interface region of the test structure based on the light generated by second harmonic generation from the interface region and the light generated by second harmonic generation from the second interface region.

[0205] Example 36: The system according to any one of Examples 22 to 29, wherein the system is configured to characterize the sample online when the sample is in manufacturing or a production line.

[0206] Example 37: The system according to any one of Examples 22 to 29 or 36, further comprising a pump source to provide pump radiation to the sample.

[0207] Example 38: The method according to any one of Examples 30 to 35, wherein directing radiation onto the interface region includes applying pump radiation and probe radiation.

[0208] Example 39: The method according to any one of Examples 30 to 35 or 38, wherein when the sample is in manufacturing or a production line, a change in electrical characteristics associated with the interface region of the sample is determined online. BRIEF DESCRIPTION OF THE DRAWINGS

[0209] The drawings schematically illustrate aspects of various embodiments of different inventive variations.

[0210] Figure 1A is a schematic diagram of an embodiment of the SHG metrology system of the present invention; Figure 1B is a perspective view of a chuck for such an SHG system. Figure 1C is a schematic diagram of another embodiment of the SHG metrology system of the present invention.

[0211] Figure 2A / 2B and 3A / 3B are schematic diagrams showing example pump / probe systems for generating a characterized SHG signal.

[0212] Figure 4 is a schematic diagram showing a probe / pump system for determining the threshold injection carrier energy.

[0213] Figure 5It is a flowchart that details the method for generating the signals as shown in the figure.

[0214] Figures 6A - 6C It is a schematic diagram of the system implementation;

[0215] Figure 7 It is a schematic diagram of the system function; Figure 8A and 8B It is a schematic diagram showing the way to implement this function. Figure 9 The system function is represented by a graphical output.

[0216] Figure 10 and 11 It depicts the method implementation related to SHG interrogation; Figures 12A to 12E It is drawn for Figure 6C the time dynamics associated with the system in Figure 10 and 11 the method.

[0217] Figure 13 It depicts a current-based interrogation method for observing the decay of the transient electric field; Figure 14A and 14B show the hardware configuration that can be adopted in the Figure 13 method.

[0218] Figure 15A and 15B are schematic diagrams of the SHG system components that can be used as described herein.

[0219] Figure 16A It is a perspective view of the first chuck structure of the present invention; Figure 16B It is Figure 16A a side cross-sectional view of the chuck structure in

[0220] Figure 17A and 17B are a partial cross-sectional perspective view of the second chuck structure of the present invention; Figure 17C It is Figure 17A a top cross-sectional view of the chuck in

[0221] Figure 18A and 18B relate to the AC voltage applied to the sample and manifested in the sample to eliminate the DC bias probe.

[0222] Figure 19A and 19B relate to the AC voltage applied to the sample and manifested in the sample to test the leakage current.

[0223] Figure 20A schematic diagram of an exemplary SHG system is shown, which can be used to set interrogation conditions for different patterns on a wafer to be evaluated.

[0224] Figure 21 A schematic diagram of an area of an exemplary pattern to be evaluated is shown.

[0225] Figure 22 An exemplary determination process for interrogation conditions for a pattern is shown.

[0226] Figure 23 A time - dependent SHG signal obtained from a sample including an interface region is shown.

[0227] Figure 24 An embodiment of a semiconductor device undergoing downstream plasma processing is shown.

[0228] Figure 24A Shows Figure 24 A cross - section of the semiconductor device shown along axis A - A.

[0229] Figure 25A And 25B An embodiment of a test structure that can be optically interrogated to determine process - induced charging and / or damage is shown.

[0230] Figure 26A And Figure 26B Schematically shows Figure 25A And 25B A three - dimensional (3D) layout of the test structure shown. Detailed Description

[0231] First Part

[0232] FIG. 1 is a schematic diagram of a system 100 that can be used in conjunction with the method of the present invention. For example, for intermediate optical elements, including optical delay lines and optional electrode features, other suitable system variations are presented in the section titled "CHARGE DECAY MEASUREMENT SYSTEMS AND METHODS" of the section titled "SECTION 2" of U.S. Provisional Application No. 61 / 980,860, filed on April 17, 2014, and titled "WAFERMETROLOGY TECHNOLOGIES".

[0233] As shown, system 100 includes a primary or probe laser 10 for directing an interrogation beam 12 of electromagnetic radiation to a sample wafer 20 held by a vacuum chuck 30. As Figure 1BAs shown, the chuck 30 includes an x-stage and a y-stage, or is disposed on the x-stage and the y-stage, and optionally, the chuck further includes a rotary stage for positioning the sample point 22 on the wafer relative to the position targeted by the laser. The x-y stage enables scanning of multiple wafer surface points or positions 22 without moving other hardware. The rotary stage optionally enables evaluation of the effect of crystal structure on SHG (e.g., strain), as well as related defects or areas of interest on the material being characterized. Other optional features, aspects, and / or uses of the chuck 30 are described in the section entitled "FIELD-BIASED SHG METROLOGY" of the U.S. Provisional Application No. 61 / 980,860, filed on April 17, 2014, and titled "WAFER METROLOGY TECHNOLOGIES", which is referred to as Section IV. The sample point 22 may include one or more layers. The sample point 22 may include a composite substrate including at least two layers. The sample point 22 may include an interface between two different materials (e.g., between two different semiconductor materials, between two differently doped semiconductor materials, between a semiconductor and an oxide, between a semiconductor and a dielectric material, between a semiconductor and a metal, or between an oxide and a metal).

[0234] When the system 100 is used, the reflected radiation beam 14 directed to the detector 40 will include an SHG signal. The detector 40 can be any one of a photomultiplier tube, a CCD camera, an avalanche detector, a photodiode detector, a streak camera, and a silicon detector. The system 100 may also include one or more shutter-type devices 50. The type of shutter hardware used will depend on the time range during which the laser radiation is to be blocked, discarded, or otherwise directed away from the sample point. Electro-optic blocking devices such as Pockel cells or Kerr cells can be used to obtain very short blocking time periods (i.e., actuation times on the order of 10 -9 to 10 -12 seconds).

[0235] For longer blocking time intervals (e.g., starting from about 10 -5 seconds and higher), mechanical shutters or flywheel chopper-type devices can be used. However, electro-optic blocking devices will allow testing of a wider range of materials according to the following method. A photon counting system 44 capable of discretely gating very small time intervals (typically on the picosecond to microsecond scale) can be employed to resolve time-correlated signal counts. For faster time ranges, an optical delay line can be incorporated as described above.

[0236] System 100 may include additional electromagnetic radiation sources 60, also referred to as pump sources. In various embodiments, radiation source 60 may be a laser that emits a collimated beam 62 as shown, or a UV flash lamp that emits divergent or optically collimated pulses 64. In the case of a laser source, its beam 62 may be collinear with beam 12 (e.g., as directed by additional mirrors or prisms, etc.). The wavelength of the light output by source 60 may be any wavelength between about 80 nm and about 1000 nm. Compared with longer wavelengths, using shorter wavelengths in this range (e.g., less than about 450 nm) may drive charge excitation with fewer photons and / or lower peak intensities.

[0237] For a flash lamp, the energy per flash or the power level during the flash may depend on the substrate material. For fully depleted silicon-on-insulator (FD-SOI), a total energy of 1 J to 10 kJ per flash of the flash lamp is suitable. However, pulsed or constant ultraviolet sources are also feasible. An important factor in the pumping characteristics and use is the injection of charge carriers into the dielectric of the material to be interrogated. Manufacturers of suitable flash lamps include Hellma USA, Inc. and Hamamatsu Photonics K.K.

[0238] When a laser is used as source 60, it can be any of a nanosecond, picosecond, femtosecond, or faster pulsed laser source. It can even be a continuous wave solid-state laser. In various embodiments, the wavelength of the pump source is tunable. Commercially available tunable lasers for selection include the Velocity and Vortex tunable lasers from Spectra Physics. The LT-22xx series of solid-state lasers from LOTIS Ltd. can provide other tunable solid-state solutions.

[0239] Whether provided in the form of a laser or a flash lamp, pump source 60 can be selected for a relatively high average power. This may be from about 10 mW to about 10 W, but more typically from about 100 mW to about 4 W, depending on the material to be interrogated (again, the above considerations are to ensure that charge carrier migration is induced in a manner that injects charge carriers into the interface of the material (e.g., the dielectric interface), and the average power may be material-specific). The average power of pump source 60 is selected to be below the optical damage threshold of the material. For example, when the material to be interrogated contains silicon, the average optical power of pump source 60 can be selected between 1 W and 2 W so as not to exceed the optical damage threshold of silicon.

[0240] The probe laser 10 can be any of a nanosecond, picosecond, or femtosecond or faster pulsed laser source. Two options for lasers commercially available today with the required peak power, wavelength, and reliability are doped fiber and titanium sapphire units. Coherent's VITESSE and Spectra Physics' MAI TAI lasers are examples of suitable titanium sapphire devices. Femtolasers Gmbh and other manufacturers also make other relevant titanium sapphire devices. Suitable doped fiber lasers are produced by IMRA, OneFive, and Toptica Photonics. Picosecond and / or nanosecond lasers from many manufacturers (such as Hamamatsu) can also be selected according to the substrate material and pump type. The laser 10 can operate in a wavelength range between about 100 nm and about 2000 nm, and the peak power is between about 10 kW and 1 GW, but the average transmitted power is less than about 150 mW.

[0241] A variety of other optional so-called "intermediate" optical components can be employed in the system 100. For example, the system can include a dichroic reflective or refractive filter 70 for selectively passing the SHG signal coaxially with the reflected radiation directly from the laser 3010 and / or the source 3060. Alternatively, a prism can be used to distinguish the weaker SHG signal from the reflected main beam that is many orders of magnitude stronger. However, since the prism method has been shown to be very sensitive to misalignment, the dichroic system as described above may be preferred. Other options include using a diffraction grating or a Pellicle beam splitter. An optical beam 80 for focusing and collimating / beam shaping optics can be provided. Alternatively, a filter wheel 90, one or more polarizers 92, and / or one or more zoom lens 94 units or components can be used in the system. Also, angular (or arcuate) rotational adjustments (with corresponding adjustments to the detector) and plug-in optical components may be desirable.

[0242] In Figure 1CIn the illustrated embodiment, the beam 12 from the laser 10 can be split between two optical paths by a beam splitter 74. The beam splitter 74 can split the beam 12 unevenly between the two optical paths. For example, 70% of the energy of the beam 12 can be directed along a first optical path (e.g., as beam 16), and 30% of the energy of the beam 12 can be directed along a second optical path (e.g., as beam 18). As another example, 60% of the energy of the beam 12 can be directed along the first optical path, and 40% of the energy of the beam 12 can be directed along the second optical path. As yet another example, 80% of the energy of the beam 12 can be directed along the first optical path, and 20% of the energy of the beam 12 can be directed along the second optical path. Thus, the beam splitting can be unequal (e.g., 70 - 30%, 80 - 20%, 60 - 40% or any range therebetween, e.g., between 60 - 90% in one path and between 40 - 10% in the other path, and other ranges outside of these), such that most of the power is sent in the pump beam and a small portion of the power is sent in the probe beam. For example, for pump and probe, the beam splitting can be 60 - 70% and 40 - 30% respectively; for pump and probe, the beam splitting can be 70 - 80% and 30 - 20% respectively; for pump and probe, the beam splitting can be 80 - 90% and 20 - 10% respectively; or for pump and probe, the beam splitting can be 90 - 99.999% and 10 - 0.001% respectively. In different embodiments, the probe beam can be, for example, between 0.001% and 49.99%, while the pump beam can be between 50.001% and 99.999%. The sum of the two beams can be 100% or close to 100%. The beam splitting can be determined by a specific material system characterized in some cases. In Figure 1C In the example shown, 5% of the beam energy of the beam 12 is directed along the first optical path, and 95% of the energy of the beam 12 is directed along the second optical path.

[0243] The beam splitter 74 can include a dielectric mirror, a beam splitter cube, a metal-coated mirror, a thin film mirror, or a waveguide beam splitter. In some embodiments, in the case where the beam 12 includes optical pulses, the beam splitter 74 can include an optical component with negligible dispersion that splits the beam 12 between the two optical paths such that the optical pulses are not broadened. As Figure 1C shown, a variety of mirror elements 2072 can be used to redirect or aim each beam.

[0244] The output from detector 40 and / or photon counting system 44 can be input into electronics 48. Electronics 48 can be a computing device, computer, tablet, microcontroller, or FPGA. Electronics 48 includes a processor, processing electronics, control electronics, processing / control electronics, or electronics that can be configured to execute one or more software modules. In addition to executing an operating system, the processor can also be configured to execute one or more software applications, including a web browser, phone application, email program, or any other software application. Electronics 48 can implement the methods discussed herein by executing instructions included in a machine-readable non-transitory storage medium such as RAM, ROM, EEPROM, etc. Electronics 48 can include a display device and / or a graphical user interface that interacts with a user. Electronics 48 can communicate with one or more devices through a network interface. The network interface can include a transmitter, receiver, and / or transceiver that can communicate, for example, a wired Ethernet, or a wireless connection.

[0245] Regarding other options, since the SHG signal is weaker compared to the reflected beam that generates the SHG signal, it is desirable to improve the signal-to-noise ratio of SHG counting. As the photon counting gate time of photon counting system 44 decreases due to the blocking and / or delaying processes described herein, the improvement becomes more important. One method of reducing noise that can be employed is to actively cool the photon counter. This can be achieved by using cryogenic liquids (such as liquid nitrogen or liquid helium) or by using a Peltier device for solid-state cooling. Improvements in other aspects can include using a Marx Bank circuit (MBC) related to the shutter speed. Additionally, system 100 can be incorporated into a production line environment online. Production line elements before or after system 100 can include any one of an epitaxial growth system, lithography, and / or deposition (CVD, PVD, sputtering, etc.) systems.

[0246] Now turning to Figure 2A / 2B and 3A / 3B, these are schematic diagrams showing example types of SHG curves that can be generated by the pump / probe system of the present invention in its method of use. In Figure 2A and 2B the time scale for obtaining such signals is on the order of milliseconds (10 -3 s). Therefore, these are "fast" processes. As discussed further below, they can provide several orders of magnitude improvement in time relative to existing methods. For example, since continuous measurements may not be required at every point, a flash lamp that can expose the entire surface of the test material to ultraviolet radiation before SHG detection can significantly reduce the total scan time.

[0247] Specifically, in Figure 2AIn this case, the SHG signal 200 is measured at an initial intensity 202. This signal is generated by the radiation of a probe source applied at the surface location. After adding the pump source radiation (added to the radiation of the probe that remains on) after a given time offset (O 1 ), the signal intensity drops to a lower level 206 along the time-dependent curve 204. In contrast, in Figure 2B , after applying the pump radiation after the time offset (O 2 ), the SHG signal 200' at a lower level 212 generated only by the probe radiation increases to a higher plateau 216 along the time-dependent curve 214. The signals 200 and 200' also include time-independent components or portions at the beginning and end of the curves.

[0248] Depending on the substrate material and different laser powers (e.g., in this case, the laser power of the pump), the two observations in Figure 2A and Figure 2B can be made with the system of the present invention. In various embodiments, charge separation involves the separation of electrons and holes from each other after photoexcitation. Electrons injected from the silicon valence band into the SiO 2 conduction band by photons from the laser are mainly trapped on the upper surface of the oxide. The holes mainly accumulate in the silicon valence band near the Si / SiO 2 interface. This separation of charge carriers due to excitation from incident radiation or internal photoemission results in an electric field present within the system of the present invention, which in turn alters the measured SHG. Multiple factors (such as the presence of gaseous oxygen at the test point and the composition and structure of the sample involved) will determine whether the observations shown in Figure 2A or 2B are achieved.

[0249] In fact, the combination of signals 200 and 200’ has been observed in some cases. In those cases, the signal intensity first drops from the peak, reaches the minimum, and then rises again to the asymptote. Generally, the SHG intensity curve is determined by the nonlinear susceptibility tensor, which in turn is affected by molecular orientation, atomic organization, electronic structure, and external fields. Charge carriers moving across the interface will change the charge state in the structure and the electric field in the sub-interface layer where the SHG signal is generated. Depending on the type of charge carriers (positive or negative) crossing the interface and the initial state of the field at the interface, different time-dependent curves will be observed. The intensity of the detected SHG signal can depend on various factors, including spot size, average laser power, and peak laser power. In various embodiments, system 100 can be configured to detect SHG signals with intensities in the range of from about 400 counts per second to about 7 million counts per second. The pump / probe systems described herein can reduce the time required for charge carriers to move across the interface to the saturation level. In various embodiments, in the pump / probe systems described herein, the time required for charge carriers to move across the interface to the saturation level can be between 1 millisecond and 1000 seconds. Since it may be advantageous to obtain the time evolution of the SHG signal when the charge carrier density in the region including the interface is below saturation and when the charge carrier density in the region including the interface reaches the saturation level, the system can be configured to obtain SHG signal measurements within about 1 microsecond after turning the pump radiation on / off. For example, the system can be configured to obtain SHG signal measurements within: within 10 seconds after turning the pump radiation on / off (or probe radiation on / off), within about 6 seconds after turning the pump radiation on / off, within about 1 second after turning the pump radiation on / off, within about 100 milliseconds after turning the pump radiation on / off, or within about 1 millisecond after turning the pump radiation on / off, within 1 microsecond after turning the pump radiation on / off, within 1 nanosecond after turning the pump radiation on / off, or within any range formed by any of these values (e.g., for a period lasting greater than one nanosecond, greater than one microsecond, greater than one millisecond, etc.) and beyond any of these ranges. These values and ranges apply to obtaining data from a single point, but with appropriate imaging optics, they can be extended to most of the wafer, including the entire wafer at most. As indicated by the parentheses above, these values and ranges also apply to probe radiation. Reducing the charging time and the time required to obtain the SHG signal can speed up the testing of the interface, thereby increasing the throughput of the testing and / or manufacturing production line.

[0250] By comparison, Figure 3A and 3BSchematically shows the SHG signal curves 300 and 300' of the corresponding materials, where, as in the existing SHG technology, only one radiation source (in this case a laser with high average power and high peak power) is used to interrogate the substrate. At Figure 3A and 3B the time scales used to generate signals 300 and 300 are on the order of about dozens to hundreds (10 2 s) seconds.

[0251] Over such a time period, these signals (like the signals in Figure 2A and 2B ) include a lower plateau 306 and an upper plateau 316. The lower plateau 306 and the upper plateau 316 can be characterized after the initial 302 and / or time-dependent signals. Thus, although similar (or identical) analyses can be performed on signals 200 / 200' and 300 / 300', the main difference is that the system of the present invention (i.e., combining a higher average power pump and a lower peak power femtosecond probe laser for material pre-excitation) can greatly improve the time efficiency, thereby obtaining the required signal information. In addition, the method of the present invention provides a method for more easily determining time-independent SHG measurement values without using a filter wheel or some other method.

[0252] In any case, Figure 4 shows a method for determining the threshold injection carrier energy. In this case, the pump includes a wavelength-tunable laser. This causes the output frequency of the photons incident on the sample by the pump (and thus the energy represented by E = hν) to increase with time. The observed SHG activity is shown as signal 400. By the pump laser applied or used in this way, the initial SHG signal level 402 generated by applying the probe laser is observed until the signal suddenly changes (i.e., there are various inflection points, discontinuities, maxima, minima, step functions, cusps or sudden changes in slope at 404). The frequency value at this time corresponds to the threshold energy. In various embodiments, the threshold energy is between two materials (such as two semiconductor materials, or a semiconductor material and a dielectric material (e.g., Si and SiO 2 、Si and Si 3 N 4 、Si and Ta 2 O 5 、Si and BaTiO 3 、Si and BaZrO 3 、Si and ZrO 2 、Si and HfO 2 、Si and La 2 O 3 、Si and Al 2 O 3 、Si and Y2 O 3 、 Si, and ZrSiO 4 )) at the interface between the valence band of one semiconductor material and the conduction band of another semiconductor material. System 100 can be configured to measure the threshold energy in the range between about 1.0 eV and about 6.0 eV. The systems and methods described herein can be configured to determine the threshold energy of a variety of interfaces, e.g., between two different semiconductors, between a semiconductor and a metal, between a semiconductor and a dielectric, etc.

[0253] Figure 5 FIG. 500 is a flow chart showing an embodiment of a method for characterizing a semiconductor device by SHG. A variety of process flow paths are represented. Any such method can begin at 502 by positioning a sample at a desired location (e.g., typically positioning chuck 30 after wafer 20 is fixed thereto). As further described, incremental positioning (i.e., repositioning) can occur after any given SHG detection event 520 to scan multiple surface locations in the sample area or even each surface location or even each surface location of the sample. Alternatively, such an action (the "return" option indicated by the dashed line) can occur after a given determination is made regarding the detected SHG signal at 540. More details regarding alternative determinations can be understood by referring to other parts of this application cited above. In any case, after the sample is positioned or repositioned, a given flow path will be selected (or another flow path can extend sequentially at the same surface location to generate another data).

[0254] Along one process flow path (partially solid line), at 504, probe source radiation is applied to the sample surface at a given location. Next, at 506, pump source radiation is applied. In this example, the pump radiation is applied in a varying manner, which (optionally) linearly increases the photon energy by decreasing the radiation wavelength. At 520, the resulting SHG is detected. At 542, signal analysis (according to Figure 4 the examples in 2The threshold energy of the interface, and the threshold energy of the pump radiation can vary between about 4.1 eV and about 5.7 eV. The change in the energy of the pump radiation can be achieved by changing the frequency (or wavelength) of the radiation. For example, to interrogate the sample with an expected threshold energy of about 3.2 eV, the wavelength of the pump radiation can vary between about 443 nm and about 365 nm. In various embodiments, the energy of the pump radiation can be lower than the threshold energy of the semiconductor interface because photons from the pump radiation can generate electrons with twice the energy (e.g., when a single electron absorbs two photons). In such embodiments, the charging time increases, which can provide observations with increased resolution and intensity. Increasing the charging time also increases the time required to test sample points, thereby reducing throughput.

[0255] Along another flow path (partially dashed), at 508, pump radiation is applied to the substrate. This application can be directed only to the surface to be immediately interrogated (e.g., by a laser) or to the entire surface of the wafer (e.g., using a flash lamp). Next, at 510, a portion of the sample to be interrogated is exposed to probe source radiation. At 520, the resulting SHG is detected. Then, after repositioning of the sample at 502, the pump-probe-detection aspects of the method can be repeated. However, as indicated, the action box 508 can be skipped, and pumping again can be avoided or omitted from the sequential scan process, as shown in the above example where the entire substrate is initially exposed to the pump radiation. In any case, as discussed elsewhere in this patent application, at 544, any of a variety of SHG-based signal analyses can be performed to make determinations other than the threshold energy in 542.

[0256] Along another process flow path (partially dash-dotted / centerline), probe interrogation is performed at 504 and 510 before and after applying pump radiation at 508, where SHG signal data is collected directly at 520 after applying probe radiation at 504 and 510. Again, the method can be performed recursively to sample multiple sample points, such as each part of the substrate or its area, returning to flowchart element 502 for repositioning and repeating the probe-detection-pump-probe-detection method or sub-method.

[0257] It is noted that any of the SHG signal analysis methods or sub-methods (generally contained in boxes 540 and 542) can be performed in real time, such as with an instantaneous or near-instantaneous output. In doing so, any spectral characteristics determined from the collected data can be calculated by a software package either through integrated software on the machine or remotely. Alternatively, the SHG signal analysis can be processed in post-processing after some or all of the SHG data has been detected or collected.

[0258] The systems and methods described herein can be used to characterize a sample (e.g., a semiconductor wafer or a portion thereof). For example, as discussed above, the systems and methods described herein can be used to detect defects or contaminants in a sample. The systems and methods described herein can be configured to characterize a sample during the manufacture or production of a semiconductor wafer. Thus, the systems and methods can be used along a semiconductor manufacturing line in a semiconductor manufacturing facility. The systems and methods described herein can be integrated with a semiconductor manufacturing / production line. The systems and methods described herein can be integrated into a semiconductor production line having automated wafer handling capabilities. For example, the system can be equipped with an attached Equipment Front End Module (EFEM). This module can receive a wafer cassette, such as a Front Opening Unified Pod (FOUP). Each cassette can be transported to the machine by an operator or a cassette automated handling robot, which transports the cassette from one process to another along the manufacturing / production line.

[0259] In various embodiments, the system can be configured such that once the cassette is mounted on the EFEM, the FOUP is opened, the robotic arm selects individual wafers from the FOUP, moves them through an automated drive gate in the system, into a light-tight processing cassette, and then moves them to a vacuum chuck having a biasing function. The chuck can be designed to complement the robotic arm such that it can place the sample on top of the chuck. At some point during this process, the wafer can be fixed above a scanner to identify its unique laser marking.

[0260] Thus, a system configured to be integrated into a semiconductor manufacturing / assembly line can have: automated wafer handling capabilities from a FOUP or other type of cassette; integration with an EFEM as discussed above, a chuck designed to be compatible with robotic arm operation, an automated light-tight gate that can be opened and closed to allow movement of the robotic bar / arm, and software that sends signaling to the EFEM for wafer loading / unloading and wafer identification.

[0261] Second Part

[0262] Figure 6A is a schematic diagram of a first system 2100 that can be employed in conjunction with the method of the present invention. In Figure 6B and 6CAlternative systems 2100’ and 2100” are shown. Each system includes a primary laser 2010 for directing a primary beam 2012 of electromagnetic radiation onto a sample wafer 2020 held by a vacuum chuck 2030. The chuck 2030 includes an x-stage and a y-stage or is disposed on the x-stage and y-stage, and optionally, the chuck includes a rotary stage. The rotary stage is used to position a sample point 2022 on the wafer relative to the position targeted by the laser. The reflected radiation beam 2014 directed to the detector 2040 will include an SHG signal. The detector can be any one of a photomultiplier tube, a CCD camera, an avalanche detector, a photodiode detector, a streak camera, and a silicon detector. The sample point 2022 may include one or more layers. The sample point 2022 may include a composite substrate. The composite substrate includes at least two layers. The sample point 2022 may include an interface between two different materials (e.g., between two different semiconductor materials, between two differently doped semiconductor materials, between a semiconductor and an oxide, between a semiconductor and a dielectric material, between a semiconductor and a metal, between an oxide and a metal, between a metal and a metal, or between a metal and a dielectric).

[0263] Each embodiment similarly includes one or more shutter-type devices 2050. They are used as described in connection with the method below. The type of shutter hardware used will depend on the time scale during which the laser radiation is blocked, discarded, or otherwise directed away from the sample point.

[0264] Electro-optic blocking devices such as Pockel cells or Kerr cells can be used to obtain very short blocking time periods (i.e., having switching times on the order of 10 -9 to 10 -12 seconds). For longer blocking time intervals (e.g., starting from about 10 -5 seconds and higher), mechanical shutters or flywheel chopper-type devices can be used.

[0265] However, electro-optic blocking devices will allow testing a wider range of materials according to the following method. A photon counting system 2044 capable of discretely gating very small time intervals (typically on the picosecond to microsecond scale) can be included to resolve time-correlated signal counts.

[0266] Hardware for pushing the method into faster time scales is considered. That is, as Figure 6C shown, the system can include delay line hardware 2060. Beam splitting and switching (or shutter on / off) can be provided between multiple set time delay lines for a corresponding number of time delay interrogation events. However, a variable delay line may be more preferable because it allows for interrogation immediately after the pump pulse (although many methods may only require 10 -12A single solution is provided for multiple transient charge decay interrogation events in the time range from a delay of seconds to tens of nanoseconds after the pump pulse. If a slower kHz repetition rate laser is used, the desired delay time may even enter the microsecond range. And although such hardware is particularly suitable for performing the method of the present invention (both the method and such hardware are considered unknown heretofore), it can also be used for other purposes.

[0267] In Figure 6C the illustrated embodiment, the beam 2012 from the laser 2010 can be split between two optical paths by a beam splitter 2070. The beam splitter 2070 can split the beam 2012 unevenly between the two optical paths. For example, 70% of the energy of the beam 2012 can be directed along a first optical path (e.g., as the beam 2016), and 30% of the energy of the beam 12 can be directed along a second optical path (e.g., as the beam 2018). As another example, 60% of the energy of the beam 2012 can be directed along the first optical path, and 40% of the energy of the beam 2012 can be directed along the second optical path. As yet another example, 80% of the energy of the beam 2012 can be directed along the first optical path, and 20% of the energy of the beam 2012 can be directed along the second optical path. The beam splitter 2070 can include a dielectric mirror, a beam splitter cube, a metal-coated mirror, a thin film mirror, or a waveguide beam splitter. In multiple embodiments, in the case where the beam 2012 includes an optical pulse, the beam splitter 2070 can include an optical component with negligible dispersion that splits the beam 2012 between the two optical paths such that the optical pulse is not broadened. As Figure 6C shown by the double arrow in, the path of the "interrogation" beam 2016 intercepted by the beam splitter 2070 from the main beam 2012 can be lengthened or shortened to change its timing relative to the arrival of the "pump" beam 2018, where each beam is shown being guided or aimed by a variety of mirror elements 2072. Another method (described above) employs optical fibers in the optical delay component and / or other optical paths (e.g., as presented for that description in U.S. Patent No. 6,819,844, which is incorporated herein by reference in its entirety).

[0268] The output from the detector 2040 and / or the photon counting system 2044 can be input to the electronics 2048 (e.g., see Figure 6A and 6B) The electronic device 2048 can be a computing device, a computer, a tablet, a microcontroller, or an FPGA. The electronic device 2048 includes a processor, processing electronics, control electronics, processing / control electronics, or electronics that can be configured to execute one or more software modules. In addition to executing an operating system, the processor can also be configured to execute one or more software applications, including a web browser, a phone application, an email program, or any other software application. The electronic device 2048 can implement the methods discussed herein by executing instructions included in a machine-readable non-transitory storage medium such as RAM, ROM, EEPROM, etc. The electronic device 2048 can include a display device and / or a graphical user interface that interacts with a user. The electronic device 2048 can communicate with one or more devices through a network interface. The network interface can include a transmitter, a receiver, and / or a transceiver that can communicate through a wired or wireless connection.

[0269] Another potential aspect of "system 2100" relates to the way the initial beam splitter operates. That is, the beam splitting may be unequal (e.g., 70 - 30%, 80 - 20%, 60 - 40%, or any range between them, e.g., between 60 - 90% in one path and between 40 - 10% in the other path, and other ranges outside of these), such that most of the power is sent in the pump beam and a small portion of the power is sent in the probe beam. For example, for the pump and probe, the beam splitting can be 60 - 70% and 40 - 30% respectively; for the pump and probe, the beam splitting can be 70 - 80% and 30 - 20% respectively; for the pump and probe, the beam splitting can be 80 - 90% and 20 - 10% respectively; or for the pump and probe, the beam splitting can be 90 - 99.999% and 10 - 0.001% respectively. In different embodiments, the probe beam can be, for example, between 0.001% and 49.99%, while the pump beam can be between 50.001% and 99.999%. The sum of the two beams can be 100% or close to 100%. The beam splitting can be determined by a specific material system characterized in some cases. The value of doing so (at least in part) can be to help facilitate methods such as Figure 10 and 11 as shown, where, as discussed below, it is desirable to reduce or minimize the power involved in the SHG interrogation after material charging. Another aspect is that the pump beam and the probe beam enter at different angles. This method helps to measure the SHG responses of the pump and the probe separately. In this case, it can be advantageous to employ two detectors, one for each reflected beam path.

[0270] A variety of other optional optical device regions constitute the differences between the illustrated embodiments. For example, the illustrated embodiments 2100 and 2100' include a dichroic reflective or refractive filter 2080 for selectively passing the SHG signal coaxial with the reflected radiation directly from the laser 2010. Alternatively, a prism can be used to distinguish the weaker SHG signal from the reflected main beam that is many orders of magnitude stronger. However, since the prism method has been shown to be very sensitive to misalignment, the dichroic system as described above may be preferred. Other options include using a diffraction grating or a pellicle beam splitter. As shown in system 2100, an optical beam 2082 of focusing and collimating optics can be provided. As shown in system 2100', a filter wheel 2084, a zoom lens 2086, and / or a polarizer 2088 can be used in the system. Also, an angular (or arc-shaped) rotational adjustment (with corresponding adjustments for the detector 2040 and the plug-in optics) as shown in system 2100' may be desirable. An additional radiation source 2090 (which can be a laser emitting a collimated beam 2092 as illustrated, or a UV flash lamp emitting divergent or optically collimated or focused pulses 2094) can also be incorporated into the system to provide features such as the initial charging / saturation as described in the section titled "PUMP AND PROBE TYPE SHG METROLOGY" and / or the following methods, which is incorporated by reference in its entirety and is part of the U.S. Provisional Application No. 61 / 980,860, filed on April 17, 2014, titled "WAFER METROLOGY TECHNOLOGIES".

[0271] In these systems, the laser 10 can operate in a wavelength range of approximately 700 nm to approximately 2000 nm, and the peak power is between approximately 10 kW and 1 GW, but the average transmitted power is less than approximately 100 mW. In various embodiments, an average power between 10 mW and 10 W should be sufficient. The additional light source 2090 (which can be another laser or a flash lamp) can operate in a wavelength range of approximately 80 nm to approximately 800 nm, thereby providing an average power of approximately 10 mW to 10 W. However, values outside of these ranges are also possible.

[0272] For alternative systems, since the SHG signal is weaker compared to the reflected beam that generates the SHG signal, it may be desirable to improve the signal-to-noise ratio of SHG counting. As the photon counting gating time is reduced due to the blocking and / or delaying processes described herein, the improvement will become more useful. One method of reducing noise that can be employed is to actively cool the photon counter. Cooling can reduce the number of false positive photons randomly detected due to thermal noise. This can be achieved by using cryogenic liquids (such as liquid nitrogen or liquid helium) or by using a Peltier device for solid-state cooling. Other improvements can include using a Marx Bank circuit (MBC) related to the shutter speed.

[0273] These improvements can be applied to Figures 6A to 6C any of the systems shown. Similarly, any or all of the above-described features related to systems 2100 and 2100' above can be incorporated into system 2100". In fact, mixing and matching of features or components among all systems are contemplated.

[0274] In the case of implementing the method of the present invention using such systems, various determinations that could not be made heretofore can be made using laser blocking and / or delaying related techniques. Figure 7 A flowchart or decision tree 2200 representing these possibilities is shown. That is, the so-called problem 2210 detected can be resolved between a defect 2210 (an extended defect such as a bond gap or dislocation, a crystal originated particle (COP), etc.) and a contaminant 2220 (such as a point defect or copper or other metal in an aggregated form). With respect to the defect, the defect type 2222 and / or defect quantification 2224 (such as in terms of density or degree) can also be determined. With respect to the contaminant, the contaminant species or type 2232 and / or contaminant quantification 2234 can be determined. Such resolution and species identification can be performed between the defect and the contaminant, and the charge carrier lifetime, trap energy, trap capture cross-section, and / or trap density can be determined and then compared with the values in a look-up table or database. In essence, these tables or databases include a list of material properties characterized by the method of the present invention, and then the properties are matched with the entries in the table or database corresponding to a specific defect or contaminant.

[0275] Optionally, the trap capture cross-section and trap density can be observed in conjunction with the detected charging kinetics. With respect to determining the charge carrier lifetime and trap energy, the following equations based on the work of I. Lundstrom can provide guidance:

[0276]

[0277] where τ is the tunneling time constant of the trap discharge tunneling mechanism, φ rrepresents the trap energy, E ox represents the electric field strength at the interface, and the remaining equation variables and context are as described in I. Lundstrom, JAP, v. 43, n. 12, p. 5045, 1972, the entire subject matter of which is incorporated herein by reference.

[0278] In any case, by using physical models and related mathematics, the decay curve data obtained from the interrogation of the samples of the present invention can be used to determine the parameters of trap energy and charge carrier lifetime. For example, it can be calculated according to the above equations Figure 8A and Figure 8B a representative group of curves 2300, 2300' as shown (where Figure 8B highlight or expand some of the data in Figure 8A ).

[0279] These curves show the relationship between the time constant (vertical axis) of different trap energies or barrier energies and the dielectric thickness (horizontal axis). The vertical axis includes an ultrafast time scale down to nanoseconds (1E - 9 s). The horizontal axis is the tunneling distance (or dielectric layer thickness, in this case, these two terms are usually equivalent). Different curves are constant barrier energy lines. For example, in Figure 8B if the dielectric thickness is 40 angstroms, electrons trapped in a trap with an energy depth of 0.7 eV at the listed barrier energy have a detrapping time constant of about 1E - 5 seconds.

[0280] Further modeling using a Poisson / Transport solver can be used to determine the trap density in similar MOS structures and more unique devices using charge carrier lifetime and known trap energy. Specifically, the photo - injection current generated by a femtosecond optical pulse causes a burst of charge carriers, and the charge carriers reach the dielectric conduction band. The average value of this current is related to the carrier concentration and the lifetime of the carriers in this region. The electric field across the interface is then a proxy for SHG to measure these phenomena.

[0281] In Figure 8A 's figure, it can be observed (see the dashed line): for a trap with an energy of about 3 eV, the discharge time constant of a 20 - angstrom oxide is 1 millisecond. To relate this figure to an example of use in the system of the present invention, assume that after blocking laser excitation, a 20 - angstrom oxide is interrogated. As Figure 8B shown (see the highlighted box), the result will be an observable current from 1 microsecond to about 1 millisecond, and then all current disappears.

[0282] The decay curves discussed in this application can be the product of multiple processes (such as charge relaxation, charge recombination, etc.), and the multiple processes come from traps with different energies and different relaxation / recombination time constants. However, in various embodiments, the decay curve can generally be represented by the exponential function f(t) = Aexp(-λt) + B, where A is the decay amplitude, B represents the baseline offset constant, and λ represents the decay constant. This general exponential function can be used to roughly characterize the "degree of decay" of the decay data curve obtained from experiments. In various embodiments, the half-life t 1 / 2 , the average lifetime τ, and the decay constant λ can be used to characterize the degree of decay of the decay curve (obtained through experiments or simulations). For example, the parameters A, B, and λ can be obtained from the decay data points obtained from the experiments discussed below. Then, the radioactive decay theory can be used to calculate the average lifetime τ based on the parameters A, B, and λ, as a setting method for a benchmark qualitatively defined as partial decay or complete decay. For example, in some embodiments, τ can be given by the equation (t 1 / 2 ) / (ln(2)).

[0283] In various embodiments, after a time span of three average lifetimes τ, it can be considered that the charge state has completely decayed, which corresponds to a decay of approximately 95% compared to full saturation. Partial decay can be represented by the signal after a certain number of average lifetimes τ.

[0284] In operation, the system at least partially determines parameters such as carrier lifetime, trap energy, trap cross-section, charge carrier density, trap charge density, carrier injection threshold energy, charge carrier lifetime, charge accumulation time, etc. point by point on a partial wafer (such as a die-size part) or the entire wafer. Usually, the entire wafer can be scanned in less than about 10 minutes (depending on the material, surface area, and required scan density), and these parameters are determined for each scan point. In various embodiments, the position of the wafer can be scanned at time intervals between about 100 milliseconds and about 3 seconds. For example, the position of the wafer can be scanned in about 950 milliseconds.

[0285] The data matrix containing the spatial distribution of the determined parameters can be plotted as a separate color-coded heat map or contour map for each parameter as a way of quantitative inspection, feedback, and presentation. Figure 9 A such image 2400 is shown. This figure shows how to describe the defect 2402. However, in Figure 7 any further refined topics can be shown. Once the quantitative data is obtained, presenting such an output is merely a matter of changing the code in the plotting program / script.

[0286] This type of information and / or other information processed below can be displayed on a computer monitor screen or a dedicated system display, and / or can be recorded for future reference or for analysis on digital media. In addition, the spatial distribution of each wafer can be cross-correlated by referring to ellipsometry data to correct the variability of layer thickness, and the spatial distribution of each wafer can be cross-calibrated with independent contamination characterization data obtained by techniques such as total reflection X-ray fluorescence (TXRF) and time-of-flight secondary ion mass spectrometry (TOF-SIMS). Then, these initial or corrected spatial distributions can be compared with the spatial distributions of wafers known to be within specifications to determine whether the sample under discussion has any defects or problem features that require further testing. However, generally speaking, it is desirable to use low-cost SHG and other methods that use or oppose using slow and expensive direct methods (such as TXRF, etc.) for calibration.

[0287] When determining the criteria for passing or failing a wafer, manual decisions can be made first (such as examining the generated thermal image 2400) until the tool is properly calibrated to be able to automatically mark the wafers. For well-characterized processes in manufacturing, only manual decisions are needed to determine the root cause of any systematic yield problems based on the characteristics of the marked wafers.

[0288] Regardless of how it is implemented, Figure 10 Image 2500 is provided, which shows a first method implementation that can be used for such determination. Like other methods discussed and illustrated below, this method relies on using multiple shutter blocking events to characterize the SHG response, in which the interrogation laser is gated for several time periods.

[0289] In this first example, the portion of the sample to be interrogated is charged to saturation (usually by the laser). Although separate pump sources and separate probe sources can be used in other implementations, in this example, a single source is used to generate the pump beam and the probe beam. During this period, the SHG signal can be monitored. By characterizing the material and / or observing the asymptotic behavior of the SHG signal intensity related to the charging (I ch )), the saturation level can be known. When saturation is reached (or after saturation), the electromagnetic radiation from the laser (pump beam) is blocked outside the sample portion. The laser (probe beam) is gated for a selected time period (t bl1 ). After the gating stops, the SHG intensity measurement (I dch1 ) is made using the laser (probe beam) exposed on the surface, thereby observing the decay of the charge at the first discharge point. After a period of time (t ch ), after charging the material portion to saturation again (using the pump beam), a second blocking event occurs, with a duration of (t bl2) Different from the first time, another point along which a composite decay curve will be formed is identified. After stopping blocking the laser (probe beam), the SHG signal intensity (I dchs2 ) is measured again. This attenuated signal indicates the charge decay during the second gating event or blocking interval. It is charged to saturation again by the laser (pump beam), and then a third blocking event (t bl3 ) with a different time occurs. Next, SHG interrogation and signal intensity measurement (I dch3 ) are performed, thereby measuring the charge decay related to the SHG intensity for the third time.

[0290] Although in the above example, the sample is charged to the saturation level, in other examples, the sample can be charged to a charge level below saturation. Although in the above example, the three blocking times t bl1 , t bl2 and t bl3 are different, in other examples, the three blocking times t bl1 , t bl2 and t bl3 can be the same. In various examples, the sample can be initially charged to a charging level, and SHG intensity measurement values (I dch1 ), (I dch2 ) and (I dch3 ) can be obtained at different time intervals after the initial charging event.

[0291] As described above, these three points (corresponding to I dch1 , I dch2 and I dch3 ) can be used to construct a composite charge decay curve. In this article, this curve is called a "composite" curve because its components come from multiple related events. Although further repetitions can be performed (possibly using different gating times to generate more decay curve data points, or using same-relation timing to confirm determinacy, and / or eliminating errors from measurements at selected points), in order to use four or more blocking-then-detection cycles, it should be noted that as few as two such cycles can be employed. One data point related to decay cannot provide a meaningful characterization of the decay curve. A pair of data points defines a line, and based on this pair of data points, a curve can be modeled or deduced to provide some utility, while three or more points used for exponential decay fitting will produce a more accurate approximation. In other words, any simple (e.g., not physically extended by scattered transmission) decay kinetics has the general formula: measurable(t) = M 0 * exp(-t / tau). Therefore, under the assumption of this simple kinetics, at least 2 points are required to obtain two unknown parameters M 0and tau. In dispersive (i.e., non-linear) kinetics, it is desirable to measure as many points as possible so that, when n points are measured, (n - 1) order correction parameters can be extracted and then a model of the appropriate order for the approximation can be applied. Additionally, this set of measurements can be made for different electric fields (E) to make tau truly useful and accurate and to assign tau to a specific type of defect.

[0292] By obtaining measurements at several time points, the above method can provide a kinetic curve of the parameter versus time (such as the interfacial leakage current or the occupied trap density versus time). The time constant (t) can be extracted from the parameter-time kinetic curve. The time constant can be attributed to the time constant characteristics of a specific type of defect.

[0293] In any case, while using the interrogation (or probe) laser to saturate the material, the acquisition of SHG data can be performed before acquiring the decay-related data (as shown in the example). However, charging does not need to reach saturation (e.g., as described above). It is also not necessary to perform the measurement before the laser that blocks charging. Additionally, it is not necessary to use the interrogation / probe laser for charging (e.g., see the alternative pump / probe method described above).

[0294] In any case, after performing the test of the present invention at one sample point, the sample material is typically moved or indexed to locate another portion for the same (or similar) test. As discussed above, in this way, when scanning the entire wafer, multiple portions or even each portion of the sample material can be interrogated and quantified.

[0295] Figure 11 And Image 2600 shows an alternative (or supplementary method) for obtaining charge decay-related data by scanning, as shown in Image 2600. In this method, after the first charging to saturation, the continuous discharge, or at least semi-continuous discharge, during multiple blocking time intervals (t dch1 、I dch2 、I dch3 ) is studied by laser pulses from the interrogation or probe laser for measuring different SHG intensities (I ) is studied by laser pulses from the interrogation or probe laser for measuring different SHG intensities (I bl1 、t bl2 、t bl3 ). The intensity and / or frequency of the laser pulses from the interrogation / probe laser are selected so as to reduce the average power of the interrogation / probe laser to avoid recharging the material between the blocking intervals while obtaining a reasonable SHG signal. For this purpose, only one to three laser pulses are applied. If the number and / or power are reduced in this way, the excitation of the material caused by the interrogation or probe laser pulses can be ignored or accounted for by calibration or modeling.

[0296] In various embodiments, a separate pump source can be used for charging. However, in some embodiments, a probe beam can be used to charge the sample.

[0297] In any case, the delay between pulses can be the same or tuned to account for the expected transient charge decay curve or other practical reasons. Similarly, although the delay has been described above as "gating" or "blocking", it should be understood that, as discussed above, one or more optical delay lines can be used to generate the delay. Additionally, the same is true for the blocking / gating discussed in conjunction with Figure 6C the use of one or more optical delay lines to generate the delay. Additionally, the same is true for the blocking / gating discussed in conjunction with Figure 10 the use of one or more optical delay lines to generate the delay.

[0298] Furthermore, as described above, by making various modifications to the blocking or delay time or the number of events, the method in Figure 11 can be achieved. Additionally, during charging to saturation, the SHG signal can be measured or not measured. In any case, the method in Figure 11 can be implemented (as shown) such that the final gating period zeros the SHG signal. In the mode of measuring the charging intensity (I ch ), this can be confirmed by repeating the method at the same location or by simply observing (again) the SHG signal during charging to saturation.

[0299] Regarding the manner in which the hardware of the present invention is used to obtain decay-related data points, Figures 12A to 12E it is instructive. Figure 12A Graph 2700 is provided, which shows a series of laser pulses 2702, where, in the so-called "pulse picking" method, the intermediate or alternate pulses are blocked by shutter hardware (as described above, for example). During a given time interval, a single pulse can be allowed to pass (shown as a solid line) and other pulses can be blocked (shown as dashed lines).

[0300] Figure 12B Graph 2710 is provided, which shows the manner in which the resolution of the blocking technique for SHG studies can be limited by the repetition (rep) rate of the probe laser. Specifically, when an attenuation curve similar to attenuation curve 2712 appears, the pulse laser shown can be operated on the same time scale as shown in Figure 12A to resolve the time delay profile of blocking every other pulse. However, in this case, the shorter curve 2714 cannot be resolved or observed. Therefore, the use of one or more optical delay stages can provide additional utility.

[0301] Therefore, Figure 12CThe graph 2720 (in graphical and textual form) shows how blocking and introducing delays can provide useful overlapping regions with respect to the reference time associated with charging the sample, in terms of the decay time of the curve relative to the laser repetition rate. The figure also shows that when only the delay stage allows interrogation of the decay curve, there is a shorter time range, and when only the pump and / or probe beam can be blocked, there is a longer time range.

[0302] Figure 12D and Figure 12E Further shows the utility of the combined blocking / delay device. The graph 2730 shows an exemplary SHG signal generated by a single laser pulse 2702. Using only the delay stage, by changing the optical delay, only the range (X) between each such pulse can be interrogated. In contrast, using a system that combines a delay stage and a blocking device or a shutter device (such as a chopper, shutter, or modulator), additional utility can be achieved over the range (Y). As shown in the graph 2740, such a system is capable of measuring the decay curve (and its associated time constant) over a range of one to several pulse times.

[0303] Figure 13 The image 2800 is provided, which shows the third method embodiment of the present invention. This embodiment is similar to the embodiment in Figure 11 , charging the material with a laser or other electromagnetic radiation source, optionally monitoring or capturing its SHG intensity (I ch ), then blocking or otherwise stopping the application of laser radiation to the sample, thereby allowing discharge, and then measuring the discharge current (J dch1 , J dch1 , J dch3 ) at regular intervals. The above time intervals, for example, are substantially according to a logarithmic time scale and a linear time, t i = t 0 , 2t 0 , 3t 0 , 7t 0 , 10t 0 , 20t 0 , 30t 0 , 70t 0 , where t 0 is a scaling parameter of about 10 -6 seconds or 10 -3 seconds at the start of the measurement. After the e-h plasma in the substrate decays and the discharge current begins to appear, this method is used to estimate the mobile carrier lifetime in the substrate, thereby providing an important physical parameter of the wafer. After determining the carrier lifetime, its time correlation (i.e., the kinetics of charge decay) can be used to explain the discharge of the current, in the same way as obtained by SHG sensing of the discharged charge.

[0304] A variety of embodiments can be used to measure a time constant (e.g., a decay time constant) having a range of values. For example, the range of the time constant can be: 0.1 femtosecond to 1 femtosecond, 1 femtosecond to 10 femtoseconds, 10 femtoseconds to 100 femtoseconds, 100 femtoseconds to 1 picosecond, 1 picosecond to 10 picoseconds, 10 picoseconds to 100 picoseconds, 100 picoseconds to 1 nanosecond, 1 nanosecond to 10 nanoseconds, 10 nanoseconds to 100 nanoseconds, 100 nanoseconds to 1 microsecond, 1 nanosecond to 100 microseconds, 100 microseconds to 1 millisecond, 1 microsecond to 100 milliseconds, 100 microseconds to 1 second, 1 second to 10 seconds, or 10 seconds to 100 seconds or longer or shorter ranges. Similarly, for example, the time delay (Δ) between the probe and the pump or between the pump and the probe can be: for example, 0.1 femtosecond to 1 femtosecond, 1 femtosecond to 10 femtoseconds, 10 femtoseconds to 100 femtoseconds, 100 femtoseconds to 1 picosecond, 1 picosecond to 10 picoseconds, 10 picoseconds to 100 picoseconds, 100 picoseconds to 1 nanosecond, 1 nanosecond to 10 nanoseconds, 10 nanoseconds to 100 nanoseconds, 100 nanoseconds to 1 microsecond, 1 nanosecond to 100 microseconds, 100 microseconds to 1 millisecond, 1 microsecond to 100 milliseconds, 100 microseconds to 1 second, 1 second to 10 seconds, 10 seconds to 100 seconds. Values outside these ranges may also occur.

[0305] A variety of physical methods can be employed to provide a system suitable for implementing Figure 13 the method shown in, it should be noted that: like the above method, the method can be modified. Figure 14A and Figure 14B Two such methods are shown in.

[0306] Systems 2900 and 2900' use gate electrodes 2910 and 2920 respectively, and the gate electrodes 2910 and 2920 are made of a conductive material transparent in the visible light range. Such electrodes can contact the wafer 2020 to be inspected, but do not have to, because only a very small distance can be spaced therebetween. In a variety of embodiments, an alternating current measurement of the capacitance-voltage curve (CV curve) can be utilized to estimate the electric field in the dielectric by extracting the electrode-dielectric-substrate structure parameters. The CV curve measurement can be completed using a commercially available standard CV measurement device, which is connected to the material sample in the tool of the present invention (for example, the applied voltage will provide an electric field between about 0.1 MV / cm and about 5 MV / cm in the dielectric). The wafer can be clamped on a conductive chuck 2030 that provides substrate electrical contact. Another alternative structure of the gate electrode is an ultrathin gold film or aluminum film on glass with a thickness of 10 angstroms to 30 angstroms, and this film can reduce the sensitivity caused by the absorption of some photons by the semi-transparent thin metal layer.

[0307] However, electrodes 2910 and 2920 do not have significant absorption issues (although some refraction-based considerations may arise, which can be calibrated out or otherwise accounted for in the system). These electrodes may include a transparent conductor gate layer 2930 made of materials such as ZnO or SnO and connected to electrical contacts 2932. An anti-reflective topcoat 2934 may be included in this structure. The gate layer 2930 may be disposed on a transparent carrier 2936 made of a dielectric (SiO gc ) having the illustrated thickness (D 2 ). In various embodiments, the transparent carrier includes an insulator that serves as a gate for a non-contact electrode. For example, this non-contact electrode can perform electrical measurements using capacitive coupling, similar to the section titled "FIELD-BIASED SHG METROLOGY" in the "WAFER METROLOGY TECHNOLOGIES" U.S. Provisional Application No. 61 / 980,860, filed on April 17, 2014, and referred to as Section IV. When the wafer is charged by incident laser radiation, the electric field across one or more of its interfaces will change, and the layers of the wafer should be capacitively coupled to the plates in the electrodes, similar to a parallel-plate capacitor. Charging of the electrodes will involve the movement of charge carriers, and the movement of charge carriers will be measured as a current.

[0308] When the applied voltage is known, the CV curve on the semiconductor substrate is measured using a non-invasive method to calibrate D gc and use it for the calculation of the electric field (E). The negligible gap distance between the gate and the sample may be an air gap. Alternatively, the electrode can be in direct contact with the sample, not separated by an air gap or a dielectric. Thus, in various embodiments, normal CV or IV measurements can be performed.

[0309] Alternatively, considering the similar refractive indices between water and SiO 2 , filling the gap with deionized water may help reduce boundary layer reflections without causing any adverse effects (or at least no insurmountable adverse effects). Deionized (or cleanroom-grade) water can maintain the cleanliness around the electrically sensitive and chemically pure substrate wafer. In fact, deionized water has lower conductivity than ordinary water.

[0310] In Figure 14BIn [the figure], a related structure is shown, which differs in the configuration of its carrier or gate holder 2938. Here, it is configured as a ring, as produced using MEMS technology, preferably with the center etched away and the material around the electrodes left to form the ring. However, in any case, since the laser and SHG radiation must pass through a relatively large unoccupied area, it is particularly desirable, as described above, to fill this area with deionized water.

[0311] In any case, in various embodiments, generally, the entire electrode 2910, electrode 2920 structure is stationary with respect to the radiation of the excitation material used. The electrode structure can be placed by a robotic arm or a carriage assembly (not shown) before and after use.

[0312] As described above, in various embodiments, the electrodes are in direct contact with the wafer for electrical measurements, such as current measurements. However, non-contact current measurement methods can also be used, for example, electrodes that are capacitively coupled to the sample can be used.

[0313] The systems and methods described herein can be used to characterize samples (e.g., a semiconductor wafer or a portion thereof). For example, as discussed above, the systems and methods described herein can be used to detect defects or contaminants in a sample. The systems and methods described herein can be configured to characterize samples during the manufacture or production of semiconductor wafers. Thus, the systems and methods can be used along a semiconductor manufacturing line in a semiconductor manufacturing facility. The systems and methods described herein can be integrated with a semiconductor manufacturing / production line. The systems and methods described herein can be integrated into a semiconductor production line with automated wafer handling capabilities. For example, the system can be equipped with an attached Equipment Front End Module (EFEM). This module can receive wafer cassettes, such as a Front Opening Unified Pod (FOUP). Each cassette can be transported to the machine by an operator or a cassette automated transfer robot, and these robots transport the cassettes from one process to another along the manufacturing / production line.

[0314] In various embodiments, the system can be configured such that once the cassette is mounted on the EFEM, the FOUP is opened, the robotic arm selects individual wafers from the FOUP, moves them through an automated drive gate in the system, into an opaque processing cassette, and then moves them onto a vacuum chuck with a biasing function. The chuck can be designed to complement the robotic arm so that it can place the sample on top of the chuck. At some point during this process, the wafer can be fixed above the scanner to identify its unique laser mark.

[0315] Accordingly, a system configured to be integrated in a semiconductor manufacturing / assembly line can have: automatic wafer handling capabilities from a FOUP or other type of cassette; integration with an EFEM as discussed above, a chuck designed to be compatible with robot operation, an automatic light-tight door that can be opened and closed to allow movement of a robotic bar / arm, and software that sends signaling to the EFEM for wafer loading / unloading and wafer identification.

[0316] Third Part

[0317] Figure 15A and Figure 15B shows suitable hardware for the systems and methods of the present invention described in the section entitled "PUMP AND PROBE TYPE SHG METROLOGY" of the first section, which is applicable to the provisional application No. 61 / 980,860, entitled "WAFER METROLOGY TECHNOLOGIES", filed on April 17, 2014. For example, for intermediate optical elements, including optical delay lines and optional electrode features, alternative systems and methods are presented in the section entitled "CHARGE DECAY MEASUREMENT SYSTEMS AND METHODS" of the second section of the US provisional application No. 61 / 980,860, entitled "WAFER METROLOGY TECHNOLOGIES", filed on April 17, 2014.

[0318] As shown, system 3000 includes a primary or probe laser 3010 for directing an interrogation beam 3012 of electromagnetic radiation to a sample wafer 3020 held by a vacuum chuck 3030. As Figure 15B shown, the chuck 3030 includes an x-stage and a y-stage or is disposed on the x-stage and the y-stage, and optionally, the chuck further includes a rotational stage for positioning a sample point 3022 on the wafer relative to the position of the laser aiming. The x-y stage enables scanning of multiple wafer surface points or positions 3022 without moving other hardware. Optionally, the rotational stage can evaluate the effect of crystal structure on SHG. Other preferred features, aspects, and / or uses of the chuck 3030 are presented in other parts of this application. The sample point 3022 can include one or more layers. The sample point 3022 can include a composite substrate that includes at least two layers. The sample point 3022 can include an interface between two different materials (e.g., between two different semiconductor materials, between two differently doped semiconductor materials, between a semiconductor and an oxide, between a semiconductor and a dielectric material, between a semiconductor and a metal, or between an oxide and a metal).

[0319] When using system 3000, the reflected radiation beam 3014 directed to detector 3040 will include the SHG signal. Detector 3040 can be any one of a photomultiplier tube, a CCD camera, an avalanche detector, a photodiode detector, a streak camera, and a silicon detector. System 3000 may also include one or more shutter-type devices 3050. The type of shutter hardware used will depend on the time range during which the laser radiation will be blocked, dumped, or otherwise directed away from the sample point 3022. Electro-optic blocking devices such as Pockel cells or Kerr cells can be used to obtain very short blocking time periods (i.e., actuation times on the order of 10 -9 to 10 -12 seconds).

[0320] For longer blocking time intervals (e.g., starting from about 10 -5 seconds and higher), mechanical shutters or flywheel chopper-type devices can be employed. However, electro-optic blocking devices will allow testing a wider range of materials according to the following method. A photon counting system 3044 capable of discretely gating very small time intervals (typically on the order of picoseconds to microseconds) can be used to resolve time-correlated signal counts. For faster time ranges, an optical delay line can be incorporated as described above.

[0321] System 3000 may include an additional electromagnetic radiation source 3060, also referred to as a pump source. In various embodiments, the radiation source 3060 can be a laser that emits a collimated beam 3062 as shown, or an ultraviolet flash lamp that emits divergent or optically collimated pulses 3064. In the case of a laser source, its beam 3062 can be collinear with beam 3012 (e.g., as directed by additional mirrors or prisms, etc.). The wavelength of the light from the radiation source 3060 can be any wavelength between about 80 nanometers and about 1000 nanometers. Compared with longer wavelengths, using shorter wavelengths in this range (e.g., less than about 450 nm) can drive charge excitation with fewer photons and / or lower peak intensities.

[0322] For a flash lamp, the energy per flash or the power level during the flash may depend on the substrate material. For fully depleted silicon-on-insulator (FD-SOI), a total energy of 1 J to 10 kJ per flash of the flash lamp is suitable. However, pulsed or constant ultraviolet sources are also feasible. An important factor in the pump characteristics and applications is: injecting charge carriers into the dielectric of the material to be interrogated. Suitable flash lamp manufacturers include Hellma USA, Inc. and Hamamatsu Photonics K.K.

[0323] When a laser is employed as source 3060, it can be any one of nanosecond, picosecond, femtosecond or faster pulsed laser sources. It can even be a continuous solid-state laser. In various embodiments, the wavelength of the pump source is tunable. Commercially available tunable lasers for selection include the Spectra Physics’ Velocity laser and the Vortex Tunable laser. The LT-22xx series of solid-state lasers from LOTIS Ltd. can provide other tunable solid-state solutions.

[0324] Whether provided in the form of a laser or a flash lamp, the pump source 3060 can be selected for a relatively high average power. The power can be from about 10 mW to about 10 W, but typically from about 100 mW to about 4 W, depending on the material to be interrogated (again, the above considerations are for ensuring that charge carriers are induced to migrate in a manner that injects charge carriers into the interface of the material (e.g., dielectric interface), and the average power can be material-specific. The average power of the pump source 3060 is selected to be below the optical damage threshold of the material. For example, when the interrogated material includes silicon, the average optical power of the pump source 3060 can be selected to be between 1 W and 2 W so as not to exceed the optical damage threshold of silicon.

[0325] The probe laser 3010 can be any one of nanosecond, picosecond, femtosecond or faster pulsed laser sources. Two options for currently commercially available lasers with the required peak power, wavelength and reliability are doped fiber and titanium sapphire units. Coherent's VITESSE and Spectra Physics' MAI TAI lasers are examples of suitable titanium sapphire devices. Femtolasers Gmbh and other manufacturers also produce other relevant titanium sapphire devices. Suitable doped fiber lasers are produced by IMRA, OneFive and Toptica Photonics. Picosecond and / or nanosecond lasers produced by many manufacturers (such as Hamamatsu) can also be selected according to the substrate material and pump type. The laser 3010 can operate in a wavelength range between about 100 nanometers and about 2000 nanometers, and the peak power is between about 10 kilowatts and 1 gigawatt, but the average transmitted power is less than about 150 mW.

[0326] A variety of other optional so-called "intermediate" optical components may be employed in system 3000. For example, system 3000 may include a dichroic reflective or refractive filter 3070 that is used to selectively pass the SHG signal that is coaxial with the reflected radiation directly from laser 3010 and / or source 3060. Alternatively, a prism may be used to separate the weaker SHG signal from the reflected main beam that is many orders of magnitude stronger. However, since the prism method has been shown to be very sensitive to misalignment, the dichroic system as described above may be preferred. Other options include using a diffraction grating or a pellicle beam splitter. A beam 3080 may be provided for focusing and collimating / cylindrical optics. Alternatively, a filter wheel 3090, one or more polarizers 3092, and / or one or more zoom lens 3094 units or components may be used in the system. Additionally, angular (or arc-shaped) rotational adjustments (with corresponding adjustments to the detector) and plug-and-play optical components may be desirable.

[0327] The output from detector 3040 and / or photon counting system 3044 may be input to electronics 3048. Electronics 3048 may be a computing device, a computer, a tablet, a microcontroller, or an FPGA. Electronics 3048 includes a processor, processing electronics, control electronics, processing / control electronics, or electronics that may be configured to execute one or more software modules. In addition to executing an operating system, the processor may also be configured to execute one or more software applications, including: a web browser, a phone application, an email program, or any other software application. Electronics 3048 may implement the methods discussed in the present invention by executing instructions contained in a machine-readable non-transitory storage medium, such as random access memory, read-only memory, electrically erasable programmable read-only memory, etc. Electronics 3048 may include a display device and / or a graphical user interface for interacting with a user. Electronics 3048 may communicate with one or more devices via a network interface. The network interface may include a transmitter, a receiver, and / or a transceiver that may communicate, for example, with a wired Ethernet or a wireless connection.

[0328] Regarding other options, since the SHG signal is weaker compared to the reflected beam that generates the SHG signal, it is desirable to improve the signal-to-noise ratio of the SHG count. As the photon counting gate time of the photon counting system 3044 is reduced due to the blocking and / or delaying processes described herein, making improvements becomes even more important. One method of reducing noise that can be employed is to actively cool the photon counter. This can be achieved by using cryogenic fluids (such as liquid nitrogen or liquid helium) or by using Peltier devices for solid-state cooling. Other aspects that need improvement may include using a Marx Bank circuit (MBC) related to the shutter speed. Additionally, the system 3000 can be incorporated online into a production line environment. Production line elements before or after the system 100 can include any one of an epitaxial growth system, a lithography system, and / or a deposition (CVD, PVD, sputtering, etc.) system.

[0329] In any case, Figure 16A and Figure 16B A view of a first set of dedicated chuck hardware that can be used for the SHG system of the present invention is provided. The chuck 3030 holds the wafer 3020 by vacuum or otherwise in communication therewith. The chuck 3030 is conductive and connected to a power source. Optionally, the capacitive coupling probe 3100 is also connected to the power source 3120. The power source can be computer-controlled, or at least its output is coordinated by the computer due to the timing reasons described above. Similarly, the probe 3100 can be controlled and / or monitored. The probe will be controlled such that it will become part of a capacitive circuit connected to the power source 3120. The probe and the chuck 3030 can be monitored together by a voltmeter to ensure the induced voltage as expected.

[0330] The probe 3100 includes holes 3102 or ports (e.g., having a diameter of 0.2 mm) in its ring 3104 such that the light beams 3012, 3014 (the interrogation beam and the reflected SHG beam) pass through unobstructed, and the probe is fixed relative to the optics such that when scanning the surface of the device, whether the probe moves or stays, it centers the (re)positioned sample site 3022 together with the optics. The coupling device (marked with a positive “+” charge) is positioned close to the surface of the sample device (e.g., within a range of about 1 mm to about 2 mm), but does not contact the surface of the sample device. The coupling device is supported by a cantilever or other structure. The probe 3100 can be configured as the ring 3104 as shown in Figure 16B or the probe can include a larger disk or plate.

[0331] As in Figure 16BIn the example shown in the cross-section, the wafer 3020 or the device surface (including silicon) is separated from the silicon body layer by an SiO2 insulator. Thus, as explained above, since the device surface is additionally (at least substantially) electrically insulated or isolated from the underlying silicon that contacts the conductive chuck 3030, an inductive bias needs to be applied to the device surface.

[0332] Figures 17A to 17C The electromagnetic chuck 3030 is shown in detail, which includes an electric coil 3130 connected to a power supply 3120. In use, the wafer 3020 is positioned and fixed on top of the chuck 3030. When an alternating current (AC) is applied to the coil 3130, an alternating magnetic field is generated through the wafer 3020. On the wafer 3020 that includes its device surface, the magnetic field induces an electric potential. Then, this electric field initiates the various SHG interrogation modes described above, some of which are introduced in detail below. Alternatively, a direct current can be applied to the coil 3130, and the direction of the coil 3130 is parallel to the chuck 3030, so as to generate a constant magnetic field on the chuck for achieving other effects as described above.

[0333] Figure 18A An example AC voltage (V) distribution (sine wave) applied to the substrate body layer over time is shown. Figure 18B An assumed response for the induced voltage between the device and the substrate body layer (V i ) on which the device is fabricated is shown. In various embodiments, the substrate may include a silicon wafer or a portion of a semiconductor material. Figure 19A An example AC voltage (V o ) distribution (square wave) applied to the substrate body layer over time is shown. Figure 19B An assumed response for the induced voltage between the device and the body layer (V i ) is shown. It should be noted that: Figure 18A or Figure 19A The voltage input in either of or may be different from that shown, and may be applied in a stepped, ramped, sine wave, or other form.

[0334] More specifically, regarding Figure 18A and Figure 18B , as described above, in order to minimize noise and obtain statistically relevant SHG intensity metrics, multiple photon counting windows may be desired as a function of the voltage at the interface. For this purpose, the example points A1 and A2 are timed such that the voltage (voltage A) between the body layer and the device layer is the same at these two points. The same is true for the example points B1 and B2 with voltage B, and the example points C1 and C2 with voltage C. Taking voltage A as an example, SHG is recorded, and the count at point A1 can be added to the count at point A2, and then, according to the required measurement time, to the points A3, A4, A n ​​The counts at... are added together. Then, the total count measured during this period is divided by the time of this "gating" as a method of calculating the average count per second, such that the SHG intensity can be plotted as a function of the bulk-device voltage A. Depending on the desired measurement time, points B1, B2, and B3, B4, B in any arbitrarily long sequence can be obtained using the same method. n ... the measured value of voltage B. Then, the total count measured during this period is divided by the time of this "gating" as a method of calculating the average count per second, such that the SHG intensity can be plotted as a function of the bulk-device voltage B. Similarly, depending on the desired measurement time, points C1, C2, and C3, C4, C in any arbitrarily long sequence can be obtained using this method. n ... the measured value of voltage C. Then, the total count measured during this period is divided by the time of this "gating" as a method of calculating the average count per second, such that the SHG intensity can be plotted as a function of the bulk-device voltage C. More detailed information regarding the utility of the SHG intensity as a function of the bias voltage can be found in the DC bias literature, one example of which is "Charge Trapping in Irradiated SOI Wafers Measured by Second Harmonic Generation" in Volume 51, Issue 6 of "IEEE Transactions on Nuclear Science" published in December 2004 and "Optical probing of a silicon integrated circuit using electric-field-induced second-harmonic generation" in "Applied Physics Letters" 88, 114107, (2006), each of which publications is incorporated herein by reference in its entirety.

[0335] More specifically, regarding Figure 19A and Figure 19B, these diagrams illustrate examples for interrogating silicon-on-insulator (SOI) devices. In this example, the conductive chuck starts in a "neutral" grounded state, and the bulk layer and the device layer are at an equilibrium potential. At time "A", the voltage applied to the chuck changes rapidly, and this voltage is applied to the conductive bulk layer of the sample. Since the device layer of the sample is separated from the bulk by a thin buried oxide layer and is not directly connected to a conductor, an electric potential field or voltage is induced between this device layer and the bulk layer. Between time "A" and time "B", the voltage applied to the chuck remains unchanged. Due to the imperfect dielectric between the bulk layer and the device layer, the induced electric potential drives the leakage current between the layers, causing the electric potential between the bulk layer and the device layer to return to its natural state. Then, the spikes and decays in the electric field are monitored by SHG to observe the leakage current. At time "B", the voltage applied to the chuck returns to ground, causing the voltage at the interface to reverse.

[0336] The systems and methods described herein can be used to characterize a sample (e.g., a semiconductor wafer or a portion thereof). For example, as discussed above, the systems and methods described herein can be used to detect defects or contaminants in a sample. The systems and methods described herein can be configured to characterize a sample during the manufacture or production of a semiconductor wafer. Thus, the systems and methods can be used along a semiconductor manufacturing line in a semiconductor manufacturing facility. The systems and methods described herein can be integrated with a semiconductor manufacturing / production line. The systems and methods described herein can be integrated into a semiconductor production line having an automatic wafer handling capability. For example, the system can be equipped with an attached Equipment Front End Module (EFEM). This module can receive a wafer cassette, such as a Front Opening Unified Pod (FOUP). Each cassette can be transported to the machine by an operator or a cassette automated guided vehicle, and these vehicles transport the cassettes from one process to another along the manufacturing / production line.

[0337] In various embodiments, the system can be configured such that once the cassette is mounted on the EFEM, the FOUP is opened, the robotic arm selects individual wafers from the FOUP, moves them through an automatic drive gate in the system, into an opaque processing cassette, and then moves them onto a vacuum chuck having a biasing function. The chuck can be designed to complementarily cooperate with the robotic arm so that it can place the sample on top of the chuck. At some point during this process, the wafer can be fixed above a scanner to identify its unique laser mark.

[0338] Thus, a system configured to be integrated in a semiconductor manufacturing / assembly line can have: automatic wafer handling capabilities from a FOUP or other types of cassettes; integration with an EFEM as discussed above, a chuck designed to be compatible with robot operations, an automatic light-tight door that can be opened and closed to allow movement of a robotic rod / arm, and software that sends signaling to the EFEM for wafer loading / unloading and wafer identification.

[0339] Patterned Wafer Evaluation

[0340] The most well-known method (BKM) for wafer interrogation developed for unpatterned wafers may not be applicable to many patterned wafers. For example, many characteristics of second harmonic generation (SHG), the response of an unpatterned or blank wafer, are understood and can generally be regarded as a one-dimensional model. However, the SHG response for interrogating a patterned wafer using a similar method can be highly dependent on the geometry of the pattern. Thus, to address this issue, different interrogation methods can be used for specific pattern geometries. By varying a set of interrogation conditions over a patterned wafer area and measuring the SHG response, these interrogation methods can be determined. For example, a wafer can include multiple regions with different pattern geometries. For different regions with different pattern geometries, the interrogation conditions used may be different.

[0341] Figure 20 A schematic diagram showing example components that can be used to set conditions for wafer interrogation is shown. As shown, a system 4000 for interrogating a wafer 4120 can include: a light source 4110, polarization optics (such as a polarizer) 4112, focusing optics (such as a focusing lens) 4114, a rotary stage 4116, a translation stage 4118, collection optics (such as collimating optics) 4124, polarization optics (such as polarization filtering optics or a polarizer) 4122, a spectral filter 4126, and a detector 4130. In the illustrated configuration, the light source 4110, polarization optics (such as a polarizer) 4112, and focusing optics (such as a focusing lens) 4114 are located in a first optical path for guiding light to a sample (such as a wafer); the collection optics (such as collimating optics) 4124, polarization optics (such as polarization filtering optics or a polarizer) 4122, a spectral filter 4126, and a detector 4130 are located in a second optical path for light reflected from the sample.

[0342] When using system 4000, input light 4132 can be emitted from light source 4110. Light source 4110 can include a laser source or other electromagnetic radiation source. For example, light source 4110 can be a laser such as a pulsed laser, such as a nanosecond laser, picosecond laser, femtosecond laser, or continuous laser. In various embodiments, the laser includes a solid-state laser. In another example, light source 4110 can be a lamp for emitting divergent light or optically collimated light. Light source 4110 can emit light 4130 with any wavelength value. For example, light source 4110 can emit light 4130 with a wavelength between 80 nm and 1000 nm.

[0343] Using polarization optics 4112, system 4000 can polarize input light 4132. Polarization optics 4112 can include one or more polarizers to change the polarization state of input light 4132. In some embodiments, light source 4110 can output polarized light, such as linearly polarized light. Polarization optics 4112 can include any type of suitable one or more polarizers for changing the polarization state of input light 4132. For example, the polarization optics can include an absorptive polarizer that can linearly polarize input light 4132. In some embodiments, polarization optics 4112 can include polarization control optics configured to change the polarization state, for example, change the direction of linearly polarized light (e.g., change from vertical polarization to horizontal polarization). In some embodiments, for example, for light incident on a sample, polarization optics 4112 provides linearly polarized light with a specific angle θ 1 of. Polarization optics 4112 can change the polarization state, for example, change the linear polarization direction θ of input light 4132 relative to wafer 4120, a region of wafer 4120, or a pattern on wafer 4120 1 . For example, polarization optics 4112 can generate S-polarized light with respect to the pattern on wafer 4120. In various embodiments, one or more hardware processors can control polarization optics 4112 to change the polarization state of input light 4132.

[0344] Using focusing optics 4114, system 4000 can focus input light 4132. Focusing optics 4114 can include any suitable focusing optics for focusing input light 4132 onto region 4136 of wafer 4120. For example, focusing optics 4114 can include one or more focusing lenses that can focus input light 4132 onto region 4136 of wafer 4120. The system can include collection optics that collect light reflected from the sample. For example, the collection optics can include one or more lenses or mirrors that are arranged to receive SHG light from the sample.

[0345] In some embodiments, the acquisition optics 4124 includes collimating optics for collecting SHG light from the sample. The collimating optics 4124 can include any suitable collimating optics for collimating the output light 4134 received from the wafer 4120. For example, the collimating optics 4124 can include one or more collimators, such as collimating lenses. For example, such a collimating lens can have a focal length f and be positioned at a distance from the sample corresponding to the focal length f. Other configurations are possible.

[0346] The system 4000 can use polarization optics 4122 to direct light having specific polarization characteristics (e.g., having a specific polarization state) to the detector 4130. For example, the polarization optics 4122 can include a polarization filter or polarizer configured to select and pass a specific polarization state of the output light 4134. The polarization optics 4122 can include any suitable type of polarizer. For example, the polarization optics 4122 can include an absorptive polarizer capable of selectively transmitting linearly polarized light. For example, control electronics, which can include one or more hardware processors, can control the polarization optics 4122 to change the polarization state selected from the output light 4134. For example, the polarizer 4122 can be configured to select and transmit linearly polarized light having a specific angle θ 2 by rotation. The control electronics can be configured to change the angle of the selected linearly polarized light, e.g., by rotating the polarizer 4122 for selective transmission.

[0347] The system 4000 can include other optional optical elements. For example, the system 4000 can include a spectral filter 4126 to select light having a specific wavelength. For example, the filter 4126 can be a bandpass filter, a high-pass filter, or a low-pass filter. For example, the filter 4126 can selectively transmit light having a specific wavelength or a specific wavelength range.

[0348] The system 4000 can include a detector 4130. The detector can be any one of a photomultiplier tube, an avalanche detector, a photodiode detector, a streak camera, and a silicon detector. The detector 4130 can detect the output light 4134, which can include an SHG signal.

[0349] The wafer 4120 can be held in place using a sample stage 4140, which may include a chuck. The sample stage or chuck 4140 may include a rotating stage 4120 and a translation stage 4118, which can position the wafer 4120 to move on the plane where the wafer is located. For example, the rotating stage 4120 can rotate the wafer 4120 about an axis 4128 relative to the wafer area 4136. The translation stage can change the x, y positions of the wafer 4120. The rotating stage 4120 and the translation stage 4118 can be controlled by control electronics, which may include, for example, one or more hardware processors.

[0350] The wafer 4120 can be a patterned wafer. The wafer 4120 can have multiple regions. Different regions on the wafer can have different patterns. For example, different regions can have different pattern orientations relative to a coordinate system, the origin of which is at a determined point of the system 4000 or the wafer 4120. For example, the determined origin can be the center point of the wafer 4120. In another example, the determined origin can be the center point of the sample stage or chuck 4140, or another point of the system 4000. The coordinate system can be a Cartesian coordinate system, a polar coordinate system, or other suitable coordinate system. The pattern orientation can be the orientation of one or more features of the pattern in the region 4136 relative to the direction of the determined origin. In some examples, the region 4136 of the wafer 4120 can include a trench pattern. The trench pattern can be oriented such that its length is parallel or at an oblique angle to the coordinate axes of the coordinate system with the center of the wafer 4120 as the origin.

[0351] Figure 21 A schematic diagram shows an example region of the wafer 4120 being evaluated. The wafer 4120 can include a pattern 4150, which can have pattern features 4152 (as shown by the inset pattern 4151). Input light 4132 can be incident on the wafer 4120 at a position 4136 of the wafer, which can include the pattern 4150, and particularly include the pattern features 4152, to form output light 4134. The input light 4132 can form an azimuth angle 4164 between the incident plane 4162 and the wafer 4120 (e.g., in the direction of the pattern 4150 or the pattern features 4152). For example, the pattern features 4152 can be oriented relative to the axis of the wafer 4120 (as described above) or other references. In one example, for instance, the pattern features 4152 can be trench walls, the length direction of which is oriented along a line 4160 parallel to the coordinate axes of the coordinate system with the origin at the center of the wafer 4120. The incident plane 4162 of the input light 4132 can form an angle φ4164 relative to the line 4160. By rotating the wafer 4120 azimuthally about the axis 4128, this angle φ4164 can be changed. In some embodiments, the axis 4128 passes through the point where the beam is incident on the wafer. For example, by Figure 21The rotating stage 4116 therein can complete the rotation action. In some arrangements, the axis 4128 passing through the point where the light beam is incident on the wafer extends through the rotation center of the rotating stage.

[0352] The azimuth angle φ4164 that can enhance the SHG signal or improve the signal-to-noise ratio of the SHG signal can be determined. Similarly, other parameters can be adjusted to provide an enhanced SHG signal or an improved signal-to-noise ratio for the SHG signal. For example, the polarization of the input light beam (such as the polarization angle of a linearly polarized input light beam) can be changed to enhance the SHG signal or improve the signal-to-noise ratio of the SHG signal. Similarly, the polarization of the light collected and guided to the detector (such as the polarization angle of a polarization filter) can be changed to enhance the SHG signal or improve the signal-to-noise ratio of the SHG signal. Any one parameter or combination of parameters among these can be changed, and these parameters can be adjusted for other reasons in addition to increasing the SHG signal or the signal-to-noise ratio of the SHG signal. For example, for different patterns on the wafer, these parameters can be changed in different ways to enhance the SHG signal or improve the signal-to-noise ratio of the SHG signal. For example, for one type of pattern, a larger SHG signal or signal-to-noise ratio can be obtained when the system is set to be in the first azimuth direction; while for another type of pattern, a larger SHG signal or signal-to-noise ratio can be generated when the system is set to be in the second different azimuth direction. Similarly, for one type of pattern, for example, when the input light beam is set to have polarization P1 or polarization angle θ 1 a larger SHG signal or signal-to-noise ratio can be obtained; while when the input light beam is set to have a different polarization P1 or a different polarization angle θ 1 a larger SHG signal or signal-to-noise ratio can be generated for another type of pattern. Similarly, for one type of pattern, for example, when the polarization is P2 or the polarization angle is θ 2 a larger SHG signal or signal-to-noise ratio can be obtained; while when the different polarization is P2 or the different polarization angle is θ 2 a larger SHG signal or signal-to-noise ratio can be generated for another type of pattern. Therefore, by changing the conditions for interrogating the sample (such as the input polarization P1, output polarization P2, and azimuth angle φ4164 of the incident light beam), the quality of the measured signal, such as the intensity of the SHG signal, the signal-to-noise ratio of the SHG signal, or another metric, can be improved.

[0353] Since the parameter values for generating an enhanced SHG signal or an improved signal-to-noise ratio may be different for different patterns 4120, the system can be configured to adjust parameters (such as one or more of P1, P2, φ) for different positions of different patterns on the wafer. The ability to vary the parameters for different patterns will provide increased and / or improved signals and / or results or measurements. These patterns can be replicated on the wafer, and the determined parameters for a particular pattern can be used for other identical patterns. Similarly, these patterns can be replicated on different wafers, and the determined parameters for a particular pattern can be used for other identical patterns on different wafers.

[0354] Figure 22 An exemplary determination process 4200 for setting wafer interrogation conditions is shown. Process 4200 may include a determination block 4210, a scan block 4212, a condition block 4214, and an end block 4216.

[0355] In block 4210, a control electronics (such as one or more hardware processors) can set the scan or interrogation conditions. The scan or interrogation conditions may include the input (or excitation) polarization state P1, the output polarization state P2, and the azimuth angle φ4162 (as described above). The input polarization state P1 may be the polarization state associated with the input light 4132, such as the polarization angle of the incident light beam as discussed above. The input polarization state can be determined by the direction of the polarization optics 4112 (such as the direction of a linear polarizer), and the input polarization state can be changed by rotating the polarizer. The direction of the polarization optics 4112 can be controlled by the control electronics (such as one or more hardware processors), for example, by rotating the stage that holds the polarization optics element (such as a linear polarizer). The output polarization state P2 may be the polarization state associated with the light 4134 that is collected and directed to the detector 4130. For example, the polarization state may correspond to the polarization angle of linearly polarized light. The output polarization state can be determined by the direction of the polarization optics 4122, which may include a linear polarizer or polarization filter that selects a particular polarization or the direction of linearly polarized light. The direction of the polarization optics 4122 (such as a linear polarizer) can be controlled by the control electronics (which may include one or more hardware processors), for example, by rotating the stage 4122 that holds the polarization optics element (such as a linear polarizer). The azimuth angle 4162 can be determined by the wafer position. The wafer position can be determined by rotating the stage 4116 and translating the stage 4118. The rotating stage 4116 and the translating stage 4118 can be controlled by the control electronics, for example, the control electronics includes one or more hardware processors.

[0356] At block 4212, system 4000 may scan the wafer being evaluated. Using the interrogation conditions determined at block 4210, system 4000 may scan the wafer. System 4000 may scan a portion of wafer 4120. For example, system 4000 may scan only region 4136 of wafer 4120. As part of the scan, system 4000 may measure the SHG response signal. By processing the output light 4134, the SHG response signal may be determined by control electronics including, for example, one or more hardware processors.

[0357] At block 4214, system 4000 may determine whether the SHG response signal meets a condition. In some examples, the condition may be: whether the SHG signal meets an intensity threshold. The intensity threshold may correspond to an SHG signal intensity value that is large enough for determining the SHG signal characteristics. For example, the SHG response signal may be weak relative to the output light 4134. The intensity threshold may correspond to the intensity of the SHG signal associated with a reduced signal-to-noise ratio (or the ratio of the SHG response signal to the output light 4134). If the SHG signal exceeds the threshold, system 4000 may finalize the interrogation conditions at block 4216. If the SHG signal does not exceed the threshold, system 4000 may return to block 4120. This process may be repeated multiple times until the signal is considered to meet the condition (e.g., the SHG has a strong enough signal or a high enough signal-to-noise ratio) to end the scan setup. In some cases, this process may be repeated 3, 4, 5, 6, 7, 8, 9, 10, 15, 20, 25 or more times, or any value within any range composed of these values, such as 3 to 25, 4 to 25, 5 to 25, 5 to 20, 6 to 25, 6 to 20, etc.

[0358] In some examples, the condition can be whether the SHG signal is enhanced relative to one or more previously measured SHG signals. For example, system 4000 can perform a first scan of wafer 4120 at region 4136 using an initial interrogation condition (or scan setup) to generate a baseline SHG signal. Then, system 4000 can update the interrogation condition to be different from the initial interrogation condition and scan the same region 4136 of wafer 4120. At block 4214, system 4000 can compare the SHG signal obtained from the second scan with the SHG signal obtained from the first scan. If the SHG signal obtained from the second scan is greater than the SHG signal obtained from the initial scan, the system can finalize the interrogation condition, i.e., block 4216. If the SHG signal obtained from the second scan is less than the SHG signal obtained from the initial scan, system 400 can return to block 4120. Alternatively, the process of evaluating different parameters for a given region or pattern can continue until a maximum value or a value close enough to the maximum value is obtained. In some embodiments, for example, for different parameters, the SHG signal, signal-to-noise ratio, or other values can be monitored. If a peak can be identified, the parameter associated with that peak can be selected.

[0359] System 4000 can use other methods and processes to determine the interrogation condition. For example, system 4000 can use any suitable optimization technique, sorting algorithm, machine learning, or other suitable method to determine the interrogation condition that enhances the SHG signal.

[0360] For multiple regions 4136 on wafer 4120, system 4000 can execute process 4200. For example, system 4000 can execute process 4200 for different patterns located in different regions 4136 on wafer 4120. Different parameter values can be determined to enhance the SHG signal or reduce the signal-to-noise ratio, or different parameter values can be selected for different patterns at different locations. These parameters can be reused for similar or identical patterns located at different positions on the wafer. Similarly, the selected parameters (such as to increase the SHG signal or improve the signal-to-noise ratio, etc.) can be reused for similar or identical patterns located on different wafers (which may be located at the same position on the wafer or at different positions on the wafer).

[0361] Thus, in various embodiments, by appropriately selecting the scanning conditions (P1, P2, φ), the signal from a selected region of interest in a specific pattern structure can be enhanced or suppressed. For example, the azimuth angle φ can be selected such that the region of interest (e.g., light is not blocked by a specific pattern structure) can be optically accessed without creating a shadow effect. For example, when the bottom of a trench is to be evaluated, the plane of incidence can be placed along the trench direction such that the top of the pattern does not block the laser beam and the SHG signal. Additionally, for example, the polarization state of light can be perpendicular to the interface being evaluated to enhance the signal from that interface region, which is controlled by the boundary conditions of the local light field distribution.

[0362] Thus, in some embodiments, wafers with different conditions can be evaluated. The wafers can be scanned using specific scanning settings (P1, P2, φ). For example, the SHG signal can be evaluated to determine whether an enhanced signal, a peak in the signal, a maximum in the signal, whether a reduced signal-to-noise ratio is obtained, whether signal-to-noise ratio minimization is achieved, or other objectives are met. If so, the final optical settings (P1, P2, φ) for that production recipe can be set accordingly. If not, one, more, or all of the optical settings (P1, P2, φ) can be changed. The wafers can be scanned using these optical settings (P1, P2, φ). For example, the SHG signal can be evaluated to determine whether an enhanced signal, a peak in the signal, a maximum in the signal, whether a reduced signal-to-noise ratio is obtained, whether signal-to-noise ratio minimization is achieved, or other objectives are met. If so, the final optical settings (P1, P2, φ) for that production recipe can be set accordingly. However, if not, one, more, or all of the optical settings (P1, P2, φ) can be changed, and the wafers can be scanned using those optical settings (P1, P2, φ). This cycle can be repeated until the desired objective is achieved. For example, if the evaluation of the SHG signal determines that the SHG signal meets the desired criteria, such as obtaining an enhanced signal, whether a peak in the signal is obtained, a maximum in the signal, whether a reduced signal-to-noise ratio is obtained, whether signal-to-noise ratio minimization is achieved, or other objectives, the cycle can be exited. If so, the final optical settings (P1, P2, φ) for that production recipe can be set accordingly. However, many other methods can also be used.

[0363] Parameter Modeling of SHG Measurements for Determining Interface Electrical Characteristics

[0364] Various parameters obtained by SHG measurement of a sample (e.g., a semiconductor wafer) can be used to characterize the sample. For example, parameters obtained by SHG measurement of a sample including an interface region can be used to determine the interface electrical properties. The parameter modeling of SHG measurement and the quantitative correlation with various properties of the sample (including but not limited to: interface electrical properties) can be used for non-destructive and rapid inspection of samples in high-volume semiconductor manufacturing.

[0365] Figure 23 shows the time - dependent SHG signal obtained from a sample including an interface region. The interface region may include a semiconductor - oxide junction, a metal - semiconductor junction, a metal - oxide junction, and / or a junction between two semiconductor materials having different compositions and / or doping concentrations. The SHG signal can be obtained by the above - mentioned pump / probe system. For example, by focusing the probe beam on one or more regions of the interface region and turning the pump beam on / off, the SHG signal can be generated. As another example, by exposing the sample to the pump beam and turning the probe beam focused on one or more regions of the interface region on / off, the SHG signal can be generated. By turning the shutter on / off (such as the mechanical shutter or optical shutter described above), the pump beam and the probe beam can be turned on / off. In some embodiments as described above, a single beam is used for pumping and as a probe. Other methods can be used to modulate the light incident on the sample. Thus, the SHG signal will be generated and the signal will increase over time. As Figure 23 shown, for example, the intensity of the SHG signal increases from an initial intensity (I 0 )23101 to a final intensity (I f )23103 over time. In various embodiments, the intensity of the SHG signal can stabilize (or saturate) near the final intensity (I f )23103. In some other embodiments, the SHG measurement can be stopped (e.g., by turning the probe beam on / off) before the intensity reaches the saturation level (or maximum intensity). In these embodiments, the final intensity (I f )23103 can be less than the maximum intensity or saturation intensity.

[0366] The increase in the SHG signal (e.g., the rate of increase of the SHG signal) can be related to the physical parameters of the sample under test (e.g., the interface electrical properties). For example, the ratio (%Δ) of the time - dependent (TD) SHG signal intensity given by (I f - I o ) / I o can be proportional to the change in the number of charges trapped in the interface region over time. The initial intensity (I 0 ) and the ratio of the time - dependent (TD) SHG signal intensity can provide information about various characteristics of the interface region. For example, the initial intensity (I0) can provide a snapshot of the electric field distribution in the equilibrium state (e.g., quasi - equilibrium state). As another example, the ratio of the time - dependent (TD) SHG signal intensity (e.g., (I f - I o ) / I o) can provide information about charge transport, including but not limited to: changes in laser-induced charge density and / or charge injection rate. The initial intensity (I 0 ) can be used to determine the interfacial charge density (D it ), the oxide charge density when the interfacial region includes a metal-oxide junction or a semiconductor-oxide junction, the interfacial bonding state, or a combination thereof. The ratio of the time-dependent (TD) SHG signal intensity can be used to determine various properties of the oxide when the interfacial region includes a metal-oxide junction or a semiconductor-oxide junction, including but not limited to: the thickness of the oxide layer, the bulk trap density in the oxide layer. In some embodiments, the ratio of the time-dependent (TD) SHG signal intensity can be used to determine various surface properties of the sample.

[0367] As described above, time-dependent (TD) SHG signals can be obtained at different locations of a single sample, and the information obtained from the time-dependent (TD) SHG signals can be used to determine changes in sample properties and / or local defects. As described above, using the information obtained from the time-dependent (TD) SHG signals, different samples can be characterized. Different samples can be processed using different processing methods / techniques. In this way, the information obtained from the time-dependent (TD) SHG signals can be used to characterize various processing techniques.

[0368] Test structure for online detection of process-induced charging via SHG

[0369] The fabrication of semiconductor devices includes many processing steps. Some processing steps use plasma. Plasma processing can induce charge accumulation in various parts of the semiconductor device and / or cause damage to various parts of the semiconductor device. For example, consider an integrated circuit including a semiconductor device 24000 (such as a transistor or MOSFET), the semiconductor device 24000 including a layered semiconductor-oxide junction formed by a semiconductor material layer 24101 and an oxide material layer 24103, as Figure 24 shown. The semiconductor device 24000 also includes a metal gate 24105 disposed above the oxide material layer 24103. Through holes or interconnects 24107 can be provided through various other layers of the semiconductor device 24000 such that the metal gate 24105 is in electrical contact with electrical contacts, wires, or other conductive surfaces on the surface of the integrated circuit. The metal gate 24105 can include a metal (such as tungsten). The integrated circuit can include additional metal layers 24109 and 24113 configured to serve as electrical contact layers for other layers of the integrated circuit and as through holes or interconnects 24111 that electrically contact the electrical contacts on the surface of the integrated circuit. Figure 24AShows a cross-section of semiconductor device 24000 taken along axis A-A. Various embodiments of semiconductor device 24000 may include a barrier layer 24115 located between metal gates 24105 and 24103, as Figure 24A shown. The barrier layer 24115 may be configured to prevent or reduce the diffusion of metal from metal gate 24105 to oxide layer 24103. In various embodiments, the barrier layer 24115 may include titanium nitride TiN. The thickness of the barrier layer 24115 may be between about 1 nanometer and about 5 nanometers. In various embodiments, the metal gate 24115 and via or interconnect 24107 may be surrounded by an interlayer dielectric (ILD) material for isolating the metal gate 24105 and via or interconnect 24107 from other conductive layers (such as metal lines or other metals or conductive features) of semiconductor device 24000.

[0370] A plasma processing step 24117 (such as a later plasma processing) in the downstream manufacturing of semiconductor device 24000 may cause charge to accumulate at the junction between semiconductor material layer 24101 and oxide material layer 24103. The plasma processing step 24117 in the downstream manufacturing of semiconductor device 24000 may also damage the oxide material layer 24103. Although high-quality metal gates are deposited, it will also reduce the reliability of semiconductor device 24000. Conducting an electrical test after the manufacturing of semiconductor device 24000 is completed can provide a comprehensive characterization of semiconductor device 24000. However, this test will increase the manufacturing cycle time, which is equivalent to the time required from wafer input to probe test. Increasing the manufacturing cycle time will delay the detection of process defects (such as defects caused by downstream plasma processing).

[0371] As described above, SHG can be used to characterize the electrical properties of the interface region (e.g., the junction between the oxide layer 24103 and the semiconductor layer 24101). In addition, SHG metrology measurements can be obtained within a few minutes. Thus, the SHG metrology systems and methods discussed herein can be used to determine the electrical properties of the interface region, e.g., after a downstream plasma processing step, to identify charge accumulation in the junction between the oxide layer 24103 and the semiconductor layer 24101 caused by the downstream plasma processing and / or damage to the oxide layer 24103 due to the downstream plasma processing. However, the metal gate 24105 of the semiconductor device 24000 is typically opaque. Thus, in various embodiments, it may not be practical to optically access the junction between the oxide layer 24103 and the semiconductor layer 24101 using the pump beam and the probe beam of the SHG metrology system described herein. Various features on the layer above the junction may block the pump beam and / or the probe beam from reaching the junction, especially when the junction is beneath 1, 2, 3, 4, 5, 6 or more layers, e.g., these layers may have metal features such as metal lines. These features may be opaque or may at least attenuate the light.

[0372] This application contemplates various test structures to which the SHG metrology techniques described herein can be applied to determine process-induced charge accumulation and / or damage to the oxide layer in the junction between the oxide layer and the semiconductor layer due to downstream plasma processing. During or after the fabrication of a semiconductor device, it can be determined in-line: process-induced charge accumulation in the junction between the oxide layer and the semiconductor layer and / or damage to the oxide layer due to downstream plasma processing. In semiconductor manufacturing technology, multiple functional devices are fabricated simultaneously on a semiconductor wafer. The multiple functional devices may be spaced apart from each other by a space, which is also referred to as the non-functional portion of the semiconductor wafer. Since the real estate on the semiconductor wafer is very valuable, the space between two functional devices is typically small. For example, the space dimension between two functional devices may be small enough such that the semiconductor wafer can be diced or cut into multiple individual die, the die including the functional semiconductor devices, using a saw. In various embodiments, the space between two functional devices on the semiconductor wafer may be referred to as a scribe line. The various test structures contemplated in this application may have a small enough size such that these test structures can be fabricated in the space between two functional devices, thus saving valuable real estate on the semiconductor wafer. In addition, since the test structures are fabricated on the same semiconductor wafer as the functional devices simultaneously, the test structures undergo the same process flow as the functional devices. Thus, it is expected that the test structures will exhibit the same process-induced defects as the functional devices.

[0373] Figure 25AShows an embodiment of a first test structure 25000a fabricated in the space between two functional devices. One or both of the functional devices may be the same as the functional device 24000 discussed above. The first test structure 25000a includes: a semiconductor layer 25101, an oxide layer 25103, a barrier layer 25115, and a via or interconnect 25107, which is substantially similar or identical to the corresponding layers 24101, 24103, 24115, and 24107 of the semiconductor device 24000. The barrier layer 25115 and the via or interconnect 25107 may be surrounded by an interlayer dielectric material 25119, which is substantially similar or identical to the ILD 24119 of the semiconductor device 24000. The first test structure 25000a does not include a metal gate similar to the metal gate 24105 of the semiconductor device 24000. Thus, the interconnect 25107 electrically connects the oxide layer 25103 to a conductive region 25117, which is disposed on the top surface of the interlayer dielectric material 25119. The top surface of the interlayer dielectric material 25119 and the conductive region 25117 are so placed that plasma processing can charge them. For example, the conductive region 25117 may be exposed to the surrounding environment such that the conductive region 25117 is exposed to plasma charging. The oxide layer 25103 of the first test structure 25000a is electrically connected to the conductive region 25117 through the interconnect 25107 such that plasma charging of the conductive region 25117 results in charging of the oxide layer 25103 of the first test structure. As described above, a metal gate electrode can be excluded from the first test structure 25000a such that light (e.g., a pump beam and / or a probe beam) can be incident on the junction. Similarly, the first test structure 25000a can be positioned such that a direct optical path to and from the first test structure 25000a is provided such that light (e.g., a pump beam and / or a probe beam) from an SHG metrology system can be incident on the first test structure 25000a and thus the SHG light generated from the first test structure 25000a can reach the probe in the SHG metrology system. Similarly, the first test structure 25000a can be positioned such that other structures above the first test structure 25000a do not block light (e.g., light from a pump beam and / or a probe beam) from reaching the first test structure 25000a. For example, the interconnect 25107 can be such that light (e.g., a pump beam and / or a probe beam) from an SHG metrology system can be incident on the interface region between the oxide layer 25103 and the semiconductor layer 25101 of the first test structure 25000a and thus the SHG light generated from the interface region can reach the detector in the SHG metrology system.In addition, the blocking layer 25115 can be thin enough (e.g., having a thickness between about 1 nanometer and about 5 nanometers) to transmit the probe light and / or pump light 25109 from the above-mentioned SHG metrology system, such that the probe light and / or pump light 25109 is incident on the junction between the semiconductor layer 25101 and the oxide layer 25103. The SHG light from the first test structure 25000a can be detected and analyzed to determine the electrical characteristics of the junction between the semiconductor layer 25101 and the oxide layer 25103.

[0374] The first test structure 25000a can be fabricated simultaneously with the semiconductor device 24000. The design and process flow for fabricating the first test structure 25000a and the semiconductor device 24000 can be the same except for the step of depositing the metal gate 24105, which is omitted in the design and process flow of the first test structure 25000a. Thus, due to plasma charging of other conductive features (e.g., the conductive region 25117 or other metal features above the first test structure 25000a) electrically connected to the first test structure, it is expected that the first test structure 25000a exhibits process-induced defects and / or charge accumulation similar to those of the semiconductor device 24000. Additionally, the first test structure 25000a is not configured as a functional semiconductor device. For example, the first test structure 25000a is not configured as a bipolar junction transistor, a metal oxide semiconductor field effect transistor (MOSFET), or a metal semiconductor field effect transistor (MESFET). Thus, the first test structure 25000a is not configured to be used as a switch, an amplifier, a rectifier, an operational amplifier, or a combination thereof. Moreover, since the first test structure 25000a is fabricated in the space between two functional semiconductor devices (e.g., in the scribe line), the first test structure 25000a may not be connected to or be a part of an electronic circuit (e.g., an integrated circuit).

[0375] Figure 25BAn embodiment of a second test structure 25000b fabricated in the space between two functional devices of a semiconductor wafer is shown. The second test structure 25000b is similar to the first test structure 25000a, but does not include the interconnect 25107. The second test structure 25000b is also not configured as a functional semiconductor device. For example, the second test structure 25000b is not configured as a bipolar junction transistor, a metal-oxide-semiconductor field-effect transistor (MOSFET), or a metal-semiconductor field-effect transistor (MESFET). Thus, the second test structure 25000b is not configured to be used as a switch, an amplifier, a rectifier, an operational amplifier, or a combination thereof. Additionally, since the second test structure 25000b is fabricated in the space between two functional semiconductor devices (e.g., in a scribe line), the second test structure 25000b may not be connected to or be a part of an electronic circuit (e.g., an integrated circuit). As described below, the second test structure 25000b can be used to determine the contribution of interface charging rather than plasma charging to the SHG signal. The first structure 25000a may be referred to as a test point, and the second test structure 25000b may be referred to as a floating / reference test point.

[0376] Figure 26A and Figure 26BSchematically shows the three-dimensional (3D) layout of a first test structure 25000a and a second test structure 25000b. Downstream plasma processing can induce charges 26101 on the surface of the first test structure 25000a exposed to the surrounding environment. For example, charges can be induced on the conductive region 25117 on the top surface of the interlayer dielectric (ILD) 25119 exposed to the environment. Process-induced charges can cause current to flow through the vias or interconnects 25107 of the first test structure 25000a, which can cause charges 26103 to accumulate in the interface region of the first test structure 25000a. SHG metrology as described above can be used to characterize the accumulation of charges in the interface region and its effect on the materials in the interface region. As described above, the first test structure 25000a can be positioned to provide a direct optical path to and from the first test structure 25000a such that light (e.g., pump beam and / or probe beam) from the SHG metrology system can be incident on the first test structure 25000a and the SHG light generated therefrom can reach the probe in the SHG metrology system. Thus, the pump beam and / or probe beam 25109 emitted by the SHG metrology system described herein can be focused on the interface region. Without relying on any particular theory, process-induced charging of the interface region and / or any resulting damage is generally located near the vias or interconnects 25107. Thus, in various embodiments, the pump beam and / or probe beam 25109 can be focused on a portion of the interface region surrounding the vias or interconnects 25107. In various embodiments, the spot size of the pump beam and / or probe beam 25109 can be approximately 30 microns, although the spot size can be larger or smaller, e.g., 20 microns to 40 microns, or a size outside of this range. The SHG light 25111 from the first test structure 25000a is detected and analyzed using the detection system of the SHG metrology system discussed herein to determine the characteristics of the interface region. The SHG light 25111 includes contributions from process-induced charging and / or damage to the interface region, as well as contributions from the interlayer dielectric material 25119 and other geometric effects. To isolate the contribution of process-induced charging and / or damage to the interface region, the SHG signal 25113 from the second test structure 25000b is used. The second test structure 25000b does not include vias or interconnects 25107 and does not exhibit process-induced charging of the interface region and / or damage to the interface region. Thus, the SHG signal 25113 from the second test structure 25000b includes contributions from the interlayer dielectric material 25119 and other geometric effects, but does not include contributions from plasma charging. The difference between the SHG signal 25111 from the first test structure 25000a and the SHG signal 25113 from the second test structure 25000b isolates the effect of process-induced charging and / or damage to the interface region.Therefore, by analyzing the characteristics of the differential signal obtained by subtracting the SHG signal 25113 from the SHG signal 25111, it can be determined that the change in the electrical characteristics of the interface region is caused by process-induced charging of the oxide layer of the interface layer and / or damage to the oxide layer of the interface layer. The characteristics of the differential signal obtained by subtracting the SHG signal 25113 from the SHG signal 25111 can also be associated with the interface electrical characteristics formed due to self-normalization.

[0377] The various test structures discussed above advantageously facilitate the optical detection of changes in the interface electrical characteristics on the gate dielectric due to process-induced charging effects. The various test structures can be compatible with the fabrication of most MOSFET-based semiconductor devices and can be included in a scribe test point design kit for on-line control and monitoring of plasma-related processes of production wafers or short-loop test wafers. The on-line optical detection of changes in the interface electrical characteristics on the gate dielectric due to process-induced charging effects can significantly shorten the cycle time for offset event monitoring and process condition adjustment to improve yield.

[0378] Variant

[0379] The exemplary inventive embodiments and the detailed description of the relevant selected features are set forth above. As for other details, these can be understood in conjunction with the inventions and publications cited above and the patents and publications known or understood by those skilled in the art. In terms of additional acts that are commonly or logically employed, this is also true for the method-based aspects of the invention. These methods can be implemented in any order of logically possible events and any recited order of events, including: production methods and use methods. In addition, when numerical ranges are provided, it should be understood that each intermediate value, i.e., a value between the upper and lower limits of the range and any other recited value or intermediate value within the range, is included within the scope of the invention. In addition, it is contemplated that any optional features of the innovative variations can be presented and claimed separately or in combination with any one or more of the features described herein.

[0380] As used herein, the phrase "at least one" in reference to a list of items refers to any combination of those items, including a single item. For example, "at least one of a, b, or c" is intended to cover: a, b, c, a - b, a - c, b - c, and a - b - c.

[0381] Although the embodiments of the invention have been described with reference to several examples, optionally combined with various features, they are not limited to what is described or indicated for each such variation. Without departing from the true spirit and scope of this document, changes can be made to any such described embodiments of the invention, and equivalents (whether mentioned herein or not included herein for the sake of brevity) can be substituted. Certain features described in separate embodiments in this specification can also be implemented in combination in a single embodiment. Conversely, the various features described in the context of a single embodiment can also be implemented separately in multiple embodiments, or in any suitable sub-combination. Additionally, although the above features may be described as acting in certain combinations, and even initially claimed as such, in some cases, one or more features of the claimed combination can be deleted from the combination, and the claimed combination can be directed to a sub-combination or a variation of the sub-combination.

[0382] The various illustrative processes described can be implemented or executed using a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The general-purpose processor can be a microprocessor, but in the alternative, the processor can be any conventional processor, controller, microcontroller, or state machine. The processor can be part of a computer system that also has a user interface port for communicating with a user interface, and the user interface port receives user input commands. The computer system has at least one memory (such as a hard disk drive or other similar memory, as well as random access memory) for storing electronic information. The electronic information includes a program and a video output, the program operates under the control of the processor and communicates through the user interface port, and the video output generates its output in any type of video output format (such as VGA, DVI, HDMI, DisplayPort, or any other form).

[0383] The processor can also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a combination of multiple microprocessors, a combination of one or more microprocessors in conjunction with a DSP core, or any other such configured combination. These devices can also be used to select the values of the devices described herein.

[0384] The steps of the methods or algorithms described in connection with the embodiments disclosed herein may be implemented directly in hardware, in a software module executed by a processor, or in a combination of both. The software module may be disposed in random access memory (RAM), flash memory, read only memory (ROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In an alternative, the storage medium may be integral to the processor. The processor and the storage medium may be disposed in an application specific integrated circuit (ASIC). The ASIC may be disposed in a user terminal. In an alternative, the processor and the storage medium may be disposed as discrete components in a user terminal.

[0385] In one or more example embodiments, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that is accessible by a computer. By way of example, and not limitation, such computer-readable media can comprise: RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Memory may also be a rotating magnetic hard disk drive, an optical disk drive, or a flash-based storage drive or other such solid state storage device, magnetic storage device, or optical storage device.

[0386] In addition, any connection is properly termed a computer-readable medium. For example, if software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technology such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technology such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and Blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0387] The operations described herein can be performed on or via a website. The website can be run on a server computer, or can be run locally, for example, by downloading the website to a client computer, or by running the website through a server farm. The website can be accessed via a mobile phone, PDA, or any other client. The website can use any form of Hypertext Markup Language (HTML) code, such as Multipurpose Internet Mail Extensions (MHTML) or Extensible Markup Language (XML), and use the HTML code in any form, such as Cascading Style Sheets ("CSS") or other forms.

[0388] In addition, unless those limitations are expressly included in the claims, no limitations in this specification should be read into any of the claims. The computers described herein can be any type of computer, can be a general-purpose computer, or a special-purpose computer such as a workstation. These programs can be written in C, Java, Brew, or any other programming language. The programs can be resident on a storage medium, such as a magnetic storage medium or an optical storage medium, such as a computer hard drive, a removable disk or medium, such as a memory stick, an SD medium, or other removable media. The programs can also be run over a network, for example, by a server or other machine sending signals to a local machine so that the local machine can perform the operations described herein.

[0389] It should also be noted that all features, elements, components, functions, actions, and steps described with respect to any embodiment provided herein are intended to be freely combinable and replaceable with the features, elements, components, functions, actions, and steps in any other embodiment. If a feature, element, component, function, or step is described only with respect to one embodiment, it should be understood that, unless otherwise expressly stated, that feature, element, component, function, or step can be used in each of the other embodiments described herein. Thus, this paragraph serves at all times as a premise basis and written support for introducing claims that combine features, elements, components, functions, and actions or steps from different embodiments, or replace features, elements, components, functions, and actions or steps in one embodiment with those in another embodiment. In certain cases, such combinations or replacements can be made even without the following description being expressly stated. It is expressly recognized that it would be overly cumbersome to expressly describe every possible combination and replacement, especially considering that those skilled in the art will readily recognize that such combinations and replacements are permitted.

[0390] In some cases, entities are described herein as being coupled to other entities. It should be understood that the terms "cooperate", "couple" or "connect" (or any such form thereof) are used interchangeably herein, and are generic to both direct coupling of two entities (without any non-negligible parasitic entities, intermediate entities) and indirect coupling of two entities (with one or more non-negligible intermediate entities). If entities are shown as directly coupled together, or are described as being coupled together without stating any intermediate entities, it should be understood that those entities may also be indirectly coupled together, unless the context clearly dictates otherwise.

[0391] When referring to a single item, there may be multiple identical items. More specifically, unless otherwise clearly stated, the singular forms "a", "an", "the" and "said" as used herein and in the appended claims include plural referents. In other words, in the above specification and the following claims, the use of the article may denote "at least one" subject item.

[0392] It should also be noted that claims may be drafted to exclude any optional elements (e.g., elements designated as "exemplary", "capable" or "may" be used in the present specification, etc.). Therefore, this statement is intended to serve as a basis for the use of exclusive terms such as "only", "merely" or other use of "negative" claim limiting language in relation to the recitation of claim elements. Without using such proprietary terms, the term "comprising" in a claim should be allowed to include any additional elements, regardless of whether a given number of elements are recited in the claim or whether adding a feature may be considered to change the nature of the elements set forth in the claim. However, it is contemplated that the term "comprising / including" in a claim may be modified to the exclusive term "consisting of". In addition, except for the terms specifically defined herein, all technical and scientific terms used herein should be given the broadest meaning commonly understood by those skilled in the art while maintaining the validity of the claims.

[0393] Although various modifications and substitutions of the embodiments are readily possible, specific examples thereof have been shown in the drawings and are described in detail herein. However, it should be understood that these embodiments are not limited to the specific forms disclosed, but rather these embodiments will cover all modifications, equivalents and alternatives falling within the spirit of the present disclosure. In addition, any feature, function, action, step or element of an embodiment may be stated in a claim, and negative limitations (as described above or otherwise) that define the scope of the invention of the claim by features, functions, steps or elements not within that scope may be added to the claim. Therefore, the scope of the variations or embodiments of the present invention is not limited to the examples provided, but should be limited to the scope of the language of the appended claims.

Claims

1. A semiconductor device manufacturing structure, comprising: a semiconductor substrate; a first test structure supported on the semiconductor substrate, the first test structure comprising: a first oxide layer contacting the semiconductor to form a first interface region on the semiconductor substrate; a conductive region exposed to the surrounding environment; and an interconnect surrounded by an interlayer dielectric material, the interconnect providing a partial circuit path between the conductive region exposed to the surrounding environment and the first oxide layer, wherein the first test structure is configured to receive light from an optical metrology system at the first interface region and generate second harmonic generation light that can be received by the optical metrology system; and a second test structure on the semiconductor substrate, the second test structure comprising a second oxide layer contacting the semiconductor to form a second interface region on the semiconductor substrate, wherein the second test structure is configured to receive light from the optical metrology system at the second interface region and generate second harmonic generation light that can be received by the optical metrology system; wherein the second test structure is not electrically connected to an electrical contact region exposed to the surrounding environment.

2. The semiconductor device manufacturing structure according to claim 1, wherein, the first interface region is formed by the first oxide layer and a semiconductor layer on the semiconductor substrate.

3. The semiconductor device manufacturing structure according to claim 1 or 2, further comprising an integrated circuit device supported on the semiconductor substrate.

4. The semiconductor device manufacturing structure according to claim 1 or 2, wherein, the first test structure is included in a space between two integrated circuits.

5. The semiconductor device manufacturing structure according to claim 1 or 2, wherein, the first test structure is included in a space in which the semiconductor device manufacturing structure is diced to form a plurality of individual die.

6. The semiconductor device manufacturing structure according to claim 1, wherein, the first test structure is not configured as a functional transistor.

7. The semiconductor device manufacturing structure according to claim 1, wherein, the first test structure is not electrically connected to an integrated circuit.

8. The semiconductor device manufacturing structure according to claim 1 or 2, wherein, the interconnect is located on one side of the first oxide layer to provide an optical path to the first interface region.

9. The semiconductor device manufacturing structure according to claim 1 or 2, wherein, the first test structure further comprises a barrier layer located between the first oxide layer and the interconnect.

10. The semiconductor device manufacturing structure according to claim 9, wherein, the barrier layer comprises titanium nitride.

11. The semiconductor device manufacturing structure according to claim 9, wherein, the thickness of the barrier layer is between 1 nm and 5 nm.

12. The semiconductor device manufacturing structure according to claim 1, wherein, the second test structure is included in a space between two integrated circuits.

13. The semiconductor device manufacturing structure according to claim 1, wherein, At least one of the first test structure and the second test structure is included in a space in which the semiconductor device manufacturing structure is cut to form a plurality of individual dies.

14. The semiconductor device manufacturing structure according to claim 1, wherein, the second test structure is not configured as a functional transistor.

15. The semiconductor device manufacturing structure according to claim 1, wherein, the second test structure is not electrically connected to the integrated circuit.

16. The semiconductor device manufacturing structure according to claim 1, wherein, the second test structure further includes a barrier layer located between the second oxide layer and the interlayer dielectric material.

17. The semiconductor device manufacturing structure according to claim 1, wherein the conductive region is disposed on the top surface of the interlayer dielectric material.

18. The semiconductor device manufacturing structure according to claim 16, wherein, the barrier layer includes titanium nitride.

19. The semiconductor device manufacturing structure according to claim 16, wherein, the thickness of the barrier layer is between 1 nm and 5 nm.

20. A system for characterizing a sample wafer using second harmonic generation, the system comprising: a light source configured to direct a light beam onto the sample wafer; a positioning system for changing the position at which the light beam is incident on the sample wafer; an optical detection system configured to receive light generated by second harmonic generation from the sample wafer; and an electronic device configured to use the positioning system to control the position at which the light beam is incident on the sample wafer and to receive a signal from the optical detection system based on the light generated by second harmonic generation, wherein the electronic device is configured to direct the light beam onto a first test structure and a second test structure on the sample wafer to generate the light generated by second harmonic generation, the light generated by second harmonic generation including light generated by primary second harmonic generation and reference light generated by second harmonic generation; wherein the first test structure includes: a first oxide layer contacting a semiconductor layer to form a first interface region on the sample wafer; a conductive region exposed to the surrounding environment; and an interconnect surrounded by an interlayer dielectric material, the interconnect providing a partial circuit path between the conductive region exposed to the surrounding environment and the first oxide layer, thereby enabling the light beam to be incident on the first interface region, and the first interface region generating the light generated by primary second harmonic generation received by the optical detection system; wherein the second test structure includes a second oxide layer contacting the semiconductor layer to form a second interface region, wherein the second interface region is configured to receive light from the system at the second interface region and generate the reference light generated by second harmonic generation received by the optical detection system; and wherein the second test structure is not electrically connected to the conductive region exposed to the surrounding environment.

21. The system according to claim 20, wherein, The electronic device is further configured to characterize process - induced charging effects in the first interface region based on light generated by primary second - harmonic generation received from the first test structure and light generated by reference second - harmonic generation received from the second test structure.

22. The system according to claim 20, wherein, the electronic device is further configured to determine changes in electrical characteristics of the first interface region due to process - induced charging effects based on light generated by primary second - harmonic generation received from the first test structure and light generated by reference second - harmonic generation received from the second test structure.

23. The system according to claim 20, wherein, the electronic device is further configured to characterize process - induced charging effects in the first interface region based on a comparison of light generated by primary second - harmonic generation from the first test structure and light generated by reference second - harmonic generation from the second test structure.

24. The system according to claim 20, wherein, the electronic device is further configured to determine changes in electrical characteristics of the first interface region due to process - induced charging effects based on a comparison of light generated by primary second - harmonic generation from the first test structure and light generated by reference second - harmonic generation from the second test structure.

25. The system according to claim 20, wherein, the electronic device is further configured to characterize process - induced charging effects in the first interface region based on a difference between light generated by primary second - harmonic generation from the first test structure and light generated by reference second - harmonic generation from the second test structure.

26. The system according to claim 20, wherein the conductive region is disposed on a top surface of the interlayer dielectric material.

27. The system according to any one of claims 20 to 22, wherein, the system is configured to on - line characterize the sample wafer including the first interface region while the sample wafer is in manufacturing or on a production line.

28. A method of determining changes in electrical characteristics associated with an interface region of a semiconductor device due to process - induced charging effects, the method comprising: providing a first test structure, the first test structure including: a first interface region; a dielectric material located above the first interface region; a conductive region, the conductive region being exposed to the surrounding environment; and an interconnect, the interconnect being surrounded by the dielectric material, the interconnect providing a partial circuit path between the first interface region and the conductive region; directing radiation from at least one light source of a metrology system onto the first interface region; and detecting, by an optical detection system of the metrology system, light generated by primary second - harmonic generation from the first interface region; providing a second test structure including a second interface region, the first interface region and the second interface region including a common layer; directing radiation from the at least one light source onto the second interface region; detecting, by the optical detection system of the metrology system, light generated by reference second - harmonic generation from the second interface region; and Determine a change in an electrical characteristic of the semiconductor device based on light generated by primary second harmonic generation from the first interface region and light generated by reference second harmonic generation from the second interface region; wherein the first test structure and the second test structure are not electrically connected to the integrated circuit, and the second interface region is not electrically connected to a conductive region exposed to the surrounding environment.

29. The method according to claim 28, wherein, the first interface region includes a junction between a semiconductor layer and a first oxide layer, the second test structure includes a second oxide layer that contacts the semiconductor layer to form the second interface region, and the first oxide layer and the second oxide layer include the same material.

30. The method according to claim 28 or 29, wherein determining the change in the electrical characteristic of the semiconductor device includes determining a change in the electrical characteristic associated with the first interface region.

31. The method according to claim 28, further comprising determining a change in the electrical characteristic associated with the first interface region of the first test structure based on the light generated by primary second harmonic generation received by the first interface region and the light generated by reference second harmonic generation received by the second interface region.

32. The method according to claim 28 or 29, wherein the radiation includes pump radiation.

33. The method according to claim 28 or 29, wherein, the radiation further includes probe radiation.

34. The method according to claim 29, wherein, when the semiconductor device is in manufacturing or on a production line, determine online a change in the electrical characteristic associated with the first interface region of the first test structure.

35. The method according to claim 28, wherein the conductive region is disposed on a top surface of the dielectric material.

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