Display device

By using alignment marks and sensing electrodes in the display device, and using the relative distance between the alignment marks and holes to check the alignment status of the holes, the problem of difficulty in effectively checking the alignment of holes in the prior art is solved, and efficient alignment inspection of different shapes and numbers of holes is achieved.

CN113066825BActive Publication Date: 2025-03-11SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202011606438.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-01-02
Filing Date
2020-12-30
Publication Date
2025-03-11
Estimated Expiration
2040-12-30

AI Technical Summary

Technical Problem

It is difficult for existing display devices to effectively check the alignment status of holes, especially for different shapes and numbers of holes.

Method used

The holes are properly aligned by utilizing the relative distance between the holes and the alignment marks in the non-display area surrounding the holes. The display device includes a substrate, a display unit, a sensing electrode and an alignment mark. The sensing electrode is electrically connected to the alignment mark, and the alignment state of the hole is determined by measuring the distance between the electrode and the mark.

Benefits of technology

Effective alignment inspection of holes of different shapes and numbers is realized, and the installation and use efficiency of display devices is improved.

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Abstract

A display device is provided. The display device includes: a substrate having a hole, a non-display area surrounding the hole, and a display area surrounding the non-display area; a display unit disposed on the substrate and having pixels disposed in the display area; a sensing electrode disposed in the display area on the display unit; and a first alignment mark disposed in the non-display area on the display unit.
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Description

[0001] This patent application claims priority to and the benefit of Korean Patent Application No. 10-2020-0000304, filed on January 2, 2020, which is hereby incorporated by reference for all purposes as if fully set forth herein. Technical Field

[0002] The present disclosure relates to a display device and a method of checking alignment of the display device. Background Art

[0003] As multimedia technology develops, display devices are becoming more and more important. Therefore, various types of display devices, such as organic light emitting display (OLED) devices and liquid crystal display (LCD) devices, are currently used.

[0004] The sensing unit is an information input device and can be included in the display device. In the sensing unit, the touch sensor can be attached to one surface of the display panel of the display device, or can be manufactured integrally with the display panel. The user can input information by pressing or touching the sensing unit while watching the image displayed on the screen of the display device.

[0005] The above information disclosed in this Background section is only for understanding the background of the inventive concept and therefore it may contain information that does not constitute the prior art. Summary of the invention

[0006] Exemplary embodiments of the present disclosure provide a display device capable of checking whether holes are properly aligned by using a relative distance between the holes and an alignment mark provided in a non-display area surrounding the holes, regardless of the shape and number of holes formed in the display device.

[0007] Exemplary embodiments of the present disclosure also provide a display device capable of reducing a non-display area.

[0008] It should be noted that the objects of the present disclosure are not limited to the above objects; and other objects of the present invention will be apparent to those skilled in the art through the following description.

[0009] An exemplary embodiment of the present disclosure provides a display device, the display device including: a substrate having a hole, a non-display area surrounding the hole, and a display area surrounding the non-display area; a display unit disposed on the substrate and having pixels disposed in the display area; a sensing electrode disposed in the display area on the display unit; and a first alignment mark disposed in the non-display area on the display unit.

[0010] The details of one or more exemplary embodiments of the subject matter described in this specification are set forth in the accompanying drawings and the description below.

[0011] The substrate may further include a peripheral region disposed in the non-display region, and the display device may further include: a connection line disposed in the peripheral region on the display unit and connecting the sensing electrodes.

[0012] The display device may further include a second alignment mark disposed in the non-display area on the display unit and spaced apart from the first alignment mark.

[0013] A minimum distance between the first alignment mark and the second alignment mark may be greater than a diameter of the hole.

[0014] The first alignment mark may be symmetrical to the second alignment mark with respect to a center point of the hole.

[0015] The display device may further include a third alignment mark disposed in the non-display area on the display unit and spaced apart from the first alignment mark and the second alignment mark.

[0016] The sensing electrode may include a first sensing electrode electrically connected in a certain direction, a second sensing electrode electrically connected in a direction crossing the certain direction, and a connector connecting the first sensing electrodes adjacent to each other in the certain direction. The connector may be provided on the display unit, and the first sensing electrode and the second sensing electrode may be provided on a sensing insulating layer, and the sensing insulating layer is provided on the connector.

[0017] A first alignment mark may be disposed on the sensing insulation layer.

[0018] The first alignment key may include the same material as those of the first and second sensing electrodes.

[0019] The first alignment mark may be directly disposed on the display unit.

[0020] The first alignment mark may include the same material as that of the connection member.

[0021] The display device may further include a test line disposed in the non-display area on the display unit and overlapping the first alignment mark.

[0022] The light transmittance of the test line may be greater than the light transmittance of the first alignment mark.

[0023] A width of the test line may be smaller than a width of the first alignment mark.

[0024] The test line may be directly disposed on the display unit, and the first alignment mark may be disposed on the sensing insulating layer.

[0025] The test line may include the same material as that of the connection member, and the first alignment mark may include the same material as that of the first sensing electrode and the second sensing electrode.

[0026] The first alignment mark may include a first main alignment mark and a first auxiliary alignment mark having different sizes and being spaced apart from each other in a certain direction.

[0027] The display device may further include a second alignment mark disposed in the non-display region on the display unit and spaced apart from the first alignment mark in another direction crossing the certain direction.

[0028] The first alignment mark may be symmetrical to the second alignment mark with respect to a center point of the hole.

[0029] The display panel may further include a second alignment mark disposed in the non-display area, and a side of a first alignment image pattern associated with the first alignment mark and a side of a second alignment image pattern associated with the second alignment mark may be arranged in parallel in an image for inspection.

[0030] According to exemplary embodiments of the present disclosure, it is possible to check whether holes are properly aligned by using a relative distance between the holes and an alignment mark provided in a non-display area surrounding the holes, regardless of the shape and number of holes formed in a display device.

[0031] According to another exemplary embodiment of the present disclosure, a non-display area can be reduced by overlapping an alignment mark disposed in the non-display area with a test line.

[0032] It should be noted that the effects of the present disclosure are not limited to the above-described effects, and other effects of the present disclosure will be apparent to those skilled in the art through the following description.

[0033] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The above and other aspects and features of the present disclosure will become more apparent by describing in detail exemplary embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0035] Figure 1 is a plan view showing a layout of a display device according to an exemplary embodiment of the present disclosure;

[0036] Figure 2 is a cross-sectional view showing a portion of a display device according to an exemplary embodiment of the present disclosure;

[0037] Figure 3 It is along Figure 1 A cross-sectional view taken along line III-III';

[0038] Figure 4is a plan view showing a display unit and associated elements according to an exemplary embodiment of the present disclosure;

[0039] Figure 5 is a plan view showing a sensing unit and associated elements according to an exemplary embodiment of the present disclosure;

[0040] Figure 6 It is shown Figure 5 an enlarged view of a portion of a sensing area;

[0041] Figure 7 It is shown Figure 6 An enlarged view of region A;

[0042] Figure 8 It is along Figure 7 A cross-sectional view taken along line VIII-VIII';

[0043] Fig. 9 It is shown Figure 5 An enlarged view of an example of region B;

[0044] Fig.10 is a plan view showing an alignment mark according to an exemplary embodiment of the present disclosure;

[0045] Fig.11 It is along Fig. 9 A cross-sectional view showing an example taken along line XI-XI';

[0046] Fig.12 It is along Fig. 9 A cross-sectional view showing another example taken along line XI-XI';

[0047] Fig.13 is a side view schematically illustrating an apparatus configured to check alignment according to an exemplary embodiment of the present disclosure;

[0048] Fig.14 is a flow chart illustrating a method of checking alignment according to an exemplary embodiment of the present disclosure;

[0049] Fig.15 is the image for inspection created in step S200;

[0050] Fig.16 is an image for inspection showing an example of step S300;

[0051] Fig.17 is an image for inspection showing an example of step S501;

[0052] Fig.18 is an image for inspection showing an example of step S502;

[0053] Fig.19 It is along Fig. 9 A cross-sectional view showing yet another example taken along line XI-XI';

[0054] Fig. 20 is captured by a device configured to check alignment according to an exemplary embodiment of the present disclosure for checking Fig.19 an image of a display device;

[0055] Fig.21 It is shown Figure 5 an enlarged view of another example of region B;

[0056] Fig. 22 It is along Fig.21 A sectional view taken along line XXII-XXII';

[0057] Fig.23 It is shown Figure 5 An enlarged view of another example of region B;

[0058] Fig.24 It is along Fig.23 A sectional view taken along line XXIV-XXIV';

[0059] Fig.25 is captured by a device configured to check alignment according to an exemplary embodiment of the present disclosure for checking Fig.23 an image of a display device;

[0060] Fig.26 is a view showing a layout of holes and alignment marks according to another exemplary embodiment of the present disclosure;

[0061] Fig. 27 is a view showing a layout of holes and alignment marks according to yet another exemplary embodiment of the present disclosure;

[0062] Fig.28 is a view showing a layout of holes and alignment marks according to yet another exemplary embodiment of the present disclosure;

[0063] Fig.29 is a view showing a layout of holes and alignment marks according to yet another exemplary embodiment of the present disclosure; and

[0064] Fig.30 is a view illustrating a layout of holes and alignment marks according to still another exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0065] In the following description, for the purpose of explanation, many specific details are set forth to provide a thorough understanding of various exemplary embodiments or implementations of the invention. As used herein, "embodiment" and "implementation" are interchangeable words and are non-limiting examples of devices or methods using one or more of the inventive concepts disclosed herein. However, it is apparent that various exemplary embodiments may be practiced without these specific details or with one or more equivalent arrangements. In other examples, in order to avoid making various exemplary embodiments unnecessarily obscure, known structures and devices are shown in block diagram form. In addition, various exemplary embodiments may be different, but need not be exclusive. For example, without departing from the inventive concept, the specific shape, configuration and features of the exemplary embodiment may be used or implemented in another exemplary embodiment.

[0066] Unless otherwise specified, the exemplary embodiments shown will be understood as providing exemplary features of various details that can actually implement some ways of the inventive concept. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter, individually or collectively referred to as "elements") of the various embodiments may be further combined, separated, interchanged and / or rearranged without departing from the inventive concept.

[0067] The use of cross hatching and / or shading is usually provided in the drawings to make the boundaries between adjacent elements clear. Thus, unless otherwise specified, the presence or absence of cross hatching or shading does not convey or indicate any preference or requirement for the specific material, material properties, size, ratio, commonality between the elements shown and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for clarity and / or descriptive purposes. When the exemplary embodiments may be implemented differently, the specific process sequence may be performed in a different order than described. For example, two processes described in succession may be performed substantially simultaneously or in an order opposite to the described order. In addition, the same reference numerals represent the same elements.

[0068] When an element or layer is referred to as being "on" another element or layer, "connected to" or "bonded to" another element or layer, the element or layer may be directly on, directly connected to or directly bonded to the other element or layer, or there may be an intermediate element or intermediate layer. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to" or "directly bonded to" another element or layer, there are no intermediate elements or intermediate layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection and / or a fluid connection with or without intermediate elements. In addition, the DR1 and D1 axes, the DR2 and D2 axes, and the DR3 and D3 axes are not limited to the three axes of a rectangular coordinate system (such as the x-axis, the y-axis, and the z-axis), and may be interpreted in a broader sense. For example, the DR1 and D1 axes, the DR2 and D2 axes, and the DR3 and D3 axes may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. As used herein, the term "and / or" includes any combination and all combinations of one or more of the relevant listed items.

[0069] For descriptive purposes, spatially relative terms such as "under," "below," "below," "down," "above," "up," "above," "higher," "side" (e.g., as in "sidewall"), etc., may be used herein to describe the relationship of one element to another (or other) element(s) as shown in the accompanying drawings. Spatially relative terms are intended to include different orientations of the device in use, operation, and / or manufacture in addition to the orientations depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, an element described as "under" or "beneath" other elements or features will subsequently be positioned as "above" the other elements or features. Thus, the exemplary term "under" can include both above and below orientations. In addition, the device can be positioned otherwise (e.g., rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein are interpreted accordingly.

[0070] The terms used herein are for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms "one", "one (kind / person)" and "said (the)" are also intended to include plural forms. In addition, when the terms "comprise", "include" and / or their variations are used in this specification, the term description has the stated features, integral bodies, steps, operations, elements, components and / or their groups, but does not exclude the presence or addition of one or more other features, integral bodies, steps, operations, elements, components and / or their groups. It should also be noted that, as used herein, the terms "substantially", "approximately" and other similar terms are used as approximate terms rather than as terms of degree, so that they are used to explain the inherent deviations in the measured values, calculated values ​​and / or provided values ​​that will be recognized by those of ordinary skill in the art.

[0071] Various exemplary embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic diagrams of idealized exemplary embodiments and / or intermediate structures. As such, variations in the shapes of the illustrations, such as those caused by manufacturing techniques and / or tolerances, are anticipated. Therefore, the exemplary embodiments disclosed herein should not necessarily be construed as being limited to the specific illustrated shapes of the regions, but rather will include deviations in shape caused by, for example, manufacturing. In this manner, the regions illustrated in the accompanying drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and as such, are not necessarily intended to be limiting.

[0072] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which this disclosure is a part. Terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense unless explicitly so defined herein.

[0073] It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.

[0074] It will be understood that although the terms "first", "second", etc. may be used to describe various elements herein, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, the first element discussed below may be named as the second element without departing from the teachings of the present invention. Similarly, the second element may also be named as the first element.

[0075] The present invention and exemplary embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. However, the present invention may be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those skilled in the art.

[0076] Figure 1 is a plan view showing a layout of a display device according to an exemplary embodiment of the present disclosure. Figure 2 is a cross-sectional view of a portion of a display device according to an exemplary embodiment of the present disclosure.

[0077] In the drawings, a first direction DR1, a second direction DR2, and a third direction DR3 are defined. The first direction DR1 may be perpendicular to the second direction DR2 in a plane. The third direction DR3 may be perpendicular to the plane in which the first direction DR1 and the second direction DR2 are located. The third direction DR3 may be perpendicular to each of the first direction DR1 and the second direction DR2. In the following description, the third direction DR3 may refer to the thickness direction of the display device 1. Aspects of the exemplary embodiments may be referred to according to the direction in which they reside or extend, and the relationship between one component and another component may use the directional attribute as a way of distinguishing the difference.

[0078] In the following description, unless otherwise specifically stated, the first direction DR1 represents the right direction, the opposite direction of the first direction DR1 represents the left direction, the second direction DR2 represents the upper direction, and the opposite direction of the second direction DR2 represents the lower direction. In addition, the upper portion represents the side on which the image is displayed in the third direction DR3, and similarly, the upper surface represents the surface facing the side in the third direction DR3. In addition, the lower portion represents the opposite side in the third direction DR3, and similarly, the lower surface represents the surface facing the opposite side in the third direction DR3. Those skilled in the art will recognize that these are relative terms with respect to the orientation being used to observe an object, and these terms can be used for convenience when necessary.

[0079] Reference Figure 1 and Figure 2, the display device 1 is configured to display a moving image or a still image. The display device 1 can be used as a display screen of a portable electronic device such as a mobile phone, a smart phone, a tablet PC, a smart watch, a watch phone, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation device, and an ultra-mobile PC (UMPC)), as well as a display screen of various products such as a television, a notebook, a monitor, a billboard, and the Internet of Things. Examples of the display device 1 may be an organic light-emitting display device, a liquid crystal display device, a plasma display device, a field emission display device, an electrophoretic display device, an electrowetting display device, a quantum dot light-emitting display device, a micro-LED display device, and the like. In the following description, an organic light-emitting display device will be described as an example of the display device 1. However, it will be understood that the present disclosure is not limited thereto.

[0080] The display device 1 according to an exemplary embodiment of the present disclosure may include a display panel 10 , a driving circuit 20 , and a circuit board 30 .

[0081] The display panel 10 may include a flexible substrate including a flexible polymer material such as polyimide. Therefore, the display panel 10 may be bent, curved, folded, or rolled.

[0082] The display panel 10 may include a main region MR and a protrusion region BR / SR protruding from one side of the main region MR.

[0083] When viewed from the top, the main region MR may have a shape substantially similar to the appearance of the display device 1. According to an exemplary embodiment of the present disclosure, when the display device 1 has a rectangular shape when viewed from the top and the rectangular shape has a shorter side in the first direction DR1 and a longer side in the second direction DR2, the main region MR may have a rectangular shape and the rectangular shape has a shorter side in the first direction DR1 and a longer side in the second direction DR2. Each of the corners where the shorter side in the first direction DR1 intersects with the longer side in the second direction DR2 may be rounded (rounded with a predetermined curvature) with a predetermined curvature or may be a right angle. The shape of the display device 1 when viewed from the top is not limited to a quadrilateral shape, but may be formed into other polygonal shapes, a circular shape, or an elliptical shape. The main region MR may be a flat area positioned in one plane. However, it will be understood that the present disclosure is not limited thereto. At least one of the edges of the main region MR, except for the edge (side) connected to the protruding region BR / SR, may be bent to form a curved surface, or may be bent at a right angle.

[0084] A hole AH (or an inner groove) penetrating the display panel 10 may be formed in the main region MR. The hole AH may be disposed adjacent to one corner C1 of the main region MR, but the embodiment is not limited thereto. The hole AH may be positioned at different distances from the corner C1, or may be disposed adjacent to other corners of the main region MR or other locations in the main region MR.

[0085] The main region MR may include a display area DA where an image is displayed and a non-display area NDA where an image is not displayed.

[0086] The display area DA may be an area where an image is displayed. The display area DA may be disposed at a central portion of the main region MR. Pixels may be disposed in the display area DA of the display panel 10. Scan lines, data lines, and power lines connected to the pixels may also be disposed in the display area DA of the display panel 10. In addition, a sensing area configured to sense a user's touch may overlap with the display area DA or may be disposed in the display area DA. The sensing area may occupy the entire display area DA or a portion of the display area DA.

[0087] Similar to the main region MR, the display area DA may have a rectangular shape or a rectangular shape with rounded corners (rounded corners). Figure 1 In the example shown in , the shape of the display area DA is a rectangle having rounded corners (rounded corners) and having its sides in the second direction DR2 longer than its sides in the first direction DR1. However, it will be understood that the present disclosure is not limited thereto. The display area DA may have various shapes, such as a rectangular shape having its sides in the first direction DR1 longer than its sides in the second direction DR2, a square shape, other polygonal shapes, a circular shape, and an elliptical shape.

[0088] The non-display area NDA may be defined as an area where no image is displayed. The non-display area NDA may include a first non-display area NDA1 surrounding the display area DA and a second non-display area NDA2 disposed inside the display area DA. The non-display area NDA extends around the periphery of the main area MR and includes a protruding area BR / SR.

[0089] The first non-display area NDA1 may surround an edge of the display area DA. The first non-display area NDA1 may include a scan driver configured to apply scan signals to scan lines, fan-out lines connecting data lines with the driving circuit 20, and sensing signal lines configured to apply signals to sensing areas.

[0090] The second non-display area NDA2 may be positioned in the display area DA and may be surrounded by the display area DA. The second non-display area NDA2 may surround the hole AH formed in the display panel 10. The second non-display area NDA2 may include scan lines and data lines or connection lines that electrically connect the sensing electrodes to each other. Aspects of the scan lines, data lines, and connection lines disposed in the second non-display area NDA2 are described herein.

[0091] The protruding region BR / SR may protrude from one side of the main region MR. For example, the protruding region BR / SR may be as shown in FIG. Figure 1 The protrusion region BR / SR may protrude from the lower side of the main region MR as shown in FIG. A length of the protrusion region BR / SR in the first direction DR1 may be smaller than a length of the main region MR in the first direction DR1.

[0092] The protruding region BR / SR may include a bending region BR at which the display panel 10 is bent and a subsidiary region SR including a pad (or referred to as a "pad" or "solder pad") region PD. As shown, the main region MR may be disposed on one side of the bending region BR compared to the subsidiary region SR, and the subsidiary region SR may be disposed on the other side of the bending region BR relative to the main region MR. For example, the main region MR may be disposed on the upper side of the bending region BR, and the subsidiary region SR may be disposed on the lower side of the bending region BR.

[0093] The bending region BR is connected to one side of the main region MR in the second direction DR2. For example, the bending region BR may be connected to a lower short side of the main region MR. A portion where the main region MR intersects with the bending region BR may be cut into an L shape.

[0094] like Figure 2 As shown in , the main region MR ends at a point associated with where the bending region BR begins to bend. Similarly, the satellite region SR has a breakpoint associated with where another portion of the bending region BR stops bending.

[0095] In the bending region BR, the display panel 10 may be bent downward (into the bending region BR) with a certain curvature in the direction opposite to the third direction DR3 (ie, in the direction away from the display surface). Figure 1 ). Although the curved region BR may have a constant radius of curvature, the present disclosure is not limited thereto. The curved region BR may have different radii of curvature for different portions. Since the display panel 10 is curved at the curved region BR, the surface of the display panel 10 may be reversed. Figure 2 As shown in FIG. 1 , the protruding region BR / SR of the surface of the display panel 10 that initially faces upward may be bent such that the protruding region BR / SR faces outward at the bent region BR and then faces downward.

[0096] The auxiliary region SR extends from the bending region BR. Figure 2 As shown in , after the display panel 10 has been bent, the subsidiary region SR may extend in a direction parallel to the main region MR. The subsidiary region SR may overlap a portion of the main region MR in the third direction DR3. The width of the subsidiary region SR may be, but is not limited to, equal to the width of the bending region BR.

[0097] The driving circuit 20 may be disposed in the subsidiary region SR of the display panel 10. The driving circuit 20 may be configured to output signals and voltages to drive the display panel 10. For example, the driving circuit 20 may apply a data voltage to a data line. In addition, the driving circuit 20 may apply a power supply voltage to a power line, and may apply a scan control signal to a scan driver. The driving circuit 20 is disposed on a surface of the display panel 10 that is a display surface. Since the curved region BR is as described above and as Figure 2 , the driving circuit 20 is mounted on a surface of the display panel 10 facing downward in the opposite direction of the third direction DR3 so that the upper surface of the driving circuit 20 may face downward.

[0098] The driving circuit 20 may be implemented as an integrated circuit (IC) and may be attached to the display panel 10 in the subsidiary region SR by a chip on glass (COG) technology, a chip on plastic (COP) technology, or an ultrasonic bonding technology. The width of the driving circuit 20 in the first direction DR1 may be smaller than the width of the display panel 10 in the first direction DR1 and smaller than the width of the protruding region BR / SR in the first direction DR1. The driving circuit 20 may be disposed at a central portion of the subsidiary region SR in the first direction DR1, and both side surfaces of the driving circuit 20 may be spaced apart from left and right edges of the subsidiary region SR, respectively.

[0099] The pad region PD may be disposed at one end of the subsidiary region SR of the display panel 10 away from the main region MR. The pad region PD may include a plurality of display pads (in Figure 4 ) and a plurality of sensing pads electrically connected to the sensing lines (shown in Figure 4 ).

[0100] The circuit board 30 may be connected to the pad area PD provided at one end of the attached area SR. The circuit board 30 may be attached to the above-mentioned display pad using an anisotropic conductive film. In this way, the leads of the circuit board 30 may be electrically connected to the display pad. The circuit board 30 may be a flexible printed circuit board, a printed circuit board, or a flexible film such as a chip on film. The circuit board 30 may be a display unit DU (see FIG. 1 ) that is driven together with the display unit DU. Figure 3 ) and sensing unit TDU (see Figure 3) of the integrated driving circuit board. It will be understood that the present disclosure is not limited thereto. A separate sensing driving circuit board may be attached to the subsidiary region SR of the display panel 10.

[0101] Figure 3 It is along Figure 1 A cross-sectional view taken along line III-III'.

[0102] Reference Figure 1 and Figure 3 , the display panel 10 may include a display unit DU, the display unit DU having a substrate SUB, a thin film transistor layer TFTL disposed on the substrate SUB, a light emitting element layer EML disposed on the thin film transistor layer TFTL, and a thin film encapsulation layer TFEL disposed on the light emitting element layer EML. The sensing unit TDU may have a sensing layer TSL disposed on the thin film encapsulation layer TFEL. The display panel 10 may further include a polarizing layer PF on top of the sensing unit TDU. The sensing unit TDU may thus be disposed on the display unit DU, and the polarizing layer PF may be disposed on the sensing unit TDU. Therefore, the display panel 10 may be composed of the display unit DU, the sensing unit TDU, and the polarizing layer PF.

[0103] As mentioned above and as Figure 1 and Figure 3 As shown in , the second non-display area NDA2 may surround the hole AH. The hole AH may be formed to pass through the front and rear surfaces of the display unit DU, the sensing unit TDU, and the polarization layer PF of the display panel 10. That is, a through hole (or opening or hole) corresponding to the hole AH may be formed in each of the display unit DU, the sensing unit TDU, and the polarization layer PF. In the following description, for the convenience of illustration and description, the through hole formed in the display unit DU and the sensing unit TDU will be referred to as the hole AH of the display panel 10.

[0104] When viewed from the top, the hole AH may have a circular shape. The hole AH may also be formed in a cylindrical shape. However, it will be understood that the present disclosure is not limited thereto. The hole AH may have various shapes. In some exemplary embodiments, when viewed from the top or from a cross-section, the hole AH may have an amorphous shape or a polygonal shape including a quadrilateral. The hole AH may have the shape of a polygonal column or an irregular column.

[0105] The display unit DU may be disposed in the display area DA, the first non-display area NDA1, and the second non-display area NDA2. A hole AH (or a through hole) penetrating the display unit DU and corresponding to the hole AH of the display panel 10 may be formed in the display unit DU. The second non-display area NDA2 may surround the hole AH or the through hole formed in the display unit DU.

[0106] The hole AH may include a functional module 300, and the functional module 300 may be disposed under the window area (not shown) and spaced apart from the window. The functional module 300 may be disposed inside the hole AH of the display area DA.

[0107] The function module 300 may include a camera module configured to take a photo of an image of an object positioned in front of the display device 1 (or recognize an image of an object positioned in front of the display device 1), a facial recognition sensor module configured to sense a user's face, a pupil recognition sensor module configured to sense a user's pupil, an acceleration sensor module configured to determine movement of the display device, a proximity sensor module configured to detect approach to the front surface of the display device, an ambient light sensor module configured to measure external brightness, etc. The function module 300 may sense or recognize an object or user positioned in front of the display device 1 through a window area.

[0108] The substrate SUB may be made of insulating materials such as glass, quartz, and polymer resins. Examples of polymer materials may include polyethersulfone (PES), polyacrylate (PA), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC), cellulose triacetate (CAT), cellulose acetate propionate (CAP), or a combination thereof. Alternatively, the substrate SUB may include a metal material.

[0109] The substrate SUB may be a rigid substrate or a flexible substrate that can be bent, folded, rolled, etc. When the substrate SUB is a flexible substrate, it may be formed of, but is not limited to, polyimide (PI).

[0110] The thin film transistor layer TFTL may be disposed on the substrate SUB. A plurality of lines such as scan lines, data lines, power lines, scan control lines, fan-out lines, and wirings connecting pads with data lines and thin film transistors in pixels may be formed in the thin film transistor layer TFTL. Each of the thin film transistors may include a gate electrode, a semiconductor layer, a source electrode, and a drain electrode.

[0111] The light emitting element layer EML may be disposed on the thin film transistor layer TFTL. The light emitting element layer EML may be an organic emission layer including an organic material. The light emitting element layer EML may include a hole transport layer, an organic light emitting layer, and an electron transport layer. In an operation not shown, when a first voltage is applied to the first electrode through a thin film transistor in the thin film transistor layer TFTL and a cathode voltage is applied to the second electrode, holes and electrons move to the organic light emitting layer through the hole transport layer and the electron transport layer, respectively, so that they are combined in the organic light emitting layer to emit light. A pixel including the light emitting element layer EML may be disposed in the display area DA.

[0112] The thin film encapsulation layer TFEL may be disposed on the light emitting element layer EML. The thin film encapsulation layer TFEL is used to prevent oxygen or moisture from penetrating into the light emitting element layer EML. In addition, the thin film encapsulation layer TFEL protects the light emitting element layer EML from foreign matter such as dust. To this end, the thin film encapsulation layer TFEL may include an inorganic layer or a stack of an inorganic layer and an organic layer.

[0113] The sensing unit TDU may be disposed on the thin film encapsulation layer TFEL. The sensing unit TDU may be disposed in the display area DA and the first non-display area NDA1. In addition, the sensing unit TDU may extend from the display area DA to the second non-display area NDA2 and may be disposed in a portion of the second non-display area NDA2. The portion of the second non-display area NDA2 where the sensing unit TDU is disposed may not overlap the hole AH.

[0114] The sensing unit TDU may include a sensing layer TSL.

[0115] The sensing layer TSL may be disposed on the thin film encapsulation layer TFEL. The sensing layer TSL may be configured to sense a user's touch input and may perform the function of a touch member. The sensing layer TSL may include a sensing electrode configured to sense a user's touch through mutual capacitance sensing, and a sensing line configured to connect the pad to the sensing electrode. The sensing layer TSL may include an alignment mark for checking the alignment of the hole AH of the display device 1 in the second non-display area NDA2, which will be described in detail later.

[0116] Compared with a display device in which a separate touch panel including a sensing layer TSL is attached on the thin film encapsulation layer TFEL, since the sensing layer TSL is directly disposed on the thin film encapsulation layer TFEL, the thickness of the display device 1 may be reduced.

[0117] The polarizing layer PF may be disposed on the sensing layer TSL. The polarizing layer PF may be disposed in the display area DA and the first non-display area NDA1. In addition, the polarizing layer PF may extend from the display area DA to the second non-display area NDA2 and may be disposed in a portion of the second non-display area NDA2. The portion of the second non-display area NDA2 where the polarizing layer PF is disposed may not overlap the hole AH.

[0118] In an exemplary embodiment, the polarization layer PF may be a polarization film. The polarization film may include a linear polarizer and a phase delay film such as a λ / 4 (quarter wavelength) plate. In this case, the phase delay film may be disposed on the sensing layer TSL, and the linear polarizer may be disposed on the phase delay film.

[0119] Although not shown in the drawings, the display panel 10 may further include a protective layer disposed on the polarizing layer PF. The protective layer may include, for example, a window member. The protective layer may be attached to the polarizing layer PF by a transparent adhesive member such as an optically clear adhesive (OCA) film. In this case, the protective layer does not include the hole AH, and may be disposed on the polarizing layer PF to completely cover the display area DA, the first non-display area NDA1, the second non-display area NDA2, and the area overlapping the hole AH. That is, the protective layer may be disposed on the polarizing layer PF to cover the hole AH formed under the protective layer. However, it will be understood that the present disclosure is not limited thereto. The protective layer may include a hole AH formed through the protective layer.

[0120] Figure 4 is a plan view showing a display unit and associated elements according to an exemplary embodiment of the present disclosure.

[0121] For ease of explanation, Figure 4 Aspects of a display unit DU including pixels PX, scan lines SL, data lines DL, scan control lines SCL, fan-out lines DLL, a scan driver SD, a driving circuit 20, and a display pad DP are shown.

[0122] Reference Figure 4 , a display area DA, a first non-display area NDA1, and a second non-display area NDA2 are defined in the display unit DU. The display area DA, the first non-display area NDA1, and the second non-display area NDA2 of the display unit DU may correspond to the display area DA, the first non-display area NDA1, and the second non-display area NDA2 of the display panel 10, respectively.

[0123] The pixels PX may be disposed in the display area DA. The scan lines SL and the data lines DL may be disposed in the display area DA and the second non-display area NDA2.

[0124] The scan lines SL may extend in a first direction DR1 in the display area DA, and the data lines DL may extend in a second direction DR2 crossing the first direction DR1 in the display area DA. Some of the scan lines SL and some of the data lines DL may extend around the hole AH. Since some of the scan lines SL and / or the data lines EL extend around the hole AH, at least a portion of the some of the lines may be disposed in the second non-display area NDA2.

[0125] Each of the pixels PX may be connected to at least one of the scan lines SL and at least one of the data lines DL. Each of the pixels PX may include a thin film transistor, a light emitting element, and a capacitor, and the thin film transistor includes a driving transistor and at least one switching transistor. When a scan signal is applied from the scan line SL, each of the pixels PX receives the data voltage of the data line DL, and supplies a driving current to the light emitting element according to the data voltage applied to the gate electrode, thereby emitting light. Although an organic light emitting element including an anode electrode, an organic emission layer, and a cathode electrode has been described as an example of a light emitting element, the present disclosure is not limited thereto. The light emitting element may be implemented as a quantum dot light emitting element including an anode electrode, a quantum dot emission layer, and a cathode electrode, as an inorganic light emitting element including an anode electrode, an inorganic emission layer having an inorganic semiconductor, and a cathode electrode, or as a micro light emitting element including a micro light emitting diode.

[0126] The scan driver SD is connected to the driving circuit 20 through a plurality of scan control lines SCL. The scan driver SD may receive a scan control signal from the driving circuit 20 through the scan control line SCL. The scan driver SD generates a scan signal according to the scan control signal and supplies the scan signal to the scan line SL.

[0127] Although in Figure 4 The scan driver SD is formed in the first non-display area NDA1 on the left side of the display area DA, but the present disclosure is not limited thereto. For example, the scan driver SD may be formed in the first non-display area NDA1 on the left and right sides of the display area DA.

[0128] The driving circuit 20 is connected to the display pad DP to receive digital video data and timing signals. The driving circuit 20 converts the digital video data into analog positive / negative data voltages and supplies the analog positive / negative data voltages to the data lines DL through the fan-out lines DLL. In addition, the driving circuit 20 generates and supplies a scan control signal configured to control the scan driver SD through the scan control line SCL. The pixel PX to be supplied with the data voltage is selected by the scan signal of the scan driver SD, and the data voltage is supplied to the selected pixel PX.

[0129] like Figure 4 As shown in , the display unit DU may include a display pad DP electrically connected to the driving circuit 20 and sensing pads TP1 and TP2 electrically connected to the sensing line. The display pad area DPA in which the display pad DP is disposed may be positioned between a first sensing pad area TA1 in which the first sensing pad TP1 is disposed and a second sensing pad area TA2 in which the second sensing pad TP2 is disposed. Figure 4As shown in , the display pad area DPA may be disposed at the center of one end of the subsidiary region SR, the first sensing pad area TA1 may be disposed at the left side of the one end of the subsidiary region SR, and the second sensing pad area TA2 may be disposed at the right side of the one end of the subsidiary region SR.

[0130] The circuit board 30 described above may be attached to the display pad DP and the sensing pads TP1 and TP2 using an anisotropic conductive film. Therefore, the leads of the circuit board 30 may be electrically connected to the display pad DP and the sensing pads TP1 and TP2.

[0131] Figure 5 is a plan view showing a sensing unit and associated elements according to an exemplary embodiment of the present disclosure. Figure 6 yes Figure 5 A magnified view of a portion of the sensing area.

[0132] Reference Figure 5 , the sensing unit TDU includes a non-sensing area TPA and a sensing area TSA configured to sense a user's touch. The non-sensing area TPA may include a first non-sensing area TPA1 disposed around the sensing area TSA and a second non-sensing area TPA2 disposed inside the sensing area TSA. The sensing area TSA may overlap with the display area DA described above, the first non-sensing area TPA1 may overlap with the first non-display area NDA1, and the second non-sensing area TPA2 may overlap with the second non-display area NDA2.

[0133] Although in Figure 5 The hole AH and the second non-sensing area TPA2 in the example shown in FIG. Figure 4 The hole AH and the second non-display area NDA2 are relatively wide, but the shape of the second non-sensing area TPA2 may be substantially the same as that of the second non-display area NDA2.

[0134] The sensing unit TDU may include sensing electrodes RE and TE, sensing lines RL, TL1 and TL2 , and sensing pads TP1 and TP2 .

[0135] The sensing electrodes RE and TE may be disposed in the sensing area TSA. The sensing electrodes RE and TE may include a first sensing electrode RE and a second sensing electrode TE. The first sensing electrode RE or the second sensing electrode TE may be a driving electrode, and the other may be a sensing electrode. Figure 5 In the example shown in , the first sensing electrode RE is a sensing electrode, and the second sensing electrode TE is a driving electrode.

[0136] Reference Figure 5 and Figure 6, the first sensing electrodes RE may extend along the first direction DR1 and may be repeatedly arranged in a plurality of rows. The first sensing electrodes RE may be electrically connected to each other. The second sensing electrodes TE may extend along the second direction DR2 and may be repeatedly arranged in a plurality of columns. The second sensing electrodes TE may be electrically connected to each other. The first sensing electrodes RE adjacent to each other in the first direction DR1 may be electrically connected via the first connector BE1, and the second sensing electrodes TE adjacent to each other in the second direction DR2 may be electrically connected via the second connector BE2.

[0137] The first sensing electrode RE may be electrically separated from the second sensing electrode TE. The first sensing electrode RE may be physically separated from the second sensing electrode TE. In order to electrically separate the first sensing electrode RE from the second sensing electrode TE at their intersection, the first connector BE1 and the second connector BE2 are formed as conductive layers located on different layers, thereby achieving insulation between the first sensing electrode RE and the second sensing electrode TE.

[0138] At least some of the first sensing electrode RE and the second sensing electrode TE may have a rhombus shape. Some of the first sensing electrode RE and the second sensing electrode TE may have a truncated rhombus shape. For example, the first sensing electrode RE and the second sensing electrode TE other than the first sensing electrode RE and the second sensing electrode TE positioned at both ends of the extension direction may have a rhombus shape. The first sensing electrode RE and the second sensing electrode TE positioned at both ends may have a triangular shape of a rhombus cut in half. The rhombus-shaped first sensing electrode RE and the second sensing electrode TE may have substantially the same size and shape. The triangular-shaped first sensing electrode RE and the second sensing electrode TE may have substantially the same size and shape. However, it will be understood that the present disclosure is not limited thereto. The shape and size of the first sensing electrode RE and the second sensing electrode TE may be changed in various ways.

[0139] The first connectors BE1 may have a shape extending from the first sensing electrodes RE. Each of the first connectors BE1 may connect vertices of a rhombus or triangle of adjacent first sensing electrodes RE. The first connectors BE1 may be disposed on the same layer as the first sensing electrodes RE.

[0140] The second connection member BE2 can be connected through the contact holes CNT1-1 and CNT1-2 (see Figure 7 ) is connected to the second sensing electrode TE. Each of the second connectors BE2 may have a shape that is bent at least once. Figure 6In the embodiment, the second connector BE2 is bent into a shape of “<” or ">”, but the shape of the second connector BE2 is not limited thereto. In addition, since the second sensing electrodes TE adjacent to each other in the second direction DR2 are connected by a plurality of second connectors BE2, the second sensing electrodes TE adjacent to each other in the second direction DR2 can be stably connected to each other even when any one of the second connectors BE2 is disconnected. Figure 6 The second sensing electrodes TE adjacent to each other in the example shown in FIG. 1 are connected by two second connectors BE2 , but the number of the second connectors BE2 is not limited thereto.

[0141] The conductive pattern DE may be electrically separated from the first sensing electrode RE and the second sensing electrode TE. That is, the conductive pattern DE may be spaced apart from the first sensing electrode RE and the second sensing electrode TE. Each of the conductive patterns DE may be surrounded by the corresponding first sensing electrode RE and the corresponding second sensing electrode TE.

[0142] Each of the conductive patterns DE may be smaller than the corresponding first sensing electrode RE and the corresponding second sensing electrode TE. Figure 6 Each of the first sensing electrode RE, the second sensing electrode TE, and the conductive pattern DE has a rhombus shape when viewed from the top in the example shown in , but the shape of each of the first sensing electrode RE, the second sensing electrode TE, and the conductive pattern DE is not limited thereto.

[0143] Due to the conductive pattern DE, parasitic capacitance between the second electrode of the light emitting element layer EML and the driving electrode TE or the sensing electrode RE may be reduced. When the parasitic capacitance is reduced, a charging speed for charging the mutual capacitance between the first sensing electrode RE and the second sensing electrode TE may be increased.

[0144] Reference Figure 5 The plurality of sensing signal lines may be disposed in the first non-sensing area TPA1 on the outside of the sensing area TSA. The sensing signal lines extend from the sensing pad areas TA1 and TA2 positioned in the subsidiary area SR through the bending area BR to the first non-sensing area TPA1 overlapping the first non-display area NDA1 of the main area MR.

[0145] The sensing signal line may include a guard line GL and a ground line GRL.

[0146] The sensing lines RL, TL1, and TL2 may include a first sensing line RL connected to the first sensing electrode RE and second sensing lines TL1 and TL2 connected to the second sensing electrode TE. Figure 5 In the exemplary embodiment shown in , the first sensing line RL is a sensing line, and the second sensing lines TL1 and TL2 are driving lines.

[0147] One end of the first sensing line RL may be electrically connected to the first sensing electrode RE, and the other end of the first sensing line RL may be connected to the second sensing pad TP2. Specifically, the first sensing electrode RE disposed on one side of the sensing area TSA may be connected to one end of the first sensing line RL. Figure 5 As shown in , some of the first sensing electrodes RE electrically connected to each other in the first direction DR1 disposed at the right end of the sensing area TSA may be connected to the first sensing line RL.

[0148] The first sensing line RL may extend from the first non-sensing area TPA1 where the second sensing pad TP2 is disposed to an edge of the sensing area TSA. The first sensing line RL may be electrically connected to the first sensing electrode RE at the edge of the sensing area TSA.

[0149] One end of the second sensing lines TL1 and TL2 may be electrically connected to the second sensing electrode TE, and the other ends of the second sensing lines TL1 and TL2 may be connected to the first sensing pad TP1. Specifically, the second sensing electrode TE disposed on one side of the sensing area TSA may be connected to one end of the second sensing line TL1, and the second sensing electrode TE disposed on the other side of the sensing area TSA may be connected to one end of the second sensing line TL2. For example, Figure 5 As shown in , some of the second sensing electrodes TE electrically connected to each other in the second direction DR2 located on the lowermost side may be connected to the second sensing line TL1 , and some of the second sensing electrodes TE disposed on the uppermost side may be connected to the second sensing line TL2 .

[0150] The second sensing lines TL1 and TL2 may extend from the first non-sensing area TPA1 of the sensing unit TDU where the first sensing pad TP1 is disposed to an edge of the sensing area TSA. The second sensing lines TL1 and TL2 may be electrically connected to the second sensing electrode TE at the edge of the sensing area TSA.

[0151] The ground line GRL may be disposed outside the sensing signal line. The ground line GRL may include a first ground line GRL1, a second ground line GRL2, and a third ground line GRL3. The first to third ground lines GRL1, GRL2, and GRL3 may be disposed in the first non-sensing area TPA1 to surround the sensing area TSA and the sensing lines RL, TL1, and TL2 in a ring shape.

[0152] The first ground line GRL1 may cover the first sensing line RL on the outer side of the first sensing line RL disposed on the right side of the first non-sensing area TPA1. Figure 5As shown in FIG, the first ground line GRL1 may be disposed at the right end of the first sensing line RL disposed on the right side of the first non-sensing area TPA1, and may be disposed on the right and lower side of the first sensing line RL extending to the lower side of the first non-sensing area TPA1.

[0153] The second ground line GRL2 may cover the inner side of the first sensing line RL on the lower side of the first non-sensing area TPA1 and the outer side of the second sensing line TL1 disposed on the lower side of the first non-sensing area TPA1. Figure 5 As shown in , the second ground line GRL2 may be disposed at the right side and the lower side of the second sensing line TL1 disposed on the lower side of the first non-sensing area TPA1, and may be disposed on the left side of the first sensing line RL extending to the lower side of the first non-sensing area TPA1 to cover the second sensing line TL1 disposed on the right side among the second sensing lines TL1 disposed on the lower side of the first non-sensing area TPA1 and the first sensing line RL disposed on the left side among the first sensing lines RL extending to the lower side of the first non-sensing area TPA1. The second ground line GRL2 may be connected to the rightmost first sensing pad TP1 among the first sensing pads TP1 and the leftmost second sensing pad TP2 among the second sensing pads TP2.

[0154] The third ground line GRL3 may cover the second sensing line TL2 on the outer side of the second sensing line TL2 disposed on the upper side and the left side of the first non-sensing area TPA1. Figure 5 As shown in , the third ground line GRL3 may be disposed on the upper, left, and lower sides of the second sensing line TL2 disposed on the upper and left ends among the second sensing lines TL2 disposed on the upper and left sides of the first non-sensing area TPA1.

[0155] A ground voltage may be applied to the first to third ground lines GRL1, GRL2, and GRL3. The first to third ground lines GRL1, GRL2, and GRL3 may serve to mitigate electrostatic shock that may be applied to the first and second sensing lines RL and TL1 and TL2.

[0156] The guard lines GL may be disposed between the sensing lines RL, TL1, and TL2 and the ground line GRL. The guard lines GL may include first, second, third, fourth, and fifth guard lines GL1, GL2, GL3, GL4, and GL5.

[0157] The first guard line GL1 may be disposed between the outermost first sensing lines RL among the first sensing lines RL disposed on the right side of the first non-sensing area TPA1 and the first ground line GRL1 .

[0158] The second guard line GL2 may be disposed between the innermost first sensing line RL among the first sensing lines RL disposed on the lower side of the first non-sensing area TPA1 and the second ground line GRL2. Figure 5 As shown in , the innermost first sensing line RL among the first sensing lines RL may be the leftmost first sensing line RL among the first sensing lines RL.

[0159] The third guard line GL3 may be disposed between the rightmost second sensing line TL1 among the second sensing lines TL1 disposed on the lower side of the first non-sensing area TPA1 and the second ground line GRL2 .

[0160] A fourth guard line GL4 may be disposed between the innermost second sensing line TL2 among the second sensing lines TL2 disposed on the left side of the first non-sensing area TPA1 and the sensing area TSA and between the outermost second sensing line TL1 among the second sensing lines TL1 disposed on the lower side of the first non-sensing area TPA1 and the innermost second sensing line TL2 among the second sensing lines TL2 disposed on the lower side of the first non-sensing area TPA1.

[0161] A fifth guard line GL5 may be disposed between the outermost second sensing lines TL2 of the second sensing lines TL2 disposed on the left and upper sides of the first non-sensing area TPA1 and the third ground line GRL3 .

[0162] A ground voltage may be applied to the first to fifth guard lines GL1, GL2, GL3, GL4, and GL5. The first to fifth guard lines GL1, GL2, GL3, GL4, and GL5 may prevent signal interference that may occur between adjacent lines.

[0163] The second non-sensing area TPA2 may be disposed to surround the hole AH. The hole AH may be disposed substantially at the center of the second non-sensing area TPA2.

[0164] At least one of the first sensing electrode RE and the second sensing electrode TE disposed adjacent to the second non-sensing area TPA2 may be separated from each other at the hole AH and thus may be spaced apart from each other. In addition, at least one of the first sensing electrode RE and the second sensing electrode TE intersecting the hole AH may be separated from each other at the hole AH. Therefore, in the second non-sensing area TPA2, a connection line electrically connecting the first sensing electrode RE spaced apart from each other along the first direction DR1 at the hole AH and a connection line electrically connecting the second sensing electrode TE spaced apart from each other along the second direction DR2 at the hole AH may also be disposed. This will be described in more detail below with reference to other drawings.

[0165] In addition, as described above, the sensing unit TDU may include an alignment mark. Specifically, after the process of forming the hole AH passing through the sensing unit TDU, an alignment mark for checking the alignment of the hole AH may be provided in the second non-sensing area TPA2 of the sensing unit TDU corresponding to the second non-display area NDA2. This will be described in more detail below with reference to other drawings.

[0166] In the following description, the sensing area TSA is referred to as the display area DA, the first non-sensing area TPA1 is referred to as the first non-display area NDA1, and the second non-sensing area TPA2 is referred to as the second non-display area NDA2 unless it is necessary to distinguish them.

[0167] Figure 7 yes Figure 6 Magnified view of area A.

[0168] Reference Figure 6 and Figure 7 , the first sensing electrode RE, the second sensing electrode TE, the first connector BE1, and the second connector BE2 may have a grid pattern. The conductive pattern DE may also have a grid pattern. When the first sensing electrode RE, the second sensing electrode TE, the first connector BE1, and the second connector BE2 have a grid pattern, the conductive layer forming the first sensing electrode RE, the second sensing electrode TE, the first connector BE1, and the second connector BE2 may be made of an opaque material. In the following description, the first sensing electrode RE and the second sensing electrode TE have a grid pattern, but the present disclosure is not limited thereto.

[0169] The first sensing electrode RE, the second sensing electrode TE, and the conductive pattern DE may be spaced apart from each other. There may be gaps between the first sensing electrode RE and the second sensing electrode TE, between the first sensing electrode RE and the conductive pattern DE, between the second sensing electrode TE and the conductive pattern DE, and between the second sensing electrode TE and the first connector BE1. For ease of explanation, the boundary between the first sensing electrode RE and the second sensing electrode TE, the boundary between the second sensing electrode TE and the first connector BE1, and the boundary between the first sensing electrode RE and the first connector BE1 are shown in FIG. Figure 7 Indicated by dotted line.

[0170] The first connector BE1 may be disposed between the first sensing electrodes RE. The first connector BE1 may extend from each of the first sensing electrodes RE. Therefore, the first connector BE1 may be connected to the first sensing electrode RE without any additional contact hole.

[0171] The second connector BE2 may be connected to the second sensing electrode TE through the contact holes CNT1-1 and CNT1-2, respectively. One end of the second connector BE2 may be connected to one of the second sensing electrodes TE adjacent to each other in the second direction DR2 through the contact hole CNT1-1. The other end of the second connector BE2 may be connected to another of the second sensing electrodes TE adjacent to each other in the second direction DR2 through the contact hole CNT1-2.

[0172] The second connector BE2 may overlap with the first sensing electrode RE or the second sensing electrode TE. Alternatively, the second connector BE2 may overlap with the first connector BE1 instead of the first sensing electrode RE. Alternatively, the second connector BE2 may overlap with the first sensing electrode RE and the first connector BE1. The second connector BE2 may be disposed on a different layer from the first connector BE1. Therefore, even if the second connector BE2 overlaps with the first connector BE1, a short circuit can be prevented from occurring.

[0173] The first sensing electrode RE, the second sensing electrode TE, the first connector BE1, and the second connector BE2 may not overlap the sub-pixels R, G, and B. That is, the first sensing electrode RE, the second sensing electrode TE, the first connector BE1, and the second connector BE2 may be disposed along an edge of each of the sub-pixels R, G, and B. That is, the first sensing electrode RE, the second sensing electrode TE, the first connector BE1, and the second connector BE2 may overlap a bank defining each of the sub-pixels R, G, and B.

[0174] According to an exemplary embodiment of the present disclosure, as described above, since the first sensing electrode RE, the second sensing electrode TE, the first connector BE1, and the second connector BE2 have a mesh pattern, the sub-pixels R, G, and B may not overlap with the first sensing electrode RE, the second sensing electrode TE, the first connector BE1, and the second connector BE2. Therefore, it is possible to prevent the brightness of light output from the sub-pixels R, G, and B from being reduced, which may occur when light is shielded by the first sensing electrode RE, the second sensing electrode TE, the first connector BE1, and the second connector BE2.

[0175] The sub-pixels R, G, and B may include a first sub-pixel R that emits a first color light, a second sub-pixel G that emits a second color light, and a third sub-pixel B that emits a third color light. Figure 7 In the example shown in FIG. 1 , the first color is red, the second color is green, and the third color is blue, but the present disclosure is not limited thereto. Figure 7In the example shown in FIG. 1 , the first subpixel R, the second subpixel G, and the third subpixel B have a hexagonal shape when viewed from the top, but the present disclosure is not limited thereto. When viewed from the top, the first subpixel R, the second subpixel G, and the third subpixel B may have a polygonal shape other than a hexagon, or a circular shape or an elliptical shape. In addition, although Figure 7 In the example shown in , the first subpixel R, the second subpixel G, and the third subpixel B all have substantially the same size, but the sizes of the subpixels R, G, and B are not limited thereto. For example, the third subpixel B may have the largest size, and the second subpixel G may have the smallest size. Alternatively, the size of the first subpixel R may be substantially equal to the size of the third subpixel B, and the size of the second subpixel G may be smaller than the size of each of the first subpixel R and the third subpixel B.

[0176] A pixel PX refers to a group of sub-pixels that can represent grayscale values. Figure 7 In the example shown in , one pixel PX includes one first sub-pixel R, two second sub-pixels G and one third sub-pixel B. However, it will be understood that the present disclosure is not limited thereto. For example, one pixel PX may include one first sub-pixel R, one second sub-pixel G and one third sub-pixel B.

[0177] Figure 8 It is along Figure 7 A cross-sectional view taken along line VIII-VIII'.

[0178] Reference Figure 7 and Figure 8 , the thin film transistor layer TFTL is disposed on the substrate SUB. The thin film transistor layer TFTL includes a buffer layer BF, a semiconductor layer ACT, a first insulating layer IL1, a first conductive layer 110, a second insulating layer IL2, a second conductive layer 120, a third insulating layer IL3, and a fourth insulating layer IL4. Each of the above layers may be composed of a single layer or a stacked body including a plurality of layers. Other layers may also be disposed between the layers.

[0179] The buffer layer BF may be formed on the surface of the substrate SUB. The buffer layer BF may be formed on one surface of the substrate SUB to protect the light emitting layer 152 of the thin film transistor and the light emitting element layer EML from moisture that may penetrate the substrate SUB. The buffer layer BF may be formed of a plurality of inorganic layers alternately stacked on each other. For example, the buffer layer BF may be composed of a multilayer in which one or more inorganic layers of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer are alternately stacked on each other. The buffer layer BF may be omitted.

[0180] The semiconductor layer ACT is disposed on the buffer layer BF. The semiconductor layer ACT forms channels of multiple transistors of the pixel. The semiconductor layer ACT may include polycrystalline silicon. Polycrystalline silicon may be formed by crystallizing amorphous silicon. When the semiconductor layer ACT is made of polycrystalline silicon by doping ions into the semiconductor layer ACT, the semiconductor layer ACT may have conductivity. Therefore, the semiconductor layer ACT may include a source region and a drain region and a channel region of each of the multiple transistors. The source region and the drain region may be connected to both sides of each channel region.

[0181] According to another exemplary embodiment, the semiconductor layer ACT may include single crystal silicon, low temperature polycrystalline silicon, amorphous silicon, or an oxide semiconductor. The oxide semiconductor may include, for example, a binary compound (AB) containing indium, zinc, gallium, tin, titanium, aluminum, hafnium (Hf), zirconium (Zr), magnesium (Mg), etc. x ), ternary compounds (AB x C y ) and quaternary compounds (AB x C y D z According to an exemplary embodiment of the present disclosure, the semiconductor layer ACT may include an oxide including indium, tin, and zinc (ITZO) or an oxide including indium, gallium, and zinc (IGZO).

[0182] The first insulating layer IL1 is disposed on the semiconductor layer ACT. The first insulating layer IL1 may be disposed substantially over the entire surface of the substrate SUB. The first insulating layer IL1 may be a gate insulating layer having a gate insulating function.

[0183] The first insulating layer IL1 may include silicon compounds, metal oxides, etc. For example, the first insulating layer IL1 may include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, titanium oxide, etc. The first insulating layer IL1 may consist of a single layer or multiple layers of different materials stacked on each other.

[0184] The first conductive layer 110 is disposed on the first insulating layer IL1. The first conductive layer 110 may include a gate electrode 111 of a transistor, a scan line connected to the gate electrode 111, and a first electrode of a capacitor. The first conductive layer 110 may include at least one metal selected from the group consisting of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The first conductive layer 110 may be composed of a single layer or a plurality of layers.

[0185] The second insulating layer IL2 is disposed on the first conductive layer 110. The second insulating layer IL2 may be substantially disposed over the entire surface of the substrate SUB. The second insulating layer IL2 may insulate the first conductive layer 110 from the second conductive layer 120. The second insulating layer IL2 may be an interlayer dielectric layer. The second insulating layer IL2 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, and zinc oxide.

[0186] The second conductive layer 120 is disposed on the second insulating layer IL2. The second conductive layer 120 may include the data line described above, the first source / drain electrode 121 and the second source / drain electrode 122 of the transistor. The first source / drain electrode 121 and the second source / drain electrode 122 may be connected to the source region and the drain region of the semiconductor layer ACT through contact holes penetrating the second insulating layer IL2 and the first insulating layer IL1. According to an exemplary embodiment of the present disclosure, the first source / drain electrode 121 may be a source electrode of the transistor, and the second source / drain electrode 122 may be a drain electrode of the transistor.

[0187] The second conductive layer 120 may include at least one metal selected from the group consisting of aluminum (Al), molybdenum (Mo), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The second conductive layer 120 may be composed of a single layer or a multilayer. For example, the second conductive layer 120 may have a stacked structure of Ti / Al / Ti, Mo / Al / Mo, Mo / AlGe / Mo, Ti / Cu, etc.

[0188] The third insulating layer IL3 is disposed on the second conductive layer 120. The third insulating layer IL3 can insulate and protect the transistor. The third insulating layer IL3 can be a passivation layer. The third insulating layer IL3 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, and zinc oxide.

[0189] The fourth insulating layer IL4 is disposed on the third insulating layer IL3. The fourth insulating layer 124 may be a via layer. The fourth insulating layer IL4 may provide a flat surface over the level difference of the transistor. The fourth insulating layer IL4 may include an organic insulating material such as polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene oxide resin, polyphenylene sulfide resin, and benzocyclobutene (BCB) resin.

[0190] The light emitting element layer EML is disposed on the thin film transistor layer TFTL and may include a first electrode layer 151 , a light emitting layer 152 , a second electrode layer 153 and a pixel defining film 140 .

[0191] In each of the sub-pixels R, G, and B, the first electrode layer 151, the light-emitting layer 152, and the second electrode layer 153 are sequentially stacked on each other so that holes from the first electrode layer 151 and electrons from the second electrode layer 153 are combined with each other in the light-emitting layer 152 to emit light. The second sub-pixel G and the third sub-pixel B may have the same Figure 8 The configuration of the first sub-pixel R shown in FIG. 1 is substantially the same as that of FIG.

[0192] The first electrode layer 151 may be disposed on the fourth insulating layer IL4. The anode electrodes of the sub-pixels R, G, and B may be formed as the first electrode layer 151. The first electrode layer 151 may be electrically connected to the second source / drain electrode 122 (or the drain electrode of the transistor) through a contact hole penetrating the fourth insulating layer IL4 and the third insulating layer IL3. However, it will be understood that the present disclosure is not limited thereto. The anode electrode may be connected to the first source / drain electrode 121 through a contact hole penetrating the fourth insulating layer IL4 and the third insulating layer IL3.

[0193] The first electrode layer 151 may include a material layer having a high work function (such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and indium oxide (In 2 O 3 )) and a stacked structure of a reflective material layer (such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca) or a mixture thereof). The layer with a higher work function may be disposed on the reflective material layer so that the layer with a higher work function is disposed closer to the light emitting layer 152. The first electrode layer 151 may have, but is not limited to, ITO / Mg, ITO / MgF 2 , ITO / Ag and ITO / Ag / ITO multilayer structures.

[0194] The pixel defining film 140 may be disposed on the first electrode layer 151 and the fourth insulating layer IL4. The pixel defining film 140 may be formed on the fourth insulating layer IL4 to separate the first electrode layer 151 from each other to define sub-pixels R, G, and B. The pixel defining film 140 may include an opening that exposes at least a portion of the first electrode layer 151. That is, the pixel defining film 140 may be formed to cover an edge of the first electrode layer 151. The opening may define an emission region of each of the sub-pixels R, G, and B.

[0195] The pixel defining film 140 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, and zinc oxide, or an organic insulating material such as polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene oxide resin, polyphenylene sulfide resin, and benzocyclobutene (BCB) resin. The pixel defining film 140 may be composed of a single layer or multiple layers of different materials stacked on each other.

[0196] The light-emitting layer 152 is disposed in the opening of the pixel defining film 140. The light-emitting layer 152 may include an organic material and emit light of a certain color. For example, the light-emitting layer 152 may include a hole transport layer, an organic material layer, and an electron transport layer. In this case, the light-emitting layer 152 of the first sub-pixel R may emit red light, the light-emitting layer 152 of the second sub-pixel G may emit green light, and the light-emitting layer 152 of the third sub-pixel B may emit blue light.

[0197] Optionally, the light-emitting layer 152 of sub-pixels R, G, and B may be composed of a single layer that emits white light, ultraviolet light, or blue light. In this case, the first sub-pixel R may be stacked with a red color filter layer that transmits red light, the second sub-pixel G may be stacked with a green color filter layer that transmits green light, and the third sub-pixel B may be stacked with a blue color filter layer that transmits blue light. The red color filter layer, the green color filter layer, and the blue color filter layer may be disposed on the thin film encapsulation layer TFEL. In addition, the first sub-pixel R may be stacked with a red wavelength conversion layer that converts ultraviolet light or blue light into red light, the second sub-pixel G may be stacked with a green wavelength conversion layer that converts ultraviolet light or blue light into green light, and the third sub-pixel B may be stacked with a blue wavelength conversion layer that converts ultraviolet light or blue light into blue light or a transmission layer that transmits blue light as blue light (transmits blue light). The red wavelength conversion layer, the green wavelength conversion layer, and the blue wavelength conversion layer may be disposed on the thin film encapsulation layer TFEL. For example, a red wavelength conversion layer may be disposed between the thin film encapsulation layer TFEL and the red color filter layer, a green wavelength conversion layer may be disposed between the thin film encapsulation layer TFEL and the green color filter layer, and a blue wavelength conversion layer may be disposed between the thin film encapsulation layer TFEL and the blue color filter layer.

[0198] The second electrode layer 153 is disposed on the light emitting layer 152 and the pixel defining film 140. The cathode electrode may be formed as the second electrode layer 153. The cathode electrode may be disposed throughout the display area DA. The second electrode layer 153 may include a material having a small work function, such as Li, Ca, LiF / Ca, LiF / Al, Al, Mg, Ag, Pt, Pd, Ni, Au, Nd, Ir, Cr, BaF 2, Ba or a composite or mixture thereof. The second electrode layer 153 may further include a transparent metal oxide layer disposed on a material layer having a small work function. A capping layer may be formed on the second electrode layer 153.

[0199] The thin film encapsulation layer TFEL may be disposed on the light emitting element layer EML. The thin film encapsulation layer TFEL is disposed on the second electrode layer 153. As described above, the thin film encapsulation layer TFEL may include at least one inorganic layer to prevent oxygen or moisture from penetrating into the light emitting layer 152 and the second electrode layer 153. In addition, the thin film encapsulation layer TFEL may include at least one organic layer to protect the light emitting element layer EML from particles such as dust. For example, the thin film encapsulation layer TFEL may include a first inorganic layer 161 disposed on the second electrode layer 153, an organic layer 162 disposed on the first inorganic layer 161, and a second inorganic layer 163 disposed on the organic layer 162.

[0200] The first inorganic layer 161 and the second inorganic layer 163 may be formed of, but are not limited to, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0201] The organic layer 162 may be formed of, but is not limited to, acrylic resin, epoxy resin, phenol resin, polyamide resin, and polyimide resin.

[0202] The sensing layer TSL may be disposed on the thin film encapsulation layer TFEL, and a buffer layer may be formed between the thin film encapsulation layer TFEL and the sensing layer TSL.

[0203] The sensing layer TSL may include a first sensing conductive layer 171 , a first sensing insulating layer TIL1 , a second sensing conductive layer 172 , and a second sensing insulating layer TIL2 .

[0204] Each of the above-mentioned layers may be composed of a single layer or a laminate including a plurality of layers. Other layers may also be provided between the layers.

[0205] The first sensing conductive layer 171 is disposed on the second inorganic layer 163. The second connection member BE2 may be formed as the first sensing conductive layer 171. In some exemplary embodiments, an alignment mark formed in the second non-display area NDA2 may also be formed as the first sensing conductive layer 171. This will be described in more detail below with reference to other drawings.

[0206] The first sensing conductive layer 171 may include a metal or a transparent conductive layer. For example, the metal may include aluminum, titanium, copper, molybdenum, silver, or an alloy thereof. The transparent conductive layer may include a transparent conductive oxide (such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and indium tin zinc oxide (ITZO)), a conductive polymer (such as PEDOT), a metal nanowire, graphene, etc.

[0207] The first sensing insulating layer TIL1 may be disposed on the first sensing conductive layer 171. The first sensing insulating layer TIL1 insulates the first sensing conductive layer 171 from the second sensing conductive layer 172 disposed on the first sensing insulating layer TIL1. The first sensing insulating layer TIL1 may include an organic layer and / or an inorganic layer. The organic layer may include, for example, at least one selected from the group consisting of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin. The inorganic layer may include, for example, at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0208] The second sensing conductive layer 172 may be disposed on the first sensing insulating layer TIL1. The first sensing electrode RE, the second sensing electrode TE, and the first connector BE1 may be formed as the second sensing conductive layer 172. In some exemplary embodiments, an alignment mark formed in the second non-display area NDA2 may also be formed as the second sensing conductive layer 172. This will be described in more detail below with reference to other drawings.

[0209] The second sensing conductive layer 172 may be electrically connected to a portion of the first sensing conductive layer 171 through a contact hole CNT1-1 penetrating the first sensing insulating layer TIL1. Specifically, the second sensing electrode TE included in the second sensing conductive layer 172 may be electrically connected to the second connector BE2 included in the first sensing conductive layer 171 through a contact hole CNT1-1 penetrating the first sensing insulating layer TIL1. Figure 6 As shown in FIG. 1 , the second sensing electrodes TE adjacent to each other in the second direction DR2 may be electrically connected to each other through the second connector BE2 .

[0210] The second sensing conductive layer 172 may include the same material as that of the first sensing conductive layer 171 , or may include one or more selected from the materials listed above as the constituent material of the first sensing conductive layer 171 .

[0211] At least one of the first sensing conductive layer 171 and the second sensing conductive layer 172 may include an opaque conductive layer.

[0212] In some exemplary embodiments, the first sensing conductive layer 171 and the second sensing conductive layer 172 may include the same material. In this case, the material of the first sensing conductive layer 171 and the second sensing conductive layer 172 may include an opaque conductive layer having a low transmittance for specific light. The specific light may include visible light or infrared light.

[0213] In some other exemplary embodiments, the first sensing conductive layer 171 and the second sensing conductive layer 172 may include different materials. For example, the first sensing conductive layer 171 may include an opaque conductive layer, and the second sensing conductive layer 172 may include a transparent conductive layer. In this case, the first sensing conductive layer 171 formed of an opaque conductive layer may include an alignment mark disposed in the second non-display area NDA2. On the other hand, the first sensing conductive layer 171 may include a transparent conductive layer, and the second sensing conductive layer 172 may include an opaque conductive layer. In this case, the second sensing conductive layer 172 formed of an opaque conductive layer may include an alignment mark disposed in the second non-display area NDA2. In addition, the first sensing conductive layer 171 and the second sensing conductive layer 172 may include different opaque conductive layers. In this case, the transmittance of the first sensing conductive layer 171 with respect to a specific light may be different from the transmittance of the second sensing conductive layer 172 with respect to a specific light. Any one of the first sensing conductive layer 171 and the second sensing conductive layer 172 composed of a material having a lower transmittance may include an alignment mark in the second non-display area NDA2. That is, the sensing conductive layer composed of a material having a low transmittance with respect to specific light may include an alignment mark in the second non-display area NDA2. A detailed description thereof will be given later.

[0214] The second sensing insulating layer TIL2 may be disposed on the second sensing conductive layer 172. The second sensing insulating layer TIL2 may provide a flat surface over a level difference generated by the first sensing conductive layer 171 and the second sensing conductive layer 172. The second sensing insulating layer TIL2 may include the same material as that of the first sensing insulating layer TIL1, or may include one or more selected from the materials listed above as constituent materials of the first sensing insulating layer TIL1.

[0215] Fig. 9 It is shown Figure 5 An enlarged view of an example of area B. Fig.10 is a plan view of an alignment mark according to an exemplary embodiment of the present disclosure.

[0216] Fig. 9 is an enlarged view showing an area B including a second non-display area NDA2 (or a second non-sensing area TPA2) and a portion of the display area DA (or the sensing area TSA) adjacent to the second non-display area NDA2. As described above, the sensing area TSA may overlap with the display area DA, and the second non-sensing area TPA2 may overlap with the second non-display area NDA2. Therefore, for ease of explanation, the sensing area TSA is referred to as the display area DA, and the second non-sensing area TPA2 is referred to as the second non-display area NDA2. In addition, Fig. 9Only the first sensing conductive layer 171 and the second sensing conductive layer 172 (in the FIG. 1B ) included in the sensing layer TSL of the sensing unit TDU are shown. Figure 8 ).

[0217] Reference Fig. 9 , the second non-display area NDA2 may surround the main hole area MH overlapping the area where the hole AH is formed. The second non-display area NDA2 may include a dam area DMA and a peripheral area AHA. The peripheral area AHA may be disposed between the main hole area MH and the display area DA and may be adjacent to the display area DA, and the dam area DMA may be disposed between the main hole area MH and the peripheral area AHA and may be adjacent to the main hole area MH.

[0218] When viewed from the top, the shape and area of ​​the main hole area MH may be the same as the shape and area of ​​the hole AH. In some exemplary embodiments, when viewed from the top, the shape of the main hole area MH may be, but is not limited to, a shape similar to that of the second non-display area NDA2. In some other exemplary embodiments, when viewed from the top, the shape of the second non-display area NDA2 may be different from that of the main hole area MH.

[0219] The peripheral area AHA may be disposed between the main hole area MH and the display area DA, and may be adjacent to the display area DA. The peripheral area AHA may surround the main hole area MH and the dam area DMA. When viewed from the top, the peripheral area AHA may be formed in a ring shape, but is not limited to it. That is, because the peripheral area AHA surrounds the main hole area MH and the dam area DMA overlapping the hole AH, the shape of the peripheral area AHA may be determined according to the shape of the main hole area MH and / or the dam area DMA when viewed from the top.

[0220] In the peripheral area AHA, connection lines BER1 and BET and a plurality of alignment marks M may be provided, wherein the connection line BER1 is configured to connect the sensing electrodes RE spaced apart from each other around the hole AH, the connection line BET is configured to connect the sensing electrodes TE spaced apart from each other around the hole AH, and the plurality of alignment marks M are configured to check the alignment of the hole AH.

[0221] The connection lines BER1 and BET may include a first connection line BER1 and a second connection line BET. The connection lines BER1 and BET may be disposed along a perimeter of the peripheral area AHA.

[0222] The first connection wire BER1 may electrically connect the first sensing electrodes RE spaced apart from each other around the hole AH in the first direction DR1. The first connection wire BER1 may be disposed along one side (eg, lower side) of the periphery of the peripheral area AHA as a bypass through the peripheral area AHA.

[0223] The second connection wire BET may electrically connect the second sensing electrodes TE spaced apart from each other around the hole AH in the second direction DR2. The second connection wire BET may be disposed along the other side (eg, right side) of the perimeter of the peripheral area AHA as a bypass through the peripheral area AHA.

[0224] The first connection line BER1 and the second connection line BET extend in directions crossing each other, and thus may partially overlap each other. The first connection line BER1 and the second connection line BET may be formed as the second sensing conductive layer 172 (in Figure 8 Therefore, in order to prevent the first connection line BER1 and the second connection line BET formed as the same sensing conductive layer (e.g., the second sensing conductive layer 172) from being short-circuited at their intersections, one of the first connection line BER1 and the second connection line BET may include a bridge line BER2 formed as a sensing conductive layer different from the second sensing conductive layer 172 (e.g., the first sensing conductive layer 171).

[0225] According to an exemplary embodiment of the present disclosure, the first connection wires BER1 may be electrically connected to each other through the bridge wire BER2 without any physical contact with the second connection wire BET. Specifically, one end and the other end of the bridge wire BER2 may be electrically connected to the first connection wire BER1 through the second contact hole CNT2, which penetrates the first sensing insulating layer TIL1 (at one end and the other end of the bridge wire BER2) Figure 8 ).

[0226] A plurality of alignment marks M may be disposed in the peripheral area AHA to be adjacent to the dam area DMA. According to an exemplary embodiment of the present disclosure, the plurality of alignment marks M may be disposed so as not to overlap with the connecting wires BER1 and BET. For example, when viewed from the top, the plurality of alignment marks M may be disposed in the peripheral area AHA to be closer to the main hole area MH than the connecting wires BER1 and BET. However, it will be understood that the present disclosure is not limited thereto. When viewed from the top, the plurality of alignment marks M may be disposed in the peripheral area AHA to be closer to the display area DA than the connecting wires BER1 and BET. In some exemplary embodiments in which the plurality of alignment marks M and the connecting wires BER1 and BET are formed as different sensing conductive layers, the connecting wires BER1 and BET and the plurality of alignment marks M may overlap each other.

[0227] The plurality of alignment marks M may include a first alignment mark M1, a second alignment mark M2, a third alignment mark M3, and a fourth alignment mark M4. The first to fourth alignment marks M1, M2, M3, and M4 may be spaced apart from each other.

[0228] The alignment marks M1, M2, M3, and M4 may include main alignment marks M11, M21, M31, and M41 and auxiliary alignment marks M12, M22, M32, and M42, respectively. Each of the alignment marks M1, M2, M3, and M4 may have substantially the same function or configuration except for their positions. Specifically, when viewed from the top, the shapes of the alignment marks M1, M2, M3, and M4 may be substantially the same, but the orientations of the main alignment marks M11, M21, M31, and M41 may be different from each other.

[0229] Reference Fig.10 , the shape of the third alignment mark M3 when viewed from the top will be described in detail. Hereinafter, common features of the plurality of alignment marks M1, M2, M3, and M4 will be described based on the third alignment mark M3, and redundant descriptions will be omitted.

[0230] When viewed from the top, the third alignment mark M3 may have a stripe shape. When viewed from the top, the third alignment mark M3 may have a rectangular shape having a length Mx in the fourth direction d1 that is longer than a length My in the fifth direction d2 perpendicular to the fourth direction d1. In the following description, for ease of explanation, the length Mx of the longer side of the third alignment mark M3 is referred to as the length Mx of the third alignment mark M3, and the length My of the shorter side of the third alignment mark M3 is referred to as the width My of the third alignment mark M3.

[0231] When viewed from the top, the third alignment mark M3 may be formed to have a sufficient length Mx and a sufficient width My for accurately identifying the alignment mark when determining whether the hole AH is correctly aligned, which will be described later. In an exemplary embodiment, the length Mx of the third alignment mark M3 may be about 100 μm or more. Preferably, the length Mx of the third alignment mark M3 may be about 150 μm or more. The width My of the third alignment mark M3 may be in the range of about 50 μm to 100 μm.

[0232] The third alignment mark M3 may include a third main alignment mark M31 and a third auxiliary alignment mark M32. In an exemplary embodiment, the third main alignment mark M31 and the third auxiliary alignment mark M32 may have different sizes and may be spaced apart from each other in a certain direction. However, it will be understood that the present disclosure is not limited thereto. In some exemplary embodiments, the main alignment mark and the auxiliary alignment mark may have the same size and shape.

[0233] When viewed from the top, the third main alignment mark M31 may have a rectangular shape having a length Mx1 in the fourth direction d1 that is longer than a length My in the fifth direction d2. When viewed from the top, the length Mx1 of the third main alignment mark M31 in the fourth direction d1 may be 0.5 times the length Mx of the third alignment mark M3, and the length My of the third main alignment mark M31 in the fifth direction d2 may be equal to the width My of the third alignment mark M3. However, it will be understood that the present disclosure is not limited thereto.

[0234] The third auxiliary alignment mark M32 may be spaced apart from the third main alignment mark M31. A length Mx2 of the third auxiliary alignment mark M32 may be less than a length Mx1 of the third main alignment mark M31, and a length My of the third auxiliary alignment mark M32 may be equal to a length My of the third main alignment mark M31.

[0235] Return to reference Fig. 9 , when viewed from the top, the first alignment mark M1 may be disposed on the left side of the peripheral area AHA. The longer side of the first alignment mark M1 may be disposed in parallel with the second direction DR2. The first alignment mark M1 may be oriented such that the first main alignment mark M11 is positioned on the upper side along the second direction DR2 and the first auxiliary alignment mark M12 is positioned on the lower side along the second direction DR2. That is, the first alignment mark M1 is disposed on the left side of the peripheral area AHA such that, when viewed from the top, the first main alignment mark M11 is disposed on the upper side and the first auxiliary alignment mark M12 is disposed on the lower side.

[0236] When viewed from the top, the second alignment mark M2 may be spaced apart from the first alignment mark M1 in the first direction DR1 and disposed on the right side of the peripheral area AHA. A distance between the second alignment mark M2 and the first alignment mark M1 in the first direction DR1 may be greater than a diameter of the hole AH in the first direction DR1. In an exemplary embodiment, when the hole AH has a circular shape when viewed from the top, a distance between the second alignment mark M2 and the first alignment mark M1 in the first direction DR1 may be greater than the diameter of the hole AH.

[0237] The second alignment mark M2 may be oriented so that it is symmetrical with the first alignment mark M1 relative to the center point AHP of the hole AH. Therefore, the position of the main alignment mark M11 of the first alignment mark M1 may be opposite to the position of the main alignment mark M21 of the second alignment mark M2. The longer side of the second alignment mark M2 may be arranged in parallel with the second direction DR2. The second alignment mark M2 may be oriented so that the second main alignment mark M21 is positioned on the lower side along the second direction DR2 and the second auxiliary alignment mark M22 is positioned on the upper side along the second direction DR2. That is, when viewed from the top, the second alignment mark M2 may be formed so that the second main alignment mark M21 is positioned on the lower side and the second auxiliary alignment mark M22 is positioned on the upper side.

[0238] The third alignment mark M3 may be spaced apart from the first and second alignment marks M1 and M2 .

[0239] When viewed from the top, the third alignment mark M3 may be disposed on the lower side of the peripheral area AHA. The longer side of the third alignment mark M3 may be disposed in parallel with the first direction DR1. The third alignment mark M3 may be oriented such that the third main alignment mark M31 is positioned on one side in the first direction DR1 and the third auxiliary alignment mark M32 is positioned on the opposite side in the first direction DR1. That is, when viewed from the top, the third alignment mark M3 may be formed such that the third main alignment mark M31 is positioned on the right side and the third auxiliary alignment mark M32 is positioned on the left side.

[0240] When viewed from the top, the fourth alignment mark M4 may be spaced apart from the third alignment mark M3 in the second direction DR2 and disposed on the upper side of the peripheral area AHA. A distance between the fourth alignment mark M4 and the third alignment mark M3 in the second direction DR2 may be greater than a diameter of the hole AH in the second direction DR2.

[0241] The fourth alignment mark M4 may be oriented so that it is symmetrical with the third alignment mark M3 relative to the center point AHP of the hole AH. Therefore, the position of the main alignment mark M31 of the third alignment mark M3 may be opposite to the position of the main alignment mark M41 of the fourth alignment mark M4. The longer side of the fourth alignment mark M4 may be arranged in parallel with the first direction DR1. The fourth alignment mark M4 may be oriented so that the fourth main alignment mark M41 is positioned on the opposite side in the first direction DR1, and the fourth auxiliary alignment mark M42 is positioned on one side in the first direction DR1. That is, when viewed from the top, the fourth alignment mark M4 may be formed so that the fourth main alignment mark M41 is positioned on the left side, and the fourth auxiliary alignment mark M42 is positioned on the right side.

[0242] A side of the first main alignment mark M11 facing the first auxiliary alignment mark M12 and a side of the second main alignment mark M21 facing the second auxiliary alignment mark M22 may be located on the first extension line MPL1. In an exemplary embodiment, when viewed from the top, the side of the first main alignment mark M11 located on the first extension line MPL1 may be the lower side of the first main alignment mark M11, and the side of the second main alignment mark M21 located on the first extension line MPL1 may be the upper side of the second main alignment mark M21. The first extension line MPL1 may pass through the center of the main hole area MH (i.e., the center point AHP of the hole AH). However, it will be understood that the present disclosure is not limited thereto.

[0243] The side of the third main alignment mark M31 facing the third auxiliary alignment mark M32 and the side of the fourth main alignment mark M41 facing the fourth auxiliary alignment mark M42 may be located on the second extension line MPL2. In an exemplary embodiment, when viewed from the top, the side of the third main alignment mark M31 located on the second extension line MPL2 may be the left side of the third main alignment mark M31, and the side of the fourth main alignment mark M41 located on the second extension line MPL2 may be the right side of the fourth main alignment mark M41. The second extension line MPL2 may pass through the center of the main hole area MH (i.e., the center point AHP of the hole AH). However, it will be understood that the present disclosure is not limited thereto. In addition, the first extension line MPL1 and the second extension line MPL2 may be perpendicular to each other and may intersect each other at the center point AHP of the hole AH.

[0244] The dam area DMA may be disposed between the main hole area MH and the peripheral area AHA. In the dam area DMA, dams DM1 and DM2 and a groove GRV2 formed between the dams DM1 and DM2 may be disposed (see FIG. 2 ). Fig.11 ).

[0245] The dam area DMA may surround the main hole area MH. When viewed from the top, the dam area DMA may be, but is not limited to, formed in a ring shape. That is, because the dam area DMA surrounds the main hole area MH overlapping the hole AH, the shape of the dam area DMA may follow the shape of the main hole area MH when viewed from the top.

[0246] Fig.11 It is along Fig. 9 A cross-sectional view of the illustrated example taken along line XI-XI'.

[0247] In the following, reference will be made to Figure 8 , Fig. 9 and Fig.11 The stacked structure of the second non-display area NDA2 surrounding the main hole area MH in which the hole AH is formed is described in detail. Figure 8The stack structure of the display area DA is described, and thus, a redundant description will be omitted.

[0248] Reference Figure 8 , Fig. 9 and Fig.11 The substrate SUB and the buffer layer BF disposed on the substrate SUB may be disposed in the display area DA and the second non-display area NDA2 surrounding the main hole area MH. Specifically, the substrate SUB and the buffer layer BF disposed on the substrate SUB may be disposed throughout the display area DA, the peripheral area AHA, and the dam area DMA.

[0249] On the buffer layer BF of the second non-display area NDA2 , a first insulating layer IL1 , a second insulating layer IL2 , a third insulating layer IL3 , and a fourth insulating layer IL4 exposing at least a portion of the buffer layer BF may be disposed.

[0250] The display device may further include a plurality of dams DM1 and DM2. The dams DM1 and DM2 may be disposed in the dam area DMA of the substrate SUB. When viewed from the top, the dams DM1 and DM2 may have a closed curve shape surrounding the hole AH. According to this exemplary embodiment of the present disclosure, when viewed from the top, the plurality of dams DM1 and DM2 may have a ring shape surrounding the hole AH. The dams DM1 and DM2 may have a diameter larger than the diameter of the hole AH.

[0251] The plurality of dams DM1 and DM2 may include a first dam DM1 and a second dam DM2. The first dam DM1 may be disposed in the dam area DMA and may be disposed adjacent to the peripheral area AHA. The second dam DM2 may be disposed between the first dam DM1 and the main hole area MH. The first dam DM1 may be spaced apart from the second dam DM2.

[0252] The first dam DM1 may be formed of a second insulating layer IL2, a third insulating layer IL3, and a fourth insulating layer IL4 disposed in the dam area DMA. The fourth insulating layer IL4 of the first dam DM1 may include a level difference. In an exemplary embodiment, a height from an upper surface of the substrate SUB to an upper surface of the fourth insulating layer IL4 forming the first dam DM1 disposed in the dam area DMA may be greater than a height of an upper surface of the fourth insulating layer IL4 disposed in the display area DA.

[0253] Likewise, the second dam DM2 may be formed by the second insulating layer IL2, the third insulating layer IL3, and the fourth insulating layer IL4 disposed in the dam area DMA. The height from the upper surface of the substrate SUB to the upper surface of the fourth insulating layer IL4 forming the second dam DM2 disposed in the dam area DMA may be substantially equal to the height of the upper surface of the fourth insulating layer IL4 disposed in the display area DA. That is, the height of the first dam DM1 (i.e., the distance from the upper surface of the substrate SUB to the upper surface of the fourth insulating layer IL4 of the first dam DM1) may be greater than the height of the second dam DM2 (i.e., the distance from the upper surface of the substrate SUB to the upper surface of the fourth insulating layer IL4 of the second dam DM2).

[0254] The first dam DM1 and the second dam DM2 may block a permeation path through which oxygen or moisture is introduced from the hole AH. In addition, the first dam DM1 may define a boundary in which the organic layer 162 of the thin film encapsulation layer TFEL will be formed. In addition, the second dam DM2 may prevent the hole AH and elements formed in the second non-display area NDA2 adjacent to the main hole area MH where the hole AH is formed from being damaged by external impact.

[0255] Although there are two dams DM1 and DM2 surrounding the hole AH in the drawing, the number of dams is not limited thereto. The display device may include more than two dams.

[0256] The display device may further include a plurality of grooves GRV1, GRV2, and GRV3. The grooves GRV1, GRV2, and GRV3 may be disposed in the dam area DMA and the peripheral area AHA of the substrate SUB. When viewed from the top, the plurality of grooves GRV1, GRV2, and GRV3 may have a closed curve shape surrounding the hole AH. According to an exemplary embodiment of the present disclosure, when viewed from the top, the plurality of grooves GRV1, GRV2, and GRV3 may have an annular shape surrounding the hole AH. Each of the plurality of grooves GRV1, GRV2, and GRV3 may have a diameter larger than the diameter of the hole AH.

[0257] The plurality of grooves GRV1, GRV2, and GRV3 may be formed by recessing the first insulating layer IL1, the second insulating layer IL2, the third insulating layer IL3, and the fourth insulating layer IL4 in the opposite direction (e.g., downward) of the third direction DR3. Specifically, the plurality of grooves GRV1, GRV2, and GRV3 are formed by removing at least a portion of the second insulating layer IL2, the third insulating layer IL3, and the fourth insulating layer IL4 disposed in the second non-display area NDA2.

[0258] The plurality of grooves GRV1 , GRV2 , and GRV3 may include a first groove GRV1 , a second groove GRV2 , and a third groove GRV3 .

[0259] The first groove GRV1 may be disposed in the peripheral area AHA. The first groove GRV1 may be formed by recessing the second insulating layer IL2, the third insulating layer IL3, and the fourth insulating layer IL4 disposed in the peripheral area AHA in the opposite direction of the third direction DR3. The first groove GRV1 may include an undercut. Specifically, the first groove GRV1 may have a tip TP formed to protrude from the third insulating layer IL3 due to a difference in etching selectivity between the second insulating layer IL2 and the fourth insulating layer IL4 including an organic insulating material and the third insulating layer IL3 including an inorganic insulating material.

[0260] The second groove GRV2 and the third groove GRV3 may be provided in the dam area DMA. The second groove GRV2 may be formed between the first dam DM1 and the second dam DM2. The third groove GRV3 may be formed between the second groove GRV2 and the hole AH. That is, the second groove GRV2 may be formed between a plurality of dams in the dam area DMA.

[0261] The second groove GRV2 and the third groove GRV3 may be formed substantially similar to the first groove GRV1. The second groove GRV2 and the third groove GRV3 may be formed by recessing the second insulating layer IL2, the third insulating layer IL3, and the fourth insulating layer IL4 disposed in the dam area DMA in the opposite direction of the third direction DR3. The second groove GRV2 and the third groove GRV3 may include an undercut similar to the undercut described with respect to the first groove GRV1.

[0262] The first groove GRV1, the second groove GRV2, and the third groove GRV3 may be spaced apart from each other. A diameter of the first groove GRV1 may be greater than a diameter of the second groove GRV2, and a diameter of the second groove GRV2 may be greater than a diameter of the third groove GRV3.

[0263] Although there are three grooves GRV1, GRV2, and GRV3 surrounding the hole AH in the drawings, the present disclosure is not limited thereto. For example, the display device may include four or more grooves.

[0264] The grooves GRV1, GRV2, and GRV3 adjacent to the hole AH are recessed from the second insulating layer IL2, the third insulating layer IL3, and the fourth insulating layer IL4 in the opposite direction of the third direction DR3. Using the groove and dam structure, a permeation path of oxygen or moisture flowing from the hole AH to an area of ​​the display device away from the hole AH can be blocked. As a result, the light emitting element layer EML and the transistor in the display area DA can be protected.

[0265] The first inorganic layer 161 of the thin film encapsulation layer TFEL may be disposed on the fourth insulating layer IL4 in the peripheral area AHA and the dam area DMA. Specifically, the first inorganic layer 161 disposed on the second electrode layer 153 in the display area DA may extend to the peripheral area AHA and the dam area DMA in the second non-display area NDA2, and may be disposed in the entire area of ​​the peripheral area AHA and the dam area DMA.

[0266] The organic layer 162 may be disposed on the first inorganic layer 161 in the peripheral area AHA. Specifically, the organic layer 162 disposed on the first inorganic layer 161 in the display area DA may extend to the peripheral area AHA in the second non-display area NDA2. The organic layer 162 may be disposed in the entire area of ​​the peripheral area AHA and may overlap at least a portion of the first dam DM1. The organic layer 162 may not overlap the second dam DM2.

[0267] The first dam DM1 may define a region in which the liquid organic material spreads in a process of forming the organic layer 162. The organic layer 162 may be formed by applying the liquid organic material onto the first inorganic layer 161 by inkjet printing. In doing so, the first dam DM1 sets a boundary of a region where the liquid organic material is disposed and prevents the liquid organic material from overflowing into the dam area DMA.

[0268] The second inorganic layer 163 may be disposed on the organic layer 162 in the peripheral area AHA, and disposed on the first inorganic layer 161 in the dam area DMA. Specifically, the second inorganic layer 163 disposed on the organic layer 162 in the display area DA may extend to the peripheral area AHA and the dam area DMA in the second non-display area NDA2, and may be disposed in the entire area of ​​the peripheral area AHA and the dam area DMA.

[0269] The organic layer 162 may be interposed between the first and second inorganic layers 161 and 163 in the peripheral area AHA so that the first and second inorganic layers 161 and 163 may be spaced apart from each other in the third direction DR3 .

[0270] The first inorganic layer 161 and the second inorganic layer 163 in the dam area DMA may contact each other. Therefore, the second inorganic layer 163 may be disposed on an upper surface of the first inorganic layer 161 formed on the plurality of dams DM1 and DM2 , the second groove GRV2 , and the third groove GRV3 .

[0271] The outer planarization layer 170 may be disposed on the second inorganic layer 163 of the dam area DMA. The outer planarization layer 170 may be disposed on the first dam DM1 and the second dam DM2 to completely cover the first dam DM1 and the second dam DM2. The outer planarization layer 170 may be disposed in the entire dam area DMA and may extend toward the peripheral area AHA, and may be disposed in a portion of the peripheral area AHA.

[0272] The outer planarization layer 170 may be formed such that an upper surface of the outer planarization layer 170 disposed in the dam area DMA is flush with an upper surface of the second inorganic layer 163 in the display area DA. The outer planarization layer 170 may serve as a planarization layer that provides a uniform height between an upper surface of the dam area DMA (or a distance from an upper surface of the substrate SUB to an upper surface of the uppermost layer of the dam area DMA) and an upper surface of the second inorganic layer 163 of the display area DA (or a distance from an upper surface of the substrate SUB to an upper surface of the second inorganic layer 163 of the display area DA).

[0273] The outer planarization layer 170 may include an acrylic, epoxy, or siloxane-based organic insulating material that achieves a high planarization effect.

[0274] Although in Fig.11 , but as described above, the first sensing conductive layer 171 (in Figure 8 ) may be disposed on the second inorganic layer 163. The first sensing conductive layer 171 may include a second connecting member BE2 disposed in the display area DA and a bridge line BER2 disposed in the peripheral area AHA of the second non-display area NDA2.

[0275] The first sensing insulating layer TIL1 may be disposed on the second inorganic layer 163 and the outer planarization layer 170. The first sensing insulating layer TIL1 may be disposed throughout the display area DA, the peripheral area AHA, and the dam area DMA. Specifically, the first sensing insulating layer TIL1 may be disposed on the entire second inorganic layer 163 in the display area DA and the peripheral area AHA. In addition, the first sensing insulating layer TIL1 may extend from the peripheral area AHA to the main hole area MH to be disposed on the entire outer planarization layer 170 in the dam area DMA.

[0276] The second sensing conductive layer 172 may be disposed on the first sensing insulating layer TIL1. The second sensing conductive layer 172 may include a first sensing electrode RE, a second sensing electrode TE (not shown), and a first connector BE1 (not shown) disposed in the display area DA, and may include a plurality of alignment marks M disposed in the peripheral area AHA of the second non-display area NDA2. Fig.11Although not shown in the figure, the second sensing conductive layer 172 may further include connection lines BET and BER1 disposed in the peripheral area AHA. In this case, the first sensing conductive layer 171 may further include a bridge line BER2 that electrically connects the first connection line BER1 and is disposed in the peripheral area AHA. Fig.11 Only the first alignment mark M1 (specifically, the first main alignment mark M11) disposed in the peripheral area AHA is shown, but the second to fourth alignment marks M2, M3, and M4 may also be formed in the same layer as the first alignment mark M1. That is, the first to fourth alignment marks M1, M2, M3, and M4 may be formed as the second sensing conductive layer 172.

[0277] According to this exemplary embodiment of the present disclosure, when a plurality of alignment marks M are formed as the second sensing conductive layer 172, the second sensing conductive layer 172 may include an opaque conductive material having a low transmittance for light having a specific wavelength band. Therefore, when specific light is irradiated to an area adjacent to the hole AH of the display device 1, the light cannot pass through the alignment marks M formed as the second sensing conductive layer 172, so that the area appears as a dark portion. This will be described in more detail with reference to other drawings.

[0278] The first alignment mark M1 or the first main alignment mark M11 disposed in the peripheral area AHA may be disposed adjacent to the dam area DMA in the peripheral area AHA. By disposing the first alignment mark M1 adjacent to the dam area DMA in the peripheral area AHA, the distance from one side wall of the hole AH to one side surface of the first alignment mark M1 in the first direction DR1 and / or the second direction DR2 may be reduced. Since the distance between the side wall of the hole AH and the side surface of each of the alignment marks M1, M2, M3, and M4 is reduced, an error that may occur during a process of inspecting the alignment of the hole AH described later may be reduced, thereby improving the efficiency of the alignment inspection.

[0279] The second sensing insulating layer TIL2 may be disposed on the first sensing insulating layer TIL1 and the second sensing conductive layer 172. Specifically, the second sensing insulating layer TIL2 may be disposed on the second sensing conductive layer 172 of the display area DA, the peripheral area AHA, and the dam area DMA, and on the first sensing insulating layer TIL1 exposed by the second sensing conductive layer 172. The second sensing insulating layer TIL2 may be disposed in the entire display area DA and the second non-display area NDA2.

[0280] As described above, according to an exemplary embodiment of the present disclosure, a plurality of alignment marks M formed as the second sensing conductive layer 172 may be disposed in the second non-display area NDA2 surrounding the main hole area MH. Therefore, by forming the alignment marks M using the second sensing conductive layer 172 without adding any additional conductive layer to form the alignment marks M, the process efficiency of manufacturing the display device may be improved.

[0281] Fig.12 It is along Fig. 9 A cross-sectional view showing another example is taken along the line XI-XI'.

[0282] Fig.12 An exemplary embodiment of Fig.11 The difference of the exemplary embodiment is that the alignment mark M is formed as the first sensing conductive layer 171. In the following description, the same or similar reference numerals will represent the same or similar elements, and redundant descriptions will be omitted or briefly described. The description will focus on the differences from the above exemplary embodiment.

[0283] According to an exemplary embodiment of the present disclosure, a first sensing conductive layer 171 may be disposed on the second inorganic layer 163 disposed in the peripheral area AHA. The first sensing conductive layer 171 may include a second connector BE2 (not shown) disposed in the display area DA, and a bridge line BER2 (not shown) and a plurality of alignment marks M disposed in the peripheral area AHA of the second non-display area NDA2. The bridge line BER2 and the plurality of alignment marks M disposed in the peripheral area AHA may be spaced apart from each other and may not overlap each other.

[0284] Although the first alignment mark M1 or the first main alignment mark M11 is disposed on the second inorganic layer 163 disposed in the peripheral area AHA in the drawings, the present disclosure is not limited thereto. For example, the outer planarization layer 170 disposed in the dam area DMA may be disposed on the second inorganic layer 163 in the peripheral area AHA, and a plurality of alignment marks may be disposed on the outer planarization layer 170 disposed in the peripheral area AHA.

[0285] When a plurality of alignment marks M are formed as the first sensing conductive layer 171, the first sensing conductive layer 171 may include an opaque conductive material having a low transmittance for light having a specific wavelength band. Therefore, when specific light is irradiated to a region adjacent to the hole AH of the display device 1, the light cannot pass through the alignment marks M formed as the first sensing conductive layer 171, so that the region appears as a dark portion.

[0286] Fig.13 is a side view schematically illustrating an apparatus configured to check alignment according to an exemplary embodiment of the present disclosure.

[0287] Reference Fig.13 The alignment device 900 configured to check alignment according to an exemplary embodiment of the present disclosure may include a support 910, a light irradiator 920, a camera 930, and a controller 940. Although not shown in the drawings, the alignment device 900 may further include a moving mechanism configured to move the display apparatus 1.

[0288] The support member 910 supports the lower surface (the surface facing the opposite side of the third direction DR3) of the display device 1 accommodated in the alignment apparatus 900. The alignment apparatus 900 is configured to check the alignment of the hole AH formed in the display device 1. Fig.13 In the example shown in FIG. 1 , the support member 910 is placed to support the entire lower surface of the display device 1, but the present disclosure is not limited thereto. The support member 910 may support the display device 1 according to the relative position between the light irradiator 920 and the display device 1, which will be described later. The support member 910 may be configured so that it does not prevent the light emitted from the light irradiator 920 from passing through at least a portion of the display device 1, so that a video or image is output through the camera 930.

[0289] Specifically, the support member 910 may be configured such that at least a portion of the display area DA of the display device 1 adjacent to the second non-display area NDA2, the main hole area MH, and the second non-display area NDA2 are exposed in the third direction DR3. For example, the support member 910 may support an edge of the display device 1 (such as a rectangular frame), or may support at least two opposite sides of the four sides of the display device 1. The support member 910 may include, but is not limited to, a transparent material having light transmittance.

[0290] The light irradiator 920 may be placed under the support 910. The light irradiator 920 may be disposed under the support 910 to emit light toward the support 910. Specifically, the light irradiator 920 may emit light from under the support 910 toward the lower surface of the display device 1 placed on the support 910, so that the light may be incident on the lower surface of the display device 1. The range of the wavelength band of the light emitted from the light irradiator 920 is not specifically limited herein. It is to be noted that the light emitted from the light irradiator 920 may have a low transmittance to the sensing conductive layer 171 or 172 forming the plurality of alignment marks M of the display device 1. For example, when the plurality of alignment marks M are formed as the first sensing conductive layer 171, the light emitted from the light irradiator 920 may be a wavelength band having a lower transmittance to the first sensing conductive layer 171 forming the alignment marks M and a higher transmittance to other elements. Likewise, when a plurality of alignment marks M are formed as the second sensing conductive layer 172 , light emitted from the light irradiator 920 may be a wavelength band having lower transmittance to the second sensing conductive layer 172 forming the alignment marks M and higher transmittance to other elements.

[0291] The camera 930 may be placed above the support 910. The camera 930 above the support 910 may be spaced apart from the light irradiator 920. When the display device 1 is placed on the support 910 and the light irradiator 920 emits light, the camera 930 may capture the display device 1 placed on the support 910 from above the support 910. The camera 930 may capture the main hole area MH, the second non-display area NDA2, and at least a portion of the display area DA adjacent to the second non-display area NDA2 of the display device 1. In an exemplary embodiment, in a video (or image) of the display device 1 captured by the camera 930, the light emitted from the light irradiator 920 may pass through the main hole area MH, may be transmitted and / or reflected in some portions of the second non-display area DNA2 of the display device 1, and may be absorbed in other areas. The camera 930 may send image data about the display device 1 captured from above the display device 1 to the controller 940.

[0292] The controller 940 may receive image data (or an image) from the camera 930, and determine whether the hole AH formed in the display device 1 is correctly aligned based on the image data (or an image). Specifically, the controller 940 may create two or more image patterns based on the image data received from the camera 930, may measure the distance between the created image patterns, and may determine whether the hole formed in the display device 1 is correctly aligned. For example, the controller 940 may detect a plurality of alignment image patterns corresponding to the alignment marks M1, M2, M3, and M4 and a hole image pattern corresponding to the hole AH, may measure the distance between the alignment image pattern and the hole image pattern, may compare the measured distance between the image patterns with predetermined reference data, and may determine whether the hole AH formed in the display device 1 is correctly aligned.

[0293] In the following, reference will be made to Figures 13 to 18 A method of checking the alignment of the hole AH of the display device 1 by using the apparatus 900 configured to check the alignment according to an exemplary embodiment of the present disclosure is described.

[0294] Fig.14 is a flowchart illustrating a method of checking alignment according to an exemplary embodiment of the present disclosure. Fig.15 is the image for inspection created in step S200. Fig.16 is an image for inspection showing an example of step S300 . Fig.17 is an image for inspection showing an example of step S501 . Fig.18 is an image for inspection showing an example of step S502. Figures 15 to 18, an image pattern of a hole (hole image pattern PL1 ) and an image pattern of an alignment mark (a plurality of alignment image patterns MPT) are mainly shown, and image patterns of the first connection wires BER1 and the second connection wires BET are omitted.

[0295] Reference Fig.14 , the method for checking alignment may include: preparing the display device 1 on the support member 910 (step S100); irradiating light from the light irradiator 920 to capture the area formed by the hole AH of the display device 1 through the camera 930 to create an image for inspection (step S200); obtaining a hole image pattern and an alignment image pattern from the created image to measure the distance between the hole image pattern and the alignment image pattern (step S300); comparing the measured distance between the image patterns with a tolerance value (step S400); and determining whether the hole AH formed in the display device 1 is correctly aligned (steps S501 and 502).

[0296] First, the display device 1 ( Fig.14 Step S100).

[0297] Specifically, refer to Fig.13 and Fig.14 , the display device 1 having the hole AH formed therein may be disposed on the support 910. As described above, the display device 1 may include a display panel 10 including the hole AH, a second non-display area NDA2 including a plurality of alignment marks M surrounding the hole AH, and a display area DA surrounding the second non-display area NDA2. The display device 1 including the display panel 10 having the hole AH formed therein may be disposed at a predetermined position on the support 910. The display device 1 may be disposed on the support 910 and supported by the support 910. As described above, the relative positional relationship between the display device 1 and the support 910 is not particularly limited as long as the display device 1 is fixed to the support 910 during the alignment inspection of the hole AH formed in the display device 1.

[0298] Then, the light irradiator 920 emits light, and the camera 930 captures a portion of the display device 1 to create an image for inspection ( Fig.14 Step S200).

[0299] Specifically, refer to Figures 13 to 15 , light may be emitted from a light irradiator 920 disposed below a support member 910 on which the display device 1 is prepared toward the display device 1. The light emitted from the light irradiator 920 may be incident on a lower surface of the display device 1 to be transmitted in some areas of the display device 1 and absorbed in other areas.

[0300] The camera 930 may capture a portion of the display device 1 and may create an image IMG for inspection represented by a white-black contrast. Specifically, the portion of the display device 1 captured by the camera 930 may be the second non-display area NDA2 in which the hole AH is formed and a portion of the display area DA surrounding and adjacent to the second non-display area NDA2.

[0301] In an exemplary embodiment, the image IMG for inspection captured and created by the camera 930 may include: Fig.15 . The light emitted from the light irradiator 920 may have a low transmittance relative to the first conductive layer 110, the second conductive layer 120, and the second sensing conductive layer 172. The periphery of the plurality of alignment marks M1, M2, M3, and M4 may be optically transparent. As used herein, the phrase “partially optically transparent” may mean that the portion at least partially transmits the light emitted from the light irradiator 920. Therefore, the region in which the first conductive layer 110, the second conductive layer 120, and the second sensing conductive layer 172 are disposed may be represented by a dark portion, and the region other than the dark portion may be represented by a bright portion.

[0302] Then, the controller creates a hole image pattern and a plurality of alignment image patterns from the created image IMG for inspection, and measures a distance ( ) between each of the alignment image patterns and the hole image pattern. Fig.14 Step S300).

[0303] The controller 940 may obtain the hole image pattern PL1 and the plurality of alignment image patterns MPT from the plurality of patterns of the created image IMG for inspection.

[0304] Reference Fig.13 , Fig.14 and Fig.16 , the image IMG for inspection may include the hole image pattern PL1 represented as a dark portion, a plurality of alignment image patterns MPT and a third image pattern PT3 , and the first image pattern PT1 and the second image pattern PT2 represented as a bright portion.

[0305] The plurality of alignment image patterns MPT may correspond to the shapes of the plurality of alignment marks M when viewed from the top and may be formed as dark portions. The plurality of alignment image patterns MPT may include first, second, third, and fourth alignment image patterns MPT1, MPT2, MPT3, and MPT4.

[0306] The first alignment image pattern MPT1, the second alignment image pattern MPT2, the third alignment image pattern MPT3, and the fourth alignment image pattern MPT4 may correspond to the first alignment mark M1, the second alignment mark M2, the third alignment mark M3, and the fourth alignment mark M4, respectively, and may be formed as a dark portion. The plurality of alignment image patterns MPT1, MPT2, MPT3, and MPT4 correspond to the plurality of alignment marks M1, M2, M3, and M4, respectively, and the light emitted from the light irradiator 920 may be absorbed by the plurality of alignment marks M1, M2, M3, and M4 formed as the second sensing conductive layer 172, so that they may appear dark. However, it will be understood that the present disclosure is not limited thereto. When the plurality of alignment marks M1, M2, M3, and M4 are formed as the first sensing conductive layer 171, the light emitted from the light irradiator 920 has a lower transmittance relative to the first sensing conductive layer 171, and may be absorbed by the alignment marks M1, M2, M3, and M4, so that they may appear dark.

[0307] The first alignment image pattern MPT1 may include a first main alignment image pattern MPT11 and a first auxiliary alignment image pattern MPT12. The first main alignment image pattern MPT11 may correspond to the first main alignment mark M11, and the first auxiliary alignment image pattern MPT12 may correspond to the first auxiliary alignment mark M12. The first alignment image pattern MPT1 will be described below. The second to fourth alignment image patterns MPT2, MPT3, and MPT4 are substantially the same as the first alignment image pattern MPT1. Therefore, redundant descriptions will be omitted.

[0308] The plurality of image patterns PT1 , PT2 , and PT3 may include a first image pattern PT1 , a second image pattern PT2 , and a third image pattern PT3 .

[0309] The hole image pattern PL1 may correspond to the shape of the hole AH when viewed from the top, and may be formed as a dark portion. The first image pattern PT1 defined by the hole image pattern PL1 may correspond to the main hole region MH, and may be formed as a bright portion.

[0310] The second image pattern PT2 is defined by the third image pattern PT3 and may be formed as a bright portion. The second image pattern PT2 may correspond to the second non-display area NDA2 surrounding the main hole area MH.

[0311] The third image pattern PT3 corresponds to a portion of the display area DA adjacent to the second non-display area NDA2 and may be formed as a dark portion. Because light emitted from the light irradiator 920 may be absorbed by the first and second conductive layers 110 and 120 disposed in the display area DA, the third image pattern PT3 may appear dark.

[0312] Subsequently, the controller 940 may measure a distance between the hole image pattern PL1 and each of the alignment image patterns MPT1 , MPT2 , MPT3 , and MPT4 .

[0313] Specifically, a first extension line MPL1 passing through a lower side of the first primary alignment image pattern MPT11 and an upper side of the second primary alignment image pattern MPT21 and a second extension line MPL2 passing through a left side of the third primary alignment image pattern MPT31 and a right side of the fourth primary alignment image pattern MPT41 may be created. According to an exemplary embodiment of the present disclosure, the first extension line MPL1 may extend in a first direction DR1, and the second extension line MPL2 may extend in a second direction DR2.

[0314] The controller 940 may measure a first distance td1 between the hole image pattern PL1 and the first alignment image pattern MPT1 spaced apart from each other along the first extension line MPL1. The first distance td1 may be a spaced distance between the hole image pattern PL1 and the first alignment image pattern MPT1 in the first direction DR1.

[0315] Likewise, the controller 940 may measure a second distance td2 between the hole image pattern PL1 and the second alignment image pattern MPT2 spaced apart from each other along the first extension line MPL1. The second distance td2 may be a spacing distance between the hole image pattern PL1 and the second alignment image pattern MPT2 in the first direction DR1.

[0316] The controller 940 may measure a third distance td3 between the hole image pattern PL1 and the third alignment image pattern MPT3 spaced apart from each other along the second extension line MPL2. The third distance td3 may be a spaced distance between the hole image pattern PL1 and the third alignment image pattern MPT3 in the second direction DR2.

[0317] The controller 940 may measure a fourth distance td4 between the hole image pattern PL1 and the fourth alignment image pattern MPT4 spaced apart from each other along the second extension line MPL2. The fourth distance td4 may be a spaced distance between the hole image pattern PL1 and the fourth alignment image pattern MPT4 in the second direction DR2.

[0318] The measured distance is then compared to the tolerance range ( Fig.14 Step S400).

[0319] The controller 940 may compare the measured first to fourth distances td1, td2, td3, and td4 with a predetermined tolerance range. The first to fourth distances td1, td2, td3, and td4 may be compared with different tolerance ranges. The tolerance ranges compared with the first to fourth distances td1, td2, td3, and td4 may be different depending on the shape of the hole AH and the relative position between the hole AH and the alignment mark M.

[0320] Then, if it is determined that all measured distances fall within the tolerance range, the controller 940 determines that the display device 1 is normal ( Fig.14 , step S501 in the process.

[0321] For example, when Fig.17 When the hole image pattern PL1_1 is obtained as shown in FIG, the measured first to fourth distances td1, td2, td3, and td4 all fall within the tolerance range, so the controller 940 can determine that the holes AH formed in the display device 1 are correctly aligned. Therefore, the controller 940 can determine that the display device 1 is normal.

[0322] If it is determined that at least one of the measured distances does not fall within the tolerance range, the controller 940 determines that the display device 1 is defective ( Fig.14 , or step S502 in the above procedure.

[0323] For example, when Fig.18 When the hole image pattern PL1_2 is obtained as shown in FIG, at least one of the measured first to fourth distances td1, td2, td3, and td4 does not fall within the tolerance range, so the controller 940 may determine that the hole AH formed in the display device 1 is not properly aligned. Therefore, the controller 940 may determine that the display device 1 is defective.

[0324] As described above, according to an exemplary embodiment of the present disclosure, a plurality of alignment marks M formed as the second sensing conductive layer 172 and / or the first sensing conductive layer 171 may be disposed in the second non-display area NDA2 surrounding the main hole area MH. Therefore, by reducing the spacing distance between the boundary of the hole AH and each of the alignment marks M1, M2, M3, and M4, the distance difference for the same error rate in the alignment check can be reduced. Therefore, the efficiency of checking the alignment of the hole AH can be improved. In addition, by forming the alignment mark M using the first sensing conductive layer 171 or the second sensing conductive layer 172 without adding any additional conductive layer for forming the alignment mark M, the process efficiency of manufacturing the display device can be improved.

[0325] Furthermore, by providing a plurality of alignment marks M around the hole AH on both sides in the first direction DR1 and on both sides in the second direction DR2, even if the hole AH is not a circle, it is possible to check whether the hole AH is correctly aligned by measuring the spacing distance between the boundary of the hole AH and each of the alignment marks. Therefore, the alignment of the hole AH can be checked regardless of the shape of the hole AH, and thus the development cost for developing a new alignment check method according to different shapes of the hole AH can be saved.

[0326] Hereinafter, other exemplary embodiments of the present disclosure will be described. In the following description, the same or similar reference numerals will represent the same or similar elements, and redundant descriptions will be omitted or briefly described. The description will be focused on the differences from the above exemplary embodiments.

[0327] Fig.19 It is along Fig. 9 A cross-sectional view showing still another example is taken along the line XI-XI'. Fig. 20 is captured by a device configured to check alignment according to an exemplary embodiment of the present disclosure for checking Fig.19 An image of a display device. Fig.19 An exemplary embodiment of Fig.11 The exemplary embodiment of FIG. 1 is different in that the conductive layer formed as the second electrode layer 153 is also formed on the first dam DM1 and the second dam DM2. Fig.15 Similar, in Fig. 20 The image patterns of the first connection line BER1 and the second connection line BET are omitted.

[0328] Reference Fig.19 , the second electrode layer 153 may include a first region 153_1 disposed in the display area DA, a second region 153_2 disposed in the dam area DMA, and a third region 153_3 disposed in the peripheral area AHA. The first region 153_1 of the second electrode layer 153 disposed in the display area DA may be the cathode electrode described above. The second region 153_2 of the second electrode layer 153 disposed in the dam area DMA and the third region 153_3 of the second electrode layer 153 disposed in the peripheral area AHA may be disposed on the fourth insulating layer IL4.

[0329] The second region 153_2 of the second electrode layer 153 may be formed on the fourth insulating layer IL4 forming the first dam DM1. The side surface of the second region 153_2 of the second electrode layer 153 of the first dam DM1 may be formed to be parallel to the side surface of the fourth insulating layer IL4. Similarly, the second region 153_2 of the second electrode layer 153 may be formed on the fourth insulating layer IL4 forming the second dam DM2. The side surface of the second region 153_2 of the second electrode layer 153 of the second dam DM2 may be formed to be parallel to the side surface of the fourth insulating layer IL4. However, it will be understood that the present disclosure is not limited thereto. The electrode layer included in the first dam DM1 and the second dam DM2 may be formed as a separate conductive layer other than the second electrode layer 153. The second region 153_2 of the second electrode layer 153 disposed on the first dam DM1 and the second dam DM2 may be used to protect the light emitting element layer EML and the transistor from external impact.

[0330] Reference Fig.19 and Fig. 20 , the image IMG for inspection according to an exemplary embodiment may further include a fourth image pattern PL2 corresponding to the second area 153_2 of the second electrode layer 153 disposed in the second non-display area NDA2, a fifth image pattern PL3 corresponding to the third area 153_3 of the second electrode layer 153, and a hole image pattern PL1 represented by a dark portion, a plurality of alignment image patterns MPT, and a third image pattern PT3 corresponding to the display area DA. Also in this case, it is possible to inspect whether the hole AH is properly aligned by measuring the distance between the hole image pattern PL1 and each of the plurality of alignment image patterns MPT.

[0331] Fig.21 It is shown Figure 5 An enlarged view of another example of area B. Fig. 22 It is along Fig.21 A cross-sectional view taken along line XXII-XXII'. Fig.21 An exemplary embodiment of Fig. 9 The exemplary embodiment of FIG. 4 is different in that a plurality of alignment marks M1 , M2 , M3 , and M4 are formed in the dam area DMA.

[0332] Reference Fig.21 and Fig. 22 , a plurality of alignment marks M1, M2, M3, and M4 may be disposed in the dam area DMA. A plurality of alignment marks M1, M2, M3, and M4 may be disposed on the first sensing insulating layer TIL1 disposed in the dam area DMA. The plurality of alignment marks M1, M2, M3, and M4 may overlap at least a portion of the first dam DM1 and / or the second dam DM2 disposed in the dam area DMA in the third direction DR3.

[0333] Fig.23 It is shown Figure 5 An enlarged view of yet another example of region B. Fig.24 It is along Fig.23 A cross-sectional view taken along line XXIV-XXIV'. Fig.25 is captured by a device configured to check alignment according to an exemplary embodiment of the present disclosure for checking Fig.23 An image of a display device. Fig.23 An exemplary embodiment of Fig. 9 The exemplary embodiment of is different in that it further includes a test line HCD overlapping the plurality of alignment marks M1, M2, M3, and M4 in the third direction DR3. Fig.15 Similar, in Fig.25 , the hole image pattern PL1 , the plurality of alignment image patterns MPT, and the image pattern of the test line (test line image pattern PL4 ) are mainly shown, and the image patterns of the first and second connection lines BER1 and BET and the image pattern of the bridge line BER2 are omitted.

[0334] Reference Figure 23 to Figure 25 , the display device 1 may further include a test line HCD disposed in the peripheral area AHA and overlapping the plurality of alignment marks M1, M2, M3, and M4 in the third direction DR3. The test line HCD may have a circular shape when viewed from the top. The test line HCD may be used to check whether the display device 1 is damaged after the process of forming the hole AH.

[0335] The test line HCD may be formed as a first sensing conductive layer 171 disposed in the peripheral area AHA. The test line HCD may be disposed on the second inorganic layer 163 of the peripheral area AHA. The width WH of the test line HCD may be less than the width My of the alignment marks M1, M2, M3, and M4. The alignment marks M1, M2, M3, and M4 disposed on the test line HCD may be disposed to completely cover the test line HCD in the third direction DR3. However, it will be understood that the present disclosure is not limited thereto. A plurality of alignment marks M1, M2, M3, and M4 may be formed as a first sensing conductive layer 171, and the test line HCD may be formed as a second sensing conductive layer 172.

[0336] from Fig.13The transmittance of the light emitted from the light illuminator 920 of the device configured to check alignment with respect to the test line HCD may be different from the transmittance with respect to the alignment marks M1, M2, M3 and M4. In an exemplary embodiment, the transmittance of the light emitted from the light illuminator 920 with respect to the test line HCD may be higher than the transmittance with respect to the alignment marks M1, M2, M3 and M4. That is, when the test line HCD is formed as the first sensing conductive layer 171 and the plurality of alignment marks M1, M2, M3 and M4 are formed as the second sensing conductive layer 172, the transmittance of the light emitted from the light illuminator 920 with respect to the first sensing conductive layer 171 may be higher than the transmittance with respect to the second sensing conductive layer 172. Therefore, in the alignment inspection process, when the light emitted from the light illuminator 920 has a high transmittance with respect to the test line HCD, the pattern corresponding to the test line HCD is represented as a bright portion in the image IMG for inspection captured and created by the camera 930, and thus may not be included in the dark portion of the image IMG.

[0337] However, it will be understood that the present disclosure is not limited thereto. Fig.13 The transmittance of the light emitted from the light irradiator 920 configured as the device for checking alignment with respect to the test line HCD may be similar to the transmittance with respect to the alignment marks M1, M2, M3, and M4. That is, the transmittance of the light emitted from the light irradiator 920 with respect to the first sensing conductive layer 171 may be similar to the transmittance with respect to the second sensing conductive layer 172. In this case, as Fig.25 As shown in , the image IMG for inspection captured and created by the camera 930 may include a pattern corresponding to the test line HCD expressed as a dark portion.

[0338] Reference Fig.25 , when the transmittance of the light emitted from the light irradiator 920 with respect to the test line HCD is similar to the transmittance with respect to the alignment marks M1, M2, M3, and M4, the image IMG for inspection may further include a test line image pattern PL4 corresponding to the test line HCD. However, even in this case, since the width of the test line image pattern PL4 is smaller than the width of the alignment image patterns MPT1, MPT2, MPT3, and MPT4, the alignment image patterns MPT1, MPT2, MPT3, and MPT4 may be recognized as alignment image patterns.

[0339] According to the present disclosure and Fig.23In the exemplary embodiment shown in FIG. 1 , a plurality of alignment marks M1, M2, M3, and M4 and a test line HCD disposed in the peripheral area AHA overlap each other in the third direction DR3, thereby reducing the width of the second non-display area NDA2 surrounding the hole AH. In addition, since the width of the alignment marks M1, M2, M3, and M4 is greater than the width of the test line HCD, even if the alignment marks M1, M2, M3, and M4 overlap the test line HCD, the alignment of the hole AH formed in the display device 1 can still be checked using the alignment marks M1, M2, M3, and M4.

[0340] Fig.26 is a view illustrating a layout of holes and alignment marks according to another exemplary embodiment of the present disclosure. Fig.26 An exemplary embodiment of Fig. 9 The exemplary embodiment of FIG. 4 differs in that the hole AH has a polygonal shape.

[0341] Reference Fig.26 , when viewed from the top, the hole AH1 of the display device 1 may have a quadrilateral shape. When viewed from the top, even when the hole AH1 has a quadrilateral shape, it is possible to determine whether the hole AH1 formed in the display device 1 is properly aligned by measuring the spacing distance between the boundary of the hole AH1 and each of the alignment marks M1, M2, M3, and M4. Therefore, regardless of the shape of the hole AH1, it is possible to check the alignment by using the relative distance between the hole AH1 and each of the alignment marks M1, M2, M3, and M4 that are respectively provided on the first side to the fourth side and spaced apart from each other. Therefore, there is no need to develop different alignment checking methods for holes of different shapes, so time and cost can be saved.

[0342] Fig. 27 is a view illustrating a layout of holes and alignment marks according to still another exemplary embodiment of the present disclosure.

[0343] Reference Fig. 27 , the display device 1 may include a plurality of holes AH2 and AH3. The plurality of holes AH2 and AH3 formed in the display panel 10 of the display device 1 may include a first hole AH2 and a second hole AH3. The first hole AH2 and the second hole AH3 may be spaced apart from each other. When viewed from the top, the shapes of the first hole AH2 and the second hole AH3 may be different from each other. However, it will be understood that the present disclosure is not limited thereto. When viewed from the top, the first hole AH2 and the second hole AH3 may have the same shape. In an exemplary embodiment, the first hole AH2 and the second hole AH3 may be spaced apart from each other in the first direction DR1. For example, the second hole AH3 may be disposed on the right side of the first hole AH2.

[0344] A plurality of alignment marks M may be disposed in the second non-display area NDA2 surrounding the first hole AH2 and the second hole AH3. A plurality of alignment marks M1, M2, M3, and M4 may be disposed on the first side to the fourth side, respectively, and may be spaced apart from the outermost sides of the plurality of holes AH2 and AH3. Specifically, the first alignment mark M1 may be disposed on the left side of the first hole AH2. The second alignment mark M2 may be disposed on the right side of the second hole AH3. The third alignment mark M3 may be disposed on the lower side of the first hole AH2 and the second hole AH3. The fourth alignment mark M4 may be disposed on the upper side of the first hole AH2 and the second hole AH3.

[0345] Fig.28 is a view illustrating a layout of holes and alignment marks according to still another exemplary embodiment of the present disclosure.

[0346] Reference Fig.28 , the display device 1 may include a plurality of holes AH4, AH5, and AH6. The plurality of holes may include a first hole AH4, a second hole AH5, and a third hole AH6. The second hole AH5 may be disposed on the right side of the first hole AH4 and spaced apart from the right side of the first hole AH4. The third hole AH6 may be disposed on the right side of the second hole AH5 and spaced apart from the right side of the second hole AH5. A plurality of alignment marks may also be disposed between the holes AH4, AH5, and AH6. According to an exemplary embodiment of the present disclosure, alignment marks are formed around each of the holes AH4, AH5, and AH6, thereby improving the alignment error rate of the plurality of holes.

[0347] Fig.29 is a view illustrating a layout of holes and alignment marks according to still another exemplary embodiment of the present disclosure. Fig.30 is a view illustrating a layout of holes and alignment marks according to still another exemplary embodiment of the present disclosure. Fig.29 and Fig.30 An exemplary embodiment of Fig. 9 The exemplary embodiment of FIG. 4 is different in that the alignment marks M5 , M6 , M7 , and M8 are formed in shapes other than stripes when viewed from the top.

[0348] Specifically, when viewed from the top, the shapes of the alignment marks M5, M6, M7, and M8 may be substantially the same, but the positions and / or orientations of the alignment marks M5, M6, M7, and M8 may be different from each other. Fig.29 and 30 The shapes of the third alignment marks M7 and MC are described in detail; and, the other alignment marks M5, M6, M8, MA, MB, and MD will not be described.

[0349] Reference Fig.29, when viewed from the top, the third alignment mark M7 may have a triangular shape (such as an isosceles triangle, a right triangle, or other triangular shapes). The length Mx of the base of the third alignment mark M7 may be greater than its height My. In an exemplary embodiment, the length Mx of the base of the third alignment mark M7 may be about 100 μm or more. Preferably, the length Mx of the base of the third alignment mark M7 may be about 150 μm or more. The height My of the third alignment mark M7 may be in the range of about 50 μm to 100 μm.

[0350] The first alignment mark M5 may be oriented so that the vertex of the first alignment mark M5 faces the opposite side in the first direction DR1, that is, the left side when viewed from the top. The second alignment mark M6 may be symmetrically arranged with respect to the center point AHP of the hole AH and the first alignment mark M5. Therefore, the second alignment mark M6 may be oriented so that the vertex of the second alignment mark M6 faces one side in the first direction DR1, that is, the right side when viewed from the top. The third alignment mark M7 may be oriented so that the vertex of the third alignment mark M7 faces the opposite side in the second direction DR2, that is, the lower side when viewed from the top. The fourth alignment mark M8 may be symmetrically arranged with respect to the center point AHP of the hole AH and the third alignment mark M7. Therefore, the fourth alignment mark M8 may be oriented so that the vertex of the fourth alignment mark M8 faces one side in the second direction DR2, that is, the upper side when viewed from the top.

[0351] According to an exemplary embodiment of the present disclosure, it is possible to measure distances td1 and td2 between the hole AH and the first alignment mark M5 and the second alignment mark M6 with respect to an extension line MLA1, which connects the vertices of the first alignment mark M1 and the second alignment mark M6 spaced apart from each other in the first direction DR1. Specifically, the controller 940 may measure a first distance td1 between a boundary of the hole AH and the first alignment mark M5 spaced apart from each other along the first extension line MLA1. In addition, the controller 940 may measure a second distance td2 between a boundary of the hole AH and the second alignment mark M6 spaced apart from each other along the first extension line MLA1. Similarly, it is possible to measure distances td3 and td4 between the hole AH and the third alignment mark M7 and between the hole AH and the fourth alignment mark M8 with respect to an extension line MLA2, which connects the vertices of the third alignment mark M7 and the vertices of the fourth alignment mark M8 spaced apart from each other in the second direction DR2. Specifically, the controller 940 may measure a third distance td3 between the boundary of the hole AH spaced apart from each other along the second extension line MLA2 and the third alignment mark M7. In addition, the controller 940 may measure a fourth distance td4 between the boundary of the hole AH spaced apart from each other along the second extension line MLA2 and the fourth alignment mark M8.

[0352] Reference Fig.30 , when viewed from the top, the third alignment mark MC may have a double triangle shape. The third alignment mark MC may include a third main alignment mark MC1 and a third auxiliary alignment mark MC2. The third main alignment mark MC1 and the third auxiliary alignment mark MC2 may be formed in the same shape and size. Each of the third main alignment mark MC1 and the third auxiliary alignment mark MC2 may have a right triangle shape.

[0353] According to an exemplary embodiment of the present disclosure, it is possible to check whether the hole AH is properly aligned by using the first extension line MLA1 extending from the side of the first main alignment mark MA1 and the second main alignment mark MB1 and the second extension line MLA2 extending from the side of the third main alignment mark MC1 and the fourth main alignment mark MD1. For example, the controller 940 may measure the distance td1 between the hole AH and the first alignment mark MA spaced apart from each other along the first extension line MLA1 and the distance td2 between the hole AH and the second alignment mark MB spaced apart from each other along the first extension line MLA1, the distance td3 between the hole AH and the third alignment mark MC spaced apart from each other along the second extension line MLA2, and the distance td4 between the hole AH and the fourth alignment mark MD spaced apart from each other along the second extension line MLA2 to determine whether the hole AH is properly aligned.

[0354] At the end of the detailed description, those skilled in the art will appreciate that many changes and modifications may be made to the preferred embodiment without departing substantially from the principles of the invention. Therefore, the preferred embodiments of the disclosed invention are used only in a general and descriptive sense and not for purposes of limitation.

[0355] Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such embodiments, but is limited to the broader scope of the appended claims and various obvious modifications and equivalent arrangements as will be apparent to those of ordinary skill in the art.

Claims

1. A display device, comprising: a substrate comprising a hole, a non-display area surrounding the hole, and a display area surrounding the non-display area; a display unit disposed on the substrate and comprising pixels disposed in the display area, the display unit comprising a thin film encapsulation layer; A sensing electrode, disposed on the thin film encapsulation layer in the display area; as well as A first alignment mark is disposed on the thin film encapsulation layer in the non-display area, Wherein, the hole penetrates the substrate and the display unit.

2. The display device according to claim 1, wherein: The substrate further includes a peripheral area disposed in the non-display area, and Wherein, the display device further includes: a connection line, which is arranged in the peripheral area on the thin film encapsulation layer and connects the sensing electrodes.

3. The display device according to claim 1, further comprising: A second alignment mark is disposed in the non-display area on the thin film encapsulation layer and is spaced apart from the first alignment mark.

4. The display device according to claim 3, wherein: A minimum distance between the first alignment mark and the second alignment mark is greater than a diameter of the hole.

5. The display device according to claim 3, wherein: The first alignment mark is symmetrical to the second alignment mark with respect to a center point of the hole.

6. The display device according to claim 3, further comprising: A third alignment mark is disposed in the non-display area on the thin film encapsulation layer and is spaced apart from the first alignment mark and the second alignment mark.

7. The display device according to claim 1, 3 or 6, wherein: The sensing electrodes include first sensing electrodes electrically connected in a first direction, second sensing electrodes electrically connected in a second direction crossing the first direction, and a connector connecting the first sensing electrodes adjacent to each other in the first direction. Wherein, the connecting member is arranged on the thin film encapsulation layer, and The first sensing electrode and the second sensing electrode are arranged on a sensing insulating layer, and the sensing insulating layer is arranged on the connecting member.

8. The display device according to claim 7, wherein: The first alignment mark is disposed on the sensing insulation layer.

9. The display device according to claim 8, wherein: The first alignment key includes a same material as those of the first sensing electrode and the second sensing electrode.

10. The display device according to claim 7, wherein: The first alignment mark is disposed on the thin film encapsulation layer.

11. The display device according to claim 10, wherein: The first alignment mark includes the same material as that of the connection member.

12. The display device according to claim 1, wherein: The first alignment marks include a first main alignment mark and a first auxiliary alignment mark having different sizes and spaced apart from each other in a first direction.

13. The display device according to claim 12, further comprising: A second alignment mark is disposed in the non-display area on the thin film encapsulation layer and is spaced apart from the first alignment mark in a second direction crossing the first direction.

14. The display device according to claim 13, wherein: The first alignment mark is symmetrical to the second alignment mark with respect to a center point of the hole.

15. The display device according to claim 1, wherein: The thin film encapsulation layer includes a first inorganic layer, an organic layer, and a second inorganic layer, wherein the first inorganic layer is disposed on the substrate, wherein the organic layer is disposed on the first inorganic layer, and wherein the second inorganic layer is disposed on the organic layer.

16. A display device, comprising: a substrate comprising a hole, a non-display area surrounding the hole, and a display area surrounding the non-display area; a display unit disposed on the substrate and comprising pixels disposed in the display area, the display unit comprising a thin film encapsulation layer; A sensing electrode, disposed on the thin film encapsulation layer in the display area; a first alignment mark disposed on the thin film encapsulation layer in the non-display area; as well as A test line is disposed in the non-display area on the thin film encapsulation layer and overlaps the first alignment mark.

17. The display device according to claim 16, wherein: The light transmittance of the test line is greater than the light transmittance of the first alignment mark.

18. The display device according to claim 16, wherein: The width of the test line is smaller than the width of the first alignment mark.

19. The display device according to claim 16, wherein: The sensing electrodes include first sensing electrodes electrically connected in a first direction, second sensing electrodes electrically connected in a second direction crossing the first direction, and a connector connecting the first sensing electrodes adjacent to each other in the first direction. Wherein, the connecting member is arranged on the thin film encapsulation layer, Wherein, the first sensing electrode and the second sensing electrode are arranged on a sensing insulating layer, and the sensing insulating layer is arranged on the connecting member. Wherein, the test line is arranged on the thin film encapsulation layer, and Wherein, the first alignment mark is arranged on the sensing insulation layer.

20. The display device according to claim 19, wherein: The test wire comprises the same material as that of the connecting member, and The first alignment mark includes a material that is the same as that of the first sensing electrode and the second sensing electrode.

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