Analog-to-Digital Conversion System and Audio Device

Abstract

The present invention discloses an analog-to-digital conversion system and an audio device. The analog-to-digital conversion system includes a front-end interface module, a port mapping module, a data processing module, and a control module, wherein: The front-end interface module is used for electrically connecting with an external application data source to receive source data generated by the application data source; The port mapping module is used for mapping the source data into a processing channel in the data processing module; The control module is used for grouping the processing channels in the data processing module and providing different clock signals and control signals to the processing channels in different groups, so that the processing channels in different groups can process the source data according to the received clock signals and control signals. Among them, the number of processing channels in each group can be changed according to the application and the needs of users. Through grouped control, the processing channels within a group share the control module, reducing costs and power consumption.

Description

Technical Field

[0001] The present invention relates to the field of audio technology, and in particular to an analog-to-digital conversion system and an audio device. Background Art

[0002] In audio devices, the ADC (Analog-to-Digital Converter) system plays a very important role. The ADC system is required in different application scenarios.

[0003] Speech recognition usually requires an array composed of multiple microphones (MIC), and recording also requires multiple microphones and line inputs. These two applications also have scenarios with high performance and low power consumption. In a traditional ADC analog-to-digital conversion system, a single-channel ADC analog-to-digital conversion system usually has fixed analog circuit and digital circuit channels. That is, the number of channels required in hardware is equal to the maximum number of application modes that the system can support simultaneously.

[0004] The disadvantage of the traditional ADC system is that it requires the maximum number of controllers and computing units according to the application mode, creates the maximum number of channels in hardware, resulting in high costs and increased system power consumption. Summary of the Invention

[0005] The main technical problem to be solved by the present invention is to provide an analog-to-digital conversion system and an audio device, which can reduce costs and power consumption through grouped control and sharing of control modules within the group for processing channels.

[0006] To solve the above technical problem, a technical solution adopted by the present invention is: providing an analog-to-digital conversion system, which includes a front-end interface module, a port mapping module, a data processing module, and a control module connected in sequence, wherein:

[0007] The front-end interface module is used for electrically connecting with an external application data source to receive source data generated by the application data source;

[0008] The port mapping module is used for mapping the source data into a processing channel in the data processing module;

[0009] The control module is used for grouping the processing channels in the data processing module and providing different clock signals and control signals to the processing channels in different groups, so that the processing channels in different groups can process the source data according to the received clock signals and control signals. Among them, the number of processing channels in each group can be changed according to applications and user requirements.

[0010] Optionally, the port mapping module is used for mapping the source data into a processing channel that matches the source data according to different applications.

[0011] Optionally, the port mapping module includes at least one port mapping unit, the data processing module includes at least one processing channel, and the front-end interface module includes at least one ADC analog unit. Among them, the number of port mapping units is equal to the number of processing channels, and the number of processing channels is less than or equal to the number of ADC analog units in the front-end interface module. Each port mapping unit is electrically connected to all ADC analog units in the front-end interface module, and each port mapping unit is electrically connected to a processing channel;

[0012] The port mapping module is used to trigger the corresponding port mapping unit according to the application, and the port mapping unit is used to map the source data into the processing channel electrically connected to the port mapping unit.

[0013] Optionally, the processing channel is a filter bank, including a first calculation unit of a first filter and a second calculation unit of a second filter electrically connected to the first calculation unit, where:

[0014] The first calculation unit and the second calculation unit are used to perform filtering and downsampling processing on the source data in sequence.

[0015] Optionally, the control module includes a filter controller and a group selector. The filter controller is electrically connected to the group selector. The number of group selectors is the same as the number of processing channels, and each group selector is electrically connected to a corresponding processing channel;

[0016] The filter controller outputs different clock signals and control signals according to the application to control the group selector to output different clock signals and control signals to the corresponding processing channels in groups, so as to control the corresponding processing channels to work.

[0017] Optionally, the filter controller includes at least two sub-controllers. Each sub-controller is electrically connected to the group selector, and each sub-controller can output different clock signals and control signals to control different groups of processing channels to perform different filtering and downsampling operations.

[0018] Optionally, the sub-controller includes a frequency divider, a first timing controller, a second timing controller, and a coefficient selector. The frequency divider is electrically connected to the first timing controller and the second timing controller, and the second timing controller is further electrically connected to the coefficient selector, where:

[0019] The frequency divider divides the input main clock signal according to the sampling rate to obtain a first clock signal and a second clock signal,

[0020] The first timing controller is used to generate a pulse sequence that meets the timing requirements to drive the first calculation unit;

[0021] The coefficient selector is used to select the coefficient of the second calculation unit according to the coefficient selection rule;

[0022] The second timing controller is used to generate a pulse sequence that meets the timing requirements for driving the second computing unit and output the coefficients of the second computing unit.

[0023] Optionally, the coefficients of the second computing unit include full bandwidth parameters, high anti-aliasing parameters, and half bandwidth parameters.

[0024] Optionally, the analog-to-digital conversion system further includes a register, which is used to set the sampling rate according to groups, where the sampling rates of each group do not interfere with each other.

[0025] To solve the above technical problems, another technical solution adopted by the present invention is: to provide an audio device, which includes the analog-to-digital conversion system described above.

[0026] The beneficial effects of the present invention are as follows: Different from the prior art, the present invention provides an analog-to-digital converter and an audio device. The analog-to-digital conversion system includes a front-end interface module, a port mapping module, a data processing module, and a control module, where: the front-end interface module is electrically connected to an external data source to receive the source data generated by the data source; the port mapping module is used to map the source data to different processing channels in the data processing module; the control module is used to group the processing channels in the data processing module and provide different clock signals and control signals to different groups of processing channels, so that different groups of processing channels can process the source data according to the received clock signals and control signals.

[0027] Therefore, in the present invention, the source data is mapped to different processing channels through the port mapping module, and the operation of the processing channels is centrally controlled by the control module. Thus, through grouped control, the processing channels within the group share the control module, reducing costs and power consumption. Description of the Drawings

[0028] Figure 1 It is a schematic structural diagram of an analog-to-digital conversion system provided by an embodiment of the present invention;

[0029] Figure 2 It is a schematic structural diagram of the port mapping module in an embodiment of the present invention;

[0030] Figure 3 It is a schematic structural diagram of the processing channels in the data processing module;

[0031] Figure 4 It is a schematic structural diagram of the sub-controller;

[0032] Figure 5 It is a schematic structural diagram of the group selector in this embodiment. Detailed Embodiments

[0033] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The features, structures, or characteristics described may be combined in any suitable manner in one or more embodiments.

[0034] In addition, the drawings are only schematic illustrations of the present invention and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus repeated descriptions thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0035] Please refer to Figure 1 , Figure 1 a schematic structural diagram of an analog-to-digital conversion system provided by an embodiment of the present invention. As Figure 1 shown, the analog-to-digital conversion system 10 of the present invention includes a front-end interface module 11, a port mapping module 12, a data processing module 13, and a control module 14 connected in sequence, where:

[0036] The front-end interface module 11 is used to electrically connect to an external application data source to receive source data generated by the application data source.

[0037] As Figure 1 shown, the front-end interface module 11 includes a plurality of ADC analog units 111, and each ADC analog unit can correspond to an external application data source interface, such as a multi-channel analog microphone interface AMIC0 - AMIC7, a digital microphone interface DMIC0 - DMIC1, and line inputs LINE-IN0 and LINE-IN1.

[0038] It should be understood that the above-mentioned application data source interfaces are only listed as examples and should not limit the protection scope of the present invention. In actual applications, all audio data source interfaces can be electrically connected to the front-end interface module 11 of the present invention.

[0039] In this embodiment, the ratio of the number of application data sources and the ADC analog units 111 of the front-end interface module 11 to the number of processing channels in the data processing module is greater. In other embodiments, the number of application data sources and the ADC analog units 111 of the front-end interface module 11 may also be the same as the number of processing channels in the data processing module.

[0040] The port mapping module 12 is used to map the source data into the processing channel 131 in the data processing module 13.

[0041] In different applications, the ADC analog unit 111 of different front-end interface modules receives the corresponding source data, and the port mapping module 12 maps the source data received by the ADC analog unit 111 into the processing channel that uses it. That is to say, in this embodiment, the port mapping module 11 specifically maps the source data into the processing channel that matches the source data according to different applications. Further, the port mapping module 11 can further map the source data into the processing channel that matches the source data according to the type of application and the needs of the user.

[0042] For example:

[0043] 1) For the voice wake-up application, only one ADC analog unit 111 needs to receive the source data of DMIC0, and then input the source data into the processing channel 0;

[0044] 2) For the voice recognition application, a high-performance microphone array is required. AMIC0 to AMIC7 all generate source data, and the corresponding ADC analog units receive the source data. The port mapping module 12 maps the input source data into the processing channels 0 to 7;

[0045] 3) For the echo cancellation application AEC (acoustic echo cancel), it is necessary to convert 2-channel line inputs into sigma-delta signals. The port mapping module 12 maps the input source data into the processing channels 4 to 5;

[0046] 4) For the line recording application, it is necessary to convert 2-channel line inputs into sigma-delta signals. The port mapping module 12 maps the input source data into the digital processing channels 6 to 7;

[0047] In some applications, the number of processing channels required can actually be increased or decreased to a certain extent according to the needs. For example, the number of processing paths required for voice recognition can vary between 2 and 8. The number of processing channels can be compressed to meet the needs when multiple applications are running simultaneously. For example, when only the voice recognition application is running, 8 processing channels are used, and at this time, the 8 + 0 scheme is used, and the voice recognition rate is the highest; when echo cancellation is also running, 6 processing channels are used for voice recognition, and 2 processing channels are used for echo cancellation. At this time, the 6 + 2 scheme is used, and the voice recognition rate is slightly worse, but the function of echo cancellation is added. And so on, so that the four applications of voice wake-up, voice recognition, echo cancellation, and line recording can run simultaneously.

[0048] Based on the above introduction, the characteristics of the source data of each application and the corresponding requirements can be obtained in advance, and then different mapping schemes can be set according to the characteristics and requirements of the source data. In actual applications, when the source data and requirements are received, the corresponding mapping scheme can be filtered out, and the source data can be mapped to the processing channels of the corresponding data processing module.

[0049] Please further combine Figure 2 , Figure 2 which is a schematic structural diagram of the port mapping module in an embodiment of the present invention. As Figure 2 shown, the port mapping module 12 includes at least one port mapping unit 121, such as the port mapping units 1-7 shown Figure 1 in. The data processing module 13 includes at least one processing channel 131, and the front-end interface module 11 includes at least one ADC analog unit 111. Among them, the number of port mapping units 121 is the same as the number of processing channels 131 in the data processing module 13. Among them, each port mapping unit 121 is electrically connected to all ADC analog units 111 in the front-end interface module, and the number of port mapping units can be less than or equal to the number of ADC analog units in the front-end interface module. Each port mapping unit 121 is electrically connected to a processing channel 131.

[0050] The port mapping module 12 is used to trigger the corresponding port mapping unit 121 according to the application, and the port mapping unit 121 is used to map the source data to the processing channel electrically connected to the port mapping unit.

[0051] For example, it can be mapped to different processing channels according to the applications and requirements described above, so as to meet different application requirements.

[0052] The data processing module 13 is used to perform filtering and downsampling processing on the received source data. The data processing module 13 includes a plurality of processing channels 131. Please refer to Figure 3 , Figure 3 which is a schematic structural diagram of the processing channel 131 in the data processing module 13.

[0053] The processing channel 131 is a filter bank, which includes a first calculation unit 1311 of a first filter and a second calculation unit 1312 of a second filter electrically connected to the first calculation unit. In this embodiment, the first filter can adopt a CIC filter, and the second filter can adopt a FIR filter. It should be understood that in other embodiments, other filter combinations can also be selected.

[0054] The first calculation unit 1311 and the second calculation unit 1312 are used to perform filtering and downsampling processing on the source data in sequence.

[0055] Among them, the processing processes of the first calculation unit 1311 and the second calculation unit 1312 are controlled by the control module 14.

[0056] The control module 14 is used to group the processing channels 131 in the data processing module 13, and provide different clock signals and control signals to different groups of processing channels 131, so that different groups of processing channels 131 can process the source data according to the received clock signals and control signals. It should be noted that the number of processing channels in each group can be changed according to the application and the user's needs. The grouping situation of the processing channels 131 corresponds to the mapping scheme of the port mapping module 12. As Figure 1 shown, the control module 14 includes a filter controller 141 and a group selector 142, where the filter controller 141 is electrically connected to the group selector 142, the number of group selectors 142 is the same as that of the processing channels 131, and each group selector 142 is electrically connected to a processing channel 131;

[0057] The filter controller 141 outputs different clock signals and control signals according to the application to control the group selector 142 to output different clock signals and control signals in a grouped manner to the corresponding processing channels 131, so as to control the corresponding processing channels 131 to work.

[0058] Specifically, the filter controller 141 may include at least two sub-controllers. In this embodiment, taking the filter controller 141 including two sub-controllers 1411 and 1412 as an example, each sub-controller is electrically connected to the group selector 142, and each sub-controller can output different control signals and clock signals to control different groups of processing channels to perform different filtering and downsampling operations.

[0059] Specifically, in this embodiment, the processing channels 131 are divided into two groups for control. Each sub-controller outputs a control signal and a clock signal, and then the group selector transmits these control signals and clock signals to the corresponding processing channels 131. The processing channels 131 that receive the control signal and clock signal of the sub-controller 1411 form one group, and the processing channels 131 that receive the control signal and clock signal of the sub-controller 1412 form another group. Different groups of processing channels 131 will work according to the control signals and clock signals they receive.

[0060] It should be understood that, as mentioned above, some applications do not require all the processing channels 131 to perform filtering and downsampling operations. At this time, the control signals and clock signals received by the processing channels 131 without source data input can be set to null values to suspend them and pause their work.

[0061] In this embodiment, the structures of each sub-controller are the same. Please refer to Figure 4 , Figure 4It is a schematic structural diagram of the sub - controller. As Figure 4 shown, taking the sub - controller 1411 as an example, the sub - controller 1411 includes a frequency divider 1413, a first timing controller 1414, a second timing controller 1415, and a coefficient selector 1416. The frequency divider 1413 is electrically connected to the first timing controller 1414 and the second timing controller 1415, and the second timing controller 1415 is further electrically connected to the coefficient selector 1416, where:

[0062] The frequency divider 1413 divides the input master clock signal according to the sampling rate to obtain a first clock signal and a second clock signal. Among them, the sampling rate is set by the register of the analog - to - digital conversion system according to the grouping situation, and the sampling rates of each group do not interfere with each other.

[0063] The first timing controller 1414 is used to generate a pulse sequence (i.e., the control signal of the first computing unit) that meets the timing requirements to drive the first computing unit;

[0064] The coefficient selector 1416 is used to select the coefficients of the second computing unit according to the coefficient selection rule;

[0065] The second timing controller 1415 is used to generate a pulse sequence (i.e., the control signal of the second computing unit) that meets the timing requirements to drive the second computing unit and output the coefficients of the second computing unit. Among them, the coefficients of the second computing unit include full - bandwidth parameters, high anti - aliasing parameters, and half - bandwidth parameters. The signals output by the above - mentioned sub - controller will be transmitted through the group selector.

[0066] Please refer further to Figure 5 , Figure 5 which is a schematic structural diagram of the group selector in this embodiment. As Figure 5 shown, the group selector selects a group of clock signals and control signals from the group 0 clock signal, control signal, group 1 clock signal, and control signal according to the group policy for the corresponding channel computing unit to use.

[0067] In summary, through the methods of grouping and mapping, this solution enables the system to only manufacture the minimum number of digital channels; through group control, the control modules and filter data are shared among the processing channels within the group, reducing costs and power consumption. At the same time, each group can use independent filter parameters and can flexibly configure the number of channels within the group to adapt to changing usage scenarios.

[0068] The embodiment of the present invention also provides an audio device, and the audio device may include the above - mentioned analog - to - digital conversion system.

[0069] In addition, the above-mentioned drawings are only schematic illustrations of the processes included in the method according to the exemplary embodiments of the present invention, rather than for limiting purposes. It is easy to understand that the processes shown in the above-mentioned drawings do not indicate or limit the chronological order of these processes. Additionally, it is also easy to understand that these processes can be executed synchronously or asynchronously in, for example, multiple modules.

[0070] Other embodiments of the present invention will be readily apparent to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. The present invention is intended to cover any variations, uses, or adaptations of the present invention that follow the general principles of the present invention and include known common general knowledge or conventional technical means in the technical field not disclosed by the present invention. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of the present invention are pointed out by the claims.

[0071] It should be understood that the present invention is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present invention is only limited by the appended claims.

Claims

1. An analog-to-digital conversion system, characterized in that, The analog-to-digital conversion system includes a front-end interface module, a port mapping module, a data processing module, and a control module connected in sequence, where: The front-end interface module is used to electrically connect to an external application data source to receive source data generated by the application data source; The port mapping module is used to map the source data into a processing channel in the data processing module; wherein, the port mapping module is used to map the source data into the processing channel that matches the source data according to different applications; The control module is used to group the processing channels in the data processing module and provide different clock signals and control signals to different groups of processing channels, so that the different groups of processing channels can process the source data according to the received clock signals and control signals, where the number of processing channels in each group can be changed according to the application and the user's needs; The control module includes a filter controller and a group selector, where the filter controller is electrically connected to the group selector, the number of group selectors is the same as that of the processing channels, and each group selector is electrically connected to a corresponding processing channel; The filter controller outputs different clock signals and control signals according to the application to control the group selector to output different clock signals and control signals in a grouped manner to the corresponding processing channels, thereby controlling the corresponding processing channels to work.

2. The analog-to-digital conversion system according to claim 1, characterized in that The port mapping module includes at least one port mapping unit, the data processing module includes at least one processing channel, and the front-end interface module includes at least one ADC analog unit, where the number of port mapping units is equal to the number of processing channels, the number of processing channels is less than or equal to the number of ADC analog units in the front-end interface module, and each port mapping unit is electrically connected to all ADC analog units in the front-end interface module, and each port mapping unit is electrically connected to a processing channel; The port mapping module is used to trigger the corresponding port mapping unit according to the application, and the port mapping unit is used to map the source data into the processing channel electrically connected to the port mapping unit.

3. The analog-to-digital conversion system according to any one of claims 1-2, characterized in that, The processing channel is a filter bank, including a first calculation unit of a first filter and a second calculation unit of a second filter electrically connected to the first calculation unit, where: The first calculation unit and the second calculation unit are used to sequentially perform filtering and downsampling processing on the source data.

4. The analog-to-digital conversion system according to claim 3, wherein The filter controller includes at least two sub-controllers, each sub-controller is electrically connected to the group selector, and each sub-controller can output different clock signals and control signals to control different groups of processing channels to perform different filtering and downsampling operations.

5. The analog-to-digital conversion system according to claim 4, characterized in that, The sub-controller includes a frequency divider, a first timing controller, a second timing controller, and a coefficient selector. The frequency divider is electrically connected to the first timing controller and the second timing controller, and the second timing controller is further electrically connected to the coefficient selector, where: The frequency divider divides the input master clock signal according to the sampling rate to obtain a first clock signal and a second clock signal. The first timing controller is used to generate a pulse sequence that meets the timing requirements for driving the first computing unit. The coefficient selector is used to select the coefficients of the second computing unit according to the coefficient selection rule. The second timing controller is used to generate a pulse sequence that meets the timing requirements for driving the second computing unit and output the coefficients of the second computing unit.

6. The analog-to-digital conversion system according to claim 5, characterized in that The coefficients of the second computing unit include full bandwidth parameters, high anti-aliasing parameters, and half bandwidth parameters.

7. The analog-to-digital conversion system according to claim 5, characterized in that, The analog-to-digital conversion system further includes a register, and the register is used to set the sampling rate according to the grouping, wherein the sampling rates of each group do not interfere with each other.

8. An audio device, characterized in that, The audio device includes the analog-to-digital conversion system according to any one of claims 1-7.

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