Wiring board and electronic device module

Abstract

A wiring board includes a metal plate having a first surface and a second surface opposite to each other, and having at least one through-hole passing through the first surface and the second surface; at least one conductive via arranged in the at least one through-hole and spaced apart from the metal plate; an insulating structure including at least one through-insulating portion arranged between the at least one through-hole and the at least one conductive via, and a first insulating layer and a second insulating layer respectively extending from the at least one through-insulating portion on the first surface and the second surface and arranged in a first region surrounding the at least one conductive via; at least one first upper pad arranged on the first insulating layer and electrically connected to the at least one conductive via; at least one first lower pad arranged on the second insulating layer and electrically connected to the at least one conductive via; a second upper pad arranged on the first surface of the metal plate; and a second lower pad arranged on the second surface of the metal plate.

Description

[0001] Cross-reference to related applications

[0002] This application is based on and claims priority to Korean Patent Application No. 10-2020-0010939, filed on January 30, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to a wiring board and an electronic device module having the wiring board. Background Technology

[0004] In recent years, with the development of technologies related to electronic devices, the high performance and high output of semiconductor devices have been achieved. As semiconductor devices achieve high performance and high power levels, problems related to heat generation within them may arise. Various studies have been conducted to address these heat generation issues in semiconductor devices. Summary of the Invention

[0005] An exemplary embodiment provides a wiring board with improved heat dissipation performance.

[0006] An example embodiment provides an electronic device module that includes a wiring board with improved heat dissipation performance.

[0007] According to an example embodiment, a wiring board includes: a metal plate having a first surface and a second surface opposite to each other, and having at least one through-hole penetrating the first surface and the second surface; at least one conductive through-hole disposed in the at least one through-hole and spaced apart from the metal plate; an insulating structure including at least one through-insulation portion disposed between the at least one through-hole and the at least one conductive through-hole, and a first insulating layer and a second insulating layer extending from the at least one through-insulation portion and disposed in a first region surrounding the at least one conductive through-hole on the first surface and the second surface, respectively; at least one first upper pad disposed on the first insulating layer and electrically connected to the at least one conductive through-hole; at least one first lower pad disposed on the second insulating layer and electrically connected to the at least one conductive through-hole; a second upper pad disposed on the first surface of the metal plate; and a second lower pad disposed on the second surface of the metal plate and electrically connected to the first upper pad through the metal plate.

[0008] According to an example embodiment, an electronic device module includes: a metal plate having a first surface and a second surface opposite to each other, and having a plurality of through holes penetrating the first surface and the second surface; a plurality of conductive through-holes respectively disposed in the plurality of through holes and spaced apart from the metal plate; an insulating structure including a plurality of through-insulation portions respectively disposed between the plurality of through holes and the plurality of conductive through-holes, and a first insulating layer and a second insulating layer respectively extending from the plurality of through-insulation portions on the first surface and the second surface and disposed in regions surrounding the plurality of conductive through-holes; a plurality of first upper pads disposed on the first insulating layer and respectively connected to the plurality of conductive through-holes; a plurality of first lower pads disposed on the second insulating layer and respectively connected to the plurality of conductive through-holes; a second upper pad disposed on the first surface of the metal plate; a second lower pad disposed on the second surface of the metal plate and electrically connected to the plurality of first upper pads through the metal plate; a first electronic device mounted on the second upper pad and electrically connected to the plurality of first upper pads and the second upper pad; and a second electronic device mounted on the plurality of first upper pads and electrically connected to the plurality of first upper pads and the second upper pad.

[0009] According to an example embodiment, an electronic device module includes: the aforementioned wiring board; and a first electronic device mounted on a second upper pad and electrically connected to a plurality of first upper pads and second upper pads respectively.

[0010] According to an example embodiment, an electronic device includes: a lower package having a semiconductor chip; and an upper package including a wiring board disposed on the lower package and a first electronic device and a second electronic device disposed on the wiring board, wherein the lower package includes: a package substrate having wiring circuitry and a semiconductor chip disposed thereon for connection to the wiring circuitry; a frame having a receiving portion for receiving the semiconductor chip; and a plurality of vertically connected conductors penetrating an upper surface and a lower surface of the frame and electrically connected to the wiring circuitry, wherein the wiring board of the upper package includes: a metal plate having a first surface facing the upper surface of the frame and a second surface opposite to the first surface, and having a plurality of through holes penetrating the first and second surfaces; a plurality of conductive through-holes respectively disposed in the plurality of through-holes and spaced apart from the metal plate; and an insulating junction. The structure includes a plurality of through-insulation portions disposed between a plurality of through holes and a plurality of conductive through-members, and a first insulating layer and a second insulating layer extending from the plurality of through-insulation portions and disposed in a first region surrounding the plurality of conductive through-members on a first surface and a second surface, respectively; a plurality of first upper pads and a plurality of first lower pads disposed on the first insulating layer and the second insulating layer, respectively, and electrically connected to the plurality of conductive through-members; and a second upper pad and a second lower pad disposed on the first surface and the second surface of a metal plate, respectively, and electrically connected to each other through the metal plate, wherein a first electronic device and a second electronic device are respectively mounted on at least one of the plurality of first upper pads and the second upper pad, and electrically connected to the first upper pad and the second upper pad, respectively, and the plurality of first lower pads and the second lower pad are respectively electrically connected to a vertical connecting conductor.

[0011] According to an example embodiment, a wiring board includes: a metal plate having a first surface and a second surface opposite to each other, each of the first surface and the second surface being divided into a first region and a second region, wherein the first region has a lower horizontal height than the second region, and the metal plate includes at least one through-hole penetrating the first region of the first surface and the second surface; an insulating structure including at least one through-insulation portion disposed along the sidewall of the at least one through-hole, a first insulating layer extending from the at least one through-insulation portion to the first region of the first surface, and a second insulating layer extending from the at least one through-insulation portion to the first region of the second surface; at least one conductive through-hole penetrating the insulating structure to be located in the at least one through-hole and electrically insulated from the metal plate by the at least one through-insulation portion; at least one first upper pad and at least one first lower pad disposed on the first insulating layer and the second insulating layer, respectively, and electrically connected to each other by the at least one conductive through-hole; and a second upper pad and a second lower pad disposed on the second region of the first surface and the second region of the second surface, respectively, and electrically connected to each other by the metal plate. Attached Figure Description

[0012] The above and other aspects, features and advantages of this disclosure will become more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0013] Figure 1A This is a plan view of an electronic device module according to an example embodiment;

[0014] Figure 1B It is along Figure 1A A side cross-sectional view of the electronic device module taken by line I-I' in the diagram;

[0015] Figure 2 This is a perspective view of a metal-based wiring board according to an example embodiment;

[0016] Figures 3A to 8A This is a plan view illustrating the various processes of a method for manufacturing a metal-based wiring board according to an example embodiment;

[0017] Figures 3B to 8B This is a cross-sectional view illustrating various processes of a method for manufacturing a metal-based wiring board according to an example embodiment;

[0018] Figure 9A and Figure 9B These are, respectively, a plan view and a bottom view of the electronic device module according to the example embodiment;

[0019] Figure 9C It is along Figure 9A A side cross-sectional view of the electronic device module taken from line II-II' in the diagram;

[0020] Figure 10 This is a schematic perspective view showing a PoP-type electronic device module according to an example embodiment;

[0021] Figure 11 It is shown Figure 10 An exploded perspective view of a PoP-type electronic device module is shown in the figure; and

[0022] Figure 12 It is along Figure 10 The cross-sectional view of the PoP type electronic device module (excluding the lens and housing) taken by line III-III' in the figure. Detailed Implementation

[0023] Various exemplary embodiments will be described in detail below with reference to the accompanying drawings.

[0024] Figure 1A This is a plan view of an electronic device module according to an example embodiment, and Figure 1B It is along Figure 1A The side cross-sectional view of the electronic device module taken by line I-I' in the figure.

[0025] Reference Figure 1A and Figure 1B According to an example embodiment, the electronic device module 200 includes a wiring board 100 and a first electronic device 210 and a second electronic device 220 mounted on the wiring board 100.

[0026] The wiring board 100 according to this embodiment may include a metal plate 110 having a first surface 110A and a second surface 110B opposite to each other, and a plurality of through holes H1 and H2 penetrating the first surface 110A and the second surface 110B. The metal plate 110 may include a metal or alloy having high thermal conductivity and high electrical conductivity. For example, the metal plate 110 may include copper (Cu), aluminum (Al), or an alloy.

[0027] The wiring board 100 includes a vertical wiring structure connecting its upper and lower surfaces (i.e., the first surface 110A and the second surface 110B). For example... Figure 1B As shown, this vertical wiring structure may include multiple conductive through-holes CV1 and CV2 respectively arranged in through-holes H1 and H2. The conductive through-holes CV1 and CV2 are electrically insulated from the metal plate 110 through the insulating structure 120.

[0028] The insulating structure 120 may include a plurality of through insulating portions 120c, each of which is disposed between the inner sidewall of each through hole in through holes H1 and H2 and each of the conductive through-holes CV1 and CV2. Furthermore, the insulating structure 120 may include a first insulating layer 120a and a second insulating layer 120b, which extend from each through insulating portion 120c and are disposed in the region surrounding each of the conductive through-holes CV1 and CV2, for example, in a first region 110A1 on the first surface 110A and a first region 110B1 on the second surface 110B, respectively.

[0029] In this embodiment, conductive through-holes CV1 and CV2 are arranged side-by-side adjacent to a side edge, and a first insulating layer 120a and a second insulating layer 120b are formed along the edge, and may be disposed as a single layer on each of the first surface 110A and the second surface 110B. Furthermore, the through-insulation portions 120c located in the through holes H1 and H2 may be formed of the same material as the first insulating layer 120a and the second insulating layer 120b to integrate with them. For example, the insulating structure 120 may include an insulating resin such as epoxy resin or polyimide (e.g., insulating ink).

[0030] like Figure 1BAs shown, in the metal plate 110 used in this embodiment, the region where the first insulating layer 120a and the second insulating layer 120b are disposed may have a structure in which its horizontal height is lower than that of other regions. Specifically, the first surface 110A and the second surface 110B of the metal plate 110 may be divided into first regions 110A1 and 110B1 and second regions 110A2 and 110B2, respectively. The first regions 110A1 and 110B1 are the regions where the first insulating layer 120a and the second insulating layer 120b are disposed, and may have a lower horizontal height than the second regions 110A2 and 110B2. The first regions 110A1 and 110B1 can be formed by etching the corresponding regions of the metal plate 110.

[0031] Through holes H1 and H2 can penetrate a first region 110A1 of the first surface 110A and a first region 110B1 of the second surface 110B. In this embodiment, the first region 110A1 of the first surface 110A and the first region 110B1 of the second surface 110B are shown to substantially overlap in the vertical direction, but in another embodiment, some regions of the first regions 110A1 and 110B1 may not overlap in the vertical direction.

[0032] The regions forming the first insulating layer 120a and the second insulating layer 120b can be defined by first regions 110A1 and 110B1, and the first insulating layer 120a and the second insulating layer 120b can be provided in the regions in which the first upper pad 131a and the first lower pad 141a will be formed. Specifically, vias H1 and H2 are located in the vertically overlapping regions of the first regions 110A1 and 110B1, and other regions of the first regions 110A1 and 110B1 can be varied according to the desired design of the first upper pad 131a and the first lower pad 141a.

[0033] On the first surface 110A of the metal plate 110, the first insulating layer 120a disposed in the first region 110A1 is substantially coplanar with the surface of the second region 110A2. Similarly, on the second surface 110B of the metal plate 110, the second insulating layer 120b disposed in the first region 110B1 may have a surface substantially coplanar with the surface of the second region 110B2. However, the exemplary embodiments are not limited thereto, and in some embodiments, the surfaces of the first insulating layer 120a and the second insulating layer 120b may have different horizontal levels than the surfaces of the second regions 110A2 and 110B2, respectively.

[0034] The wiring board 100 may include a plurality of first upper pads 131a and 131b on a first insulating layer 120a, respectively connected to conductive through-holes CV1 and CV2, and a plurality of first lower pads 141a and 141b on a second insulating layer 120b, respectively connected to conductive through-holes CV1 and CV2. In this embodiment, although conductive through-holes CV1 and CV2 are shown as being connected to a first upper pad 131a and a first lower pad 141a, in other embodiments, a first upper pad or a first lower pad may also be connected to at least two conductive through-holes.

[0035] Thus, together with the conductive through-holes CV1 and CV2, the first upper pads 131a and 131b and the first lower pads 141a and 141b can provide multiple vertical wiring structures electrically isolated from the metal plate 110. As described above, these vertical wiring structures can be separated from the metal plate 110 via the insulating structure 120.

[0036] The wiring board 100 may include a second upper pad 132 disposed on a first surface 110A and a second lower pad 142 disposed on a second surface 110B. Unlike the first upper pad 131 and the first lower pad 141, the second upper pad 132 and the second lower pad 142 are directly connected to the metal plate 110 and can be electrically connected to each other through the metal plate 110 without the need for separate conductive through-holes.

[0037] In this embodiment, a portion of the second upper pad 132 may be disposed on the first insulating layer 120a. Similarly, a portion of the second lower pad 142 may be disposed on the second insulating layer 120b.

[0038] The first upper pad 131 and the second upper pad 132, as well as the first lower pad 141 and the second lower pad 142, can be formed in an electroplating process. For example, the first upper pad 131 and the second upper pad 132, as well as the first lower pad 141 and the second lower pad 422, can each include a seed layer (e.g., a layer of Ni, Cr, Ti, or a combination thereof) and an electroplated layer (e.g., a Cu layer) formed on the seed layer. Similarly, conductive through-holes CV1 and CV2 can also be formed in an electroplating process. Conductive through-holes CV1 and CV2 can be formed by the same electroplating process, while the first upper pad 131 and the second upper pad 132, as well as the first lower pad 141 and the second lower pad 422, are also formed (see [link to electroplating process]). Figure 7A and 7B In this embodiment, conductive through-hole members CV1 and CV2 are shown as filled types formed by electroplating, but they may also have the following form: wherein an electroplated layer of predetermined thickness is formed along the inner sidewall of the through-insulation portion 120c, and there is an empty space inside or the empty space is filled with another insulating material.

[0039] like Figure 1A As shown, at least one edge of the first upper pad 131 and at least one edge of the second upper pad 132 may be arranged near an edge of the first surface 110A. Similarly, at least one edge of the first lower pad 141 and at least one edge of the second lower pad 142 may be arranged near an edge of the second surface 110B. This arrangement of pads can be understood as the result of forming an electroplated layer for at least a portion of the pads on multiple adjacent wiring boards during the manufacturing process of the wiring board, and separating the electroplated layer during the cutting into individual wiring boards.

[0040] In this embodiment, the first electronic device 210 and the second electronic device 220 may be mounted on the first upper pad 131 and the second upper pad 132. In this embodiment, the first electronic device 210 is arranged on the second upper pad 132, and the second electronic device 220 may be arranged on the first upper pad 131.

[0041] The first electronic device 210 and the second electronic device 220 can be electrically connected to at least one or the other of the first upper pad 131 and the second upper pad 132 via surface mounting or wiring methods. In this embodiment, the first electronic device 210 and the second electronic device 220 can be devices having an upper surface on which a first electrode is disposed and a lower surface on which a second electrode is disposed. In the case of the first electronic device 210 and the second electronic device 220, the second electrode can be connected to the second upper pad 132 and the first upper pad 131 respectively using a surface mounting method. For example, as Figure 1B As shown, the second electrode of the first electronic device 210 is electrically connected, mechanically connected, and thermally connected to the second upper pad 132 via a conductive bonding layer 235. For example, the conductive bonding layer 235 may be a paste containing a metal such as Ag or Cu. Similar to the first electronic device 210, the second electronic device 220 may be connected to the first upper pad 131a using a conductive bonding layer (not shown).

[0042] The first electronic device 210 may have a plurality of first electrodes thereon. One of the first electrodes of the first electronic device 210 can be connected to the first electrode of the second electronic device 220 arranged on a first upper pad 131a via a wire W. Another first electrode of the first electronic device 210 can be connected to another first upper pad 131b via another wire W.

[0043] The first electronic device 210 can be the main heat source with a larger heat output than the second electronic device 220. The heat generated from the first electronic device 210 can be effectively dissipated by the metal plate 110 that is in direct contact with the second upper pad 132.

[0044] like Figure 2 As shown, all sides of the wiring board 100 according to this embodiment can be provided by the side surface 110S of the metal plate. Figure 2 This is a perspective view of a wiring board according to an example embodiment.

[0045] Reference Figure 2 The wiring board 100 has four sides, and the four side surfaces 110S of the metal plate 110 are continuously exposed to the four sides of the wiring board 100. Therefore, heat generated by the first electronic device 210 is transferred to the metal plate 110 through the second upper pad 132 and can be effectively released through the side surfaces 110S (see arrow "H"). The thickness T1 of the continuously exposed portion of the metal plate 110 can be at least 50% of the total thickness T0 of the metal plate 110.

[0046] In some embodiments, the total thickness T0 of the metal plate 110 may be 800 μm or greater, and effective heat dissipation can be achieved by designing the thickness T1 of the exposed portion of the metal plate to be greater than or equal to 70% of the thickness T0 and less than 100% of the thickness T0.

[0047] For example, the first electronic device 210 may be a memory chip, a logic chip, or a high-power light source device. For instance, the memory chip may be a volatile memory chip (such as dynamic random access memory (DRAM) (e.g., high-bandwidth memory (HBM) or static random access memory (SRAM)) or a non-volatile memory chip (such as phase-change random access memory (PRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FeRAM), or resistive random access memory (RRAM)). Furthermore, the logic chip may be, for example, a microprocessor, an analog device, or a digital signal processor. Additionally, the high-power light source device may be a high-power light-emitting diode (LED) or a high-power laser diode. The second electronic device 220 may be a device with relatively low heat generation. For example, the second electronic device 220 may include passive devices such as photodiodes or capacitors. In a particular embodiment, the first electronic device 210 is a high-power LED or a high-power laser diode, and the second electronic device 220 may be a photodiode.

[0048] Figures 3A to 8A It is used to show the manufacturing process. Figure 2 The diagram shows the various processes of the wiring board 100 method. Figures 3B to 8B It is used to show the manufacturing process. Figure 2 Cross-sectional views of various processes of the wiring board 100 shown.

[0049] Reference Figure 3A and Figure 3BA first region 110A1 and 110B1 with a lower horizontal height than the second regions 110A2 and 110B2 are formed on the first surface 110A and the second surface 110B of the metal plate 110.

[0050] The metal plate 110 may comprise a metal or alloy having high thermal conductivity and excellent electrical conductivity. For example, the metal plate 110 may be formed of copper (Cu), aluminum (Al), or alloys thereof. For example, copper not only has better electrical conductivity than ceramics, but also has better thermal conductivity than ceramics (e.g., about 300 W / mK), and is therefore advantageously usable.

[0051] The first insulating layer 120a and the second insulating layer 120b will be disposed on the metal plate 110 (see...) Figure 5A and Figure 5B The process is performed by selective etching of the regions 110A and 120B. The thickness of the first insulating layer 120a and the second insulating layer 120b can be defined by the etching depth on the first surface 110A and the second surface 110B. From a heat dissipation perspective, it is advantageous for the second region 110A2 with a thickness of T0 to have a relatively larger area than the second region 110A1 with a thickness of T1 after etching. Furthermore, the thickness T1 of the etched portion of the metal plate 110 can be 50% or more of the total thickness T0 of the metal plate 110, specifically, 70% or more. In some embodiments, the total thickness T0 of the metal plate 110 can be 800 μm or more, and the thickness T1 of the exposed portion of the metal plate 110 can be 600 μm or more. In this embodiment, only one first region 110A1 and 110B1 are disposed on the first surface 110A and the second surface 110B, but multiple separate first regions and second regions can be disposed on the first surface 110A and the second surface 110B (see Figures 9A to 9C ).

[0052] Next, refer to Figure 4A and Figure 4B Multiple through holes H1 and H2 are formed that penetrate the first region 110A1 of the first surface 110A and the first region 110B1 of the second surface 110B.

[0053] Through holes H1 and H2 can be formed using laser drilling or mechanical drilling. Through holes H1 and H2 can be configured as a vertical connection structure for connecting the first surface 110A and the second surface 110B. In this embodiment, two through holes are formed, but in another embodiment, one through hole or three or more through holes can be formed.

[0054] Next, refer to Figure 5A and Figure 5B An insulating structure 120 is formed on the first regions 110A1 and 110B1 to fill the through holes H1 and H2.

[0055] Insulating resins such as epoxy resin or polyimide (e.g., insulating ink) can be used to form the insulating structure 120, but the materials used to form the insulating structure 120 are not limited to these. The insulating structure 120 can be formed as planar while filling through-holes H1 and H2. After forming an insulating material layer to cover the first surface 110A and the second surface 110B, a polishing or etching process is performed on the insulating material layer to expose the second regions 110A2 and 110B2. Thus, a first insulating layer 120a and a second insulating layer 120b defined by the first regions 110A1 and 110B1, respectively, can be formed.

[0056] As described above, the insulating structure 120 may include a plurality of through insulating portions 120c that fill the interior of the through holes H1 and H2, and a first insulating layer 120a and a second insulating layer 120b extending from the through insulating portions 120c and respectively disposed on a first region 110A1 of the first surface 110A and a first region 110B1 of the second surface 110B.

[0057] Subsequently, referring to Figure 6A and Figure 6B Multiple contact holes H1' and H2' are formed in the through insulating portion 120c of the insulating structure 120.

[0058] Contact holes H1' and H2' can be formed using laser drilling or mechanical drilling. Contact holes H1' and H2' have a smaller diameter than through holes H1 and H2, and can be formed within the through-insulation portion 120c. Specifically, contact holes H1' and H2' can be surrounded by the through-insulation portion 120c in such a manner that the inner walls of through holes H1 and H2 (e.g., the surface of the metal plate 110) are not exposed.

[0059] Next, refer to Figure 7A and Figure 7B Multiple conductive through-holes CV1 and CV2 can be formed by filling contact holes H1' and H2' with conductive material.

[0060] For example, conductive through-holes CV1 and CV2 can be formed by filling contact holes H1' and H2' with a conductive material such as copper or silver paste. Conductive through-holes CV1 and CV2 can be configured as a vertical connection structure connecting a first region 110A1 of the first surface 110A and 110B1 of the second surface 110B. In some embodiments, conductive through-holes CV1 and CV2 may comprise a material different from that of the metal plate 110.

[0061] Reference Figure 8A and Figure 8B A first upper pad 131 and a second upper pad 132, as well as a first lower pad 141 and a second lower pad 142, can be formed on the first surface 110A and the second surface 110B of the metal plate 110, respectively.

[0062] For example, an electroplating process can be used to form the first upper pad 131 and the second upper pad 132, as well as the first lower pad 141 and the second lower pad 142. After forming a seed layer (e.g., formed of Ni, Cr, Ti, or a combination thereof) on the first surface 110A and the second surface 110B, a photoresist exposing the pad formation region is formed on the seed layer (not shown), and an electroplating process is used to form an electroplated layer (e.g., formed of Cu), thereby forming the desired first upper pad 131 and the second upper pad 132, as well as the first lower pad 141 and the second lower pad 142. The exposed seed layer can be removed along with the photoresist after the electroplating process. Figure 8A and Figure 8B The wiring board shown.

[0063] Although this embodiment illustrates the formation of conductive through-holes CV1 and CV2 using a different process than that used to form the first upper pad 131 and the second upper pad 132, and the first lower pad 141 and the second lower pad 142, the same electroplating process can be used to form conductive through-holes CV1 and CV2. For example, a seed layer is also formed on the inner sidewalls of contact holes H1' and H2' to form the desired electroplating layer in contact holes H1' and H2', thereby forming conductive through-holes CV1 and CV2, as well as the first upper pad 131 and the second upper pad 132, and the first lower pad 141 and the second lower pad 142. In this case, with Figure 8B The conductive through-holes CV1 and CV2 shown are different in that, depending on the thickness of the electroplated layer obtained by electroplating, the conductive through-holes CV1 and CV2 have empty spaces, or the empty spaces can be filled with another insulating material.

[0064] Figure 9A and Figure 9B These are plan and bottom views of an electronic device module according to an example embodiment. Figure 9C It is along Figure 9A (or Figure 9B The side cross-sectional view of the electronic device module taken from line II-II' in ().

[0065] Reference Figures 9A to 9C The electronic device module 200A according to the example embodiment may have the same as Figure 1A and Figure 1B The example embodiment shown has a similar structure, except that the first regions 110A1 and 110B1, with relatively low horizontal heights, are respectively set as two separate regions on the first surface 110A and the second surface 110B, six vertical connection structures (metal plate 110 and five contact conductive through-holes CV1 to CV5) are provided, and three electronic devices 250, 260, and 270 are provided. Therefore, unless otherwise specifically stated, Figure 1A and Figure 1B The description of the embodiments shown may be combined with the description of this embodiment.

[0066] The electronic device module 200A according to this embodiment has a wiring board 100A that is different from the wiring board 100 used in the previous embodiment. The wiring board 100A has two first regions 110A1 and 110B1 on each of the first surface 110A and the second surface 110B. Specifically, the first regions 110A1 and 110B1 are respectively arranged on the opposite edges of the first surface 110A and the second surface 110B of the metal plate 110.

[0067] The first insulating structure and the second insulating structure can be arranged in the first regions 110A1 and 110B1 on both sides, respectively. In this embodiment, three through holes H1, H2 and H3 are arranged in the first regions 110A1 and 110B1 on the right side, and two through holes H4 and H5 are arranged in the first regions 110A1 and 110B1 on the left side.

[0068] The first insulating structure 121 may include three first through-insulation portions 121c respectively disposed between the inner sidewalls of the first through holes to the third through holes H1, H2, and H3 and between the first conductive through-pieces to the third conductive through-pieces CV1, CV2, and CV3, and a first insulating layer 121a and a second insulating layer 121b extending from the first through-insulation portions 121c and disposed on the first regions 110A1 and 110B1 where the first conductive through-pieces to the third conductive through-pieces CV1, CV2, and CV3 are located. Similarly, the second insulating structure 122 may include two second through-insulation portions 122c (not shown) respectively disposed between the inner sidewalls of the fourth through hole H4 and the fifth through hole H5 and between the fourth conductive through-piece CV4 and the fifth conductive through-piece CV5, and a first insulating layer 122a and a second insulating layer 122b extending from the second through-insulation portions 122c and disposed on the first regions 110A1 and 110B1 where the fourth conductive through-piece CV4 and the fifth conductive through-piece CV5 are located.

[0069] According to this embodiment, the electronic device module 200A can be a light source module applied together with a 3D sensing module in an electronic device such as a mobile communication terminal.

[0070] The first electronic device 250 may be a high-power light-emitting diode or a high-power laser diode that serves as the main heat source. For example, the first electronic device 250 may include a high-power (e.g., 5W or higher) vertical-cavity surface-emitting laser (VCSEL). For example, the second electronic device 260 and the third electronic device 270 may be a photodiode chip and a Zener diode chip, respectively.

[0071] The first electronic device 250 may be disposed on the second upper pad 132. The second upper pad 132 may provide another vertical connection structure together with the metal plate 110 and the second lower pad 142. Furthermore, the heat generated from the first electronic device 250 can be effectively dissipated through the metal plate 110 in direct contact with the second upper pad 132.

[0072] Through a vertical connection structure including an upper and lower surface that are interconnected, Figures 9A to 9C The electronic device module 200A shown can be implemented as a stacked PoP package together with other functional packages (such as drive devices). This embodiment... Figures 10 to 12 It is shown in the middle.

[0073] Figure 10 This is a schematic perspective view showing a PoP-type electronic device module according to an example embodiment, and Figure 11 It is shown Figure 10 An exploded perspective view of the PoP type electronic device module shown in the figure.

[0074] Reference Figure 10 and Figure 11 According to an example embodiment, the PoP type electronic device module 500 includes a lower package 300 having a semiconductor chip 350 and an upper package 400 disposed on the lower package 300.

[0075] Upper package 400 may include Figure 9A The electronic device module 200A is shown. For example, the upper package 400 may include a wiring board 100A and first to third electronic devices 250, 260 and 270 disposed on the wiring board 100A. The upper package 400 may also include a lens housing 410 disposed on the wiring board 100A and having an upwardly opening window Wd, and a lens unit 450 disposed in the window Wd.

[0076] The lower package 300 may include a package substrate 310 on which a semiconductor chip 350 is mounted, and a frame 320 disposed on the package substrate 310 and having a receiving portion 321H for receiving the semiconductor chip 350. The semiconductor chip 350 may be, for example, a driver integrated circuit (IC) chip.

[0077] Reference Figure 12 The electrical connection structure between the electronic device module 200A of the upper package 400 and the lower package 300 will be described in detail. Figure 12 It is along Figure 11 The diagram shown is a cross-sectional view of the PoP type electronic device module (excluding the lens and housing) taken by line III-III', and for ease of description, it can be understood as a cross-sectional view without the lens unit 450 and the lens housing 410.

[0078] Reference Figure 12 The packaging substrate 310 may include a substrate body 311 and wiring circuitry 315 formed in the substrate body 311. The frame 320 may include vertical connecting conductors 322, 323 and 325 connected to the wiring circuitry 315.

[0079] In detail, the package substrate 310 may include bonding pads 317 disposed on the upper surface of the substrate body 311 and connected to the wiring circuitry 315. A flip-chip method can be used to bond the semiconductor chip 350 to the package substrate 310. For example, conductive bumps SB can be used to connect the contact pads 350P of the semiconductor chip 350 to the bonding pads 317.

[0080] Furthermore, the packaging substrate 310 may include upper pads 312 and lower pads 313 disposed on the upper surface 311A ​​and lower surface 311B of the substrate body 311 and connected to the wiring circuit 315. The vertical connection conductors of the frame 320 include upper patterns 322 and lower patterns 323 disposed on the upper surface 321A and lower surface 321B of the frame body 321, respectively, and through holes 325 penetrating the frame body 321 to connect the upper patterns 322 and lower patterns 323.

[0081] The lower pattern 323 of the frame 320 is connected to the upper pad 312 of the packaging substrate 310 and can be electrically connected to the semiconductor chip 350 through the wiring circuit 315.

[0082] Furthermore, the upper pattern 322 of the frame 320 can be connected to the lower pattern 323 through the through hole 325, and can be electrically connected to the first lower pads 141a, 141b, 141c, 141d, and 141e and the second lower pad 142 of the wiring board 100A, respectively. The first lower pads 141a, 141b, 141c, 141d, and 141e and the second lower pad 142 of the wiring board 100A can be arranged on two edges at positions corresponding to the upper pattern 322 of the frame 320, such as... Figure 9B As shown.

[0083] In this way, the wiring board 100A can be electrically connected to the semiconductor chip 350 on the packaging substrate 310 through the vertical connecting conductors 322, 323 and 325 of the frame 320, and through this electrical connection path, the first electronic device to the third electronic device 250, 260 and 270 can send electrical signals to the semiconductor chip 350 and receive electrical signals from the semiconductor chip 350.

[0084] For example, when the first to third electronic devices 250, 260 and 270 are optical elements such as VCSEL chips or photodiode chips constituting a light source module, these optical elements are driven by semiconductor chip 350, which is a driver IC chip.

[0085] In this embodiment, the heat generated from the first electronic device 250, which is the main heat source (e.g., VCSEL), can be effectively dissipated by the metal plate 110 that directly contacts the second upper pad 132.

[0086] Reference Figure 11 The wiring board 100A has four side surfaces and can be constructed such that the four side surfaces 110S of the metal plate 110 are continuously exposed to the four side surfaces of the wiring board 100A. Therefore, the heat generated from the first electronic device 250 is transferred to the metal plate 110 through the second upper pad 132 and can be effectively discharged through the side surfaces 110S (see arrow "H").

[0087] On the other hand, in the PoP-type electronic device module 500, even when using the first electronic device 250, which is a high heat source, a separate heat sink can be omitted by employing the wiring board 100A. Furthermore, by using a vertical connection structure in which the upper and lower surfaces of the wiring board 100A are connected, a module with a PoP structure can be implemented together with a driver IC chip package (e.g., a lower package 300). As described above, the PoP-type electronic device module 500 improves heat dissipation performance and reduces product size.

[0088] A compact PoP structure can be achieved by making the upper package 400 and the lower package 300 have the same dimensions in the plan view. For example... Figure 10 and Figure 11 As shown, the side surfaces of the lower package 300 are substantially coplanar with the side surfaces of the upper package 400.

[0089] Furthermore, when using a high-power laser diode such as a VECSEL (e.g., the first electronic device 250), if the lens unit 450 is damaged, the human eye may be damaged by the high-power light. Therefore, a lens damage sensing electrode 415 connected to the lens unit 450 can be arranged in the lens housing 410. A transparent electrode line (not shown) pre-installed in the lens unit 450 is connected to the lens damage sensing electrode 415, which is electrically connected to at least one of a plurality of first upper pads 131d and 131e located below the lens housing 410, and is therefore connected to the semiconductor chip 350, which is a driver IC chip, via circuit connections of the wiring board 100A, frame 320, and package substrate 310. Therefore, when damage to the transparent electrode line is detected, information is transmitted to the semiconductor chip 350, and the driving of the high-power laser diode (e.g., the first electronic device 250) can be stopped.

[0090] In this embodiment, the upper surface of the semiconductor chip 350 can be a non-active surface. For example... Figure 12As shown, the thermal interface material layer 330 is disposed between the upper surface of the semiconductor chip 350 and the second lower pad 142, thereby effectively releasing the heat generated in the semiconductor chip 350 through the metal plate 110.

[0091] As described above, according to the example embodiment, a wiring board with enhanced heat dissipation is provided. The wiring board can be used as a wiring board for modules of high-heat-source electronic devices (such as high-power light sources, e.g., VCSELs). The wiring board can advantageously be used as the top wiring board for stacked-package (PoP) electronic modules that require high heat dissipation.

[0092] Although exemplary embodiments have been described and illustrated above, it will be apparent to those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.

Claims

1. A wiring board comprising: a metal plate having a first surface and a second surface opposite to each other, wherein each of the first surface and the second surface is divided into a second area and two first areas, the first areas have a lower level than the second area, and have two through holes passing through the two first areas of the first surface and the second surface, respectively; two conductive vias arranged in the two through holes and spaced apart from the metal plate, respectively; an insulation structure including a through insulation arranged between the two through holes and the two conductive vias, and a first insulation layer and a second insulation layer extending from the through insulation and arranged on the two first areas of the first surface and the second surface, respectively; two first upper pads arranged on the first insulation layer and electrically connected to the two conductive vias, respectively; two first lower pads arranged on the second insulation layer and electrically connected to the two conductive vias, respectively; a second upper pad arranged on the first surface of the metal plate; and a second lower pad arranged on the second surface of the metal plate and electrically connected to the second upper pad through the metal plate, wherein the first insulation layer on each of the two first areas has an entire upper surface coplanar with a surface of the first surface that does not form the second area of the insulation structure. 2.The wiring board of claim 1, further comprising a conductive bonding layer formed on the second upper pad to connect to a lower surface of an electronic device.

3. The wiring board of claim 1, wherein, All side surfaces of the wiring board are provided by side surfaces of the metal plate.

4. The wiring board of claim 1, wherein, The second insulation layer has an upper surface substantially coplanar with a surface of the second surface that does not form the second area of the insulation structure.

5. The wiring board of claim 1, wherein, A portion of the second upper pad is arranged on the first insulation layer.

6. The wiring board of claim 1, wherein, A portion of the second lower pad is arranged on the second insulation layer.

7. The wiring board of claim 1, wherein, The two first upper pads, the two first lower pads, the second upper pad, and the second lower pad each include a plating layer. 8.An electronic device module comprising: the wiring board of claim 1; and a first electronic device mounted on the second upper pad and electrically connected to at least one of the two first upper pads and the second upper pad, respectively. 9.The electronic device module of claim 8, further comprising a second electronic device arranged on at least one of the two first upper pads and electrically connected to the first electronic device. 10.An electronic device module comprising: a lower package having a semiconductor chip; and an upper package including a wiring board arranged on the lower package, and a first electronic device and a second electronic device arranged on the wiring board, wherein the lower package includes: a package substrate having a wiring circuit and arranged with the semiconductor chip mounted thereon to be connected to the wiring circuit; a frame having a receiving portion receiving the semiconductor chip; and a lower package cover covering the semiconductor chip and the wiring circuit. a plurality of vertical connection conductors which penetrate the upper and lower surfaces of the frame and are electrically connected to the wiring circuit, wherein the wiring board of the upper package includes: a metal plate having a first surface facing the upper surface of the frame and a second surface opposite to the first surface, wherein each of the first surface and the second surface is divided into a first area and a second area, the first area has a lower level than the second area, and has a plurality of through-holes penetrating the first surface and the first area of the second surface; a plurality of conductive through-penetrations respectively arranged in the plurality of through-holes and spaced apart from the metal plate; an insulating structure including a plurality of through-insulations respectively arranged between the plurality of through-holes and the plurality of conductive through-penetrations, and a first insulating layer and a second insulating layer respectively arranged on the first area of the first surface and the second surface and extending from the plurality of through-insulations; a plurality of first upper pads and a plurality of first lower pads respectively arranged on the first insulating layer and the second insulating layer and respectively electrically connected to the plurality of conductive through-penetrations; and a second upper pad and a second lower pad respectively arranged on the first surface and the second surface of the metal plate and electrically connected to each other through the metal plate, wherein the first electronic device and the second electronic device are respectively mounted on at least one of the plurality of first upper pads and the second upper pad and are respectively electrically connected to the at least one of the plurality of first upper pads and the second upper pad, and the plurality of first lower pads and the second lower pad are respectively electrically connected to the vertical connection conductors, and wherein the first insulating layer on the first area has an entire upper surface which is coplanar with a surface of the second area of the first surface which does not form the insulating structure.

11. The electronic device module of claim 10, wherein, the semiconductor chip includes a driving integrated circuit chip, and wherein the first electronic device includes a laser diode chip or a semiconductor light emitting diode chip, and the second electronic device includes a photodiode chip.

12. The electronic device module of claim 11, wherein, the driving integrated circuit chip is flip-chip bonded to the package substrate, and an upper surface of the driving integrated circuit chip is a non-active surface.

13. The electronic device module of claim 12, further comprising a layer of thermal interface material arranged between the upper surface of the driving integrated circuit chip and the second lower pad.

14. The electronic device module of claim 10, wherein, the upper package further includes a lens housing arranged on the wiring board and having a window with an upward opening, and a lens unit arranged in the window of the lens housing.

15. The electronic device module of claim 14, wherein, side surfaces of the lower package are substantially coplanar with side surfaces of the upper package, respectively.

16. A wiring board, comprising: A metal plate having a first surface and a second surface opposite to each other, each of the first surface and the second surface being divided into a first region and a second region, wherein the first region has a lower level than the second region, and the metal plate includes at least one through hole passing through the first region of the first surface and the second surface; An insulating structure including at least one through insulating portion disposed along a sidewall of the at least one through hole, a first insulating layer extending from the at least one through insulating portion and disposed on the first region of the first surface, and a second insulating layer extending from the at least one through insulating portion and disposed on the first region of the second surface; At least one conductive via passing through the insulating structure to be located in the at least one through hole, and electrically insulated from the metal plate by the at least one through insulating portion; At least one first upper pad and at least one first lower pad disposed on the first insulating layer and the second insulating layer, respectively, and electrically connected to each other by the at least one conductive via; and A second upper pad and a second lower pad disposed on the second region of the first surface and the second region of the second surface, respectively, and electrically connected to each other by the metal plate, wherein the first insulating layer on the first region has an entire upper surface coplanar with a surface of the second region of the first surface which does not form the insulating structure.

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