Method for preparing rewiring layer and its structure

Abstract

The present invention provides a method for preparing a redistribution layer and its structure. The method includes: forming a diffusion barrier layer and a metal seed layer on a support substrate; forming a photoresist layer having filling windows on the metal seed layer; forming a metal wire layer on the metal seed layer; forming at least two buffer layers on the metal wire layer, each buffer layer having pores on its surface, and the positions of the pores on the surfaces of adjacent buffer layers being different; removing the photoresist layer, the metal seed layer, and the diffusion barrier layer; and electrically leading out a protective layer. By forming at least two buffer layers through an electroplating process, the continuity of the stacked structure is effectively improved, and at the same time, the continuity of the protective layer is improved, ensuring the adhesion between the stacked structure and the protective layer, and improving the stability of the redistribution layer; in the subsequent wire bonding process, peeling is not likely to occur between the stacked structure and the protective layer, improving the product yield of the redistribution layer.

Description

Technical Field

[0001] The present invention relates to the technical field of wafer-level packaging in integrated circuits, and particularly to a method for preparing a redistribution layer and its structure. Background Art

[0002] With the increasing functionality, performance, and integration of integrated circuits, as well as the emergence of new integrated circuits, packaging technology plays an increasingly important role in integrated circuit products and accounts for an increasing proportion of the value of the entire electronic system. At the same time, as the feature size of integrated circuits reaches the nanometer level and transistors develop towards higher density and higher clock frequencies, packaging also develops towards higher density.

[0003] Wafer-level packaging (WLP) technology has become an important packaging method for high-demand electronic devices such as mobile / wireless networks due to its advantages of miniaturization, low cost, high integration, better performance, and higher energy efficiency. It is one of the most promising packaging technologies currently. The WLP technology takes the entire wafer as the object for packaging and testing, and then cuts it into individual finished chips. This packaging process is different from traditional chip packaging processes. The size of the packaged chips using WLP technology is approximately 20% smaller than that of the packaged chips using traditional packaging processes. Therefore, the volume of wafer-level packaged chips is almost the same as the size of bare chips, which can greatly reduce the size of the packaged chips.

[0004] In the existing WLP process, the manufacturing of the redistribution layer (RDL) is a relatively complex and expensive part of the entire WLP process. The RDL generally includes a dielectric layer and a metal layer, which can re-layout the bonding pad areas of the chip so that the new bonding areas meet the requirements for the minimum pitch of solder balls and are arranged in an array.

[0005] In the existing RDL process, a metal wire layer, a buffer layer, and a protective layer are sequentially formed as the metal layer in the RDL. After the metal layer is formed, pores extending into the buffer layer will be formed on the surface of the protective layer, resulting in the discontinuity of the protective layer structure. As shown in the SEM image, it appears as black spots and / or pits. These pores will reduce the adhesion between the buffer layer and the protective layer and the hardness of the protective layer, thereby increasing the risk of peeling of the protective layer during the subsequent wire bonding process and reducing the stability of the RDL. Figure 17 As shown in the SEM image, it appears as black spots and / or pits. These pores will reduce the adhesion between the buffer layer and the protective layer and the hardness of the protective layer, thereby increasing the risk of peeling of the protective layer during the subsequent wire bonding process and reducing the stability of the RDL. Summary of the Invention

[0006] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a method for preparing a redistribution layer and its structure, which is used to solve the problem that when preparing a metal layer of a redistribution layer composed of a metal wire layer, a buffer layer and a protective layer in the prior art, pores extending into the buffer layer will be formed on the surface of the protective layer, and these pores will reduce the adhesion between the buffer layer and the protective layer and the hardness of the protective layer, thereby increasing the risk of peeling of the protective layer during the subsequent wire bonding process and other problems.

[0007] To achieve the above object and other related objects, the present invention provides a method for preparing a redistribution layer, and the preparation method at least includes the following steps:

[0008] Provide a support substrate, and sequentially form a diffusion barrier layer and a metal seed layer on the support substrate;

[0009] Coat a photoresist layer on the metal seed layer, and form a filling window in the photoresist layer through exposure and development processes;

[0010] Use an electroplating process to form a metal wire layer on the metal seed layer in the filling window;

[0011] Use an electroplating process to sequentially form a stacked structure of at least two buffer layers on the metal wire layer. Each buffer layer has a plurality of pores extending into its interior, and the positions of the pores on the surfaces of adjacent buffer layers are different;

[0012] Use an electroplating process to form a protective layer on the stacked structure;

[0013] Remove the photoresist layer, and remove the metal seed layer and the diffusion barrier layer that are not covered by the metal wire layer;

[0014] Bond a bonding wire to the protective layer for electrical lead-out.

[0015] Optionally, when forming the stacked structure by an electroplating process, the electroplating parameters of the electroplating process used for adjacent buffer layers are different, so that the positions of the pores on the surfaces of adjacent buffer layers are different.

[0016] Optionally, the stacked structure includes two buffer layers. The current density used for electroplating the first buffer layer is between 2.8 ASD and 3.2 ASD, and the electroplating time is between 100 s and 300 s; the current density used for electroplating the second buffer layer is between 2.3 ASD and 3.2 ASD, and the electroplating time is between 20 s and 120 s.

[0017] Optionally, the stacked structure includes two layers of the buffer layer, the thickness of the first buffer layer is between 1 μm and 3 μm, and the thickness of the second buffer layer is between 0.2 μm and 1.0 μm.

[0018] Optionally, when forming the stacked structure by electroplating, a cleaning process is implemented between the formation of two adjacent buffer layers to make the positions of the pores on the surfaces of two adjacent buffer layers different.

[0019] Optionally, the cleaning liquid used in the cleaning process is deionized water (DIW).

[0020] Optionally, the material of the diffusion barrier layer includes one or more of Ti, TiN, Ta, TaN, TiW, and Cr, the material of the metal seed layer includes Cu, the material of the metal wire layer includes aluminum, aluminum alloy, copper, or copper alloy, the material of the buffer layer includes Ni, and the material of the protective layer includes Au.

[0021] The present invention also provides a redistribution layer, which at least includes:

[0022] A diffusion barrier layer having opposite first and second surfaces;

[0023] A metal seed layer located on the first surface of the diffusion barrier layer;

[0024] A metal wire layer located on the metal seed layer;

[0025] A stacked structure located on the metal wire layer, the stacked structure includes at least two buffer layers, each buffer layer surface has a plurality of pores extending into its interior, and the positions of the pores on the surfaces of two adjacent buffer layers are different;

[0026] A protective layer located on the stacked structure;

[0027] Bonding wires for electrically leading out the metal wire layer.

[0028] Optionally, the thickness of the stacked structure is between 1.2 μm and 4.0 μm.

[0029] Optionally, the stacked structure includes two layers of the buffer layer, the thickness of the first buffer layer is between 1 μm and 3 μm, and the thickness of the second buffer layer is between 0.2 μm and 1.0 μm.

[0030] Optionally, the material of the diffusion barrier layer includes one or more of Ti, TiN, Ta, TaN, TiW, and Cr, the material of the metal seed layer includes Cu, the material of the metal wire layer includes aluminum, aluminum alloy, copper, or copper alloy, the material of the buffer layer includes Ni, and the material of the protective layer includes Au.

[0031] Optionally, the rewiring layer further includes an insulating layer, and the insulating layer is located on the second surface of the diffusion barrier layer.

[0032] Optionally, the thickness of the metal wire layer is between 3 μm and 6 μm, and the thickness of the protective layer is between 0.1 μm and 1.0 μm.

[0033] As described above, in the preparation method and structure of the rewiring layer of the present invention, by setting a stacked structure of multiple buffer layers, when electroplating the latter buffer layer, compared with electroplating the previous buffer layer, the electroplating environment of the latter buffer layer changes (i.e., interrupting the electroplating environment of continuous electroplating), which can reduce or eliminate the formation of deeper pores at the same position during continuous electroplating. When electroplating the latter buffer layer, pores will be formed at positions different from the surface position of the previous buffer layer, effectively improving the continuity of the stacked structure (the pores on each buffer layer are not continuous, and the pores on each buffer layer become smaller and shallower), alleviating the influence of the surface pores of the stacked structure on the continuity of the subsequent protective layer, effectively improving the continuity and hardness of the protective layer, ensuring the adhesion between the stacked structure and the protective layer, improving the stability performance of the rewiring layer; in the subsequent wire bonding process, peeling is not likely to occur between the stacked structure and the protective layer, improving the product yield of the rewiring layer. Description of the Drawings

[0034] Figure 1 It shows a schematic flow chart of the preparation method of the rewiring layer of the present invention.

[0035] Figures 2 to 9 It shows a schematic structural diagram presented by each step of the preparation method of the rewiring layer in the prior art, where Figure 7 It shows Figure 6 a partial enlarged view of part A in Figure 9 It shows Figure 8 a partial enlarged view of part B in

[0036] Figures 10 to 16 It shows a schematic structural diagram presented by each step of the preparation method of the rewiring layer of the present invention, where Figure 11 It shows Figure 10 a partial enlarged view of part C in Figure 13 It shows Figure 12 a partial enlarged view of part D inFigure 16 It is also shown as a schematic structural diagram of the rewiring layer of the present invention.

[0037] Figure 17 It is shown as an SEM image of the rewiring layer in the prior art. The black dots of different sizes in the figure are the black spots and / or pits on the surface of the protective layer.

[0038] Description of component labels

[0039] 10 Support substrate

[0040] 100 Support layer

[0041] 101 Separation layer

[0042] 102 Insulating layer

[0043] 11 Diffusion barrier layer

[0044] 12 Metal seed layer

[0045] 13 Photoresist layer

[0046] 130 Filling window

[0047] 14 Metal wire layer

[0048] 15 Stacked structure

[0049] 150 Buffer layer

[0050] 151 Pore

[0051] 16 Protective layer

[0052] 160 Protective layer pore

[0053] 17 Bonding wire

[0054] Steps S1 to S7 Detailed implementation manners

[0055] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0056] Please refer to Figures 1 to 17It should be noted that the illustrations provided in this embodiment only schematically illustrate the basic concept of the present invention. Therefore, only the components related to the present invention are shown in the illustrations, rather than being drawn according to the number, shape, and size of the components in actual implementation. The types, quantities, and proportions of the components in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0057] Embodiment 1

[0058] As Figures 2 to 9 shown, it is a schematic flow diagram of each step of the existing RDL (Redistribution Layer) process, and its preparation process is as follows:

[0059] As Figure 2 shown, first, a support substrate 10 is provided;

[0060] As Figure 3 shown, then a diffusion barrier layer 11 and a metal seed layer 12 are sequentially formed on the support substrate 10;

[0061] As Figure 4 shown, then a photoresist layer 13 is coated on the metal seed layer 12, and a filling window 130 is formed in the photoresist layer 13 through exposure and development processes;

[0062] As Figure 5 shown, then a metal wire layer 14 is formed on the metal seed layer 12 in the filling window 130;

[0063] As Figure 6 shown, a buffer layer 150 is further formed on the metal wire layer 14 by electroplating. As Figure 7 shown, through analysis and research, the inventor found that pores 151 will be formed during the electroplating process of forming the buffer layer 150. The pores 151 may be formed in the buffer layer 150, or may be formed on the surface of the buffer layer 150 and extend inward from its surface. Among the pores 151 extending inward from its surface, some are shallower and smaller, and some are deeper and larger. The shallower and smaller voids are shown as black spots in the SEM image, and the deeper and larger voids are shown as pits.

[0064] As Figure 8 shown, a protective layer 16 is further formed on the buffer layer 150 by electroplating. As Figure 9As shown, the inventor found that based on the morphology of the buffer layer 150 having pores 151 extending from its surface into its interior, this morphology would be transmitted to the protective layer 16. During the electroplating process, on the surface of the protective layer above the shallower and smaller pores 151, shallower and smaller pores 160 of the protective layer would be formed. At this time, the protective layer 16 with these shallower and smaller pores 160 of the protective layer could cover the pores 151 on the buffer layer 150 below it. On the other hand, on the surface of the protective layer above the deeper and larger pores 151, deeper and larger pores 160 of the protective layer would be formed, and some even penetrated through the protective layer 16 and communicated with the pores 151. As a result, the surface continuity of the protective layer 16 was poor and the hardness of the protective layer was low, reducing the adhesion between the buffer layer 150 and the protective layer 16, seriously affecting the stability performance of the redistribution layer; in the subsequent wire bonding process, peeling was likely to occur between the buffer layer 150 and the protective layer 16, and the product yield of the redistribution layer was reduced.

[0065] Based on the above findings and through research and analysis, the inventor proposed a method for preparing a redistribution layer, as Figure 1 shown, to solve the problems that the surface discontinuity and low hardness of the above-mentioned protective layer affect the stability of the redistribution layer and reduce the product yield of the redistribution layer. The method for preparing the redistribution layer of this embodiment will be described in detail below with reference to the accompanying drawings.

[0066] As Figure 1 and Figures 2 to 3 shown, first, step S1 is carried out, providing a support substrate 10, and sequentially forming a diffusion barrier layer 11 and a metal seed layer 12 on the support substrate 10.

[0067] As Figure 2 shown, as an example, the support substrate 10 includes a support layer 100, a separation layer 101, and an insulating layer 102 in sequence from bottom to top.

[0068] The support layer 100 includes one of a glass layer, a metal layer, a semiconductor layer, a polymer layer, and a ceramic layer. In this embodiment, the support layer 100 is selected as a glass layer. The glass layer has a low cost, it is easy to form the separation layer 101 on its surface, and it can reduce the difficulty of the subsequent peeling process.

[0069] The separation layer 101 includes a polymer layer or an adhesive layer. The polymer layer or the adhesive layer is first coated on the surface of the support layer 100 by a spin coating process, and then cured and formed by an ultraviolet curing or thermal curing process.

[0070] In this embodiment, the polymer layer includes an LTHC photothermal conversion layer. Subsequently, when peeling the support layer 100, the LTHC photothermal conversion layer can be heated based on a laser so that the rewiring layer and the support layer 1000 are separated from each other at the LTHC photothermal conversion layer.

[0071] After the insulating layer 102 is separated from the support layer 100, it is used to form an isolation layer for the bumps connected to the chip.

[0072] As Figure 3 shown, the diffusion barrier layer 11 can be prepared by existing known methods. For example, it can be physical or chemical methods such as sputtering, electroless plating, physical vapor deposition, chemical vapor deposition, etc. The material of the diffusion barrier layer 11 can be one or more of Ti, TiN, Ta, TaN, TiW, and Cr. Since the metal wire layer in the general rewiring layer has a high diffusion coefficient, when the rewiring layer is bonded to the wafer, due to the high diffusion coefficient of the metal wire layer, metal ions will diffuse into the device structure of the wafer, affecting the performance of the wafer. Therefore, in order to avoid the ion diffusion of the metal wire layer, when preparing the rewiring layer, a layer of the diffusion barrier layer 11 needs to be prepared on the support substrate first to prevent metal ions from diffusing into the wafer; in addition, it is also to improve the adhesion between the metal wire layer and the support substrate 10 during the subsequent preparation of the rewiring layer. In this embodiment, Ti is selected as the diffusion barrier layer 11, and the conventional sputtering method is used to deposit the diffusion barrier layer 11. The Ti layer is deposited by the sputtering method, and the process is easy to implement and the adhesion between the Ti layer and the support substrate 10 is strong.

[0073] As an example, the metal wire layer is generally formed by electroplating. The key to electroplating is to generate current through the metal layer on the surface to deposit metal. For the diffusion barrier layer 11, it needs to achieve the functions of blocking diffusion and improving adhesion. The selected material has a small conductivity, so a metal layer with a large conductivity needs to be formed as the metal seed layer 12 for electroplating the metal wire layer. As Figure 3 shown, the metal seed layer 12 is formed on the diffusion barrier layer 11. The material of the metal seed layer 12 can be selected as Cu, and the metal seed layer 12 can be formed by sputtering.

[0074] As Figure 1 and Figure 4 shown, then step S2 is carried out. A photoresist layer 13 is coated on the metal seed layer 12, and a filling window 130 is formed in the photoresist layer 13 through exposure and development processes.

[0075] As an example, the method for forming the patterned photoresist layer 13 is as follows: The photoresist is uniformly coated on the surface of the metal seed layer 12. Then, the support substrate 10 covered with the photoresist is transferred from the coater to an oven for post-application baking to evaporate the moisture in the photoresist and fix the photoresist. Ultraviolet light is transmitted through the pattern on the photomask and irradiated onto the surface of the support substrate coated with the photoresist. After being irradiated by the ultraviolet light, the photoresist deforms, and the photoresist is etched by the developer. After cleaning, a pattern consistent with or complementary to the pattern on the photomask is left, thereby forming the patterned photoresist layer 13.

[0076] As Figure 1 and Figure 5 shown, then step S3 is carried out, and a metal wire layer 14 is formed on the metal seed layer 12 in the filling window 130 by means of an electroplating process.

[0077] As an example, the material of the metal wire layer 14 includes aluminum, aluminum alloy, copper or copper alloy. In this embodiment, the material of the metal wire layer 14 is selected as copper. The thickness of the metal wire layer 14 is between 3 μm and 6 μm.

[0078] As Figure 1 , Figure 10 and Figure 11 shown, then step S4 is carried out, and a stacked structure 15 of at least two buffer layers 150 is sequentially formed on the metal wire layer 14 by means of an electroplating process. Each buffer layer 150 has a plurality of pores 151 extending into its interior on the surface, and the positions of the pores 151 on the surfaces of adjacent buffer layers 150 are different.

[0079] Since electrical lead-out (referred to as the WB process) of the metal wire layer 14 is required in the subsequent bonding wire lead-out process, in order to alleviate the influence of the high heat and high pressure in the WB process on the metal wire layer 14, generally a buffer layer 150 with a relatively soft hardness is provided on the metal wire layer 14. For example, in this embodiment, the material of the buffer layer 150 is selected to include Ni. Since the buffer layer 150 is generally relatively soft and has a relatively fast deposition rate, it is easy to form various sizes of the pores 151 inside or on its surface (as Figure 7 shown). When the pores 151 are relatively deep and large, when forming a protective layer thereon, a protective layer pore 160 penetrating through the protective layer may be formed along the relatively deep and large pores 151 (as Figure 9As shown, it results in poor surface continuity of the protective layer 16 and a relatively low hardness of the protective layer. In this embodiment, by providing a laminated structure 15 of multiple buffer layers 150, when electroplating the subsequent buffer layer 150, compared with electroplating the previous buffer layer 150, the electroplating environment of the subsequent buffer layer 150 changes (i.e., interrupting the electroplating environment of continuous electroplating), which can reduce or eliminate the formation of deeper pores at the same position during continuous electroplating. When electroplating the subsequent buffer layer 150, pores 151 will be formed at positions different from the surface positions of the previous buffer layer 150, such as Figure 11 In Figure 11 , a laminated structure 15 of two buffer layers 150 is shown. The positions of the pores 151 on the surfaces of the two buffer layers 150 are different, effectively improving the continuity of the laminated structure 15 (the pores 151 on each buffer layer 150 are discontinuous, and the pores 151 on each buffer layer 150 become smaller and shallower), alleviating the influence of the pores 151 on the surface of the laminated structure 15 on the continuity of the subsequent protective layer, effectively improving the continuity and hardness of the protective layer, ensuring the adhesion between the laminated structure 15 and the protective layer, and improving the stability performance of the rewiring layer; during the subsequent wire bonding process, it is not easy to have a peeling phenomenon between the laminated structure 15 and the protective layer, improving the product yield of the rewiring layer.

[0080] As an example, when forming the laminated structure 15 by an electroplating process, the electroplating parameters of the electroplating process used for adjacent two buffer layers 150 are different, so that the positions of the pores 151 on the surfaces of the adjacent two buffer layers 150 are different. By changing the electroplating parameters between adjacent two buffer layers 150, the electroplating environment of continuous electroplating is interrupted, so that the positions of the pores 151 on the surfaces of the adjacent two buffer layers 150 are different. Such as Figure 10 As shown, preferably, the laminated structure 15 includes two buffer layers 150. The current density used for electroplating the first buffer layer 150 is between 2.8 ASD and 3.2 ASD, and the electroplating time is between 100 s and 300 s; the current density used for electroplating the second buffer layer 150 is between 2.3 ASD and 3.2 ASD, and the electroplating time is between 20 s and 120 s.

[0081] Such as Figure 10 As shown, as an example, the laminated structure 15 includes two buffer layers 150. The thickness of the first buffer layer 150 is between 1 μm and 3 μm, and the thickness of the second buffer layer 150 is between 0.2 μm and 1.0 μm. The thickness of the second buffer layer 150 is relatively thin, and the pores 151 on it are also smaller and shallower, which can make the continuity of the laminated structure 15 better as a whole.

[0082] As an example, when forming the stacked structure 15 by an electroplating process, a cleaning process is implemented between the formation of two adjacent buffer layers 150 so that the positions of the pores 151 on the surfaces of the two adjacent buffer layers 150 are different. By implementing the cleaning process, the electroplating environment between the two buffer layers can be interrupted, preventing the pores 151 on the surface of the latter buffer layer 150 from continuously forming larger and deeper pores 151 on the surface of the former buffer layer 150, thereby making the positions of the pores 151 on the surfaces of the two adjacent buffer layers 150 different.

[0083] It should be noted here that the above shows two implementation manners for interrupting the electroplating environment of continuous electroplating. The first is to change the electroplating parameters for electroplating each buffer layer, and the second is to implement a cleaning process between the formation of two adjacent buffer layers. When forming the stacked structure, these two implementation manners can be used alone or in combination, and there is no limitation here as long as the electroplating environment of continuous electroplating can be interrupted. In addition, the implementation manners for interrupting the electroplating environment of continuous electroplating are not limited to the two manners listed in this embodiment, and any interruption manners well-known to those skilled in the art are acceptable, and there is no limitation here.

[0084] As an example, when implementing the cleaning process between the formation of two adjacent buffer layers 150, the cleaning solution used is deionized water (DIW).

[0085] As Figure 1 , Figure 12 and Figure 13 shown, then step S5 is performed to form a protective layer 16 on the stacked structure 15 by an electroplating process.

[0086] As Figure 13 shown, since the continuity of the surface of the stacked structure 15 is improved, the surface continuity of the formed protective layer 16 is also significantly improved. The surface pores of the protective layer 16 are small and shallow and can completely cover the stacked structure.

[0087] The protective layer 16 is generally hard and is used to protect the stacked structure 15 (protect the stacked structure 15 from oxidation) and the metal wire layer 14, and the protective layer is easy to be subsequently bonded with a bonding wire to improve the bonding firmness and reliability. Generally, the material of the protective layer 16 includes Au. The thickness of the protective layer 16 is between 0.1 μm and 1.0 μm.

[0088] As Figure 1 , Figure 14 and Figure 15 shown, then step S6 is performed to remove the photoresist layer 13 and remove the metal seed layer 12 and the diffusion barrier layer 11 that are not covered by the metal wire layer 14.

[0089] As shown Figure 14 For example, in actual production, a process temperature higher than 200 °C is generally adopted, and ashing treatment is carried out with an oxygen and fluorine mixed process gas to remove the patterned photoresist layer 13.

[0090] As shown Figure 15 For example, a wet etching process is used to remove the metal seed layer 12 and the diffusion barrier layer 11 that are not covered by the metal wire layer 14. Wet etching has become a commonly used etching method due to its fast etching rate and low cost. Since the materials used for the metal seed layer 12 and the diffusion barrier layer 11 are different, that is, the etching ratios are different, different etching solutions need to be selected. Those skilled in the art can carry out according to actual needs. Of course, in other embodiments, other processes can also be used to remove the metal seed layer 12 and the diffusion barrier layer 11, which is not limited herein.

[0091] As shown Figure 1 and Figure 16 shown, finally, step S7 is performed to bond the bonding wire 17 to the protective layer 16 for electrical lead-out.

[0092] For example, the bonding method is any one of ultrasonic bonding, thermocompression bonding, and thermosonic bonding. In this embodiment, the thermocompression method is selected for bonding.

[0093] For example, after forming the above structure, it may further include forming a dielectric layer covering the bonding wire 17, the protective layer 16, the stacked structure 15, the metal wire layer 14, the metal seed layer 12, and the diffusion barrier layer 11, and then separating the rewiring layer from the support layer 100 through the separation layer 101.

[0094] Embodiment 2

[0095] This embodiment provides a rewiring layer. The structure of this rewiring layer can be obtained by using the preparation method of Embodiment 1 above, but it can also be obtained by using other methods, which is not limited herein. The beneficial effects brought by the rewiring layer of this embodiment can be referred to those described in Embodiment 1 and will not be elaborated herein.

[0096] As shown Figure 16 shown, the rewiring layer at least includes:

[0097] A diffusion barrier layer 11 having opposite first and second surfaces;

[0098] A metal seed layer 12 located on the first surface of the diffusion barrier layer 11;

[0099] A metal wire layer 14 located on the metal seed layer 12;

[0100] A stacked structure 15 located on the metal wire layer 14, the stacked structure 15 including at least two buffer layers 150, each buffer layer 150 having a plurality of pores 151 extending into its interior on its surface, and the positions of the pores 151 on the surfaces of adjacent buffer layers 150 being different;

[0101] A protective layer 16 located on the stacked structure 15;

[0102] Bonding wires 17 for electrically leading out the metal wire layer.

[0103] As an example, the thickness of the stacked structure 15 is between 1.2 μm and 4.0 μm. Preferably, the stacked structure 15 includes two buffer layers 150, the thickness of the first buffer layer 150 being between 1 μm and 3 μm, and the thickness of the second buffer layer 150 being between 0.2 μm and 1.0 μm.

[0104] As an example, the material of the diffusion barrier layer 11 includes one or more of Ti, TiN, Ta, TaN, TiW, Cr, the material of the metal seed layer 12 includes Cu, the material of the metal wire layer 14 includes aluminum, aluminum alloy, copper or copper alloy, the material of the buffer layer 150 includes Ni, and the material of the protective layer 16 includes Au.

[0105] As an example, the rewiring layer further includes an insulating layer 102, the insulating layer 102 being located on the second surface of the diffusion barrier layer 11.

[0106] As an example, the thickness of the metal wire layer 14 is between 3 μm and 6 μm, and the thickness of the protective layer 16 is between 0.1 μm and 1.0 μm.

[0107] In summary, the present invention provides a method for preparing a redistribution layer and its structure. By setting a stacked structure of multiple buffer layers, when electroplating the subsequent buffer layer, the electroplating environment of the subsequent buffer layer changes compared to the previous buffer layer (i.e., interrupting the electroplating environment of continuous electroplating), which can reduce or eliminate the formation of deeper pores at the same position during continuous electroplating. When electroplating the subsequent buffer layer, pores are formed at positions different from the surface position of the previous buffer layer, effectively improving the continuity of the stacked structure (the pores on each buffer layer are discontinuous, and the pores on each buffer layer become smaller and shallower), alleviating the influence of the surface pores of the stacked structure on the continuity of the subsequent protective layer, effectively improving the continuity and hardness of the protective layer, ensuring the adhesion between the stacked structure and the protective layer, and improving the stability performance of the redistribution layer; in the subsequent wire bonding process, peeling is not likely to occur between the stacked structure and the protective layer, improving the product yield of the redistribution layer. Therefore, the present invention effectively overcomes various disadvantages in the prior art and has high industrial utilization value.

[0108] The above embodiments are only illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. A method for preparing a rewiring layer, characterized in that, The preparation method at least includes the following steps: Provide a support substrate, and sequentially form a diffusion barrier layer and a metal seed layer on the support substrate; Coat a photoresist layer on the metal seed layer, and form a filling window in the photoresist layer through exposure and development processes; Form a metal wire layer on the metal seed layer in the filling window by electroplating; Form a stacked structure of at least two buffer layers on the metal wire layer by electroplating. Each buffer layer has a plurality of pores extending into its interior on its surface, and the positions of the pores on the surfaces of adjacent buffer layers are different; wherein, the electroplating parameters of the electroplating processes for adjacent buffer layers are different, so that the positions of the pores on the surfaces of adjacent buffer layers are different; Form a protective layer on the stacked structure by electroplating; Remove the photoresist layer, and remove the metal seed layer and the diffusion barrier layer not covered by the metal wire layer; Bond a bonding wire to the protective layer for electrical lead-out.

2. The method for preparing a rewiring layer according to claim 1, wherein: The stacked structure includes two buffer layers. The current density used for electroplating the first buffer layer is between 2.8 ASD and 3.2 ASD, and the electroplating time is between 100 s and 300 s; the current density used for electroplating the second buffer layer is between 2.3 ASD and 3.2 ASD, and the electroplating time is between 20 s and 120 s.

3. The method for preparing a rewiring layer according to claim 1, wherein: The stacked structure includes two buffer layers. The thickness of the first buffer layer is between 1 μm and 3 μm, and the thickness of the second buffer layer is between 0.2 μm and 1.0 μm.

4. The method for preparing a rewiring layer according to any one of claims 1 to 3, characterized in that: When forming the stacked structure by electroplating, a cleaning process is implemented between forming adjacent buffer layers, so that the positions of the pores on the surfaces of adjacent buffer layers are different.

5. The method for preparing a rewiring layer according to claim 4, characterized in that: The cleaning solution used in the cleaning process is deionized water (DIW).

6. The method for preparing a rewiring layer according to claim 1, wherein: The material of the diffusion barrier layer includes one or more of Ti, TiN, Ta, TaN, TiW, Cr. The material of the metal seed layer includes Cu. The material of the metal wire layer includes aluminum, aluminum alloy, copper or copper alloy. The material of the buffer layer includes Ni. The material of the protective layer includes Au.

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