Method for forming a through hole in a polymer layer

Abstract

A method of processing a substrate, comprising: depositing a layer of uncured polymer material atop the substrate to cover an exposed conductive layer on the substrate; exposing at least one area of the layer using a photolithographic process; developing the layer in the photolithographic process to remove a first portion of the uncured polymer material from the at least one area; etching the layer by a dry etching process to remove a second portion of the uncured polymer material from the at least one area to expose a top surface of the conductive layer and form a through-hole in the layer; and curing the layer to form a cured polymer material.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to semiconductor processing. Specifically, embodiments of the present disclosure relate to forming vias in a polymer layer disposed on a substrate for semiconductor packaging. Background Art

[0002] In the manufacture of electronic devices, the ever-increasing device density places high demands on the packaging or interconnection technology required for such highly dense devices. The manufacture of such electronic devices typically involves some form of substrate-level packaging. Substrate-level packaging can include forming vias and similar structures to provide internal and external device connections, such as input / output (I / O) connectivity. The formation of vias can involve the use of polymer materials with dielectric properties and stress buffering capabilities. However, the inventors have observed that as the via size decreases, polymer via openings cannot be reliably formed in polymer materials.

[0003] Therefore, the inventors have developed improved techniques for forming through-holes in polymer materials. Summary of the Invention

[0004] Methods and apparatus for forming polymer through-hole vias on wafer-level packages are provided herein.

[0005] In some embodiments, a method for forming a through-hole in a substrate includes: depositing a layer of uncured polymer material on top of the substrate to cover a conductive layer exposed on the substrate; exposing at least one area of the layer of uncured polymer material using a photolithography process; developing the layer of uncured polymer material in the photolithography process to remove a first portion of the uncured polymer material from at least one area; etching the layer of uncured polymer material by a dry etching process to remove a second portion of the uncured polymer material from at least one area to expose the top surface of the conductive layer and form a through-hole in the layer of uncured polymer material; and curing the layer of uncured polymer material to form a cured polymer material layer.

[0006] In some embodiments, the method may further include: etching the layer of uncured polymer material using a plasma-based dry etching process; etching the layer of uncured polymer material using an oxygen-based gas; etching the layer of uncured polymer material using a carbon tetrafluoride-based gas; adjusting the bias power to enhance the vertical etching aspect of the plasma-based dry etching process relative to the top surface of the substrate; adjusting the gas flow to enhance the vertical etching aspect of the plasma-based dry etching process relative to the top surface of the substrate; blanket etching the substrate using the plasma-based dry etching process such that a second portion of the uncured polymer material is etched at a higher etch rate than the upper surface of the substrate; forming a through-hole having a dimension less than about 10 microns in the layer of uncured polymer material; forming a through-hole having a dimension less than about 5 microns in the layer of uncured polymer material; in a photolithography process, using an optical mask to expose at least one area of the layer of uncured polymer material on the substrate; forming a through-hole having a sidewall profile angle of about 80 degrees to about 90 degrees; and / or wherein the conductive layer is a copper-based material, an aluminum-based material, a gold-based material, or a silver-based material.

[0007] In some embodiments, a method for forming a through-hole in a substrate comprises: spin-coating a layer of uncured polymer material on top of the substrate to cover at least one conductive layer exposed on the substrate; exposing at least one area of the layer of uncured polymer material above the at least one conductive layer with ultraviolet light; removing a first portion of the uncured polymer material from the at least one area exposed by the ultraviolet light by washing with a solvent; etching the layer of uncured polymer material with an anisotropic dry etching process to remove a second portion of the uncured polymer material from at least one area to expose the top surface of the conductive layer and form a through-hole less than or equal to approximately 10 microns in the layer of uncured polymer material; and curing the layer of uncured polymer material to form a cured polymer material layer.

[0008] In some embodiments, the method may further include: etching the layer of uncured polymer material using a plasma-based dry etching process; etching the layer of uncured polymer material using an oxygen-based gas or a carbon tetrafluoride-based gas; adjusting the bias power to enhance the vertical etching aspect of the plasma-based dry etching process relative to the top surface of the substrate; adjusting the gas flow to enhance the vertical etching aspect of the plasma-based dry etching process relative to the top surface of the substrate; and / or curing the layer of uncured polymer material at a temperature of approximately 180°C to approximately 350°C to form a cured polymer material layer.

[0009] In some embodiments, a non-transitory computer-readable medium having instructions stored thereon, when the instructions are executed, causes execution of a method for operating a wafer-level processing system, the method comprising: spin-coating a layer of uncured polymer material on top of a substrate to cover at least one conductive layer exposed on the substrate; exposing at least one area of the layer of uncured polymer material above the at least one conductive layer with ultraviolet light; removing a first portion of the uncured polymer material from the at least one area exposed by the ultraviolet light with a solvent wash; etching the layer of uncured polymer material with an anisotropic dry etching process to remove a second portion of the uncured polymer material from at least one area to expose the top surface of the conductive layer and form a through-hole less than or equal to approximately 10 microns in the layer of uncured polymer material; and curing the layer of uncured polymer material to form a cured polymer material layer.

[0010] In some embodiments, the non-transitory computer readable medium further comprises the method, wherein the through-hole has a width or diameter less than or equal to approximately five microns.

[0011] In some embodiments, a substrate for packaging applications includes: an uncured polymer layer disposed on top of the substrate; a conductive layer disposed in the substrate adjacent to and below the uncured polymer layer; and an opening formed through the uncured polymer layer to expose a portion of the conductive layer, wherein the opening has a width or diameter less than or equal to approximately 10 microns.

[0012] In some embodiments, the substrate may further include wherein the opening has a width or diameter less than or equal to approximately five microns.

[0013] Other and further embodiments are disclosed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Embodiments of the present principles, briefly summarized above and discussed in greater detail below, may be understood by reference to the illustrative embodiments of the principles depicted in the accompanying drawings. However, the accompanying drawings illustrate only typical embodiments of the principles and are therefore not to be considered limiting of scope, as the principles may admit to other equally effective embodiments.

[0015] Figure 1 A method of forming a through-hole in a polymer layer on a substrate according to some embodiments of the present principles.

[0016] Figures 2A-2E Depicted are sequential side views of stages in forming a via in a polymer layer, according to some embodiments of the present principles.

[0017] Figure 3 Depicted is a side view of sidewall angles in polymer vias formed according to some embodiments of the present principles.

[0018] To facilitate understanding, identical reference numerals have been used, where possible, to denote identical components common to the figures. The figures are not drawn to scale and may be simplified for clarity. Components and features of one embodiment may be beneficially incorporated into other embodiments without further description. DETAILED DESCRIPTION

[0019] The described method allows for the formation of through-holes in a polymer material on a substrate before the polymer is cured. The method advantageously provides for the formation of through-holes having a width of approximately 10 microns or less with substantially vertical sidewalls. In some embodiments, the through-holes may have a width of approximately five microns or less. The through-holes advantageously allow for direct through-hole stacking designs on through-holes, which further improves the allowable I / O density. The method may advantageously be used in advanced substrate-level packaging and fan-out substrate-level packaging for through-hole critical dimension (CD) scaling. The method is compatible with current wafer-level packaging processes and, therefore, provides an economical solution for increasing packaging density in OSAT (outsourced semiconductor assembly and test) facilities. Additionally, the method allows for the formation of through-holes with higher aspect ratios (which may utilize thicker polymer coatings).

[0020] Figure 1 A method 100 of forming a through hole in a layer of uncured polymer material is depicted. Figures 2A-2E The method 100 is described with reference to the stages of substrate packaging depicted in FIG. Figures 2A-2E Each of the diagrams includes a side view of a particular stage for via formation. Method 100 can be performed in any suitable process chamber configured for the processes described below. Exemplary process chambers and systems that can be used to perform the inventive methods disclosed herein include, but are not limited to, various process systems commercially available from Applied Materials, Inc. of Santa Clara, California. Other process chambers, including those available from other manufacturers, can also be used as appropriate in conjunction with the teachings provided herein.

[0021] The method 100 is performed on a substrate such as Figure 2A Depicted substrate 202. In some embodiments, substrate 202 is composed of materials used in semiconductor manufacturing processes. For example, substrate 202 may include one or more of silicon (Si), germanium, silicon germanium, doped or undoped polysilicon, doped or undoped silicon, and patterned or unpatterned silicon-on-insulator (SOI), among others. Substrate 202 may have various sizes, such as 150 mm, 200 mm, 300 mm, or 450 mm in diameter, or other sizes. In addition, substrate 202 may include additional layers of material, or may have one or more completed or partially completed structures or devices formed in or on substrate 202.

[0022] For example, substrate 202 may include multiple metallization levels (redistribution layers "RDL") having one or more conductive layers (such as metal traces, etc.). One of these conductive layers 204 is shown in FIG. Figures 2A-2E In. Figure 2A As depicted, conductive layer 204 in substrate 202 is partially exposed through a dielectric top portion of substrate 202. Conductive layer 204 may include any suitable conductive material, such as copper (Cu), aluminum (Al), gold (Au), silver (Ag), or alloys thereof.

[0023] For example, the conductive layer 204 can be part of a dielectric layer deposited atop the substrate 202. In some embodiments, the dielectric layer can be a low-k dielectric material (e.g., a material having a dielectric constant less than that of silicon oxide, or less than about 3.9). Examples of suitable dielectric materials include silicon dioxide (SiO2), fluorine-doped silicon dioxide, carbon-doped silicon dioxide, porous silicon dioxide, porous carbon-doped silicon dioxide, spin-on organic polymer dielectrics, or spin-on silicon-based polymer dielectrics. When present, the dielectric can be deposited using any suitable deposition method used for such materials in semiconductor manufacturing processes. The dielectric layer can be deposited to a thickness of, for example, about 100 to about 2,000 angstroms. The thickness of the first dielectric layer varies depending on factors such as the technology node, architectural design, process flow scheme, and the like.

[0024] The method generally begins at block 102 by depositing a layer 206 of uncured polymer material directly on top of substrate 202 and on top of exposed portions of conductive layer 204, and as Figure 2A 200A. Layer 206 is photopatternable (e.g., using photolithography, etc.). For example, in some embodiments, such as for negative tone applications, layer 206 comprises one or more polyimide (PI) compounds. In some embodiments, such as for positive tone applications, layer 206 comprises polybenzoxazole (PBO). In some embodiments, layer 206 may include benzocyclobutene, epoxy resin, etc. In some embodiments, phenol-based polymers, such as the photosensitive dielectric materials sold by JSR Corporation of Tokyo, Japan under the trade names WPR-5100 and WPR-5200, are used.

[0025] In substrate packaging applications consistent with embodiments of the present principles, layer 206 is provided to act as a dielectric with stress buffering properties. Thus, layer 206 has a combination of mechanical properties configured to ensure robust chip packaging reliability (e.g., thermal cycling, drop testing, etc.).

[0026] In some embodiments, layer 206 is blanket deposited (i.e., deposited atop the entire exposed surface of conductive layer 204) to advantageously reduce or eliminate roughness at the interface of substrate 202 and conductive layer 204. Layer 206 can be deposited to a thickness of, for example, about 5 microns to about 20 microns (after curing, the thickness can be about 3 microns to about 10 microns). The thickness of layer 206 can vary depending on factors such as technology node, architectural design, process flow scheme, etc. Layer 206 can be deposited using any suitable deposition method commonly used in substrate packaging processing, such as spin coating, etc.

[0027] Typically, the resolution limit for forming through-holes in uncured polymer materials is 20 microns or greater. The resolution of uncured polymers is limited by the amorphous nature of the uncured polymer. Attempts to increase the resolution below 20 microns will result in incomplete through-holes after development in typical photolithography processes. In addition, the inventors have observed that through-hole openings in uncured polymers often exhibit abnormal shapes and have sidewall profiles that are less than vertical. The inventors have also observed that forming through-holes with smaller sizes is advantageous in applications such as wafer-level and / or fan-out wafer-level packaging. In addition, the inventors believe that the reduced polymer through-hole size is beneficial in reducing the effective area required for through-hole formation, thereby allowing more connectivity. The inventors believe that the reduced effective area required for through-hole formation will be particularly valuable for very high I / O connectivity applications.

[0028] In block 104, a photolithography process is performed to expose layer 206. In some embodiments, the photolithography process uses a photomask, which in some embodiments may include an optical shield (projection mask) rather than a physical mask on layer 206. The use of an optical mask simplifies the photolithography process because the optical mask eliminates the need to form a physical resist mask on the surface of layer 206 and eliminates the need to subsequently remove the physical resist mask after exposure. In some embodiments, substrate 202 is exposed to ultraviolet (UV) light to induce a transformation in the polymer. The light induces bond breakage so that the exposed areas can be easily washed away with a solvent during the development stage of the photolithography process. In some embodiments, the photolithography process may use a mask (such as an optical mask) to control which areas of layer 206 are exposed. As Figure 2B As shown in FIG, view 200B shows that the exposure is limited to the exposed portion 208 of the layer 206 residing above the conductive layer 204. The inventors have discovered that by exposing the layer 206 during the photolithography process, one or more of the material properties of the uncured polymer material in the exposed portion 208 are changed. The changed properties of the uncured polymer material will be discussed in further detail below with respect to the etching process.

[0029] In block 106, the photolithography process continues by developing the exposed portion 208 of the layer 206. In some embodiments, the developing process may use a solvent to rinse away portions of the polymer material on the substrate 202. During the developing process, a first portion 210 of the exposed portion 208 is removed to a depth 212, such as Figure 2C This is shown in the depicted view 200C. After development, a second portion 214 of the exposed portion 208 remains. The inventors believe that the inadequate results after development are caused by the amorphous nature of the uncured polymer material.

[0030] In block 108, as Figure 2D As shown in view 200D of FIG, layer 206 is etched using a dry etching process. An opening 216 is formed by etching a second portion 214 of the exposed portion 208 of layer 206 to the top surface of conductive layer 204. The etching process can be any etching process suitable for etching the material of layer 206. In some embodiments, the etching process can use a primarily anisotropic etching process. In some embodiments, the etching process can be a plasma-based dry etching process. For example, layer 206 can be exposed to the etching plasma over the entire substrate surface (blanket etching) or limited to specific areas of the substrate. The etching plasma can be formed from any suitable gas for etching polymers, such as an oxygen-containing gas, for example, an oxygen (O2)-based gas or a carbon tetrafluoride (CF4)-based gas. The plasma conditions and etching rate are selected based on the thickness of layer 206 and the desired etching characteristics. The etching is used to remove the second portion 214, exposing the conductive layer 204 and making the sidewalls of opening 216 vertical (improving reliability). The plasma dry etching process produces a substantially anisotropic etch that helps form vertical sidewalls. The bias power applied to the substrate can also be used and adjusted to enhance the anisotropic nature of the plasma dry etching process. The gas flow used in the dry etching process can also be adjusted to be more directional with the etching to facilitate control of the vertical sidewall etching aspect for the vias. The use of plasma dry etching also improves critical dimension (CD) control when compared to photolithography processes.

[0031] The etching can remove a portion of the top surface 218 of the layer 206 and the second portion 214 of the exposed portion 208 to form the opening 216. The inventors have discovered that the etch rate of the exposed uncured polymer material is greater than the etch rate of the unexposed uncured polymer material. The etch rate of the exposed uncured polymer material can be about 30% or more higher than the etch rate of the unexposed uncured polymer material. As described above, the faster etch rate for the exposed uncured polymer material can be attributed to the change in the properties of the polymer material caused by exposure during the photolithographic process. The difference in etch rate advantageously allows for blanket etching of the substrate, wherein the removal of the second portion 214 of the exposed portion 208 is much faster than the removal on the top surface 218 of the layer 206.

[0032] Next, in block 110, as Figure 2E As depicted in view 200E of FIG1 , layer 206 is cured to form through-holes 222. Layer 206 is cured at a temperature that hardens and improves the physical and chemical properties of layer 206. In some embodiments, the curing temperature of layer 206 can be significantly higher than the temperatures used in performing other processing steps of method 100. In some embodiments, for example, where layer 206 comprises PI or PBO, layer 206 can be cured at a temperature from about 180° C. to about 350° C. In some embodiments, convection heating is used to cure layer 206. In some embodiments, microwave energy, such as variable frequency microwave (VFM) energy, can be used to cure layer 206.

[0033] The resulting via 222 is formed through layer 206 and includes one or more sidewalls defined by portions of layer 206 and a bottom defined by an exposed top portion of conductive layer 204. Although only one via 222 is shown, layer 206 may include multiple openings corresponding to multiple vias to be formed in layer 206. Each via 222 has dimensions selected to facilitate the creation of a small via (e.g., an opening having a dimension less than or equal to about 10 microns, such as a square area having an area of approximately ≤10 x 10 microns, or a circular area having a diameter of approximately ≤10 microns).

[0034] exist Figure 3 , view 300 shows the profile of a through-hole 222 formed by the method of the present principles. The sidewalls of the through-hole 222 are vertical or substantially vertical. For example, in some embodiments, the sidewalls of the opening may have a profile with a vertical angle 320 of about 80 degrees to about 90 degrees, which advantageously increases the reliability and density of the through-hole.

[0035] The vias formed using the method of the present principles can advantageously have smaller sizes than would normally be possible if the vias were simply photopatterned directly on a layer of uncured polymer. The openings produced by photolithography and subsequently formed in the polymer layer by dry plasma etching have better resolution (e.g., ≤10 μm), and the via uniformity and profile angles can be better controlled because the geometry of the openings no longer depends on the properties of the uncured polymer material. The method according to the present principles advantageously opens up the possibility of using uncured polymer materials when forming smaller via sizes. The improved via resolution further provides improved I / O density and also allows for direct via stacking on via designs, which further improves the allowed I / O density.

[0036] While the foregoing is directed to embodiments of the present principles, other and further embodiments of the present principles may be devised without departing from the basic scope thereof.

Claims

1. A method for forming a through hole in a substrate, comprising: depositing a layer of uncured polymer material on top of the substrate to cover the conductive layer exposed on the substrate; exposing at least one region of the layer of uncured polymeric material using a photolithographic process; developing the layer of uncured polymeric material in the photolithographic process to remove portions of the layer of uncured polymeric material from the at least one area; etching the layer of uncured polymer material by a dry etching process to remove a remaining portion of the layer of uncured polymer material from the at least one area to expose a top surface of the conductive layer and form a through-hole in the layer of uncured polymer material; as well as The layer of uncured polymeric material is cured to form a cured polymeric material.

2. The method of claim 1, wherein: A plasma-based dry etch process is used to etch the layer of uncured polymer material using an oxygen-based gas or a carbon tetrafluoride-based gas.

3. The method of claim 2, wherein: adjusting a bias power to enhance a vertical etching aspect of the plasma-based dry etching process relative to a top surface of the substrate; or Gas flow is adjusted to enhance vertical etching aspects of the plasma-based dry etching process relative to the top surface of the substrate.

4. The method of claim 2, wherein: The substrate is blanket etched using the plasma-based dry etching process such that the remaining portion of the layer of uncured polymer material is etched at a higher etch rate than an upper surface of the substrate.

5. The method of claim 1, wherein: The through-holes are formed in the layer of uncured polymer material having a diameter of less than 10 microns.

6. The method of claim 1, wherein: The through-holes are formed in the layer of uncured polymer material having a diameter less than 5 microns.

7. The method of claim 1, wherein: In the photolithographic process, an optical mask is used to expose the at least one region of the layer of uncured polymer material on the substrate.

8. The method of claim 1, wherein: The through hole is formed to have a sidewall profile angle of 80 to 90 degrees.

9. The method of claim 1, wherein the conductive layer is a copper-based material, an aluminum-based material, a gold-based material, or a silver-based material.

10. A method for forming a through hole in a substrate, comprising: spin coating a layer of uncured polymer material atop the substrate to cover at least one conductive layer exposed on the substrate; exposing at least one area of the layer of uncured polymeric material over the at least one conductive layer with ultraviolet light; removing portions of the layer of uncured polymeric material from the at least one area exposed by the ultraviolet light using a solvent wash; etching the layer of uncured polymer material using an anisotropic dry etching process to remove a remaining portion of the layer of uncured polymer material from the at least one region to expose a top surface of the conductive layer and form a via having a diameter less than or equal to 10 micrometers in the layer of uncured polymer material; as well as The layer of uncured polymeric material is cured to form a layer of cured polymeric material.

11. The method of claim 10, wherein: The layer of uncured polymer material is etched using a plasma-based dry etching process.

12. The method of claim 11, wherein: The layer of uncured polymer material is etched using an oxygen-based gas or a carbon tetrafluoride-based gas.

13. The method of claim 11, wherein: adjusting a bias power to enhance a vertical etching aspect of the plasma-based dry etching process relative to a top surface of the substrate, or Gas flow is adjusted to enhance vertical etching aspects of the plasma-based dry etching process relative to the top surface of the substrate.

14. The method of claim 10, wherein: The layer of uncured polymer material is cured at a temperature of 180° C. to 350° C. to form the layer of cured polymer material.

15. A non-transitory computer readable medium having stored thereon instructions that, when executed, result in a method of operating a wafer-level processing system, the method comprising: spin coating a layer of uncured polymer material atop the substrate to cover at least one conductive layer exposed on the substrate; exposing at least one area of the layer of uncured polymeric material over the at least one conductive layer with ultraviolet light; removing portions of the layer of uncured polymeric material from the at least one area exposed by the ultraviolet light using a solvent wash; etching the layer of uncured polymer material using an anisotropic dry etching process to remove a remaining portion of the layer of uncured polymer material from the at least one region to expose a top surface of the conductive layer and form a via having a diameter less than or equal to 10 micrometers in the layer of uncured polymer material; as well as The layer of uncured polymeric material is cured to form a layer of cured polymeric material.

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