Wiring Circuit of Semiconductor Device and Control Method Thereof, Semiconductor Device, Power Conversion Device, Electrical System for Railway Vehicle

Abstract

The present invention provides a wiring circuit for a semiconductor device and a control method thereof, a semiconductor device, a power conversion device, and an electrical system for a railway vehicle, which can prevent malfunction caused by noise while increasing the speed or reducing the loss of switching operations. The wiring circuit (4, 5) of the semiconductor device is connected between the semiconductor devices (1, 2) constituting a branch in the power conversion device and a drive circuit (3) driving the semiconductor device. The wiring circuit (4, 5) of the semiconductor device includes an inductor (11, 12, 13, 14) and an impedance circuit (51, 52, 53, 54) including a switch (15, 16, 17, 18) and connected in parallel with the inductor.

Description

Technical Field

[0001] The present invention relates to a wiring circuit for connecting a semiconductor device and a drive circuit, a method for controlling the wiring circuit, a semiconductor device using the wiring circuit, a power conversion device, and an electrical system for a railway vehicle. Background Art

[0002] Power conversion devices are widely used for power and motor control in industrial equipment, electric railway vehicles, hybrid vehicles, and electric vehicles. These devices consist of electrical components such as power semiconductor modules, power semiconductor elements, and capacitors, wiring connecting the components, and heat sinks that dissipate heat generated by power loss in the components. These devices supply power to loads such as motors and system wiring.

[0003] The power semiconductor modules and power semiconductor elements that make up the main circuit of a power converter generate conduction losses and switching losses in order to control the output current of the power converter. Reducing these power losses requires reducing the size of the heat sink. This allows the power converter to be miniaturized, or additional components for achieving higher performance can be installed in the vacant space. For example, the volume of a power converter installed under the floor of an electric railway vehicle can be reduced, and batteries can be installed in the resulting vacant space to improve energy regeneration performance. Therefore, there is a demand to further reduce conduction losses and switching losses.

[0004] One way to reduce switching losses is to increase the gate drive current during switching. In this case, the gate drive resistor is set to a smaller value. However, due to the lower resistance of the gate drive resistor, it is necessary to increase the output current rating of the gate drive circuit, or the resistance damping effect on resonance in the path from the gate drive circuit to the power semiconductor module or power semiconductor element becomes weaker, making resonance more likely to occur. When resonance grows, voltage vibrations exceeding the gate voltage with the minimum voltage rating are generated in the power semiconductor module or power semiconductor element. As a result, the gate portion of the semiconductor element degrades or is damaged, reducing the reliability of the power semiconductor module or power semiconductor element.

[0005] As conventional technologies related to gate driving for such loss reduction and resonance, technologies described in Patent Documents 1 and 2 are known.

[0006] In the technology described in Patent Document 1, a variable control capacitor is connected between the gate and source of a switching element. Using the gate drive signal generated by a gate drive pulse circuit as a timing reference, the capacitance between the gate and source varies according to the operating period. During periods of maximum gate current, the capacitance is reduced to suppress the maximum current. During periods when the gate loop circuit's stability against resonance is compromised, the capacitance is increased to suppress resonance.

[0007] The technology described in Patent Document 2 connects a resonant inductor and resistor in series between the voltage control terminal of a voltage-controlled transistor and the drive circuit. This produces a high drive voltage or a negative voltage due to LCR resonance with the input capacitance of the voltage-controlled transistor. Furthermore, ringing can be suppressed by making the circuit more compact and significantly reducing the gate wiring length.

[0008] Prior art literature

[0009] Patent Literature

[0010] Patent Document 1: Japanese Patent Application Laid-Open No. 2018-7373

[0011] Patent Document 2: Japanese Patent Application Laid-Open No. 2011-188383 Summary of the Invention

[0012] However, in the technology described in Patent Document 1, since the input capacitance between the gate and the source is increased, the switching time is increased.

[0013] Furthermore, the technology described in Patent Document 2 connects a resonant inductor and a resistor in series between the voltage control terminal and the drive circuit, reducing noise immunity while the voltage-controlled transistor is kept in the off state. Consequently, when noise is generated, malfunctions such as false turn-on and parasitic vibrations may occur.

[0014] In the multiple power semiconductor modules that form a pair in a half-bridge circuit in the main circuit of a power converter, when one power semiconductor module is switched on, the other power semiconductor module is maintained in the off state. In this case, if the other power semiconductor module is mistakenly switched on, a branch short circuit may occur. Consequently, reduced noise tolerance is a significant issue in power converters, half-bridge circuits, and power semiconductor modules.

[0015] In addition, the problem of malfunction caused by noise is significant in voltage-controlled power semiconductor elements that can operate at high speed, such as IGBT (Insulated Gate Bipolar Transistor) and MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and power semiconductor elements composed of wide-bandgap semiconductors such as silicon carbide (SiC), which have lower losses and better high-speed performance than power semiconductor elements composed of silicon (Si).

[0016] Therefore, the present invention provides a wiring circuit of a semiconductor device, a control method of the wiring circuit of a semiconductor device, a semiconductor device, a power conversion device, and an electrical system for a railway vehicle, which can prevent malfunction caused by noise while making switching operations faster or with lower losses.

[0017] In order to solve the above problems, the wiring circuit of the semiconductor device involved in the present invention is connected between the semiconductor device constituting a branch in the power conversion device and the driving circuit that drives the semiconductor device. The wiring circuit of the semiconductor device has: an inductor; and an impedance circuit, including a switch, which is connected in parallel with the inductor.

[0018] In addition, in order to solve the above-mentioned problems, the control method of the wiring circuit of the semiconductor device involved in the present invention is a control method of the wiring circuit of the semiconductor device having an inductor connected between the semiconductor device constituting a branch in the power conversion device and the driving circuit that drives the semiconductor device. When the driving branch in the branch becomes connected, the inductor is short-circuited in the paired branch in the branch.

[0019] In addition, in order to solve the above-mentioned problems, the semiconductor device involved in the present invention is a semiconductor device having a branch in a power conversion device, and has a wiring circuit connected between the branch and a driving circuit that drives the branch, and the wiring circuit is the wiring circuit of the semiconductor device involved in the above-mentioned invention.

[0020] In addition, in order to solve the above-mentioned problems, the power conversion device involved in the present invention has a main circuit having a pair of upper and lower branches and a driving circuit for driving the branch. The power conversion device has a wiring circuit connected between the branch and the driving circuit for driving the branch, and the wiring circuit is the wiring circuit of the semiconductor device involved in the above-mentioned invention.

[0021] In addition, in order to solve the above-mentioned problems, the electrical system for railway vehicles involved in the present invention drives the electric motor that drives the railway vehicle, and the electrical system for railway vehicles includes: a pantograph; a disconnector connected to the pantograph; a reactor connected to the disconnector; a power conversion device connected to the reactor; and a motor connected to the power conversion device, which is the power conversion device involved in the above-mentioned invention.

[0022] According to the present invention, malfunction can be prevented without increasing switching loss of the semiconductor device, thereby improving the reliability of the semiconductor device, power conversion device, and railway vehicle electrical system.

[0023] Other problems, structures, and effects than those described above will become more apparent from the following description of the embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1This is a circuit diagram showing the configuration of the power conversion device according to the first embodiment.

[0025] Figure 2 It shows Figure 1 The gate drive circuit and the gate wiring circuit are shown as a timing diagram of the operation of each switch.

[0026] Figure 3 An example of a turn-on waveform of the power semiconductor module is shown, which illustrates the circuit operation of the first embodiment.

[0027] Figure 4 Show that Figure 3 The waveforms of the main voltage (Vds2) and the main current (Is2) in the circuit are magnified in the time axis direction.

[0028] Figure 5 An example waveform of the gate-source sense voltage ( Vgs1 ) of the power semiconductor module maintained in the off state in the first embodiment is shown.

[0029] Figure 6 The diagram shows the relationship between the switching loss and the total inductance of the power semiconductor module 2 (upper diagram), and the diagram shows the relationship between the peak value of the gate-source sense voltage and the total inductance of the power semiconductor module 1 (lower diagram).

[0030] Figure 7 This is a block diagram showing the circuit configuration of a railway vehicle electrical system according to a sixth embodiment.

[0031] Figure 8 This is a circuit diagram showing the structure of the power conversion device of the second embodiment.

[0032] Figure 9 This is a circuit diagram showing the structure of a power conversion device according to a third embodiment.

[0033] Figure 10 A circuit diagram and a plan view showing the structure of a gate wiring circuit substrate of Example 4.

[0034] Figure 11 This is a circuit diagram showing the structure of the gate wiring circuit of Example 5.

[0035] (Explanation of Symbols)

[0036] 1, 1a, 1b, 1c, 2, 2a, 2b, 2c: Power semiconductor module; 3: Gate drive circuit; 4, 4a, 4b, 4c, 5, 5a, 5b, 5c: Gate wiring circuit; 11, 11a, 11b, 12, 12a, 12b, 13, 13a, 13b, 14, 14a, 14b: Inductor; 15, 16, 17, 18: Switch; 21, 22, 23, 24: Diode; 25, 26, 27, 28: Gate wiring; 30: Drive control circuit ; 31, 32: capacitors; 33, 34: switches; 35, 36: resistors; 37, 38: capacitors; 39, 40: switches; 41, 42: resistors; 51, 52, 53, 54: impedance circuits; 61, 62, 63, 64: resistors; 100, 100a, 100b, 100c: branch circuits; 110: pantograph; 120: disconnector; 130: reactor; 140: motor; 150: power conversion device; 160: capacitor; 170: control circuit. DETAILED DESCRIPTION

[0037] Hereinafter, the embodiments of the present invention will be described with reference to the drawings through the following Examples 1 to 6. In the drawings, the same reference numerals denote the same components or components having similar functions.

[0038] [Example 1]

[0039] Reference Figures 1 to 6 , describing embodiment 1 of the present invention.

[0040] Figure 1 This is a circuit diagram showing the configuration of a power conversion device according to the first embodiment of the present invention.

[0041] The branch circuit 100 is a power conversion device, for example, a three-phase inverter for electric railway (see later). Figure 7 ) components, including semiconductor devices constituting a pair of upper and lower branches, namely power semiconductor modules 1 and 2, a gate drive circuit 3 for driving the power semiconductor modules 1 and 2, and gate wiring circuits 4 and 5 connecting the power semiconductor modules 1 and 2 and the gate drive circuit 3. Here, the power semiconductor modules 1 and 2 are respectively composed of semiconductor switching elements (in Figure 1 A branch consisting of a parallel connection circuit of the MOSFET (in the circuit) and the return diode.

[0042] Power semiconductor modules 1 and 2 are connected in series to form a half-bridge circuit. The high-potential DC terminal nP, low-potential DC terminal nN, and AC terminal nAC of branch circuit 100 are connected to the high-potential side, low-potential side, and intermediate potential (the series connection point of power semiconductor modules 1 and 2), respectively, of the half-bridge circuit. Furthermore, the high-potential DC terminal nP, low-potential DC terminal nN, and AC terminal nAC are connected to the high-voltage DC potential of the power conversion device, the low-voltage DC potential of the power conversion device, and a load (e.g., an inductive load such as a motor), respectively. The operation of branch circuit 100 is controlled by a control signal supplied from an external control circuit to its control signal terminal nCNT.

[0043] Gate drive circuit 3 drives power semiconductor modules 1 and 2 via gate wiring circuits 4 and 5. Gate drive circuit 3 includes an upper arm drive circuit that drives power semiconductor module 1, which constitutes the upper arm; a lower arm drive circuit that drives power semiconductor module 2, which constitutes the lower arm; and a drive control circuit 30 that generates control signals for switches 15 to 18, which switch the impedance of an impedance circuit described later.

[0044] The gate wiring circuits 4 and 5 include gate wirings 25 to 28 ( Figure 1 The components include: (referred to as inductance components in FIG. 1 ), which connect gate drive circuit 3 and power semiconductor modules 1 and 2; inductors 11 to 14, which add a predetermined inductance to the gate wiring; and impedance circuits 51 to 54, which are connected in parallel with inductors 11 to 14, respectively. Impedance circuits 51 to 54 have the function of varying their impedance values in response to control signals generated by drive control circuit 30 and output from gate drive circuit 3.

[0045] In addition, Figure 1 In FIG. 1 , the gate wirings 25 to 28 are described as inductance components (wiring inductances). However, the gate wirings 25 to 28 have resistance components (serial parasitic resistances) not shown in the figure and connected in series with the inductance components, in addition to the inductance components.

[0046] The upper arm gate drive terminal nGDg1 of the gate drive circuit 3 is connected to one end of the inductor 11 via gate wiring 25. The other end of the inductor 11 is connected to the gate terminal nTg1 of the power semiconductor module 1 constituting the upper arm. Furthermore, regarding the source sense, which serves as the reference potential for gate drive, the upper arm source sense drive terminal nGDss1 is connected to one end of the inductor 12 via gate wiring 26, and the other end of the inductor 12 is connected to the source sense terminal nTss1 of the power semiconductor module 1. The connection between the power semiconductor module 2 constituting the lower arm and the gate drive circuit 3 is similar to the connection between the power semiconductor module 1 and the gate drive circuit 3 described above, and therefore, its description is omitted.

[0047] Below, use Figure 1 , the structures of the gate drive circuit 3 and the gate wiring circuits 4 and 5 are described in more detail.

[0048] The gate drive circuit 3 has an upper branch drive circuit composed of circuit elements (31 to 36) and a lower branch drive circuit composed of circuit elements (37 to 42). Figure 1 As shown, in this embodiment, the upper branch driving circuit and the lower branch driving circuit have the same circuit structure and circuit constants. Therefore, the circuit structure is described using the upper branch driving circuit as an example.

[0049] In the upper arm driver circuit, capacitors 31 and 32 divide the potential difference between the upper arm driver circuit's power supply nodes nGDpp1 and nGDnn1 based on their capacitance ratio, generating a source sense voltage that serves as a reference voltage for the upper arm source sense driver terminal nGDss1. Resistors 35 and 36 serve as the conduction gate drive resistor (RgON) and the off-state gate drive resistor (RgOFF), respectively.

[0050] The upper arm gate drive terminal nGDg1 is connected to the power supply node nGDpp1 and the power supply node nGDnn1 via resistors 35 and 36 by complementary on / off control of switches 33 and 34. The potential of the power supply nodes nGDpp1 and nGDnn1 is supplied to the gate wiring circuit 4 from the gate drive terminal nGDg1. Figure 1 In this case, the switch 33 is in the open state and the switch 34 is in the closed state, so the gate drive terminal nGDg1 is connected to the power supply node nGDnn1 of the low potential via the resistor 36 (RgOFF). In this case, the power semiconductor module 1 is in the off state.

[0051] In addition, in the lower branch drive circuit, if Figure 1 As shown, switch 39 is closed and switch 40 is open, so gate drive terminal nGDg2 is connected to power supply node nGDpp2 at a high potential via resistor 41 (RgON). Therefore, power semiconductor module 2 is in an on state.

[0052] In this way, when one of power semiconductor modules 1 or 2 is controlled to the on state, the other is controlled to the off state. This prevents overcurrent caused by a short circuit between the upper and lower branches. The branch controlled to the on state in a pair of upper and lower branches is called the driving branch, and the branch controlled to the off state is called the paired branch.

[0053] In this embodiment, the gate wiring circuits 4 and 5 are as follows. Figure 1As shown, there are inductors (11 to 14) and impedance circuits (51 to 54) connected in parallel with the inductors (11 to 14). Figure 1 As shown in FIG. 1 , in this embodiment, the gate wiring circuit 4 of the upper branch and the gate wiring circuit 5 of the lower branch have the same circuit structure and circuit constants. Figure 1 1 , the gate wiring circuit 5 of the lower arm when the semiconductor switch element is in the on state and the gate wiring circuit 4 of the upper arm when the semiconductor switch element is in the off state are described.

[0054] Impedance circuit 53 includes diode 23 connected in series with switch 17. The anode terminal of diode 23 is located on the power semiconductor module 2 side and is connected to the gate terminal nTg2 of power semiconductor module 2. Furthermore, impedance circuit 54 includes diode 24 connected in series with switch 18. The cathode terminal of diode 24 is located on the power semiconductor module 2 side and is connected to the source sense terminal nTss2 of power semiconductor module 2.

[0055] In addition, if Figure 1 As shown, the structures of the impedance circuits 51 and 52 in the gate wiring circuit 4 of the upper arm are respectively the same as the impedance circuits 53 and 54 of the lower arm.

[0056] Since switches 17 and 18 in the gate wiring circuit 5 of the lower branch of the driving branch are both in the off state, diodes 23 and 24 do not function in the gate driving signal (current) path (the gate driving signal (current) path) of the lower branch, and inductors 13 and 14 are not short-circuited, providing inductance components. Figure 1 In this state, the gate drive signal (current) path of the lower arm passes through the gate drive terminal nGDg2 of the gate drive circuit of the lower arm, which is in the state of providing an on-gate signal, gate wiring 27, inductor 13, gate terminal nTg2 of power semiconductor module 2, source sense terminal nTss2 of power semiconductor module 2, inductor 14, gate wiring 28 (source sense wiring), and source sense drive terminal nGDss2 of the gate drive circuit. Thus, an RLC series circuit is formed, consisting of gate drive resistor 41 (RgON), the inductance components provided by inductors 13 and 14, and the input capacitance of the semiconductor switching element in power semiconductor module 2. Furthermore, in this first embodiment, the inductance components provided by inductors (13, 14) are sufficiently larger than the inductance components of gate wirings (27, 28) (the same applies to the upper arm).

[0057] In addition, Figure 1In the embodiment, the gate drive circuit of the upper branch of the paired branch operates so as to turn off the semiconductor switch element of the power semiconductor module 1. In this case, the switches 15 and 16 in the gate wiring circuit 4 are both closed, so in the gate drive signal (current) path of the upper branch (the gate drive signal (current) path being turned off), the inductor 11 and the inductor 12 are short-circuited by the diodes 21 and 22, respectively, and therefore do not function as inductance elements, and the diodes 21 and 22 provide low capacitive impedance. Therefore, in Figure 1 In the OFF state, the gate drive signal (current) path of the upper branch passes through the source sense drive terminal nGDss1 of the gate drive circuit of the upper branch, which is in the state of providing an OFF gate signal, gate wiring 26 (source sense wiring), switch 16, diode 22, source sense terminal nTss1 of power semiconductor module 1, gate terminal nTg1 of power semiconductor module 1, diode 21, switch 15, gate wiring 25, and gate drive terminal nGDg1 of the gate drive circuit of the upper branch. Therefore, the inductance component of the gate drive signal (current) path is reduced by the amount of inductor 11 and inductor 12. Therefore, the gate drive signal (current) path is regarded as an RC series circuit consisting of gate drive resistor 36 (RgOFF), the capacitive impedance provided by diodes 21 and 22, and the input capacitance of the semiconductor switch element in power semiconductor module 1.

[0058] That is, in the first embodiment, the power semiconductor modules (1, 2) are driven by the power supply voltage of the gate drive circuit supplied via the RLC series circuit in the on state, and are driven by the power supply voltage supplied via the RC series circuit by reducing the inductance (L) in the off state. Furthermore, the diodes (21-24) are connected in parallel with the inductors (11-14) via the switches (15-18) so that their forward directions are in the direction that cuts off the gate drive current. In the first embodiment, as described above, the switches are turned on to short-circuit the inductors via the diodes. Therefore, it is preferable to use diodes with the lowest possible forward voltage (on-state voltage) rating.

[0059] Furthermore, if a diode and an inductor are connected in parallel, the inductor is short-circuited by the diode. However, in this embodiment, when a switch is connected in series with the diode and the power semiconductor modules (1, 2) are driven to conduction, the switch is turned off to release the parallel connection between the diode and the inductor. This prevents resonance between the parasitic capacitance of the diode and the inductor when the power semiconductor modules (1, 2) are driven to conduction.

[0060] Next, the operation of the first embodiment will be described.

[0061] Figure 2 It shows Figure 1 The gate drive circuit and the gate wiring circuit are shown as a timing diagram of the operation of each switch.

[0062] exist Figure 1 , an example is shown in which the lower arm is set as the driving arm and the upper arm is set as the counterpart arm, the driving arm is controlled by switching (on, off) and the counterpart arm is maintained in the off state.

[0063] Therefore, if Figure 2 As shown, switches 39 and 40 in the gate drive circuit on the drive branch (lower branch) are turned on and off in a complementary manner. At time t2, switches 39 and 40 are turned on and off, respectively. Furthermore, at time t3, switches 39 and 40 are turned off and on, respectively. Furthermore, switches 33 and 34 in the gate drive circuit on the paired branch (upper branch) are maintained in the off and on states, respectively, to maintain the switching element of the paired branch in the off state.

[0064] Here, in Figure 2 In the period up to time t2, the driving arm (lower arm) is in the off state, and no load current flows through the driving arm. However, the load current flows as a return current through the diode of the paired arm (upper arm). From time t2 to t3, the driving arm (lower arm) is in the on state, and the load current flows through the driving arm (lower arm), but a recovery current transiently flows through the diode of the paired arm (upper arm). From time t3 to time t4, the state returns to the state from time t1 to time t2.

[0065] The switches (15 to 18) in the gate wiring circuits (4, 5) are controlled to be turned on and off at time t1 before time t2 and at time t4 after time t3.

[0066] Specifically, at a time point t1 before the moment t2 at which switch 39 becomes on and switch 40 becomes off, that is, at a time point (t1) before the switching element of the driving branch (lower branch) is controlled to be turned on, switches 17 and 18 of the gate wiring circuit 5 of the driving branch (lower branch) become off, and switches 15 and 16 of the gate wiring circuit 4 of the pairing branch (upper branch) become on.

[0067] Furthermore, at a time point t4 later than the moment t3 at which switch 39 is turned off and switch 40 is turned on, that is, at a time point (t4) after the switching element of the driving branch (lower branch) is controlled to be turned off, switches 17 and 18 of the gate wiring circuit 5 of the driving branch (lower branch) are turned on, and switches 15 and 16 of the gate wiring circuit 4 of the paired branch (upper branch) are turned off.

[0068] By controlling the on and off states of such switches (15 - 18), during the period (t2 - t3) when the driving branch (lower branch) is controlled for on and off states, the inductors (11, 12) in the gate wiring circuit 4 of the paired branch (upper branch) can be reliably short - circuited through the diodes (21, 22). Thus, during the period (t2 - t3) when the driving branch (lower branch) is controlled for on and off states, accidental connection of the paired branch (upper branch) can be reliably prevented. In addition, the driving branch (lower branch) can be controlled for on and off states in a state where the parallel connection of the inductors (13, 14) and the diodes (23, 24) in the gate wiring circuit 5 of the driving branch (lower branch) is reliably disconnected. Therefore, the high - speed and low - loss characteristics of the driving branch (lower branch) are not impaired, and the driving branch (lower branch) can be controlled for on and off states.

[0069] Figure 3 An example of the on - state waveform of a power semiconductor module showing the circuit operation of the first embodiment is presented. In addition, this waveform example is the result of research (simulation) completed by the present inventors.

[0070] Figure 3 The shown waveform example shows the time point when the switching element (recorded as "transistor 2a" in the figure) of the power semiconductor module 2 constituting the driving branch (lower branch) is controlled to be on, that is, Figure 2 the on - state operation of the power semiconductor module 2 around the moment t2 in

[0071] In Figure 3 the waveforms of the voltage (Vgs2) between the gate and source of the switching element of the power semiconductor module 2, the waveform of the gate current (Ig2) of this switching element, the voltage (Vds2) between the drain and source of this switching element, and the source current (Is2) are shown from above. In addition, the value of the gate loop inductance in the on - state gate drive signal (current) path is called the total inductance value (Lgg1, Lgg2, Lgg3) and is used as a parameter. Here, Lgg1 < Lgg2 < Lgg3. In addition, in the first embodiment, the inductance components of the inductors (13, 14) are much larger than those of the gate wirings (27, 28), and the total inductance value is substantially equal to the sum of the inductances of inductor 13 and inductor 14. Therefore, the total inductance value varies due to the inductance values of the inductors (13, 14).

[0072] In addition, in Figure 3 the waveforms of Lgg1, Lgg2, and Lgg3 are represented by a dashed line, a solid line, and a dash - dot line respectively.

[0073] Since the switching element of the power semiconductor module 2 is controlled to be on, the drain-source voltage Vds2 changes from the high voltage Vdd to the low voltage Von during the period from time t2a to t2c, and the source current Is2 increases from 0 (zero) to Is2.

[0074] The gate-source voltage Vgs2 has substantially the same voltage waveform in each of the cases of Lgg1 , Lgg2 , and Lgg3 during the period t2 a to t2 c .

[0075] In contrast, the waveform of gate current Ig2 varies significantly depending on the total inductance value (Lgg1, Lgg2, and Lgg3). In the case of Lgg1, Ig2 has a relatively large current peak before t2a, then significantly decays after the peak. During the period from t2b to t2c, when Vds2 and Is2 (i.e., the main voltage and main current) vary, Ig2 maintains a constant current set by the gate resistor (RgON). In the cases of Lgg2 (>Lgg1) and Lgg3 (>Lgg2>Lgg1), Ig2's current peak is smaller than that of Lgg1, but during the period of variation in the main voltage and main current (t2a to t2c), Ig2 maintains a larger gate current than that of Lgg1.

[0076] The reason is that when Ig2 is Lgg1, the total inductance value is small, so the RC transition response composed of the gate drive resistance (RgON) and the gate input capacitance of the switching element becomes dominant. In contrast, when it is Lgg2 and Lgg3, the transition response of the RLC series resonant circuit to which Lgg2 and Lgg3 are further added becomes dominant.

[0077] As described above, in the cases of Lgg2 and Lgg3, during the period of change in the main voltage and main current (t2a-t2c), a larger gate current value is obtained than in the case of Lgg1, thereby improving the turn-on characteristics (turn-on (fall) time, turn-on loss). Here, when comparing the cases of Lgg2 and Lgg3, regarding Ig2, during the first half of the period t2a-t2c (period t2a-t2b), the Lgg2 case is larger than the Lgg3 case. During the second half (period t2b-t2c), the Lgg2 case is roughly the same as the Lgg3 case. Therefore, increasing the total inductance value can improve the turn-on characteristics, but as described later, there is an optimal value for the turn-on characteristics within the total inductance value.

[0078] Figure 4 Show that Figure 3 The waveforms of the main voltage (Vds2) and the main current (Is2) in FIG. 3 are magnified in the time axis direction.

[0079] like Figure 4As shown, in the case of Lgg2 (Lgg1 < Lgg2 < Lgg3) among the cases of Lgg1, Lgg2, and Lgg3, Vds2 drops most sharply and Is2 rises most sharply. In the case of Lgg3, Vds jumps down sharply in the same manner as in the case of Lgg2, but the rise of Igs during the period from t2a to t2b is gentler than in the case of Lgg2. The reason is that, as Figure 3 shown, regarding Ig2, during the period from t2a to t2b, the case of Lgg2 is greater than the case of Lgg3.

[0080] Figure 5 Fig. shows an example of the waveform of the voltage (Vgs1) between the gate and source of the power semiconductor module 1 maintained in the cut-off state in the first embodiment. In addition, Figure 5 The waveform example of Figure 3 is, similarly to the waveform example of

[0081] In Figure 5 the case of the left figure, a comparative example is shown in which the switches 15 and 16 in the gate wiring circuit 4 of the upper branch formed by the power semiconductor module 1 are not controlled for conduction and cut-off, and are maintained in the cut-off state. Thus, inductance components larger than the inductance of the gate wiring are provided to the gate drive signal path of the upper branch through the inductors 11 and 12. Therefore, as Figure 5 shown in the left figure, during the period from t2b to t2c when the lower branch (drive branch) is turned on, relatively large noise is superimposed on Vgs1 in the positive voltage direction. Moreover, the larger the total inductance value (Lgg1 < Lgg2 < Lgg3), the larger the peak voltage of Vgs1 becomes, and the longer the period during which voltage noise is superimposed on Vgs1 becomes.

[0082] In this way, by superimposing noise on Vgs1, Vgs1 rises, and when Vgs1 exceeds the gate threshold of the switching element of the power semiconductor module 1 in the cut-off state, there is a possibility that the switching element of the power semiconductor module 1 becomes mis-conducted. When mis-conduction occurs, a branch short-circuit state is formed, and excessive currents are generated in the upper and lower branches.

[0083] In contrast, in the first embodiment, as Figure 2 shown, the switches 15 and 16 of the paired branch (upper branch) are made in the closed state, and the inductors 11 and 12 are respectively short-circuited by the low-impedance diodes 21 and 22. The Vgs1 in this case is shown in Figure 5 the right figure. As Figure 5 shown in the right figure, even if the total inductance is increased, the inductors 11 and 12 do not function as inductance components, so the superimposition of noise during the period from t2b to t2c is suppressed.

[0084] Figure 6 The graph (top graph) shows the relationship between the switching loss and the total inductance of the power semiconductor module 2, and the gate-source sense voltage ( Figure 5 The graph (lower graph) shows the relationship between the peak value of Vgs1 in the circuit and the total inductance value. In addition, these relationships are the results of research (simulation) completed by the inventors.

[0085] like Figure 6 As shown in the figure above, when the total inductance value is linearly increased from Lgg1, the turn-on loss Eon is reduced by a maximum of 18%, and the turn-off loss Eoff is reduced to a lesser extent than Eon, but is reduced by a maximum of 7%. Figure 3 As shown, the optimal value of the total inductance is the one where the switching loss is minimized.

[0086] In addition, if Figure 6 As shown in the lower figure, by closing the switches 15 and 16 in the gate wiring circuit 4 of the paired arm maintained in the off state, the inductors 11 and 12 are disabled, thereby reducing the peak value of Vgs1.

[0087] As described above, according to the first embodiment, a diode is connected in parallel with an inductor provided in a gate wiring circuit that connects a power semiconductor module and a gate drive circuit constituting upper and lower arms of a power conversion device via a switch. When the drive arm in one of the upper and lower arms is turned on, the switch in the paired arm of the upper and lower arms is turned on, short-circuiting the inductor via an impedance circuit. This prevents erroneous turn-on. Furthermore, when the drive arm is turned on, the switch in the drive arm is turned off, rendering the inductor non-short-circuited (connected). This prevents, for example, increased switching losses from being increased by not degrading the switching characteristics of the power semiconductor module.

[0088] [Example 2]

[0089] Figure 8 1 is a circuit diagram showing the configuration of a power conversion device according to a second embodiment of the present invention.

[0090] In this second embodiment, a single power semiconductor module 1a has a pair of upper and lower branches. Each branch consists of a parallel-connected circuit of a semiconductor switching element and a freewheeling diode. In other words, the power semiconductor module 1a is a so-called 2-in-1 type. This power semiconductor module 1a allows for a series-connected half-bridge circuit consisting of two branches to be constructed with a short wiring distance within the module. This reduces the parasitic inductance (main circuit inductance) of the main circuit in the power conversion device, thereby suppressing surge voltages generated when the branch switching elements are switched. This allows for faster operation of the power semiconductor module.

[0091] Furthermore, the power semiconductor module 1a includes inductors (11 to 14) forming a gate wiring circuit connected between the switching elements of the upper and lower branches and the gate drive circuit 3, and impedance circuits (51 to 54) connected in parallel with the inductors (11 to 14). Consequently, the gate wiring circuits (4, 5) located between the power semiconductor module and the gate drive circuit 3 become only gate wiring (25 to 28). Therefore, since the power semiconductor module 1a is a 2-in-1 type, the assembly and wiring of the branch circuit 100 including the power semiconductor module 1a is simplified, and the number of workers required to assemble the power conversion device can be reduced.

[0092] like Figure 8 As shown, the impedance circuit (51-54) in this embodiment 2 is composed of switches (15-18) and resistors (61-64) connected in series. In addition, the control unit of the impedance circuit is the same as that of embodiment 1 ( Figure 2 )same.

[0093] According to the impedance circuit (51-54) in this embodiment 2, the inductor is short-circuited by a resistor, so the temperature dependence of the impedance of the impedance circuit (51-54) can be reduced compared to a diode. Therefore, even if the temperature of the impedance circuit changes due to heat generation of the switching elements in the branch, etc., the inductor (11-14) can be stably short-circuited. Therefore, the margin for erroneous connection is improved, so the reliability is high and erroneous connection can be prevented. In addition, when the gate wiring circuit is built into the power semiconductor module, it is easily affected by temperature. However, since a resistor is used instead of the diode in embodiment 1, the gate wiring circuit can be built into the power semiconductor module without reducing reliability. Here, as long as the influence of temperature can be tolerated, in embodiment 2, a diode can be used instead of a resistor as in embodiment 1. In addition, in embodiment 1, a resistor can be used instead of a diode as in embodiment 2. Even in this case, the rectification effect of the diode cannot be obtained, but the effect of preventing erroneous connection in the paired branch can be obtained.

[0094] Furthermore, the resistors (61 to 64) are preferably formed of a resistor element with relatively low temperature dependence, such as polysilicon or a metal film. Furthermore, the resistance value is preferably set so that the voltage between the terminals of the resistor is approximately equal to or lower than the on-state voltage of the diode in Example 1.

[0095] According to the aforementioned second embodiment, similar to the first embodiment, erroneous connection can be prevented without compromising the switching characteristics of the power semiconductor module. Furthermore, according to the second embodiment, the main circuit inductor of the power conversion device can be reduced, and the number of workers required to assemble the power conversion device can be reduced. Furthermore, according to the second embodiment, the risk of erroneous connection occurring in the power semiconductor module can be reduced.

[0096] [Example 3]

[0097] Figure 9 1 is a circuit diagram showing the configuration of a power conversion device according to a third embodiment of the present invention.

[0098] In this embodiment 3, compared with embodiment 1 ( Figure 1 ) in the gate wiring circuit, the gate wiring circuit has an inductor and an impedance circuit (51 to 54) connected in parallel with the inductor. The inductor is composed of a plurality of ( Figure 9 A series circuit of two inductors is formed, and a switch is connected in parallel to each inductor.

[0099] like Figure 9 As shown, in gate wiring circuit 4, inductor 11a and inductor 11b are connected in series between nGDg1 and nTg1. Switches 41a and 41b are connected in parallel with inductor 11a and inductor 11b, respectively. Furthermore, switch 15 is connected in parallel with the series connection of inductors 11a and 11b to short-circuit the series connection.

[0100] In addition, if Figure 9 As shown, in gate wiring circuit 4, inductor 12a and inductor 12b are connected in series between nGDsg1 and nTss1. Switches 42a and 42b are connected in parallel with inductor 12a and inductor 12b, respectively. Furthermore, switch 16 is connected in parallel with the series connection of inductors 12a and 12b to short-circuit the series connection.

[0101] In addition, the wiring of the control switches 41a, 41b, 42a, and 42b is Figure 9 The diagram shows them as four buses.

[0102] The structure of the gate wiring circuit 5 is the same as that of the gate wiring circuit 4. In addition, the control unit of the switches 15 to 18 in the gate wiring circuit of the present embodiment 3 is the same as that of the embodiment 1 ( Figure 2 ). Switches 15 to 18 may also be connected in series with diodes (see Example 1) or resistors (see Example 2). Furthermore, in Example 3, the impedance circuit (51 to 54) includes only switches (15 to 18) as circuit elements, thereby reducing the impedance of the impedance circuit when the inductor is short-circuited. Furthermore, as in Example 3, the diodes of Example 1 and the resistors of Example 2 may be omitted. Even in this case, the effect of preventing erroneous connection in the paired branches can still be achieved.

[0103] In addition, the number of series connections of inductors is not limited to Figure 9 The two shown can be any number.

[0104] According to the gate wiring circuit of this third embodiment, the inductance value of the gate wiring circuit can be changed by appropriately controlling switches 41a, 41b, 42a, 42b, 43a, 43b, 44a, and 44b to either the on or off state. This allows the inductance of the gate wiring circuit to be set to an appropriate value based on the characteristics of the power semiconductor module. Consequently, the switching losses of the power semiconductor module can be reliably reduced. Furthermore, a gate wiring circuit having the same circuit structure can be used for power semiconductor modules of multiple specifications, thereby improving the versatility of the gate wiring circuit.

[0105] According to the third embodiment, similar to the first embodiment, erroneous turn-on can be prevented without compromising the switching characteristics of the power semiconductor module. Furthermore, according to the third embodiment, switching losses in the power semiconductor module can be reliably reduced. Furthermore, according to the third embodiment, the versatility of the gate wiring circuit is improved.

[0106] [Example 4]

[0107] Figure 10 A circuit diagram (upper diagram) and a plan view (lower diagram) showing the structure of a gate wiring circuit substrate according to a fourth embodiment of the present invention.

[0108] like Figure 10 As shown in the circuit diagram in FIG, the gate wiring circuit substrate of the fourth embodiment includes the same gate wiring circuit as in the first embodiment, namely, the inductor 11, and an impedance circuit 51 connected in parallel with the inductor 11. As shown in the circuit diagram, the impedance circuit 51 is composed of a series connection of a MOSFET 15a functioning as a switch and a diode 21.

[0109] like Figure 10 As shown in the top view, Figure 10 The gate wiring circuit shown in the circuit diagram is constructed using a printed circuit board. On the printed circuit board, Figure 10 In the circuit diagram, one end node1 of the inductor 11, the other end node2 of the inductor 11, the gate terminal node3 of the MOSFET 15a to which the control signal for switching the MOSFET 15a on and off is input, and the series connection point node4 of the diode 21 and the MOSFET 15a are shown as follows. Figure 10 The top view in FIG. 1 shows a wiring pattern.

[0110] like Figure 10 As shown in the top view of FIG, a surface-mount chip inductor and a chip diode are used as the inductor 11 and the diode 21, respectively. Furthermore, a surface-mount discrete MOSFET is used as the MOSFET 15a. Using such circuit components allows for miniaturization of the gate wiring circuit board.

[0111] These circuit components are bonded to the conductor patterns corresponding to nodes 1 to 4 via lead terminal portions using a conductive bonding material such as solder. This forms a gate wiring circuit substrate in which a gate wiring circuit is mounted on a printed circuit board.

[0112] Furthermore, as a gate wiring circuit mounted on a gate wiring substrate, any one of the gate wiring circuits in the above-described first to third embodiments is applied.

[0113] According to the fourth embodiment, the space and area occupied by the gate wiring circuit in the power semiconductor module or power conversion device can be reduced. Therefore, the gate wiring circuit can be installed in the power semiconductor module or power conversion device while suppressing the increase in size of the power semiconductor module or power conversion device.

[0114] [Example 5]

[0115] Figure 11 This is a circuit diagram showing the structure of a gate wiring circuit according to a fifth embodiment of the present invention.

[0116] Inductors 11 and 12 have equal self-inductances and are magnetically coupled to each other (71) by being wound around a single magnetic core or coated with a magnetic core material. The direction of the magnetic coupling is set so that, when currents in the same phase flow through inductors 11 and 12, the impedance imparted to the gate drive signal path by inductors 11 and 12 increases, thereby improving the in-phase noise rejection ratio.

[0117] According to the fifth embodiment, erroneous turning on can be prevented without deteriorating the switching characteristics of the power semiconductor module, similar to the first embodiment. Furthermore, according to the fifth embodiment, the influence of common-phase noise mixed into the gate drive signal path can be reduced.

[0118] [Example 6]

[0119] Figure 7 This is a block diagram showing the circuit configuration of a railway vehicle electrical system according to a sixth embodiment of the present invention.

[0120] The railway vehicle electrical system of the sixth embodiment includes a pantograph 110, a circuit breaker 120, a reactor 130, a power converter 150, and a load, an electric motor 140. The electric motor 140 is a three-phase AC motor that drives the railway vehicle.

[0121] Power converter 150 includes a branch circuit consisting of a pair of upper and lower arms formed of power semiconductor modules, capacitor 160, and control circuit 170. Power converter 150 also includes three branch circuits 100a, 100b, and 100c, which is equal to the number of AC phases.

[0122] The power converter 150 maintains the main voltage (Vcc) via the capacitor 160 , and generates control signals for the gate drive circuits 3 a , 3 b , and 3 c via the control circuit 170 , and inputs the control signals to the gate drive circuits 3 a , 3 b , and 3 c .

[0123] The branch circuits 100 a , 100 b , and 100 c respectively constitute the inverter branch for the first phase, the inverter branch for the second phase, and the inverter branch for the third phase. The output of each inverter branch is connected to the motor 140 .

[0124] In this embodiment, the branch circuits 100a, 100b, and 100c have the same circuit structure. Therefore, the circuit structure of the branch circuit 100a will be described as an example.

[0125] Branch circuit 100a comprises a pair of upper and lower branches, each comprising power semiconductor modules 1a and 2a connected in series; a gate drive circuit 3a for controlling the on / off state of power semiconductor modules 1a and 2a; a gate wiring circuit 4a connected between the gate terminal and source sense terminal of power semiconductor module 1a and gate drive circuit 3a; and a gate wiring circuit 5a connected between the gate terminal and source sense terminal of power semiconductor module 2a and gate drive circuit 3a. Gate wiring circuits 4a and 5a employ the gate wiring circuits described in Examples 1 to 5.

[0126] According to this sixth embodiment, malfunctions of the power conversion device and the railway vehicle electrical system caused by erroneous power semiconductor module connection can be prevented without compromising the switching characteristics of the power conversion device and the railway vehicle electrical system. Consequently, the reliability of the power conversion device and the railway vehicle electrical system is improved. Furthermore, by reducing switching losses in the power semiconductor module and suppressing heat generation, the heat sink included in the power conversion device can be miniaturized. Consequently, the power conversion device and the railway vehicle electrical system can be miniaturized.

[0127] Furthermore, the present invention is not limited to the above-described embodiments and encompasses various variations. For example, the above-described embodiments are examples described in detail to facilitate understanding of the present invention, but are not intended to necessarily include all of the described structures. Furthermore, it is possible to add, delete, or replace portions of the structures of each embodiment with other structures.

[0128] For example, the circuit constant values and methods of the resistors and inductors in the impedance circuit can be arbitrary. In addition, as the switching elements constituting the upper and lower branches, in addition to MOSFET, any one of unipolar devices such as JFET (Junction Field Effect Transistor) and bipolar devices such as IGBT can also be used. In addition, the structure of the parallel connection of the semiconductor switch element and the return diode is not limited to this. In the case where the semiconductor switch element is a MOSFET, a structure in which the body diode built into the MOSFET is used instead of the return diode can also be used. Regarding the switches in the impedance circuit and the gate drive circuit, various unipolar devices and bipolar devices can also be applied in the same way. In addition, depending on the device, the main terminals are called "collector" and "emitter" in addition to the above-mentioned "drain" and "source".

[0129] Furthermore, the power semiconductor module may be configured not only as a 1-in-1 or 2-in-1 module, but also as an example in which a three-phase full-bridge circuit constituting a main circuit of a power conversion device is built in.

[0130] Furthermore, a power conversion device using a gate wiring circuit can be applied not only to rail vehicle electrical systems but also to PCS (Power Conditioning System) in solar power generation equipment, electric vehicles, and the like.

Claims

1. A wiring circuit for semiconductor devices connected between semiconductor devices constituting a branch circuit in a power conversion device and a drive circuit for driving the semiconductor devices, characterized in that: The wiring circuit of the semiconductor device includes: a first wiring for supplying a gate drive signal from the drive circuit to the semiconductor device; a second wiring for supplying a reference voltage from the driving circuit to the semiconductor device; a first inductor connected in series with the first wiring; a second inductor connected in series with the second wiring; a first impedance circuit including a first switch and connected in parallel with the first inductor; and The second impedance circuit includes a second switch and is connected in parallel with the second inductor. When the driving branch in the branch is turned on, the first switch and the second switch in the paired branch in the branch are in the on state, and the first impedance circuit and the second impedance circuit short-circuit the first inductor and the second inductor. When the driving branch in the branches is turned on, the first switch and the second switch in the driving branch are in an off state.

2. The wiring circuit of the semiconductor device according to claim 1, wherein The first impedance circuit includes a series circuit of the first switch and a first diode. The first impedance circuit short-circuits the first inductor via the first diode. The second impedance circuit includes a series circuit of the second switch and a second diode. The second impedance circuit short-circuits the second inductor via the second diode.

3. The wiring circuit of the semiconductor device according to claim 1, wherein The first impedance circuit includes a series circuit of the first switch and a first resistor. The first impedance circuit short-circuits the first inductor via the first resistor. The second impedance circuit includes a series circuit of the second switch and a second resistor. The second impedance circuit short-circuits the second inductor via the second resistor.

4. The wiring circuit of the semiconductor device according to claim 1, wherein The first impedance circuit short-circuits the first inductor via the first switch. The second impedance circuit short-circuits the second inductor via the second switch.

5. The wiring circuit of the semiconductor device according to claim 1, wherein The first inductor includes a third inductor and a fourth inductor connected in series. The first switch includes: a third switch connected in parallel with the third inductor; and a fourth switch connected in parallel with the fourth inductor; The second inductor includes a fifth inductor and a sixth inductor connected in series with each other. The second switch includes: a fifth switch connected in parallel with the fifth inductor; and The sixth switch is connected in parallel with the sixth inductor.

6. A method for controlling a wiring circuit of a semiconductor device, wherein the method comprises controlling a wiring circuit of a semiconductor device having an inductor connected between a semiconductor device constituting a branch circuit in a power conversion device and a drive circuit driving the semiconductor device, wherein: The wiring circuit comprises: a first wiring for supplying a gate drive signal from the drive circuit to the semiconductor device; a second wiring for supplying a reference voltage from the driving circuit to the semiconductor device; a first inductor connected in series with the first wiring; as well as a second inductor connected in series with the second wiring, When the driving branch in the branch is turned on, the first inductor is short-circuited and the second inductor is short-circuited in the paired branch in the branch, Before the driving branch is turned on, in the paired branch, the first inductor is switched from a non-short-circuited state to a short-circuited state, and the second inductor is switched from a non-short-circuited state to a short-circuited state. When the driving arm is turned on, in the driving arm, the first inductor is in a non-short-circuited state, and the second inductor is in a non-short-circuited state.

7. A semiconductor device comprising a branch circuit in a power conversion device, characterized in that: A wiring circuit connected between the branch and a driving circuit for driving the branch is provided, The wiring circuit is the wiring circuit of the semiconductor device according to claim 1 .

8. A power conversion device comprising a main circuit having a pair of upper and lower branches and a drive circuit for driving the branches, characterized in that: The power conversion device includes a wiring circuit connected between the branch and a drive circuit for driving the branch. The wiring circuit is the wiring circuit of the semiconductor device according to claim 1 .

9. An electrical system for a railway vehicle, for driving an electric motor for driving a railway vehicle, characterized in that: The railway vehicle electrical system comprises: pantograph; a disconnector connected to the pantograph; a reactor connected to the disconnector; a power conversion device connected to the reactor; and an electric motor connected to the power conversion device, The power conversion device is the power conversion device according to claim 8.

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