Packaging structure and forming method thereof

Abstract

A packaging structure and a method for forming the same are provided. The packaging structure comprises a first tube die, a second tube die, an interposer, a bottom filling layer, a thermal interface material and an adhesive pattern. The first tube die and the second tube die are arranged side by side on the interposer. The bottom filling layer is arranged between the first tube die and the second tube die. The thermal interface material is arranged on the first tube die, the second tube die and the bottom filling layer. The adhesive pattern is arranged between the bottom filling layer and the thermal interface material to separate the bottom filling layer from the thermal interface material.

Description

Technical Field

[0001] The embodiments of the present invention relate to a packaging structure and a method for forming the same. Background Art

[0002] In the packaging of integrated circuits, semiconductor dies can be stacked by bonding and can be bonded to other packaging components such as interposers and packaging substrates. The resulting package is called a three-dimensional integrated circuit (3DIC). Heat dissipation is a challenge in 3DIC.

[0003] In a typical 3DIC, a heat sink is attached to a semiconductor die to dissipate heat generated from the semiconductor die. However, encapsulation materials such as underfills and molding compounds have poor adhesion to the heat sink, resulting in delamination problems between the heat sink and the encapsulation materials. Therefore, 3DIC technology faces many challenges to be solved. Summary of the invention

[0004] An embodiment of the present invention provides a package structure including a first die, a second die group, an interposer, a bottom fill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are arranged side by side on the interposer. The bottom fill layer is arranged between the first die and the second die group. The TIM is arranged on the first die, the second die group, and the bottom fill layer. The adhesive pattern is arranged between the bottom fill layer and the TIM to separate the bottom fill layer from the TIM.

[0005] An embodiment of the present invention provides a packaging structure including a first tube die, a second tube die, an interposer, a bottom filling layer and a thermal interface material (TIM). The first tube die and the second tube die are arranged side by side on the interposer. The bottom filling layer is arranged between the first tube die and the second tube die. The TIM is arranged on the first tube die, the second tube die and the bottom filling layer. The edge thickness of the TIM is greater than the center thickness of the TIM.

[0006] An embodiment of the present invention provides a method for forming a packaging structure, including: bonding a first die and a second die to an intermediate layer; dispensing a bottom filling layer between the first die and the second die; forming a first encapsulation body to laterally encapsulate the first die, the second die and the bottom filling layer; forming an adhesive pattern on the bottom filling layer between the first die and the second die and on the first encapsulation body; and dispensing a thermal interface material (TIM) on the adhesive pattern. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The various aspects of the present invention will be best understood by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various features are not drawn to scale. In fact, the size of the various features may be arbitrarily increased or reduced for clarity of discussion.

[0008] Figures 1A to 1C is a cross-sectional view of a method for forming a package structure according to a first embodiment.

[0009] Figure 2 yes Figure 1C A top view of the package structure shown.

[0010] Figure 3A and Figure 3B yes Figure 1C An enlarged view of a portion of the package structure is shown.

[0011] FIG. 4A to FIG. 4C is a cross-sectional view of a method for forming a package structure according to a second embodiment.

[0012] FIG. 5A to FIG. 5D is a cross-sectional view of a method for forming a package structure according to a third embodiment.

[0013] Figure 6 is a cross-sectional view of a package structure according to a fourth embodiment. DETAILED DESCRIPTION

[0014] The following disclosure provides many different embodiments or examples for implementing the different features of the provided subject matter. Specific examples of components and arrangements are set forth below to simplify the present invention. Of course, these are merely examples and are not intended to be limiting. For example, the following description in which a first feature is formed on or on a second feature may include an embodiment in which the first feature and the second feature are formed to be in direct contact, and may also include an embodiment in which an additional feature may be formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact. In addition, the present invention may reuse reference numbers and / or letters in various examples. This repetition is for the purpose of brevity and clarity, rather than itself representing the relationship between the various embodiments and / or configurations discussed.

[0015] Furthermore, for ease of description, spatially relative terms, such as "beneath," "below," "lower," "above," "upper," etc., may be used herein to describe the relationship of one element or feature to another element or feature(s) illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0016] Other features and processes may also be included. For example, a test structure may be included to assist in verification testing of a three-dimensional (3D) package or 3DIC device. The test structure may, for example, include a test pad formed in a redistribution layer or on a substrate to enable testing of the 3D package or 3DIC, use of a probe and / or a probe card, etc. Verification testing may be performed on intermediate structures as well as final structures. In addition, the structures and methods disclosed herein may be used in conjunction with a test method including intermediate verification of known good dies to improve yield and reduce costs.

[0017] According to some embodiments, multiple adhesive layers are selectively glued on the bottom filling layer between the first tube core and the multiple second tube cores and on the encapsulation body beside the first tube core and the second tube core. Then a thermal interface material (TIM) is formed on the first tube core, the second tube core and the adhesive layer, so that the adhesive layer is surrounded by the TIM. In this case, the adhesive layer separates the TIM from the bottom filling layer and the encapsulation body to improve the adhesion between the TIM and the bottom filling layer and the encapsulation body, thereby reducing delamination problems and improving reliability.

[0018] Figures 1A to 1C is a cross-sectional view of a method for forming a package structure according to a first embodiment. Figure 2 yes Figure 1C A top view of the package structure shown.

[0019] Reference Figures 1A to 1C , forming a packaging structure 10 (such as Figure 1C The method as shown in the figure comprises the following steps. First, providing Figure 1A The initial structure 10a shown includes a chip-on-wafer-on-substrate (CoWoS) package formed by bonding the package 100 to a circuit substrate 200 , but it should be understood that the embodiment can be applied to other 3DIC packages.

[0020] In detail, the package 100 may include a first die 110, a second die group having a plurality of second dies 120, a bottom fill layer 115, a first encapsulant 125, and an interposer 130. Specifically, the first die 110 has a front side 110a (i.e., an active surface) and a back side 110b (i.e., an inactive surface) opposite to each other. Each second die 120 also has a front side 120a (i.e., an active surface) and a back side 120b (i.e., an inactive surface) opposite to each other. The first die 110 and the second die 120 are flipped so that the front side 110a of the first die 110 and the front side 120a of the second die 120 both face the upper surface 130a of the interposer 130. The first die 110 and the second die 120 are bonded to the upper surface 130 a of the interposer 130 through a plurality of die connectors 112 , 122 to form a chip-on-wafer (CoW) package. However, it should be understood that the embodiments may be applied to other 3DIC packages.

[0021] In some embodiments, the first die 110 and the second die 120 each have a single function (e.g., a logic device, a memory die, etc.), or may have multiple functions (e.g., a system-on-chip (SoC)). In a specific embodiment, the first die 110 is a processor and the second die 120 is a memory module. In some alternative embodiments, the first die 110 is referred to as a die stack, which includes two bonded integrated circuit dies. The two integrated circuit dies are bonded by hybrid bonding, fusion bonding, direct bonding, dielectric bonding, metal bonding, etc., so that the active surfaces face each other ("face to face"). In other embodiments, the first die 110 is a processor, such as a central processing unit (CPU), a graphics processing unit (GPU), an application-specific integrated circuit (ASIC), etc. In a specific embodiment, the first die 110 is a system-on-chip (SoC).

[0022] In some embodiments, the second die 120 is a memory device, such as a dynamic random access memory (DRAM) die, a static random access memory (SRAM) die, a hybrid memory cube (HMC) module, a high bandwidth memory (HBM) module, etc. In a specific embodiment, the second die 120 is an HBM module.

[0023] like Figure 1A As shown, in some embodiments, the die connectors 112, 122 are formed of a conductive material (e.g., solder, copper, aluminum, gold, nickel, silver, palladium, tin, etc. or a combination thereof). In a specific embodiment, the die connectors 112, 122 are microbumps comprising solder sandwiched between two metal layers. In addition, a redistribution layer (RDL) structure 134 is optionally provided between the die connectors 112, 122 and the upper surface 130a of the interposer 130 to electrically connect the die connectors 112, 122 to the through substrate vias (TSV) 132 in the interposer 130. In some embodiments, the RDL structure 134 includes a plurality of polymer layers and a plurality of redistribution layers stacked alternately. The redistribution layer may be formed in the polymer layer to electrically connect the die connectors 112, 122 to the TSV 132. The redistribution layers respectively include a plurality of through holes and a plurality of traces connected to each other. In this case, as Figure 1A As shown, the first die 110 and the second die 120 may be electrically connected to the TSVs 132 in the interposer 130 through the die connectors 112 , 122 and the RDL structure 134 .

[0024] like Figure 1A As shown, the bottom fill layer 115 is disposed between the first die 110 and the second die 120 and laterally encapsulates the die connectors 112 and 122. In some embodiments, the bottom fill layer 115 is formed of any acceptable material (e.g., polymer, epoxy resin, molded underfill, etc.). The bottom fill layer 115 can be formed by a capillary flow process after the first die 110 and the second die 120 are bonded, or can be formed by a suitable deposition method before the first die 110 and the second die 120 are bonded.

[0025] The first encapsulant 125 is configured to laterally encapsulate the bottom fill layer 115 and the second die 120. In some embodiments, the first encapsulant 125 is formed of any acceptable material (e.g., molding compound, epoxy resin, etc.). The first encapsulant 125 can be formed by compression molding, transfer molding, etc. In some other embodiments, the average particle size of the filler of the first encapsulant 125 is greater than or equal to the average particle size of the filler of the bottom fill layer 115. The first encapsulant 125 can be formed on the interposer 130 so that the first die 110 and the second die 120 are buried or covered. Then, the first encapsulant 125 is cured and planarized by a chemical mechanical polishing (CMP) process, a grinding process, etc. to expose the back side 110b (top surface 110t) of the first die 110 and the back side 120b (top surface 120t) of the second die 120. After planarization, as shown in FIG. Figure 1A As shown, a top surface 125 t of the first encapsulant 125 , a top surface 110 t of the first die 110 , a top surface 120 t of the second die 120 , and a top surface 115 t of the underfill layer 115 are substantially flush or coplanar.

[0026] In some embodiments, the package 100 is formed by performing a singulation process on a wafer including a plurality of first dies 110 and second dies 120, an underfill layer 115 on the plurality of first dies 110 and second dies 120, and a first encapsulant 125. As a result of the singulation process, the wafer is singulated into a plurality of interposers 130, wherein each of the packages 100 has one interposer 130. In some embodiments, the singulation process includes a sawing process, a laser process, or a combination thereof. In this case, as shown in FIG. Figure 1A As shown, the first encapsulant 125 is connected to the edge of the interposer 130 , that is, the sidewall 125 s of the first encapsulant 125 is substantially aligned with the sidewall 130 s of the interposer 130 .

[0027] After the singulation process, the CoW package 100 is bonded to the circuit substrate 200 through a plurality of conductive connectors 136. In some embodiments, the conductive connectors 136 are disposed on the lower surface 130b of the interposer 130 to electrically and / or physically connect to the circuit substrate 200. The conductive connectors 136 may be ball grid array (BGA) connectors, solder balls, metal pillars, controlled collapse chip connection (C4) bumps, micro bumps, bumps formed by electroless nickel-electroless palladium-immersion gold technique (ENEPIG), etc. In some embodiments, the conductive connectors 136 are formed by first forming a solder layer by such common methods as evaporation, electroplating, printing, solder transfer, ball placement, etc. Once the solder layer is formed on the structure, reflow may be performed to shape the material into a desired bump shape.

[0028] In some embodiments, the circuit substrate 200 is made of semiconductor materials such as silicon, germanium, diamond, etc. As another option, compound materials such as silicon germanium, silicon carbide, gallium arsenic, indium arsenide, indium phosphide, silicon germanium carbide, gallium arsenic phosphide, gallium indium phosphide, combinations of these, etc. may also be used. In addition, the circuit substrate 200 may be a silicon on insulator (SOI) substrate. Generally speaking, an SOI substrate includes a layer of semiconductor material such as epitaxial silicon, germanium, silicon germanium, SOI, silicon germanium on insulator (SGOI) or a combination thereof. In an alternative embodiment, the circuit substrate 200 is based on an insulating core, such as a glass fiber reinforced resin core. An exemplary core material is a glass fiber resin such as FR4. Alternatives to the core material include bismaleimide-triazine BT resin, or as another option include other printed circuit board (PCB) materials or films. A build-up film such as Ajinomoto Buildup Film (ABF) or other laminates may be used for the circuit substrate 200 .

[0029] The circuit substrate 200 may include active devices and passive devices (not shown), such as transistors, capacitors, resistors, combinations of these, and similar devices that can be used to generate the structural and functional requirements of the design. The circuit substrate 200 may also include metallization layers and through holes (not shown) and bonding pads 202 on the metallization layers and through holes. The metallization layers may be formed on the active devices and passive devices, and are designed to connect various devices to form a functional circuit system. The metallization layers may be formed by alternating dielectric material (e.g., low-k dielectric material) layers and conductive material (e.g., copper) layers (wherein the through holes are interconnected with each conductive material layer), and may be formed by any suitable process (e.g., deposition, inlay, dual inlay, etc.). In some other embodiments, the circuit substrate 200 is substantially free of active devices and passive devices.

[0030] In some embodiments, the conductive connector 136 is attached to the bonding pad 202, thereby bonding the interposer 130 to the circuit substrate 200. The conductive connector 136 electrically and / or physically connects the circuit substrate 200 to the package 100. In some embodiments, a plurality of passive devices 140 (e.g., surface mount devices (SMD)) are attached to the circuit substrate 200 (e.g., bonded to the bonding pad 202). In such an embodiment, the passive devices 140 and the conductive connector 136 are bonded to the same surface of the circuit substrate 200. The conductive connector 136 may have an epoxy flux (not shown) formed thereon before being reflowed, and at least some of the epoxy portion of the epoxy flux remains after the package 100 is attached to the circuit substrate 200. Such remaining epoxy portion may act as an underfill to reduce stress and protect the seam created by reflowing the conductive connector 136.

[0031] like Figure 1A As shown, the second encapsulant 135 is formed to laterally encapsulate the conductive connection 136, the interposer 130, and the lower sidewall of the first encapsulant 125. In one embodiment, the second encapsulant 135 is formed of any suitable bottom filling material (e.g., polymer, epoxy resin, molded bottom filler, etc.). The second encapsulant 135 can be formed by a capillary flow process after the package 100 is attached, or can be formed by a suitable deposition method before the package 100 is attached.

[0032] Reference Figure 1B, the adhesive pattern 150 is selectively dispensed on the bottom filling layer 115 between the first die 110 and the second die 120 and on the first encapsulation body 125 by a dispenser 152. In some embodiments, the adhesive pattern 150 includes a polymer material, such as a liquid die attaching film (DAF), a polyimide (PI)-based polymer, an epoxy-based polymer, etc. In some alternative embodiments, the adhesive pattern 150 does not contain a filler.

[0033] Reference Figure 1B and Figure 1C , a thermal interface material (TIM) 160 is dispensed on the first tube die 110, the second tube die 120 and the adhesive pattern 150. Then, a cover 170 is attached to the package body 100 and the circuit substrate 200 to form a package structure 10. Figure 1C As shown, the cover 170 covers and surrounds the package 100 and the passive device 140. In some embodiments, the cover 170 is formed of a material with a high thermal conductivity (k), such as steel, stainless steel, copper, etc., or a combination thereof. In some alternative embodiments (discussed below), the cover 170 is coated with another metal, such as gold, nickel, etc. In some other embodiments, the cover 170 is a single continuous material. In another embodiment, the cover 170 includes multiple pieces that can be the same material or different materials.

[0034] Specifically, the cover 170 is adhered to the package body 100 through the TIM 160. The TIM 160 is interposed between the cover 170 and the first and second dies 110 and 120 to thermally couple the cover 170 with the first and second dies 110 and 120. In addition, the TIM 160 is formed to a thickness large enough to bury the adhesive pattern 150. That is, as shown in FIG. Figure 1C As shown, the adhesive pattern 150 may be surrounded or wrapped by the TIM 160. In some embodiments, the adhesive pattern 150 is formed to a height of about 0.5 μm to 100 μm, for example, about 10 μm. The TIM 160 may be formed to a thickness of about 5 μm to about 300 μm, for example, about 60 μm. The thickness of the TIM is greater than the height or thickness of the adhesive pattern 150. On the other hand, the cover 170 is adhered to the circuit substrate 200 by an adhesive 172. In some embodiments, the adhesive 172 is an epoxy resin, glue, etc. As another option, the adhesive 172 may be a thermally conductive material.

[0035] In some embodiments, the first die 110 and the second die 120 may trap heat and become hot spots in the package structure 10. Therefore, the TIM 160 thermally couples the package body 100 with the lid 170 to dissipate heat from the first die 110 and the second die 120 to the lid 170. It should be noted that the adhesive pattern 150 may be disposed between the TIM 160 and the bottom fill layer 115 and / or the first encapsulant 125 to improve adhesion between the TIM 160 and the bottom fill layer 115 and / or the first encapsulant 125, thereby reducing delamination problems and improving reliability. Figure 1C From the perspective of the present invention, the adhesive pattern 150 may include a plurality of adhesive layers that are laterally spaced apart from each other. That is, the adhesive layers are discretely distributed on the bottom fill layer 115 between the first die 110 and the second die 120 and on the first encapsulant 125. The adhesive pattern 150 separates the TIM 160 from the bottom fill layer 115 and / or the first encapsulant 125, so that the TIM 160 is not in (physical) contact with the bottom fill layer 115 and / or the first encapsulant 125.

[0036] In some embodiments, the TIM 160 and the adhesive pattern 150 have different materials. The thermal conductivity (k) of the TIM 160 may be greater than the thermal conductivity of the adhesive pattern 150. In this case, the area of ​​the TIM 160 that contacts the top surfaces 110t, 120t of the first die 110 and the second die 120 may be referred to as a thermal path for dissipating heat from the first die 110 and the second die 120. In some embodiments, the TIM 160 is formed of a material having a higher thermal conductivity (k), such as Ag, Cu, Sn, In, carbon nanotubes (CNT), graphite, etc. The adhesive pattern 150 may be formed of a material having a lower thermal conductivity (k), such as a liquid die attach film (DAF), a polyimide (PI)-based polymer, an epoxy-based polymer, etc. In some embodiments, the thermal conductivity (k) of the TIM 160 is about 0.5 Wm -1 K -1 About 200Wm -1 K -1 Or about 10Wm -1 K -1 To about 50Wm -1 K -1 , for example about 10Wm -1 K -1 The thermal conductivity (k) of the adhesive pattern 150 may be about 0.5 Wm -1 K -1 About 100Wm -1 K -1 Or about 0.5Wm -1 K -1 About 10Wm-1 K -1 , for example about 2Wm -1 K -1 .

[0037] In some alternative embodiments, TIM 160 is formed of another material such as a polymer material, solder paste, indium solder paste, etc. In some alternative embodiments, the thermal conductivity (k) of TIM 160 is about 0.5 Wm -1 K -1 About 200Wm -1 K -1 Or about 10Wm -1 K -1 To about 50Wm -1 K -1 , for example about 10Wm -1 K -1 .

[0038] In some embodiments, since the adhesive pattern 150 and the TIM 160 have different materials, a first interface S1 is included between the adhesive pattern 150 and the TIM 160. In some other embodiments, the TIM 160 has a plurality of fillers, while the adhesive pattern 150 does not contain fillers. Therefore, the fillers in the TIM 160 may surround the upper surface of the adhesive pattern 150 to form the first interface S1.

[0039] Similarly, the adhesive pattern 150 and the bottom filling layer 115 may have different materials, and thus include a second interface S2 between the adhesive pattern 150 and the bottom filling layer 115. In some other embodiments, the bottom filling layer 115 has a plurality of fillers, and the adhesive pattern 150 does not contain fillers. Therefore, the fillers in the bottom filling layer 115 may surround the lower surface of the adhesive pattern 150 to form the second interface S2. In addition, the adhesive pattern 150 and the first encapsulant 125 have different materials, and thus include a third interface S3 between the adhesive pattern 150 and the first encapsulant 125. In some other embodiments, the first encapsulant 125 has a plurality of fillers, and the adhesive pattern 150 does not contain fillers. Therefore, the fillers in the first encapsulant 125 may surround the lower surface of the adhesive pattern 150 to form the third interface S3.

[0040] From the overlook Figure 2From the perspective of FIG. 1 , the package structure 10 includes a first die 110 and a second die 120 arranged side by side. In the present embodiment, the first die 110 is a SoC, and the second die 120 is an HBM module. In detail, the area of ​​the first die 110 may be greater than the area of ​​one of the second dies 120. The number of the second dies 120 may be greater than the number of the first dies 110. The second dies 120 are arranged at both sides of the first die 110. The first die 110 and the second die 120 may be electrically connected to each other through the RDL structure 134, the interposer 130, and the circuit substrate 200, as shown in FIG. Figure 1C As shown in the top view Figure 2 As shown, the adhesive pattern 150 has a plurality of openings 154 to expose the first die 110 and the second die 120. In other words, the adhesive pattern 150 is disposed on the bottom fill layer 115 and the first encapsulant 125 to surround the periphery 110p of the first die 110 and the periphery 120p of the second die 120 in a top view. In an alternative embodiment, the adhesive pattern 150 includes two adhesive layers disposed on the bottom fill layer 115 between the first die 110 and the second die 120, respectively. In other words, the two adhesive layers may be disposed along both sides (e.g., the right side and the left side) of the first die 110. In other embodiments, the adhesive pattern 150 includes a plurality of dot structures that are discretely distributed and surround the periphery 110p of the first die 110 and the periphery 120p of the second die 120 in a top view.

[0041] In some embodiments, the layout area of ​​the adhesive pattern 150 is smaller than the layout area of ​​the entire package body 100. For example, the ratio of the layout area of ​​the adhesive pattern 150 to the layout area of ​​the package body 100 is about 5% to about 99%.

[0042] Figure 3A and Figure 3B yes Figure 1C An enlarged view of a portion 150 p of package structure 10 is shown.

[0043] Reference Figure 3A, the adhesive pattern 150a is formed and limited on the bottom filling layer 115 without extending onto the top surfaces 110t, 120t of the first tube core 110 and the second tube core 120. In detail, the width W1 of the adhesive pattern 150a may be substantially equal to or less than the distance D1 between the first tube core 100 and the adjacent second tube core 120. In some embodiments, the width W1 is about 10μm to about 300μm, for example, 100μm. The distance D1 may be about 10μm to about 300μm, for example, 100μm. In addition, the adhesive pattern 150a may have a flat bottom surface 150bt and a curved top surface 150t. In some embodiments, the bottom surface 150bt of the adhesive pattern 150a is substantially aligned with the top surfaces 110t, 120t of the first tube core 110 and the second tube core 120. The curved top surface 150t of the adhesive pattern 150a may be a convex surface protruding in a direction from the bottom surface 150bt to the top surface 150t. There is an angle θ1 between the top surface 150t and the bottom surface 150bt of the adhesive pattern 150a, wherein the angle θ1 may be an acute angle. In some embodiments, the angle θ1 is about 5 degrees to about 85 degrees, for example, 45 degrees. In addition, the thickness T1 of the adhesive pattern 150a gradually decreases in a direction from the center to the edge. For example, the highest thickness T1 of the adhesive pattern 150a is about 0.5 μm to 100 μm, for example, about 10 μm.

[0044] Reference Figure 3B, the adhesive pattern 150b not only covers the bottom fill layer 115, but also extends to cover a portion of the top surfaces 110t, 120t of the first tube core 110 and the second tube core 120. In this case, the adhesive pattern 150b also covers and protects the interface between the bottom fill layer 115 and the first tube core 110 and the second tube core 120, thereby avoiding defects. Specifically, the width W2 of the adhesive pattern 150b may be greater than the distance D1 between the first tube core 100 and the adjacent second tube core 120. In some embodiments, the width W2 is about 10μm to about 300μm, for example, 140μm. In this case, the adhesive pattern 150b may contact a portion of the top surfaces 110t, 120t of the first tube core 110 and the second tube core 120. The adhesive pattern 150b may have an extension length L1 measured from the interface between the first tube core 110 and the bottom fill layer 115 to the right edge of the adhesive pattern 150b. In addition, the adhesive pattern 150b may have another extension length L2 measured from the interface between the second tube core 120 and the bottom filling layer 115 to the left edge of the adhesive pattern 150b. In one embodiment, the extension length L1 is the same as the extension length L2. In another embodiment, the extension length L1 is different from the extension length L2. For example, the extension length L1 is about 3μm to 60μm, for example, about 20μm. The extension length L2 may be about 3μm to 60μm, for example, about 20μm. There is an angle θ2 between the top surface 150t' and the bottom surface 150bt' of the adhesive pattern 150b, wherein the angle θ2 may be an acute angle. In some embodiments, the angle θ2 is about 5 degrees to about 85 degrees, for example, 45 degrees. In one embodiment, the angle θ2 is less than the angle θ1. In other embodiments, the angle θ2 is greater than or substantially equal to the angle θ1. In addition, the thickness T2 of the adhesive pattern 150b also gradually decreases along the direction from the center to the edge. For example, the highest thickness T2 of the adhesive pattern 150 b is about 0.5 μm to 100 μm, for example, about 10 μm.

[0045] FIG. 4A to FIG. 4C is a cross-sectional view of a method for forming a package structure according to a second embodiment.

[0046] Reference Figure 4A , providing a CoWoS package 10a. The structure, material and function may be similar to Figure 1A As shown and referenced in Figure 1A The structures, materials and functions discussed are not described in detail in this article.

[0047] Reference Figure 4B, TIM 260 is dispensed on the first die 110, the second die 120, the bottom fill layer 115 and the first encapsulant 125 by a dispenser 262. In some embodiments, TIM 260 includes a material with a relatively high thermal conductivity (k), such as Ag, Cu, Sn, In, carbon nanotubes (CNT), graphite, etc. It should be noted that the edge thickness T3 of TIM 260 is greater than or substantially equal to the center thickness T4 of TIM 260. The thicker edge thickness T3 can provide better adhesion between TIM 260 and edge encapsulant 125, thereby reducing delamination problems and improving reliability in high warpage areas. The thinner center thickness T4 can achieve better heat dissipation, especially heat dissipation from the first die 110 (e.g., SoC or GPU). In some embodiments, the edge thickness T3 is about 5 μm to about 400 μm, for example, about 200 μm; the center thickness T4 is about 3 μm to about 300 μm, for example, about 100 μm; and the ratio of the edge thickness T3 to the center thickness T4 (T3 / T4) is about 1.1 to about 5, for example, about 2. In this case, the specific range of the edge thickness T3 and / or the center thickness T4 of the TIM 260 can provide better coverage than a thinner TIM and better heat dissipation than a thicker TIM. That is, when the edge thickness T3 is less than 5 μm and the center thickness T4 is less than 3 μm, the TIM 260 may have poor coverage and not completely cover the underlying structure. On the other hand, when the edge thickness T3 is greater than 400 μm and the center thickness T4 is greater than 300 μm, the TIM 260 may have poor heat dissipation.

[0048] Reference Figure 4C Then, the cover 270 is attached to the package body 100 and the circuit substrate 200 to form the package structure 20. Figure 4C As shown, the cover 270 covers and surrounds the package body 100 and the passive device 140. Specifically, the cover 270 is adhered to the package body 100 through the TIM 260, and is adhered to the circuit substrate 200 through the adhesive 172. Since the TIM 260 has a thicker edge thickness T3 and a thinner center thickness T4, the TIM 260 has a concave top surface 260t. The concave top surface 260t may be concave along the direction from the first tube core 110 to the interposer 130. In addition, the cover 270 may conformally cover the concave top surface 260t of the TIM 260, and have a concave top surface 270ct corresponding to the concave top surface 260t of the TIM 260. Figure 4CAs shown, the cover 270 has a top surface 270t, and the top surface 270t includes a flat top surface 270f1 and a concave top surface 270ct. The concave top surface 270ct is surrounded by the flat top surface 270f1. The flat top surface 270f1 is higher than the concave top surface 270ct. The arrangement and materials of the TIM 260 and the cover 270 are similar to those of the TIM 160 and the cover 170, and have been described in detail in the above embodiments. Therefore, the details thereof are omitted here.

[0049] FIG. 5A to FIG. 5D is a cross-sectional view of a method for forming a package structure according to a third embodiment.

[0050] Reference Figure 5A , providing a CoWoS package 10a. The structure, material and function may be similar to Figure 1A As shown in and referenced Figure 1A The structures, materials and functions discussed are not described in detail in this article.

[0051] Reference Figure 5B , a first metal layer 362 is formed on the package 100. The first metal layer 362 may be formed on the package 100 before or after the package 100 is singulated. The first metal layer 362 may be formed of a conductive material or metal (e.g., Ag, Au, Ti, NiV, Al, TiN, Cu, Sn, etc. or a combination thereof). The first metal layer 362 may be formed by depositing a seed layer on the interposer 130 (e.g., on the first encapsulation 125, the first and second dies 110, 120, and the bottom fill layer 115) and then electroplating a conductive material onto the seed layer. The first metal layer 362 may also be formed by sputtering a conductive material onto the package 100. In some embodiments, the first metal layer 362 is a continuous structure that blanket covers the first encapsulation 125, the first and second dies 110, 120, and the bottom fill layer 115. In some embodiments, the first metal layer 362 is electrically floating. That is, the first metal layer 362 may be electrically insulated from active devices and / or passive devices of the first die 110 and the second die 120 and other surrounding devices.

[0052] Reference Figure 5C and Figure 5D Then, TIM 360 is dispensed on the first metal layer 362. The material of TIM 360 is similar to that of TIM 160 and has been described in detail in the above embodiment. Therefore, the details are omitted here. Then, the cover 170 coated with the second metal layer 364 is attached to the package body 100 and the circuit substrate 200 to form the package structure 30. In this case, Figure 5DAs shown, the first metal layer 362, the second metal layer 364, and the TIM 360 sandwiched between the first metal layer 362 and the second metal layer 364 constitute a composite structure 365 to thermally couple the cover 170 with the first die 110 and the second die 120. The second metal layer 364 can be formed of a conductive material or metal (e.g., Ag, Au, Ti, NiV, Al, TiN, Cu, Sn, etc. or a combination thereof). The second metal layer 364 can be formed by depositing a seed layer and then electroplating a conductive material onto the seed layer. The second metal layer 364 can also be formed by sputtering a conductive material onto the inner surface of the cover 170. In some embodiments, the second metal layer 364 is a continuous structure covering the TIM 360. In some embodiments, the second metal layer 364 is electrically floating. That is, the second metal layer 364 can be electrically isolated from the active devices and / or passive devices of the first die 110 and the second die 120 and other surrounding devices. Alternatively, the second metal layer 364 may be omitted and the TIM 360 may be in contact with the lid 170 .

[0053] In some embodiments, the first metal layer 362 and the second metal layer 364 have the same material or different materials. In some embodiments, the thickness 362t of the first metal layer 362 is substantially equal to the thickness 364t of the second metal layer 364. The thickness 362t of the first metal layer 362 may be about 0.1 μm to about 10 μm, for example, about 1 μm. The thickness 364t of the second metal layer 364 may be about 0.1 μm to about 10 μm, for example, about 1 μm. In this case, the specific range of thickness 362t and / or thickness 364t may provide better coverage than thinner metal layers and better heat dissipation than thicker metal layers. That is, when the thickness 362t and / or thickness 364t is less than 0.1 μm, the first metal layer 362 and / or the second metal layer 364 may have poor coverage and not completely cover the underlying structure. On the other hand, when the thickness 362t and / or the thickness 364t is greater than 10 μm, the first metal layer 362 and / or the second metal layer 364 may have poor heat dissipation. In some alternative embodiments, the thickness 362t of the first metal layer 362 is less than or greater than the thickness 364t of the second metal layer 364. In some embodiments, the thickness 360t of the TIM 360 is greater than or substantially equal to the thickness 362t of the first metal layer 362 and / or the thickness 364t of the second metal layer 364. The thickness 360t of the TIM 360 may be about 3 μm to about 300 μm, for example, about 60 μm.

[0054] It should be noted that the first metal layer 362 can improve the adhesion between the TIM 360 and the package 100 (especially the bottom fill layer 115 and the first encapsulant 125), thereby reducing delamination problems and improving reliability. In other words, the first metal layer 362 can be referred to as an adhesive film, layer, or pattern. Similarly, the second metal layer 364 can improve the adhesion between the TIM 360 and the cover 170, thereby reducing delamination problems and improving reliability. The second metal layer 364 can also be referred to as an adhesive film, layer, or pattern. In addition, the composite structure 365 including the TIM 360 sandwiched between the first metal layer 362 and the second metal layer 364 can have a high thermal conductivity and can conform to the shape of the package 100, including conforming to any warpage that may have been introduced in the package 100. In this way, the overall thermal resistance of the package structure 30 can be reduced.

[0055] Figure 6 A package structure 40 having an adhesive pattern 450 and a TIM 260 is shown. Specifically, the adhesive pattern 450 is dispensed on the bottom filling layer 115. Then, TIM 260 with different thicknesses is dispensed on the adhesive pattern 450, the first encapsulant 125, and the first die 110 and the second die 120, so that the adhesive pattern 450 is surrounded by the TIM 260. The material of the adhesive pattern 450 is similar to the material of the adhesive pattern 150 and has been described in detail in the above embodiments. Therefore, its details are omitted here. In this case, the package structure 40 can have the advantage of being a combination of the package structures 10 and 20. That is, the adhesive pattern 450 can improve the adhesion between the TIM 260 and the bottom filling layer 115. The thicker edge thickness T3 can improve the adhesion between the TIM 260 and the edge encapsulant 125, thereby reducing the delamination problem and improving the reliability of the high warpage area. The thinner center thickness T4 can achieve better heat dissipation, especially from the first die 110 (e.g., SoC or GPU). In some embodiments, the adhesive pattern 450 is formed and confined on the bottom fill layer 115. In some other embodiments, the adhesive pattern 450 extends to cover a portion of the first die 110 and the second die 120. In some embodiments, the layout area of ​​the adhesive pattern 450 is smaller than Figure 2 The layout area of ​​the adhesive pattern 150 is shown. For example, the ratio of the layout area of ​​the adhesive pattern 450 to the layout area of ​​the package body 100 is about 5% to about 99%. As another option, the adhesive pattern 450 can be formed on the first encapsulant 125 as needed to separate the first encapsulant 125 from the TIM 260.

[0056] According to some embodiments, a package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The TIM is disposed on the first die, the second die group, and the underfill layer. The adhesive pattern is disposed between the underfill layer and the TIM to separate the underfill layer from the TIM.

[0057] In some embodiments, the second die group includes at least one second die or a plurality of second dies, the plurality of second dies are respectively disposed at both sides of the first die, and the adhesive pattern includes a plurality of adhesive layers discretely distributed on the bottom filling layer between the first die and the plurality of second dies. In some embodiments, the above-mentioned package structure further includes an encapsulation body that laterally encapsulates the first die, the plurality of second dies, and the bottom filling layer, wherein a portion of the plurality of adhesive layers is disposed between the encapsulation body and the thermal interface material to separate the encapsulation body from the thermal interface material. In some embodiments, the sidewall of the encapsulation body is substantially aligned with the sidewall of the interposer. In some embodiments, one of the plurality of adhesive layers has a curved top surface and has a thickness that decreases in a direction from the center to the edge. In some embodiments, the adhesive pattern extends from the top surface of the bottom filling layer to cover a portion of the top surface of the first die and a portion of the top surface of the second die group. In some embodiments, there is a first interface between the adhesive pattern and the thermal interface material, and there is a second interface between the adhesive pattern and the bottom filling layer. In some embodiments, the thermal interface material has a plurality of fillers, and the adhesive pattern does not contain fillers. In some embodiments, the adhesive pattern includes a first metal layer extending to cover the first die and the second die group. In some embodiments, the above-mentioned packaging structure also includes: a circuit substrate bonded to the interposer; a cover adhered to the circuit substrate, the first die and the second die group, the cover covering and surrounding the first die and the second die group; and a second metal layer disposed between the thermal interface material and the cover, wherein a composite structure including the thermal interface material, the first metal layer and the second metal layer thermally couples the cover with the first die and the second die group. In some embodiments, the first metal layer and the second metal layer are both electrically floating. In some embodiments, the edge thickness of the thermal interface material is greater than the center thickness of the thermal interface material. In some embodiments, the thermal conductivity of the thermal interface material is greater than the thermal conductivity of the adhesive pattern.

[0058] According to some embodiments, a package structure includes a first tube die, a second tube die, an interposer, a bottom filling layer and a thermal interface material (TIM). The first tube die and the second tube die are arranged side by side on the interposer. The bottom filling layer is arranged between the first tube die and the second tube die. The TIM is arranged on the first tube die, the second tube die and the bottom filling layer. The edge thickness of the TIM is greater than the center thickness of the TIM.

[0059] In some embodiments, the package structure further comprises: a circuit substrate bonded to the interposer; a passive device bonded to the circuit substrate; and a cover adhered to the circuit substrate, the first tube die and the second tube die, the cover covering and surrounding the passive device, the first tube die and the second tube die. In some embodiments, the thermal interface material has a first concave top surface, the cover conformally covers the first concave top surface of the thermal interface material, and the cover has a second concave top surface corresponding to the first concave top surface.

[0060] According to some embodiments, a method for forming a packaging structure includes: bonding a first die and a second die to an interposer; dispensing a bottom fill layer between the first die and the second die; forming a first encapsulation body to laterally encapsulate the first die, the second die, and the bottom fill layer; forming an adhesive pattern on the bottom fill layer between the first die and the second die and on the first encapsulation body; and dispensing a thermal interface material (TIM) on the adhesive pattern.

[0061] In some embodiments, forming the adhesive pattern includes: forming a first metal layer extending to cover the first die and the second die. In some embodiments, the method further includes: forming a second metal layer on the thermal interface material such that the first metal layer, the thermal interface material, and the second metal layer form a composite structure; bonding the interposer to a circuit substrate; and adhering a cover to the circuit substrate and the composite structure, wherein the composite structure thermally couples the cover to the first die and the second die. In some embodiments, the adhesive pattern is formed to have a plurality of adhesive layers that are laterally spaced apart from each other in a cross-sectional view.

[0062] The features of several embodiments are summarized above so that those skilled in the art can better understand the various aspects of the present invention. Those skilled in the art should understand that they can easily use the present invention as a basis for designing or modifying other processes and structures to implement the same purposes and / or achieve the same advantages as the embodiments described herein. Those skilled in the art should also recognize that these equivalent constructions do not depart from the spirit and scope of the present invention, and they can make various changes, substitutions and modifications to them without departing from the spirit and scope of the present invention.

Claims

1. A packaging structure, comprising: The first tube die and the second tube die group are arranged side by side on the interposer; A bottom filling layer is disposed between the first tube die and the second tube die group; A thermal interface material is disposed on the first tube die, the second tube die group and the bottom filling layer; an adhesive pattern disposed between the bottom filling layer and the thermal interface material to separate the bottom filling layer from the thermal interface material; as well as An encapsulation body laterally encapsulates the first die, the second die group, and the bottom filling layer, wherein a sidewall of the encapsulation body is substantially aligned with a sidewall of the interposer.

2. The packaging structure according to claim 1, wherein the second die group includes at least one second die or a plurality of second dies, the plurality of second dies are respectively arranged at both sides of the first die, and the adhesive pattern includes a plurality of adhesive layers discretely distributed on the bottom filling layer between the first die and the plurality of second dies. 3 . The packaging structure according to claim 2 , wherein a portion of the plurality of adhesive layers is disposed between the encapsulant and the thermal interface material to separate the encapsulant from the thermal interface material. 4 . The package structure according to claim 2 , wherein one of the plurality of adhesive layers has a curved top surface and has a thickness that decreases in a direction from a center to an edge. 5 . The package structure of claim 1 , wherein the adhesive pattern extends from a top surface of the underfill layer to cover a portion of a top surface of the first die and a portion of a top surface of the second die group. 6 . The package structure according to claim 1 , wherein a first interface is provided between the adhesive pattern and the thermal interface material, and a second interface is provided between the adhesive pattern and the underfill layer. 7 . The package structure according to claim 1 , wherein the thermal interface material has a plurality of fillers, and the adhesive pattern does not contain fillers. 8 . The package structure of claim 1 , wherein the adhesive pattern comprises a first metal layer extending to cover the first die and the second die group.

9. The packaging structure according to claim 8, further comprising: a circuit substrate bonded to the interposer; a cover adhered to the circuit substrate, the first die, and the second die group, the cover covering and surrounding the first die and the second die group; as well as A second metal layer is disposed between the thermal interface material and the cover, wherein a composite structure including the thermal interface material, the first metal layer and the second metal layer thermally couples the cover with the first die and the second die group. 10 . The package structure of claim 9 , wherein the first metal layer and the second metal layer are both electrically floating. The package structure according to claim 1 , wherein an edge thickness of the thermal interface material is greater than a center thickness of the thermal interface material. 12 . The package structure of claim 1 , wherein a thermal conductivity of the thermal interface material is greater than a thermal conductivity of the adhesive pattern.

13. A packaging structure, comprising: The first tube die and the second tube die are arranged side by side on the interposer; A bottom filling layer, disposed between the first tube core and the second tube core; A thermal interface material is disposed on the first tube core, the second tube core and the bottom filling layer, wherein the edge thickness of the thermal interface material is greater than the center thickness of the thermal interface material; as well as An encapsulation body laterally encapsulates the first tube die, the second tube die and the bottom filling layer, wherein the sidewall of the encapsulation body is substantially aligned with the sidewall of the interposer.

14. The package structure according to claim 13, further comprising: a circuit substrate bonded to the interposer; a passive device bonded to the circuit substrate; as well as A cover is adhered to the circuit substrate, the first die, and the second die, the cover covering and surrounding the passive device, the first die, and the second die. 15 . The package structure according to claim 14 , wherein the thermal interface material has a first concave top surface, the cover conformally covers the first concave top surface of the thermal interface material, and the cover has a second concave top surface corresponding to the first concave top surface.

16. A method for forming a package structure, comprising: bonding the first die and the second die to the interposer; Dispensing a bottom filling layer between the first tube die and the second tube die; forming a first encapsulation body to laterally encapsulate the first tube core, the second tube core and the bottom filling layer; forming an adhesive pattern on the underfill layer between the first die and the second die and on the first encapsulant; as well as A thermal interface material is dispensed on the adhesive pattern, wherein a sidewall of the first encapsulant is substantially aligned with a sidewall of the interposer.

17. The method of claim 16, wherein forming the adhesive pattern comprises: A first metal layer is formed extending to cover the first die and the second die.

18. The method according to claim 17, further comprising: forming a second metal layer on the thermal interface material, so that the first metal layer, the thermal interface material and the second metal layer form a composite structure; bonding the interposer to a circuit substrate; as well as A lid is adhered to the circuit substrate and the composite structure, wherein the composite structure thermally couples the lid with the first die and the second die.

19. The method of claim 16, wherein the adhesive pattern is formed to have a plurality of adhesive layers laterally spaced apart from each other in a cross-sectional view.

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