Micro device cartridge structure

Abstract

This invention discloses a structure and method for integrating microdevices into a system substrate.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to U.S. Provisional Patent Application No. 62 / 931,023, filed November 5, 2019; U.S. Provisional Patent Application No. 62 / 894,409, filed August 30, 2019; and U.S. Provisional Patent Application No. 62 / 809,161, filed February 22, 2019. The entire contents of each of these applications are incorporated herein by reference. Technical Field

[0003] This disclosure relates to integrating microdevices into a system substrate. Summary of the Invention

[0004] The present invention relates to a method for integrating microdevices onto a backplane, comprising: providing a microdevice substrate including one or more microdevices; bonding a selective assembly of microdevices from the substrate to the backplane by connecting pads on the microdevices and corresponding pads on the backplane; and retaining the bonded selective assembly of microdevices on the backplane by separating the microdevice substrate.

[0005] Another embodiment of the present invention relates to a method for integrating microdevices onto a backplane, comprising: providing a microdevice substrate including one or more microdevices; bonding a selective set of microdevices from the substrate to the backplane by connecting pads on the microdevices and corresponding pads on the backplane; and retaining the bonded selective set of microdevices on the backplane by separating the microdevice substrate.

[0006] Another embodiment of the present invention relates to a method for integrating a microdevice into a system substrate, comprising: integrating a first microdevice onto a surface of the system substrate; providing a cartridge substrate including one or more second microdevices; and integrating at least one second microdevice onto a surface of the system substrate, wherein an interference region between the second microdevice and the first microdevice is eliminated by first and second microdevices having different sizes. Attached Figure Description

[0007] The foregoing and other advantages of the present invention will become apparent after reading the following embodiments and referring to the drawings.

[0008] Figure 1A A cross-sectional view of a microdevice array on a microdevice substrate according to an embodiment of the present invention is shown.

[0009] Figure 1B A cross-sectional view of a microdevice array with a buffer layer is shown according to an embodiment of the present invention.

[0010] Figure 1C A cross-sectional view of a microdevice array according to an embodiment of the present invention is shown.

[0011] Figure 1D A cross-sectional view of a microdevice array bonded to an intermediate substrate according to an embodiment of the present invention is shown.

[0012] Figure 1E A cross-sectional view of a microdevice array with a liner according to an embodiment of the present invention is shown.

[0013] Figure 2 A cross-sectional view of a microdevice array bonded to an intermediate substrate and a backplane according to an embodiment of the present invention is shown.

[0014] Figure 3A The process steps for locating a microdevice according to an embodiment of the present invention are illustrated.

[0015] Figure 3B This invention demonstrates a modification of the position / shape of an electrode based on the location of a microdevice, according to an embodiment of the present invention.

[0016] Figure 3C An extension portion of an electrode is shown according to an embodiment of the present invention.

[0017] Figure 4A A cross-sectional view of the system substrate and the box substrate according to another embodiment of the present invention is shown.

[0018] Figure 5A An array of microdevices on a substrate is shown.

[0019] Figure 5B An array of microdevices on a substrate with a buffer layer is shown.

[0020] Figure 5C An array of microdevices on a substrate with a buffer layer and a planarization layer is shown.

[0021] Figure 5D An array of microdevices on a substrate with a buffer and planarization layer, as well as a bonding layer and an intermediate substrate, is shown.

[0022] Figure 5E An array of microdevices with substrate removed is shown.

[0023] Figure 5F The selective release of the microdevice is demonstrated.

[0024] While this disclosure is susceptible to various modifications and alternatives, specific embodiments or implementations have been illustrated by way of examples in the drawings and will be described in detail herein. However, it should be understood that this disclosure is not intended to limit it to the specific forms disclosed. Rather, the invention is intended to cover all modifications, equivalents, and alternatives that fall within the spirit and scope of the invention as defined by the appended claims. Detailed Implementation

[0025] In this specification, the terms "device" and "microdevice" are used interchangeably. However, it will be apparent to those skilled in the art that the embodiments described herein are independent of device size.

[0026] Several embodiments of this specification relate to integrating microdevices into a receiving substrate. The system substrate may include a micro light-emitting diode (LED), an organic LED, a sensor, a solid-state device, an integrated circuit, a microelectromechanical system (MEMS), and / or other electronic components.

[0027] The receiving substrate can be (but is not limited to) a printed circuit board (PCB), a thin-film transistor backplane, an integrated circuit substrate, or an optical microdevice such as an LED or a display assembly (e.g., a driver circuit backplane). The patterning of the microdevice donor substrate and the receiving substrate can be combined with different transfer techniques, including (but not limited to) pick-and-place operations using different mechanisms (e.g., electrostatic transfer heads, elastomeric transfer heads) or direct transfer mechanisms (e.g., dual-function pads and more).

[0028] In one embodiment, the microdevice array can be developed on a microdevice substrate, wherein the microdevices can be developed by etching a planar layer.

[0029] In another embodiment, a buffer layer is deposited on or over the microdevice array. The buffer layer may extend above the surface of the microdevice substrate.

[0030] In some embodiments, one or more planarization layers may be formed on a microdevice substrate and cured by one of the following: temperature, light or other sources.

[0031] In one embodiment, an intermediate substrate may be provided. In another embodiment, the bonding layer may be formed on the intermediate substrate or over the planarization layer.

[0032] In another embodiment, the microdevice substrate can be removed by laser or chemical stripping.

[0033] In one embodiment, an opening may be present in the buffer layer, allowing microdevices to connect to the planarization layer. In another case, electrodes may be disposed on the top or bottom of the planarization layer.

[0034] In another embodiment, additional processes may be performed after the microdevice substrate is removed. These processes include one of the following: removal of an additional common layer, thinning of a planarization layer, and / or microdevice.

[0035] In one scenario, one or more pads may be added to the microdevice. The pads may be conductive or solely for bonding to the system substrate. In another scenario, a buffer layer may connect at least one microdevice to a test pad. The test pad may be used to bias the microdevice and test its functionality. Testing may be performed at the wafer level or at the intermediate (cassette) level. After removing excess layers, the pads may be accessible at the intermediate (cassette) level.

[0036] In cases where a microdevice has more than one contact on the top side, the buffer layer can be patterned to connect at least one contact of the microdevice to the test pad.

[0037] In another embodiment, a backplane may be provided. In one case, the backplane may have transistors and other components for driving microdevices via pixel circuitry. In another case, the backplane may be a substrate without components.

[0038] In one embodiment, one or more pads may be disposed on the backplate for engagement. In one case, the pads on the backplate or on the microdevice may generate a pull-out force on the selected microdevice.

[0039] In another embodiment, after the microdevice is transferred to the backplane, it is possible to detect the location / position of the microdevice and adjust the patterning of other layers to match the transfer misalignment. In one case, different methods can be used to detect the position of the microdevice (e.g., a camera, probe tip, etc.). In another case, the offset of the transfer setup can be used to identify the misalignment of the microdevice on the system substrate. In yet another case, color filters or color conversions can also be adjusted based on the position of the microdevice. In one case, some random offsets can be induced in the microdevice position to reduce optical artifacts.

[0040] In one embodiment, the pattern associated with the microdevice can be modified (e.g., electrodes that couple the microdevice to a signal, functionally tunable layers (e.g., color conversion or color filters), vias opened in passivation / planarization layers, backplane layers, etc.).

[0041] In one scenario, the position / shape of the electrodes can be modified based on the position of the microdevice. In another scenario, there may be extensions of each electrode, the position or length of which can be modified based on the position of the microdevice.

[0042] Various embodiments of the provided structures and methods of the present invention are described in detail below.

[0043] See Figure 1AA microdevice substrate 102 is provided. A microdevice array 104 can be developed on the microdevice substrate 102. In one case, the microdevice may be a miniature light-emitting device. In another case, the microdevice may be any microdevice that can be typically manufactured in planar batches, including (but not limited to) LEDs, OLEDs, sensors, solid-state devices, integrated circuits, MEMS and / or other electronic components.

[0044] In one embodiment, one or more planar active layers may be formed on a substrate. The planar active layers may include a first bottom conductive layer, a functional layer (e.g., light-emitting layer), and a second top conductive layer. The microdevice can be developed by etching the planar active layers. In one embodiment, etching may proceed all the way to the microdevice substrate. In another embodiment, etching may be performed partially on the planar layers and leave some etching on the surface of the microdevice substrate. Other layers may be deposited and patterned before or after the formation of the microdevice.

[0045] See Figure 1B A buffer layer 106 may be formed on a microdevice substrate 102. The buffer layer 106 may extend above the surface of the microdevice substrate 102. The buffer layer may be conductive. The buffer layer 106 may include electrodes that can be patterned or used as common electrodes. The buffer layer may be patterned to create openings to the microdevice 104. The openings may provide access to the microdevice 104 for forming anchors.

[0046] See Figure 1C A planarization layer 108 may be deposited on top of the microdevice substrate 102 surrounding each microdevice 104 for separation and / or protection. The planarization layer may be cured. In one case, the planarization layer may be cured by temperature, light, or some other source. The planarization layer may include a polymer. In one case, polyamide, SU8, or BCB may be used as the polymer.

[0047] See Figure 1D In one embodiment, bonding layer 112 may be formed on planarization layer 108. Bonding layer 112 may be the same as or different from planarization layer. In another embodiment, bonding layer may be formed on top of intermediate substrate (cassette) 110. Bonding layer may be provided with one or more different forces, such as electrostatic, chemical, physical, thermal, etc. Bonding layer 112 may be in contact with planarization layer 108, and after contact with planarization layer, it may be cured by pressure, temperature, light or other sources.

[0048] In one embodiment, the microdevice substrate 102 can be removed after the intermediate substrate 110 is formed over the bonding layer. The microdevice substrate can be removed by laser or chemical stripping.

[0049] In one embodiment, an opening may be present in the buffer layer 106, allowing the microdevice 104 to connect to the planarization layer 108. This connection can act as an anchor. In another embodiment, the buffer layer may be etched to form a housing, base, or anchor that at least partially surrounds each microdevice. After stripping, the anchor can secure the microdevice to the substrate. In yet another embodiment, the buffer layer can couple at least one of the microdevice pads to an electrode. The electrode can be placed on top of or on the bottom of the planarization layer.

[0050] See Figure 1E The microdevice substrate can be removed to enable a flexible system or to perform post-processing steps on the substrate-facing side of the system. After substrate removal, additional processes can be performed. These processes include one of the following: removal of additional common layers, thinning of planarization layers, and / or microdevices. In one case, one or more pads 120 can be added to the microdevice 104. In one case, these pads are conductive. In another case, these pads may be used solely for bonding to the system substrate. In one case, the buffer layer 106 is conductive.

[0051] In one embodiment, buffer layer 106 can connect one or more microdevices to a test pad. The test pad can be used to bias the microdevices and test their functionality. In one case, testing can be performed at the wafer / substrate level. In another case, testing can be performed at the intermediate (cassette) level. The pad can be accessed at the intermediate (cassette) level after removing excess layers.

[0052] In one case, if the microdevice has more than one contact on the top side, the buffer layer can be patterned to connect at least one contact of the microdevice to the test pad.

[0053] See Figure 2 A backplane 230 can be provided. In one case, the backplane can be fabricated using thin-film transistor (TFT) technology. In another case, the backplane can be made from a chiplet manufactured using CMOS or other processes.

[0054] In one embodiment, the backplane may have transistors and other components for driving microdevices via pixel circuitry. In another embodiment, the backplane may be a substrate without components. One or more pads 222 may be formed on the backplane 230 for bonding the backplane to the microdevice array. In one case, one or more pads on the backplane may be conductive.

[0055] In one embodiment, the buffer layer 206 may be removed or deformed to release the microdevice. Pads 222 on the backplate or pads 220 on the microdevice may generate a pull-out force on the selected microdevice 240. In another embodiment, the buffer layer 206 or housing may be etched back, shrunk, or removed. The housing may be removed from the empty LED dot.

[0056] See Figure 3A After the microdevice is transferred to the backplane, its position on the backplane can be detected, and if misalignment occurs during the transfer, the patterning of other layers can be adjusted to match the misalignment. The process includes step 300-1, which places the microdevice on the system substrate. In step 300-2, the position of the microdevice on the system substrate is retrieved. The microdevice position can be retrieved using a camera, surface profilometer (optical, ultrasonic, electrical, etc.), or other methods. In step 300-3, the pattern associated with the microdevice can be modified. The pattern may include one of the following: electrodes coupling the microdevice to signals, functionally tunable layers (e.g., color conversion or color filters), vias opened in passivation / planarization layers, backplane layers, etc. Reference structures or reference objects may exist on the system substrate to initially calibrate the tools used to retrieve the microdevice position.

[0057] In one embodiment, the position of the microdevice can be detected using different methods. For example, cameras, probe tips, and surface profilometers (optical, ultrasonic, electrical, etc.) or other methods can be used to detect / retrieve the position of the microdevice. In another embodiment, offset in the transfer setup can be used to identify misalignment of the microdevice on the system substrate / backplane.

[0058] For example, in one case, metallization patterning can be used to avoid short circuits or open circuits. In another case, color filters or color conversions can be adjusted based on the location of the microdevice. This reduces the tolerance required for placing the microdevice. Random offsets can also be induced in the location of the microdevice to reduce optical artifacts.

[0059] Figure 3B This illustration demonstrates modifications to the position / shape of electrodes based on the location of microdevices according to an embodiment of the invention. One or more microdevices 310, 312, or 314 may include contact pads 306. In one case, the position / shape of the electrodes (302, 304) may be modified based on the position of the microdevices (310, 312, 314). In another case, the position / shape of the electrodes may be modified based on the location of vias. In yet another case, the location of vias in the planarization / passivation layer may be modified according to the microdevice location.

[0060] Figure 3C An extension portion of an electrode is shown according to an embodiment of the invention. In one case, the position of electrode 302 may be modified. Furthermore, some extension portions 320 of each electrode may exist, the position or length of which may be modified based on the position of the microdevice (310, 312, or 314). These may be used for a common electrode or individual electrodes.

[0061] Figure 4AA cross-sectional view of a system substrate and a cartridge substrate according to another embodiment of the present invention is shown. Herein, the system substrate 402 includes a surface profile 404 having a height difference 406 compared to a location 408 where a second microdevice will be integrated. The surface profile 404 may be a first microdevice integrated onto the surface of the system substrate 402. A cartridge substrate 410 (or carrier substrate) is present having a plurality of second microdevices 412. The second microdevices 412 may have a height 414 and a width 416. The second microdevices 412 on the cartridge substrate 410 are partially or completely surrounded by a housing 418 having a height 420. There is at least one spacing 422 wider than the width of the surface profile 404 between two second microdevices 412 on the cartridge substrate 410.

[0062] In one case, the width of the second microdevice 412 is wider than the width of the first microdevice 404. Therefore, when the second microdevice is removed from the housing substrate 410 to create a gap, the gap 422 is wider than the first microdevice 404. This width difference can be greater than the width of the first device and the misalignment in the transferred microdevice. Therefore, when the second microdevice 412 is integrated from the housing substrate 410 into the system substrate 402, there is no interference between the first microdevices 404, which are already within the second microdevice in the receiving substrate or housing substrate.

[0063] In another embodiment, the height 414 of the second microdevice is higher than that of the first microdevice. The height difference may be greater than the sum of the height 406 of the first microdevice 404 and the height 420 of the housing 418 minus the height difference between the stagings 408 and 408-2 of the first and second microdevices.

[0064] See Figure 5A A microdevice substrate 502 is provided. A microdevice array 504 can be developed on the microdevice substrate 502. In one embodiment, the microdevice may be a miniature light-emitting device. In another embodiment, the microdevice may be any microdevice that can typically be manufactured in planar batches, including (but not limited to) LEDs, OLEDs, sensors, solid-state devices, integrated circuits, MEMS, and / or other electronic components.

[0065] In one embodiment, one or more planar active layers may be formed on a substrate. The planar active layers may include a first bottom conductive layer, a functional layer (e.g., light-emitting layer), and a second top conductive layer. The microdevice can be developed by etching the planar active layers. In one embodiment, etching may proceed all the way to the microdevice substrate. In another embodiment, etching may be performed partially on the planar layers and leave some etching on the surface of the microdevice substrate. Other layers may be deposited and patterned before or after the formation of the microdevice.

[0066] See Figure 5BA buffer layer 506 may be formed on a microdevice substrate 502. Buffer layer 506-A may extend above the surface of the microdevice substrate 502. The buffer layer may be conductive. Buffer layer 506-A may contain electrodes that can be patterned or used as common electrodes. The buffer layer may be patterned to create openings to the microdevice 504. The openings provide pathways to the microdevice 504 for forming anchors. In this case, a protective layer 506-B is deposited on top of the buffer layer. Another passivation layer may exist between the buffer layer 506-A and the microdevice layer. The protective layer 506-B may be patterned to create more anchors.

[0067] See Figure 5C A planarization layer 508 may be deposited on top of the microdevice substrate 502 surrounding each microdevice 504 for separation and / or protection. The planarization layer may be cured. In one case, the planarization layer may be cured by temperature, light, or some other source. The planarization layer may include a polymer. In one case, polyamide, SU8, or BCB may be used as the polymer.

[0068] See Figure 5D In one embodiment, bonding layer 512 may be formed on planarization layer 508. Bonding layer 512 may be the same as or different from planarization layer. In another embodiment, bonding layer may be formed on top of intermediate substrate (cassette) 510. Bonding layer may be provided with one or more different forces, such as electrostatic, chemical, physical, thermal, etc. Bonding layer 512 may be in contact with planarization layer 508, and after contact with planarization layer, it may be cured by pressure, temperature, light or other sources.

[0069] In one embodiment, after the intermediate substrate 510 is formed over the bonding layer, the microdevice substrate 502 can be removed. The microdevice substrate can be removed by laser or chemical lift-off.

[0070] In one embodiment, an opening may be present in the buffer layer 506-A, allowing the microdevice 504 to connect to the planarization layer 508 or to the protective layer 506-B. This connection can act as an anchor. In another embodiment, the buffer layer may be etched to form a housing, base, or anchor that at least partially surrounds each microdevice. After stripping, the anchor can secure the microdevice to the substrate. In yet another embodiment, the buffer layer may couple at least one microdevice pad to an electrode. The electrode may be placed on top of or on the bottom of the planarization layer.

[0071] See Figure 5EThe microdevice substrate can be removed to enable a flexible system or to perform post-processing steps on the substrate-facing side of the system. After substrate removal, additional processes can be performed. These processes include one of the following: removal of additional common layers, thinning of planarization layers, and / or microdevices. In one case, one or more pads 520 can be added to the microdevice 504. In one case, these pads are conductive. In another case, these pads may be used solely for bonding to the system substrate. In one case, the buffer layer 506-A is conductive.

[0072] In one embodiment, buffer layer 506-A or protective layer 506-B can connect one or more microdevices to the test pad. The test pad can be used to bias the microdevice and test its functionality. In one case, testing can be performed at the wafer / substrate level. In another case, testing can be performed at the intermediate (cassette) level. The pad can be accessed at the intermediate (cassette) level after removing excess layers.

[0073] In one case, if the microdevice has more than one contact on the top side, the buffer layer can be patterned to connect at least one contact of the microdevice to the test pad.

[0074] See Figure 5F A backplane 530 can be provided. In one case, the backplane can be fabricated using thin-film transistor (TFT) technology. In another case, the backplane can be made from a chiplet manufactured using CMOS or other processes.

[0075] In one embodiment, the backplane may have transistors and other components for driving microdevices via pixel circuitry. In another embodiment, the backplane may be a substrate without components. One or more pads 522 may be formed on the backplane 530 for bonding the backplane to the microdevice array. In one case, one or more pads on the backplane may be conductive.

[0076] In one embodiment, the buffer layer 506-A may be removed or deformed to release the microdevice. Pads 522 on the backplate or pads 520 on the microdevice may generate a pull-out force on the selected microdevice 540. In another embodiment, the buffer layer 506-A or the housing may be etched back, shrunk, or removed. The housing may be removed from the empty LED dot.

[0077] According to one embodiment, a method for integrating microdevices onto a backplane may be provided, comprising: providing a microdevice substrate including one or more microdevices; bonding a selective set of microdevices from the substrate to the backplane by connecting pads on the microdevices and corresponding pads on the backplane; and retaining the bonded selective set of microdevices on the backplane by separating the microdevice substrate.

[0078] According to another embodiment, the method may further include: forming a buffer layer on or above one or more microdevices extending over a substrate; forming a planarization layer on the buffer layer; depositing a bonding layer between the planarization layer and an intermediate substrate; curing the bonding layer after contact with the planarization layer; and removing the microdevice substrate by one of the following: laser or chemical stripping.

[0079] According to some embodiments, the bonding layer is cured by one of pressure, temperature or light.

[0080] According to another embodiment, the method may further include forming a pad on the microdevice via a buffer layer after removing the microdevice substrate, and providing a corresponding pad on a backplane, wherein the pad on the microdevice and the corresponding pad on the backplane are conductive.

[0081] According to another embodiment, bonding a selective assembly of microdevices from a substrate to a backplane includes the following steps: aligning and contacting the microdevices and the backplane; removing a buffer layer to release the microdevices; generating a force to pull out the selected assembly of microdevices; and bonding the selected assembly of microdevices to the backplane.

[0082] According to some embodiments, the planarization layer may include a polymer, wherein the polymer is a polyamide, SU8, or BCB.

[0083] According to other embodiments, the method may further include providing openings in the buffer layer to allow microdevices to connect to the planarization layer. The buffer layer is conductive, wherein the buffer layer connects at least one microdevice to the test pad.

[0084] According to other embodiments, the method may further include providing an electrode on top or bottom of a planarization layer; coupling at least one microdevice to the electrode via a buffer layer; retrieving the position of the microdevice on a backplane; extending the position of the electrode to retrieve the position of the microdevice on the backplane, wherein the position of the microdevice is retrieved by one of: a camera, a probe tip, or a surface profilometer.

[0085] When specific embodiments and applications of the invention have been described and illustrated, it should be understood that the invention is not limited to the precise constructions and compositions disclosed herein, and various modifications, variations and alterations may be apparent from the foregoing description without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A method for releasing a microdevice from a microdevice integration array on a system substrate, the method comprising: A buffer layer is formed on the substrate, the buffer layer extending above the surface of the substrate; A planarization layer is deposited on top of the substrate, such that the planarization layer can be cured, wherein a bonding layer is formed on or on the planarization layer; Remove the buffer layer from the integrated array to release the microdevice from the array. The integrated array of microdevices on the substrate includes a planar active layer on the substrate, the planar active layer including a first bottom conductive layer, a functional layer and a second top conductive layer.

2. The method of claim 1, wherein the test pad on the backplate or microdevice generates a force that pulls the microdevice out.

3. The method of claim 2, wherein the backplane is made of a TFT.

4. The method of claim 1, wherein the microdevice is developed by etching the planar active layer using other layers deposited before or after the formation of the microdevice.

5. The method according to claim 1, wherein the buffer layer is conductive.

6. The method of claim 1, wherein the buffer layer comprises a patternable or common electrode.

7. The method of claim 1, wherein the planarization layer comprises a polymer.

8. The method of claim 1, wherein the bonding layer provides one or more different forces and cures it after it comes into contact with the planarization layer.

9. The method of claim 1, wherein after an intermediate substrate is formed over the bonding layer, the system substrate is removed by laser or chemical stripping.

10. The method of claim 9, wherein connecting the microdevice to an opening in the buffer layer of the planarization layer or protective layer allows the connection to function as an anchor, and the anchor secures the microdevice after the chemical stripping.

11. A method for integrating a microdevice onto a backplane, comprising: Provide a microdevice substrate comprising one or more microdevices; The microdevice substrate includes a planar active layer on the substrate, the planar active layer including a first bottom conductive layer, a functional layer and a second top conductive layer; A buffer layer is formed on or above the one or more microdevices extending above the substrate; A planarization layer is formed on the buffer layer; and A bonding layer is deposited between the planarization layer and the intermediate substrate; Remove the substrate of the microdevice; and The microdevices are selectively assembled and bonded to the backplate by connecting the pads on the microdevices to the corresponding pads on the backplate.

12. The method of claim 11, further comprising curing the bonding layer after it comes into contact with the planarization layer.

13. The method of claim 12, wherein the bonding layer is cured by one of pressure, temperature or light.

14. The method of claim 11, further comprising removing the microdevice substrate by one of laser or chemical stripping.

15. The method of claim 11, further comprising forming the pad on the microdevice via the buffer layer after removing the microdevice substrate.

16. The method of claim 11, further comprising providing the respective pad on the back plate.

17. The method of claim 11, wherein the pads on the microdevice and the corresponding pads on the backplate are conductive.

18. The method of claim 11, wherein attaching the selective collection of the microdevices to the backplane comprises the following steps: Align and contact the microdevice with the backplate; remove the buffer layer to release the microdevice; and Generates a force that pulls out the selected assembly of microdevices; The selected microdevice assembly is then attached to the backplate.

19. The method of claim 11, wherein the planarization layer comprises a polymer.

20. The method of claim 19, wherein the polymer is polyamide, SU8, or BCB.

21. The method of claim 11, further comprising providing an opening in the buffer layer to allow the microdevice to connect to the planarization layer.

22. The method of claim 11, wherein the buffer layer is conductive.

23. The method of claim 11, wherein the buffer layer connects at least one microdevice to the test pad.

24. The method of claim 11, further comprising providing electrodes on the top or bottom of the planarization layer.

25. The method of claim 24, further comprising coupling at least one microdevice to the electrode via the buffer layer.

26. The method of claim 11, further comprising retrieving the location of the microdevice on the backplane.

27. The method of claim 24, further comprising extending the position of the electrode to retrieve the position of the microdevice on the backplane.

28. The method of claim 11, wherein the location of the microdevice is retrieved by one of a camera, a probe tip, or a surface profilometer.

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