Magnetic storage device and method for manufacturing the same

Abstract

The embodiment provides a magnetic storage device with high reliability. The magnetic storage device of the embodiment includes: a stacked body, a first nitride on a side of the stacked body, a first layer on a side of the first nitride, a second layer on a side of the first layer, a first electrode on the stacked body, and a second nitride on a side of the second layer. The stacked body includes: a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer. The second layer is in contact with the first layer above the upper surface of the first layer.

Description

[0001] This application claims the priority of Japanese Patent Application No. 2020-048781 (filing date: March 19, 2020) as a basic application, and the present application incorporates the entire contents of the basic application by reference. Technical Field

[0002] Embodiments generally relate to magnetic storage devices. Background Art

[0003] A magnetic storage device using a magnetoresistive element is known. Summary of the invention

[0004] An object of the present invention is to provide a magnetic storage device with high reliability.

[0005] The magnetic storage device of the embodiment includes: a stacked body, a first nitride on a side surface of the stacked body, a first layer on a side surface of the first nitride, a second layer on a side surface of the first layer, a first electrode on the stacked body, and a second nitride on a side surface of the second layer. The stacked body includes: a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer. The second layer is in contact with the first layer above the upper surface of the first layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 1 is a functional block diagram showing the magnetic storage device according to the first embodiment.

[0007] Figure 2 This is a circuit diagram of one memory cell according to the first embodiment.

[0008] Figure 3 A cross-sectional structure of a portion of the memory cell according to the first embodiment is shown.

[0009] Figures 4 to 12 One stage of the manufacturing process of a part of the structure of the memory cell according to the first embodiment is sequentially shown.

[0010] Description of symbols

[0011] 1…magnetic storage device, 2…memory controller, 11…memory cell array, 12…input / output circuit, 13…control circuit, 14…row selection circuit, 15…column selection circuit, 16…write circuit, 17…read circuit, MC…memory cell, WL…word line, BL…bit line, / BL…bit line, VR…magnetoresistance element, ST…select transistor, 21…interlayer insulator, 22…lower electrode, 23…buffer layer, 24…base layer, 25…ferromagnetic material, 26…insulator, 27…ferromagnetic material, 28…cap layer, 29…hard mask, 30…upper electrode, 31…insulating layer, 32…nitrogen barrier layer, 33…protective layer, 35…cap nitride layer, 37…interlayer insulator. DETAILED DESCRIPTION

[0012] The following describes the embodiments with reference to the accompanying drawings. In the following description, components having substantially the same function and structure are marked with the same reference numerals, and repeated descriptions are sometimes omitted. The accompanying drawings are schematic, and the relationship between thickness and plane size, the ratio of thickness of each layer, etc. may be different from the actual.

[0013] Unless explicitly or obviously excluded, all descriptions of certain embodiments also apply to the descriptions of other embodiments. Each embodiment exemplifies a device or method for concretizing the technical idea of ​​the embodiment, and the technical idea of ​​the embodiment does not determine the material, shape, structure, configuration, etc. of the constituent components as the following content.

[0014] In the present specification and claims, a first element “connected to” another second element includes the first element being connected to the second element directly or via an element that is always or selectively conductive.

[0015] Hereinafter, the embodiment is described using an xyz orthogonal coordinate system. In the following description, the description "lower" and its derivatives and associated words refer to the position of a smaller coordinate on the z-axis, and the description "upper" and its derivatives and associated words refer to the position of a larger coordinate on the z-axis.

[0016] <First Embodiment>

[0017] <1.1. Structure>

[0018] Figure 1 FIG. 2 is a functional block diagram of a magnetic storage device according to the first embodiment. Figure 1 As shown, the magnetic storage device 1 includes a storage cell array 11 , an input / output circuit 12 , a control circuit 13 , a row selection circuit 14 , a column selection circuit 15 , a write circuit 16 and a read circuit 17 .

[0019] The memory cell array 11 includes a plurality of memory cells MC, a plurality of word lines WL, and a plurality of bit lines BL and / BL. One bit line BL and one bit line / BL constitute one bit line pair.

[0020] The memory cell MC can store data in a non-volatile manner. Each memory cell MC is connected to one word line WL and one bit line pair BL and / BL. The word line WL is associated with a row. The bit line pair BL and / BL are associated with a column. One or more memory cells MC are determined by selecting one row and one or more columns.

[0021] The input / output circuit 12 receives various control signals CNT, various commands CMD, address signals ADD, and data (write data) DAT from the memory controller 2 , and transmits data (read data) DAT to the memory controller 2 .

[0022] The row selection circuit 14 receives the address signal ADD from the input / output circuit 12 and selects one word line WL associated with the row specified by the received address signal ADD.

[0023] The column selection circuit 15 receives the address signal ADD from the input / output circuit 12 and causes a plurality of bit lines BL associated with one or more columns specified by the received address signal ADD to be in a selected state.

[0024] The control circuit 13 receives a control signal CNT and a command CMD from the input / output circuit 12. The control circuit 13 controls the write circuit 16 and the read circuit 17 based on the control indicated by the control signal CNT and the command CMD. Specifically, the control circuit 13 supplies a voltage used in data writing to the write circuit 16 during the period when data is written to the memory cell array 11. In addition, the control circuit 13 supplies a voltage used in data reading to the read circuit 17 during the period when data is read from the memory cell array 11.

[0025] The write circuit 16 receives write data DAT from the input / output circuit 12 , and supplies a voltage used for data write to the column selection circuit 15 based on the control of the control circuit 13 and the write data DAT.

[0026] The read circuit 17 includes a sense amplifier, and estimates the data held in the memory cell MC using a voltage used for data reading based on the control of the control circuit 13. The estimated data is supplied to the input / output circuit 12 as read data DAT.

[0027] Figure 2This is a circuit diagram of a memory cell MC of the first embodiment. The memory cell MC includes a magnetoresistance element VR and a selection transistor ST. The magnetoresistance element VR exhibits a magnetoresistance effect, and includes, for example, an MTJ (magnetic tunnel junction) element. The MTJ element refers to a structure including an MTJ. The magnetoresistance element VR is in a selected one of two resistance states in a stable state, and the resistance of one of the two resistance states is higher than the resistance of the other. The magnetoresistance element VR can switch between a low resistance state and a high resistance state, and can use the difference between the two resistance states to maintain 1 bit of data.

[0028] The selection transistor ST is, for example, an n-type MOSFET (metal oxide semiconductor field effect transistor).

[0029] The magnetoresistive element VR is connected to a bit line BL at a first end and to a first end (source or drain) of a selection transistor ST at a second end. The second end (drain or source) of the selection transistor ST is connected to the bit line / BL. The gate of the selection transistor ST is connected to a word line WL, and the source is connected to the bit line / BL.

[0030] <1.2. Structure>

[0031] Figure 3 The cross-sectional structure of a part of the memory cell MC according to the first embodiment is shown, and in particular, the cross-sectional structure of the magnetoresistive element VR and its surrounding elements is shown.

[0032] like Figure 3 As shown, the memory cell MC includes a magnetoresistive element VR, and the magnetoresistive element VR includes at least a ferromagnetic body (ferromagnetic layer) 25, an insulator (insulating layer) 26, and a ferromagnetic body (ferromagnetic layer) 27. The memory cell MC may include other layers, Figure 3 The following description relates to an example in which the memory cell includes a lower electrode 22, a buffer layer 23, a base layer 24, a cap layer 28, a hard mask 29, and an upper electrode 30. The memory cell MC may also include additional layers, and on this basis (or), each layer may also be composed of multiple sub-layers.

[0033] The lower electrode 22 is located in the interlayer insulator 21 above the semiconductor substrate (not shown) and is connected to the selection transistor ST (not shown) at the bottom. The lower electrode 22 includes one or more of copper (Cu), scandium (Sc), titanium (Ti), zirconium (Zr), hafnium (Hf), tantalum (Ta) and tungsten (W).

[0034] The upper surface of the lower electrode 22 is electrically connected to the ferromagnetic body 25. Based on the present example, the lower electrode 22 is electrically connected to the ferromagnetic body 25 via the buffer layer 23 and the base layer 24. The buffer layer 23 is provided on the upper surface of the lower electrode 22, the base layer 24 is provided on the upper surface of the buffer layer 23, and the ferromagnetic body 25 is provided on the upper surface of the base layer 24.

[0035] The buffer layer 23 is a conductive layer, such as a metal layer, and includes at least one of aluminum (Al), beryllium (Be), magnesium (Mg), calcium (Ca), hafnium (Hf), strontium (Sr), barium (Ba), scandium (Sc), yttrium (Y), lanthanum (La), and zirconium (Zr). In addition, the buffer layer 23 may also include at least one of compounds such as HfB, MgAlB, HfAlB, ScAlB, ScHfB, and HfMgB.

[0036] The base layer 24 is a conductive layer, and can include at least one of compounds such as HfB, MgAlB, HfAlB, ScAlB, ScHfB, and HfMgB.

[0037] The ferromagnetic material 25 may have a structure including only one layer of ferromagnetic material, or may have a structure including a plurality of ferromagnetic materials and one or more conductors stacked together. The ferromagnetic material 25 may include, for example, CoFeB, MgFeO, or a stack of these materials. The ferromagnetic material 25 may have an easy magnetization axis along a direction that passes through the interface of the ferromagnetic material 25, the insulator 26, and the ferromagnetic material 27, for example, an easy magnetization axis along a direction orthogonal to the interface. The magnetization direction of the ferromagnetic material 25 is variable according to the writing of data into the memory cell MC, and the ferromagnetic material 25 may function as a so-called storage layer.

[0038] The insulator 26 includes, for example, MgO or AlO, or is composed of MgO or AlO. The insulator 26 can function as a tunnel barrier.

[0039] The ferromagnetic material 27 may have a structure including only one layer of ferromagnetic material, or may have a structure formed by stacking a plurality of ferromagnetic materials and one or more conductors. The ferromagnetic material 27 may include, for example, an artificial lattice formed by stacking TbCoFe, Co and Pt with perpendicular magnetic anisotropy, an FePt alloy ordered into an L10 type, and the like. The ferromagnetic material 27 has an easy magnetization axis along the direction of the interface penetrating the ferromagnetic material 25, the insulator 26 and the ferromagnetic material 27, for example, an easy magnetization axis along the direction orthogonal to the interface. The magnetization direction of the ferromagnetic material 27 is intended to remain unchanged even when data is read from the storage cell MC and data is written to the storage cell MC. The ferromagnetic material 27 can function as a so-called reference layer.

[0040] If the magnetization direction of the ferromagnetic body 25 is parallel to the magnetization direction of the ferromagnetic body 27, the magnetoresistive element VR is in a state with lower resistance. If the magnetization direction of the ferromagnetic body 25 is antiparallel to the magnetization direction of the ferromagnetic body 27, the magnetoresistive element VR is in a state with higher resistance.

[0041] For data reading, for example, using a read current flowing in the memory cell MC to be read, it is determined whether the magnetoresistive element VR of the memory cell MC to be read is in one of two resistance states.

[0042] If a certain magnitude of write current IW flows from the ferromagnetic material 25 to the ferromagnetic material 27 P , the magnetization direction of the ferromagnetic body 25 is parallel to the magnetization direction of the ferromagnetic body 27. On the other hand, if the write current IW flows from the ferromagnetic body 27 to the ferromagnetic body 25 AP , the magnetization direction of the ferromagnetic body 25 is antiparallel to the magnetization direction of the ferromagnetic body 27.

[0043] The ferromagnetic body 27 is electrically connected to the bottom surface of the upper electrode 30. In the present example, the ferromagnetic body 27 is electrically connected to the upper electrode 30 via the cap layer 28 and the hard mask 29. The cap layer 28 is provided on the upper surface of the ferromagnetic body 27, and the hard mask 29 is provided on the upper surface of the cap layer 28.

[0044] The cap layer 28 is a conductive layer, for example, a metal layer, and includes at least one of Ta, Ru, Pt, and W. The hard mask 29 is, for example, a metal layer.

[0045] The upper electrode 30 is provided on the upper surface of the hard mask 29 .

[0046] Hereinafter, the group from the elements on the upper surface of the lower electrode 22 to the elements in contact with the bottom surface of the upper electrode 30, that is, in the present example, the group of the buffer layer 23, the base layer 24, the ferromagnetic material 25, the insulator 26, the ferromagnetic material 27, the cap layer 28 and the hard mask 29 is sometimes referred to as the stacked structure LS.

[0047] The side surface of the magnetoresistive element VR is covered by an insulating layer 31. The insulating layer 31 may cover the entire side surface of the stacked structure LS, and may also be in contact with a portion of the upper surface of the lower electrode 22 at its lower portion to cover the upper surface of the interlayer insulator 21. The drawings and the following description are based on this example. The insulating layer 31 includes, for example, nitride or oxide.

[0048] At least a portion of the side surface of the magnetoresistance effect element VR among the side surfaces of the insulating layer 31 is covered by a nitrogen barrier layer 32. The nitrogen barrier layer 32 may also cover a portion of the side surface of another layer among the side surfaces of the insulating layer 31. The nitrogen barrier layer 32, for example, covers a portion of the side surfaces of the buffer layer 23, the base layer 24, the ferromagnetic body 25, the insulator 26, the ferromagnetic body 27, and the cap layer 28 among the side surfaces of the insulating layer 31. The accompanying drawings and the following description are based on this example. The nitrogen barrier layer 32 is intended to suppress the influence of nitrogen generated, for example, in the manufacturing process of the memory cell MC described below. As a material for such a purpose, a material that is easily nitrided can be cited. Specifically, the nitrogen barrier layer 32, for example, contains one or more of Mg, Ti, Zr, niobium (Nb), Ta, Al, and gadolinium (Gd), and oxides of Mg, Ti, Zr, Nb, Ta, Al, or Gd. The nitrogen barrier layer 32 may also have a property of being easily formed continuously, that is, a property of not being easily interrupted.

[0049] A protective layer 33 is provided on the side surface of the nitrogen barrier layer 32. The protective layer 33 may cover the entire side surface of the nitrogen barrier layer 32, for example. In addition, the area of ​​the opening at the upper end of the protective layer 33 is narrower than the area of ​​the opening at the upper end of the nitrogen barrier layer 32. Therefore, the protective layer 33 protrudes to the inner side of the opening at the upper end of the nitrogen barrier layer 32 including the upper end, and covers the upper surface of the nitrogen barrier layer 32. Therefore, the nitrogen barrier layer 32 is not in contact with the upper electrode 30.

[0050] Figure 3 An example is shown in which the center on the xy plane of the upper electrode 30 coincides with the center on the xy plane of the stacked structure LS, but sometimes the center on the xy plane of the upper electrode 30 deviates greatly from the center on the xy plane of the stacked structure LS. In such a case, a portion of the upper surface of the hard mask 29 is located at a position higher than the upper surface of the protective layer 33, and the inner surface of the protective layer 33 is in contact with the side surface of the hard mask 29. The protective layer 33 contains a material having an etching rate different from the etching rate of the cap nitride layer 35 and the interlayer insulator 37 described later for a certain etching, or is composed of such a material. The protective layer 33 is, for example, a metal layer, for example, containing at least one of Ta, Ru, Pt and W.

[0051] The side surfaces of the protective layer 33 , the lower portion of the side surfaces of the upper electrode 30 , and the portion of the insulating layer 31 that is not covered by the nitrogen barrier layer 32 are covered by the cap nitride layer 35 .

[0052] Portions of the surface of the protective layer 33 and the side surfaces of the upper electrode 30 that are not covered by the cap nitride layer 35 are covered by the interlayer insulator 37 .

[0053] <1.3. Manufacturing method>

[0054] Figures 4 to 8The manufacturing process of a part of the structure of the memory cell MC according to the first embodiment is shown in sequence. Figure 3 Same parts.

[0055] like Figure 4 As shown in FIG. 1 , the lower electrode 22 is formed in the interlayer insulator 21. Next, the buffer layer 23A, the base layer 24A, the ferromagnetic body 25A, the insulator 26A, the ferromagnetic body 27A, and the cap layer 28A are sequentially stacked on the upper surface of the interlayer insulator 21 and the upper surface of the lower electrode 22. The buffer layer 23A, the base layer 24A, the ferromagnetic body 25A, the insulator 26A, the ferromagnetic body 27A, and the cap layer 28A are elements that are later formed into the buffer layer 23, the base layer 24, the ferromagnetic body 25, the insulator 26, the ferromagnetic body 27, and the cap layer 28, respectively.

[0056] Next, a hard mask 29A is formed on the upper surface of the cap layer 28A. The hard mask 29A is an element whose shape is later changed to the hard mask 29. The hard mask 29A remains above a region where the stacked structure LS is to be formed, and has openings in other regions.

[0057] like Figure 5 As shown, by etching using the hard mask 29A as a mask, the buffer layer 23A, the base layer 24A, the ferromagnetic body 25A, the insulator 26A, the ferromagnetic body 27A, and the cap layer 28A are partially removed. As a result, the buffer layer 23, the base layer 24, the ferromagnetic body 25, the insulator 26, the ferromagnetic body 27, and the cap layer 28 are formed. Etching can be performed, for example, by IBE (ion beam etching). By etching, the upper surface of the hard mask 29A is removed to form a hard mask 29B. In addition, by etching, the upper surface of the lower electrode 22 and the upper surface of the interlayer insulator 21, the portion directly below the opening of the hard mask 29A, are lowered a little.

[0058] like Figure 6 As shown in FIG. 1 , an insulating layer 31A is formed on the entire upper surface of the structure obtained by the steps so far. The insulating layer 31A is an element formed into the insulating layer 31 later. The insulating layer 31A covers the side surfaces of the buffer layer 23, the base layer 24, the ferromagnetic body 25, the insulator 26, the ferromagnetic body 27 and the cap layer 28, the surface of the hard mask 29B, the exposed portion of the upper surface of the lower electrode 22, and the upper surface of the interlayer insulator 21.

[0059] like Figure 7 As shown, a nitrogen barrier layer 32A is formed on the entire upper surface of the structure obtained through the steps so far. The nitrogen barrier layer 32A is an element to be formed later as the nitrogen barrier layer 32. The surface of the insulating layer 31A is covered with the nitrogen barrier layer 32A.

[0060] like Figure 8 As shown, the first IBE is performed on the structure obtained by the steps so far. The angle of the ion beam used in the first IBE relative to the z-axis is small, for example, a size of not less than 10° and not more than 20°. By etching with the ion beam at such an angle, the nitrogen barrier layer 32A located on the outermost side is partially removed. For example, by the first IBE, the upper portion of the nitrogen barrier layer 32A (for example, the portion above the bottom surface of the hard mask 29B) is removed. In addition, the portion of the nitrogen barrier layer 32A above the interlayer insulator 21 is removed. By such partial removal of the nitrogen barrier layer 32A, the nitrogen barrier layer 32 is formed.

[0061] Furthermore, by partially removing the nitrogen barrier layer 32A, a portion of the insulating layer 31A, for example, a portion on the surface of the hard mask 29B is exposed. This exposed portion is also exposed to the IBE, and a portion of the insulating layer 31A on the upper surface of the hard mask 29B is removed, and the insulating layer 31A becomes the insulating layer 31.

[0062] like Fig. 9 As shown in FIG. 1 , a protective layer 33A is formed on the entire upper surface of the structure obtained through the steps so far. The protective layer 33A is an element formed later as the protective layer 33. The protective layer 33A covers the exposed portion (i.e., the upper surface) of the hard mask 29B, the entire surface of the nitrogen barrier layer 32, and the exposed portion (i.e., the portion above the interlayer insulator 21) of the insulating layer 31.

[0063] like Fig.10 As shown, a second IBE is performed on the structure obtained by the steps so far. The angle of the ion beam used in the second IBE relative to the z-axis is smaller than the angle in the first IBE, for example, a size of not less than 0° and not more than 10°. By etching with the ion beam at such an angle, the protective layer 33A located on the outermost side is partially removed. For example, by the second IBE, a portion of the protective layer 33A on the upper surface of the hard mask 29B is removed, and the upper surface of the hard mask 29B is exposed. By removing such a portion of the protective layer 33A, the protective layer 33 is formed. Moreover, by the second IBE, a portion of the protective layer 33A on the upper surface of the insulating layer 31, that is, a portion above the interlayer insulator 21, may also be removed.

[0064] like Fig.11 As shown in FIG. 1 , a cap nitride layer 35A is formed on the entire upper surface of the structure obtained through the steps so far. The cap nitride layer 35A is an element formed later as the cap nitride layer 35. The cap nitride layer 35A covers the protective layer 33, the exposed portion of the hard mask 29B (i.e., the upper surface), and the exposed portion of the insulating layer 31 (i.e., the portion above the interlayer insulator 21).

[0065] like Fig.12As shown, an interlayer insulator 37 is formed on the entire upper surface of the structure obtained by the steps so far. The interlayer insulator 37 covers the cap nitride layer 35A. Next, a hole 39 is formed in the interlayer insulator 37 in a predetermined region where the upper electrode 30 is to be formed by photolithography and anisotropic etching such as RIE (reactive ion etching). By this etching, the upper surface of the hard mask 29B is also partially removed, and the hard mask 29B becomes the hard mask 29. Fig.12 The protective layer 33 has an etching rate lower than that of the cap nitride layer 35, the interlayer insulator 37 and the hard mask 29. Therefore, the protective layer 33 is hardly etched. Fig.12 The upper end of the protective layer 33 is removed by etching, and the upper end of the protective layer 33 remains in the hole 39. In addition, as described above, the area of ​​the opening of the upper end of the protective layer 33 is narrower than the area of ​​the opening of the upper end of the nitrogen barrier layer 32. In addition, the protective layer 33 is in contact with the insulating layer 31 and (or) the hard mask 29 in the hole 39. Therefore, the nitrogen barrier layer 32 is not exposed in the hole 39.

[0066] Next, the surface of the hole 39 is wet-cleaned with a chemical solution. The chemical solution has a property of dissolving the nitrogen barrier layer 32. However, since the nitrogen barrier layer 32 is not in contact with the hole 39 through the protective layer 33, it is possible to suppress exposure to the chemical solution for wet cleaning performed after the RIE process for opening the hole 39.

[0067] like Figure 3 As shown in FIG. 1 , by providing a conductor in the hole 39, the upper electrode 30 is formed. As a result, Figure 3 The construction shown is complete.

[0068] <1.4. Advantages (Effects)>

[0069] According to the first embodiment, as described below, it is possible to provide the magnetic storage device 1 including the magnetoresistive element VR having high reliability.

[0070] First, a magnetic storage device for reference will be described. As with the magnetic storage device 1, by providing a nitrogen barrier layer 132 equivalent to the nitrogen barrier layer 32 in at least the portion facing the magnetoresistance effect element VR on the surface of the nitride layer 131 equivalent to the insulating layer 31, degradation of the magnetic properties of the magnetoresistance effect element VR is suppressed. This is considered to be caused by the fact that nitrogen from the cap nitride layer 135 equivalent to the cap nitride layer 35 affects the surroundings and the influence of such nitrogen is suppressed by the nitrogen barrier layer 132. In order to provide such a nitrogen barrier layer 132, a structure in which the nitrogen barrier layer 132 is provided on the surface of the nitride layer 131 and the cap nitride layer 135 is provided on the surface of the nitrogen barrier layer 132 can be considered. However, if such a structure is used, in comparison with the first embodiment, Fig.12In a state where a hole for the upper electrode is formed in a process corresponding to the above, the nitrogen barrier layer 132 is exposed in the hole. Therefore, the nitrogen barrier layer 132 may be dissolved by the chemical solution used for wet cleaning of the hole. If the dissolution spreads to the side of the side of the magnetoresistive effect element VR, the advantage of the nitrogen barrier layer 132 in suppressing the degradation of the magnetic characteristics of the magnetoresistive effect element VR cannot be obtained.

[0071] According to the magnetic storage device 1 of the first embodiment, a protective layer 33 is provided on the surface of the nitrogen barrier layer 32. The area of ​​the opening at the upper end of the protective layer 33 is narrower than the area of ​​the opening at the upper end of the nitrogen barrier layer 32, and the protective layer 33 is at least less soluble in the chemical solution for wet cleaning of the hole 39 for the upper electrode 30 than the nitrogen barrier layer 32. Therefore, during the wet cleaning of the hole 39, the nitrogen barrier layer 32 is not exposed in the hole 39, and can be protected from being exposed to the chemical solution for cleaning. Therefore, the nitrogen barrier layer 32 can be maintained on the side of the side of the magnetoresistive effect element VR, thereby realizing a magnetoresistive effect element VR having higher magnetic characteristics than a structure without the nitrogen barrier layer 32 such as a reference magnetic storage device.

[0072] <1.5. Modifications>

[0073] So far, the embodiment has been described using as an example a structure in which the ferromagnetic body 25 functioning as a so-called storage layer is located on the lower side of the insulator 26 and the ferromagnetic body 27 functioning as a so-called reference layer is located on the upper side of the insulator 26 in the magnetoresistive effect element VR. However, the first embodiment is not limited to this example. That is, the ferromagnetic body 27 may be located on the lower side of the insulator 26 and the ferromagnetic body 25 may be located on the upper side of the insulator 26.

[0074] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the scope of the subject matter of the invention. These embodiments and their variations are included in the scope and subject matter of the invention, and are also included in the invention described in the claims and their equivalents.

Claims

1. A magnetic storage device comprising: A laminate comprising a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer; a first nitride on a side surface of the stack; a first layer on a side of the first nitride; a second layer located on a side of the first layer and in contact with the first layer above an upper surface of the first layer; A first electrode on the stack; and a second nitride on a side of the second layer, The second layer has an opening above the stacked body, An upper end of the second layer is located inside the first electrode.

2. The magnetic storage device according to claim 1, The first layer surrounds the side surface of the stacked body and has a first opening of a first area at the upper end. The second layer surrounds the side surface of the stacked body and has a second opening of a second area at the upper end. The second area is smaller than the first area.

3. The magnetic storage device according to claim 1, The first layer includes one or more of magnesium, titanium, zirconium, niobium, tantalum, aluminum, gadolinium, and the following oxides, wherein the oxide is an oxide of magnesium, titanium, zirconium, niobium, tantalum, aluminum, or gadolinium.

4. The magnetic storage device according to claim 1, The second layer includes ruthenium.

5. A method for manufacturing a magnetic storage device, comprising the following steps: forming a laminate including a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer; forming a first nitride on a surface of the stack; forming a first layer on a surface of the first nitride; removing a portion of the first nitride on the upper surface of the stack and a portion of the first layer on the upper surface of the stack to expose the upper surface of the stack; forming a second layer on the surface of the first layer and on the upper surface of the stack; removing a portion of the second layer on the upper surface of the stacked body to expose a portion of the stacked body; forming a second nitride on the surface of the second layer and on the exposed portion of the stack; as well as removing a portion of the second nitride on the stacked body to partially expose the stacked body, The step of removing the portion of the second nitride on the stack includes a first etch, An etching rate of the second layer with respect to the first etching is lower than an etching rate of the second nitride with respect to the first etching.

6. The method for manufacturing a magnetic storage device according to claim 5, The step of forming the second layer includes the step of forming the second layer extending from the surface of the first layer to the upper surface of the first nitride.

7. The method for manufacturing a magnetic storage device according to claim 5, The step of exposing the portion of the stacked body includes the step of leaving a portion of the second layer extending from the surface of the first layer to the upper surface of the first nitride.

8. The method for manufacturing a magnetic storage device according to claim 5, The step of partially exposing the stacked body includes the step of partially removing the upper surface of the stacked body.

9. The method for manufacturing a magnetic storage device according to claim 5, The first layer includes one or more of magnesium, titanium, zirconium, niobium, tantalum, aluminum, gadolinium, and the following oxides, wherein the oxide is an oxide of magnesium, titanium, zirconium, niobium, tantalum, aluminum, or gadolinium.

10. The method for manufacturing a magnetic storage device according to claim 5, The second layer includes ruthenium.

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