Signal processing method and apparatus

Abstract

The embodiment of the application provides a signal processing method and device, relates to the field of communication, and the device can provide adjustable equivalent impedance at the input port of the 90-degree directional coupler by connecting a wideband impedance matching network to the isolation port of the 90-degree directional coupler, so that the backoff zone efficiency of the signal processing device is effectively improved.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the field of communication, and in particular to a signal processing method and device. BACKGROUND

[0002] At present, power amplifiers (PA) are mainly divided into two types, one is load modulation, and the other is bias modulation, wherein the load modulation technology includes two different circuit structures of Doherty and Outphasing.

[0003] The existing Outphasing system usually adopts a logic and information network compiler (LINC) synthesis network such as Figure 1 as shown, with reference to Figure 1 The Outphasing system includes a signal separator, two-way amplifiers and a synthesis network, wherein the synthesis network includes an isolation resistor and two-way λ / 4 transmission lines, the synthesis network adds an isolation resistor to avoid the mutual influence between the two-way PA, so as to obtain better linearity characteristics, but the efficiency of the backoff region needs to be sacrificed. SUMMARY

[0004] The present application provides a signal processing method and device, which can effectively improve the efficiency of the backoff region.

[0005] To achieve the above purpose, the present application adopts the following technical scheme:

[0006] In a first aspect, the embodiments of the present application provide a signal processing device, comprising an out-of-phase amplifier and a synthesis matching network; specifically, the out-of-phase amplifier comprises: a first power amplifier and a second power amplifier, wherein the first power amplifier is configured to amplify a first signal in response to the received first signal and output a first amplified signal; the second power amplifier is configured to amplify a second signal in response to the received second signal and output a second amplified signal; wherein the first amplified signal and the second amplified signal have the same frequency and a phase offset; the synthesis matching network comprises a 90° directional coupler and a wideband impedance matching network, wherein the 90° directional coupler comprises four terminals, which are a first input terminal, a second input terminal, a first output terminal and an isolation terminal. The first input terminal is connected to the first power amplifier, the second input terminal is connected to the second power amplifier, the first output terminal is a signal output terminal, and the isolation terminal is connected to the wideband impedance matching network. Specifically, the 90° directional coupler is configured to synthesize the first amplified signal received through the first input terminal and the second amplified signal received through the second input terminal to obtain a third amplified signal, and output the third amplified signal through the first output terminal; the wideband impedance matching network comprises at least one of a capacitive impedance and an inductive impedance, and the wideband impedance matching network is configured to provide an adjustable equivalent impedance between the first input terminal and the second input terminal of the 90° directional coupler.

[0007] Based on the above-mentioned manner, the wideband characteristics of the 90° directional coupler are utilized, the wideband impedance matching network is added to the isolation port of the 90° directional coupler, and an adjustable equivalent impedance can be provided at the input port, so that the backoff region efficiency can be effectively improved.

[0008] In a possible implementation, the wideband impedance matching network is configured to provide an equivalent impedance of a corresponding size during a frequency change of the third amplified signal.

[0009] Based on the above-mentioned manner, the impedance value of the required equivalent impedance can be obtained by adjusting the wideband impedance matching network.

[0010] In a possible implementation, the wideband impedance matching network comprises at least one capacitive impedance and at least one inductive impedance, and the at least one capacitive impedance and the at least one inductive impedance are connected in series and / or in parallel, wherein the impedance value of the equivalent impedance provided by the wideband impedance matching network at the first input terminal and the second input terminal changes within a predetermined range.

[0011] Based on the above manner, the wideband characteristic of the 90° directional coupler is utilized, an impedance matching network including inductive impedance and capacitive impedance is added at the isolation port of the 90° directional coupler, and the equivalent capacitive impedance and inductive impedance do not fluctuate with the frequency of the signal, so that the device can realize the wideband characteristic while improving the efficiency of the backoff zone.

[0012] In a possible implementation, the wideband impedance matching network is an N-order bandpass impedance matching network, where N is an integer greater than 2.

[0013] In a possible implementation, the wideband impedance matching network includes a first impedance matching network, a second impedance matching network and a third impedance matching network, the first impedance matching network is connected to the 90° directional coupler, the second impedance matching network is connected to the first impedance matching network, and the third impedance matching network is connected to the second impedance matching network; the first impedance matching network includes a capacitive impedance and an inductive impedance in parallel, the resonant frequency of the first impedance matching network is equal to the center frequency of the preset bandwidth; the second impedance matching network includes a capacitive impedance and an inductive impedance in series, the resonant frequency of the second impedance matching network is greater than the center frequency; and the third impedance matching network includes a capacitive impedance and an inductive impedance in parallel, the resonant frequency of the third impedance matching network is equal to any frequency within the preset bandwidth.

[0014] Based on the above manner, the impedance of the wideband impedance matching network can be adjusted based on the design rules of the present application, so that the equivalent impedance meets the wideband requirement.

[0015] In a possible implementation, the phase difference between the first amplified signal and the second amplified signal is 90°.

[0016] In a possible implementation, the relative bandwidth of the third amplified signal is greater than or equal to 70%.

[0017] Based on the above manner, the wideband characteristic of the present application can realize a relative bandwidth of at least 70%.

[0018] In a second aspect, the embodiments of the present application provide a signal processing method, which is applied to a signal processing device including an out-of-phase amplifier and a synthesis matching network. The method comprises: the out-of-phase amplifier amplifying a first signal in response to the received first signal and outputting a first amplified signal; and the out-of-phase amplifier amplifying a second signal in response to the received second signal and outputting a second amplified signal; wherein the first amplified signal and the second amplified signal have the same frequency and a phase offset; and the synthesis matching network synthesizes the first amplified signal and the second amplified signal in response to the first amplified signal received through a first input terminal and the second amplified signal received through a second input terminal, to obtain a third amplified signal and output the third amplified signal; wherein the synthesis matching network includes a 90° directional coupler and a wideband impedance matching network, the wideband impedance matching network includes at least one capacitive impedance and at least one inductive impedance, and the wideband impedance matching network provides adjustable equivalent impedance between the first input terminal and the second input terminal of the 90° directional coupler.

[0019] In a possible implementation, the wideband impedance matching network is configured to provide an equivalent impedance of a corresponding size during a frequency change of the third amplified signal.

[0020] In a possible implementation, the wideband impedance matching network includes at least one capacitive impedance and at least one inductive impedance, and the at least one capacitive impedance and the at least one inductive impedance are connected in series and / or in parallel; wherein the impedance value of the equivalent impedance provided by the wideband impedance matching network between the first input terminal and the second input terminal changes within a predetermined range.

[0021] In a possible implementation, the wideband impedance matching network is an N-order bandpass impedance matching network, and N is an integer greater than 2.

[0022] In a possible implementation, the wideband impedance matching network includes a first impedance matching network, a second impedance matching network, and a third impedance matching network, the first impedance matching network is connected to the 90° directional coupler, the second impedance matching network is connected to the first impedance matching network, and the third impedance matching network is connected to the second impedance matching network; wherein the first impedance matching network includes a capacitive impedance and an inductive impedance connected in parallel, the resonant frequency of the first impedance matching network is equal to the center frequency of the preset bandwidth; the second impedance matching network includes a capacitive impedance and an inductive impedance connected in series, the resonant frequency of the second impedance matching network is greater than the center frequency; and the third impedance matching network includes a capacitive impedance and an inductive impedance connected in parallel, the resonant frequency of the third impedance matching network is equal to any frequency within the preset bandwidth.

[0023] In a possible implementation, the phase difference between the first amplified signal and the second amplified signal is 90°.

[0024] In a possible implementation, the third amplified signal has a relative bandwidth greater than or equal to 70%.

[0025] In a third aspect, an embodiment of the present application provides a chip, which comprises a processor and a transceiver pin. The transceiver pin and the processor communicate with each other through an internal connection path. The processor executes the method in the second aspect or any possible implementation manner of the second aspect to control the receiving pin to receive a signal and control the sending pin to send a signal.

[0026] In a fourth aspect, an embodiment of the present application provides a computer readable medium for storing a computer program, and the computer program comprises instructions for executing the method in the second aspect or any possible implementation manner of the second aspect.

[0027] In a fifth aspect, an embodiment of the present application provides a computer program, which comprises instructions for executing the method in the second aspect or any possible implementation manner of the second aspect.

[0028] In a sixth aspect, an embodiment of the present application provides a signal processing system, which can comprise the apparatus in the first aspect or any possible implementation manner of the first aspect. BRIEF DESCRIPTION OF DRAWINGS

[0029] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the present application. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor under the premise of the drawings.

[0030] Figure 1 One of the structural schematic diagrams of an Outphasing system is exemplarily shown;

[0031] Figure 2 One of the structural schematic diagrams of an Outphasing system is exemplarily shown;

[0032] Figure 3 One of the structural schematic diagrams of an Outphasing system is exemplarily shown;

[0033] Figure 4 One of the structural schematic diagrams of an Outphasing system is exemplarily shown;

[0034] Figure 5 One of the structural schematic diagrams of an Outphasing system is exemplarily shown;

[0035] Figure 6One of structural schematic diagrams of a signal processing system provided by an embodiment of the present application;

[0036] Figure 7 One of structural schematic diagrams of a 90° directional coupler;

[0037] Figure 8 One of structural schematic diagrams of a signal processing system provided by an embodiment of the present application;

[0038] Figure 9 One of structural schematic diagrams of a signal processing system provided by an embodiment of the present application;

[0039] Figure 10 One of structural schematic diagrams of an equivalent signal processing system;

[0040] Figure 11 One of impedance variation trend diagrams;

[0041] Figure 12 One of efficiency simulation results;

[0042] Figure 13 One of structural schematic diagrams of a signal processing system provided by an embodiment of the present application;

[0043] Figure 14 One of structural schematic diagrams of a bandwidth impedance matching network provided by an embodiment of the present application;

[0044] Figure 15 One of efficiency simulation results in different frequency ranges;

[0045] Figure 16 One of structural schematic diagrams of a bandwidth impedance matching network provided by an embodiment of the present application;

[0046] Figure 17 One of efficiency simulation results in different frequency ranges;

[0047] Figure 18 One of structural schematic diagrams of a bandwidth impedance matching network provided by an embodiment of the present application;

[0048] Figure 19a One of impedance variation trend diagrams;

[0049] Figure 19b One of impedance variation trend diagrams;

[0050] Figure 19c One of impedance variation trend diagrams. DETAILED DESCRIPTION

[0051] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0052] In this article, the term "and / or" is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.

[0053] The terms "first" and "second," etc., used in the specification and claims of this application are used to distinguish different objects, not to describe a specific order of objects. For example, "first target object" and "second target object," etc., are used to distinguish different target objects, not to describe a specific order of target objects.

[0054] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0055] In the description of the embodiments in this application, unless otherwise stated, "multiple" means two or more. For example, multiple processing units means two or more processing units; multiple systems means two or more systems.

[0056] To enable those skilled in the art to better understand the technical solutions in the embodiments of this application, the existing technology will be introduced first.

[0057] like Figure 2 The diagram shown is a schematic of an existing outphasing structure. (Refer to...) Figure 2 , specifically Figure 2 This is an outphasing structure based on the Chireix synthesizer. The following section combines... Figure 2 A brief introduction to the principles of Ouphasing technology:

[0058] When the input signal contains both amplitude modulation and phase modulation, a signal component separator (SCS) splits it into two phase-modulated signals with constant envelopes. The amplitude information of the original input signal is contained in the phase information of the two separated signals.

[0059] The two constant envelope signals are amplified by two PAs. Since the amplitudes of the signals are constant, the signals can be amplified by high-efficiency nonlinear PAs without distortion, which ensures the linearity of the signals and uses high-efficiency PAs.

[0060] Finally, the amplified two-channel modulated signals are synthesized to restore the original amplitude-modulated signals.

[0061] The original signal is affected by the phase difference between the two branches. Since the phases of the two signals are different, the synthesis will be out-of-phase synthesis, i.e., outphasing synthesis, which makes the load of the two PAs a dynamic load affected by the signal phase.

[0062] From the above description, the core of the outphasing amplification concept is that the amplitude-modulated signals are converted into two constant envelope signals, amplified by high-efficiency nonlinear PAs, and the original signal is restored by synthesizing the two signals. The process is as shown in Figure 2 .

[0063] It includes: separating the input signal S in (t) into two signals S1(t) and S2(t), specifically,

[0064]

[0065] where A(t) is the amplitude-modulated signal, the phase-modulated signal, and ω is the carrier frequency.

[0066] The two separated signals S1(t) and S2(t) are represented as:

[0067]

[0068] where A0 = max(abs(A(t))), θ(t) = arccos(0.5*A(t) / A0), and from the above formula, the phase difference between the two signals S1(t) and S2(t) is 2θ(t).

[0069] Subsequently, S1(t) and S2(t) are amplified by two PAs, and then synthesized by a synthesizer to output the signal S out (t), specifically,

[0070]

[0071] where G PA is the gain value of the PA.

[0072] That is, S1(t) and S2(t) are amplified by high-efficiency switching power amplifiers (for example, Class-D, Class-E, etc.), and the two signals are synthesized at the output end of the amplifier to restore the original signal without loss of linearity, and the theoretical efficiency is 100%. The output synthesis network of the traditional Outphasing technology usually adopts high-isolation LINC and low-isolation Chireix. This paper only explains the Chireix synthesis network. For details, refer to Figure 2 The Chireix synthesis network includes capacitive impedance jB comp and inductive impedance -jB comp The Chireix synthesis network utilizes the load modulation effect between the two PAs to obtain better efficiency characteristics, while sacrificing the linearity of the PA. Further, the Chireix synthesis network uses a λ / 4 transmission line, which is difficult to achieve wide frequency coverage while meeting the Outphasing high-efficiency characteristics.

[0073] As Figure 3 shows an exemplary wideband Outphasing system. For details, refer to Figure 3 This scheme is for the traditional packet signal separator, two-way amplifier, and synthesis network. Among them, the system improves the Chireix synthesis network, which includes adjustable capacitors (jB U ) and inductors (-jB L ), and transmission lines (Z1, Z2). The Chireix synthesis network compensates the network design into voltage-adjustable capacitors (jB U ) and inductors (-jB L ) to achieve adjustable frequency at different frequencies, while the corresponding compensation network at different frequency points can improve the efficiency of the backoff area. Among them, the implementation scheme of the adjustable capacitor and the adjustable inductor is shown in Figure 4 , in which the core device is a varactor diode.

[0074] This scheme adjusts the compensation network through variable capacitors and variable inductors, changes the originally passive Chireix synthesizer (i.e., the Chireix synthesis network in Figure 2 ) into an active device, increases the complexity of the output network, and accordingly, the scheme also needs to add a control voltage generation circuit, thereby increasing the complexity of the overall transmitter. Since the varactor diode is added to the output network, the output power of the Outphasing PA is limited by the withstand voltage capability of the varactor diode, rather than the power tube itself, thereby limiting the feasibility of this scheme in high-power scenarios.

[0075] As Figure 5Another wideband Outphasing system is shown as an example, referring to Figure 5 The scheme improves the structure of the traditional Chireix, replaces the λ / 4 transmission line with the bandwidth characteristics of the transformer, and attempts to realize a wideband Chireix synthesis network. Although there is an efficiency improvement effect in the >10dB backoff area, the final frequency range that can work is 2.1-2.4GHz, and the relative bandwidth is less than 15%, limited by the resonant frequency of the compensation network Lθc and Cθc.

[0076] To solve the above problems, the Outphasing system provided in the present application uses the phase characteristics of the 90° directional coupler to connect capacitive or inductive impedance on the isolation port, so that the two input ends of the 90° directional coupler are equivalent to inductive and capacitive devices respectively, to realize the function of the traditional Outphasing system, thereby improving the efficiency in the backoff area. In addition, the present application also uses the wideband characteristics of the 90° directional coupler to connect the wideband impedance matching network composed of capacitive and inductive impedance on the isolation port, to realize the frequency improvement in the 5dB backoff area while realizing the wideband characteristics.

[0077] As Figure 6 The structure schematic diagram of the signal processing system in the embodiment of the present application is shown, referring to Figure 6 Specifically, the signal processor system 100 includes but is not limited to an outphasing amplifier 110 and a synthesis matching network 120. Optionally, the signal processing system 100 also includes a signal separator, the function of which can be referred to the description in Figure 2 , which will not be described here.

[0078] For example, the outphasing amplifier 110 includes two power amplifiers, power amplifier 111 and power amplifier 112, for amplifying the input signal and outputting two amplified signals, S1(t) and S2(t). The specific structure and implementation principle of the outphasing amplifier can be referred to the above, which will not be described here.

[0079] Still referring to Figure 6 The synthesis network 120 in the present application includes a 90° directional coupler 121 and a wideband impedance network 122.

[0080] Specifically, the 90° directional coupler 121 is a four-port device, as Figure 7 The structure schematic diagram of the 90° directional coupler is shown, including port 1, port 2, port 3 and port 4. In the present application, port 1 and port 2 are input ports, used to connect the outphasing amplifier 110, for example, port 1 connects the power amplifier 111 and port 2 connects the power amplifier 112. Still referring to Figure 7Port 1 and port 3, port 2 and port 4 can be regarded as two transmission lines which are coupled and straight, and the energy is exchanged between the two lines through certain coupling mechanism, including: hole coupling, branch coupling, parallel coupling and matched double T, etc. When the signals are input from port 1 and port 2, the energy will be output from port 3 as the output port. In the present application, port 4 is an isolation (ISO) port.

[0081] Specifically, the device of the 90° directional coupler requires that the phase difference of the input signals is 90°, that is, the phase difference of S1(t) and S2(t) is 90°. In the present application, the two signals processed by the out-of-phase amplifiers can be represented as:

[0082]

[0083] That is, the phase difference of the two separated signals S1(t) and S2(t) is 90°.

[0084] Specifically, in order to make the phase difference of the two signals 90°, the phase of the two separated signals can be processed before the two amplifiers, so as to meet the requirement of 90° phase difference. Alternatively, the phase of the two signals can be processed after the two signals are amplified by the two amplifiers, before the two signals are input into the 90° directional coupler, which is not limited in the present application.

[0085] In combination with Figure 7 In the present application, port 1 of the 90° directional coupler 121 can receive the signal S1(t) output by the power amplifier 111, and port 2 can receive the signal S2(t) output by the power amplifier 112. The 90° directional coupler 121 synthesizes the two signals to obtain an output signal S out (t), and outputs the signal through the output port, for example, port 3. Figure 7 Alternatively, the output port is grounded through a load.

[0086] Continuing to refer to Figure 6 In the present application, the isolation port of the 90° directional coupler 121 is connected to the wideband impedance matching circuit 120. In one example, the wideband impedance matching network can be a capacitive impedance, or a capacitive impedance network, which can include one or more capacitive devices, and can include one or more capacitors, for example, as shown in Figure 8 wherein the wideband impedance matching network 122 is a capacitive impedance. In another example, the wideband impedance matching network can be an inductive impedance, or an inductive impedance circuit, which can include one or more inductive devices, and can include one or more inductors, for example, as shown in Figure 9 wherein the wideband impedance matching network 122 is an inductive impedance.

[0087] Specifically, in the present application, when the wideband impedance matching circuit 120 includes a capacitive impedance or an inductive impedance, the wideband impedance matching circuit is terminated at the isolated port of the 90° directional coupler 121, based on the wideband characteristics of the 90° directional coupler 121, the effect is equivalent to providing an adjustable equivalent impedance at the port 1 and the port 2 of the two input ends of the 90° directional coupler 121, i.e. Figure 7 , respectively. For example, the two input ends can be equivalent to an inductance (-jB comp ) and a capacitance (jB comp ), respectively, as shown in the equivalent diagram of Figure 10 . The equivalent capacitive impedance and inductive impedance can be referred to as a capacitance-inductance (LC) compensation network.

[0088] wherein, as described above, according to the characteristic that the input phase difference of the 90° directional coupler 121 is 90°, it can be obtained from the following formula: the equivalent compensation phase of the equivalent LC compensation network is equal to 45°.

[0089]

[0090] wherein, η is the peak efficiency, θ C (equivalent compensation phase) is 45°, and θ is the phase difference of the two signals. That is, the present application can realize the functional effect of the LC compensation network in the traditional Chireix structure (i.e. the system shown in Figure 2 ), that is, at a certain frequency point, for example, 14 GHz, the equivalent impedance value can be optimized.

[0091] As shown in Figure 11 , it is an impedance variation trend diagram corresponding to Figure 8 or Figure 9 , which shows the variation of the two-way impedance with the phase. Since the outphasing system in the present embodiment is equivalent to the traditional Chireix-based outphasing system in Figure 2 , referring to Figure 11 , the equivalent impedance curve includes upper / lower semicircles on the Smith chart, respectively representing the impedance curves of positive / negative reactance.

[0092] In one example, if the wideband impedance matching network is a capacitive impedance, i.e. as shown in Figure 8 , referring to Figure 11 , the input equivalent impedance of 0° is in the lower semicircle of the Smith chart, and the input equivalent impedance of 90° is in the upper semicircle of the Smith chart.

[0093] In another example, if the wideband impedance matching network is an inductive impedance, i.e. as shown in Figure 9 , referring to Figure 11The input equivalent impedance of 0° is in the upper half of the Smith circle, and the input equivalent impedance of 90° is in the lower half of the Smith circle.

[0094] By Figure 11 It can be seen that when the equivalent compensation phase θ C is equal to 45°, the impedance curves of the positive reactance and the negative reactance intersect at a point, i.e., the imaginary part is 0 and the real parts are equal.

[0095] As Figure 12 shown is the efficiency simulation result of the output signal of the system, with reference to Figure 12 , the simulation result is obtained by scanning the phase difference of the two signals based on an ideal voltage source. Among them, the horizontal axis is the normalized relative output power (unit: dB), and the vertical axis is the output efficiency. As can be seen from the figure, at the 5dB backoff, the efficiency of the output signal of the system is still the highest value, i.e., the efficiency value corresponding to the highest output power is basically the same, so the signal processing system in the application can improve the efficiency in the 5dB backoff zone.

[0096] As Figure 13 shown is a structural schematic diagram of the signal processing system in the embodiment of the application, with reference to Figure 13 , specifically, the signal processor system 200 includes but is not limited to: an outphasing amplifier 210 and a synthetic matching network 220.

[0097] The related description of the outphasing amplifier 120 can refer to the outphasing amplifier 110 in the above, which is not described here.

[0098] The synthetic matching network 220 will be described in detail as follows:

[0099] Specifically, the synthetic matching network 220 includes but is not limited to a 90° directional coupler 221 and a wideband impedance matching network 222. Among them, the related concept of the 90° directional coupler 221 can refer to the 90° directional coupler 121 in the above, which is not described here.

[0100] Specifically, on the basis of the Outphasing system shown in Figure 6 , the application can utilize the wideband characteristics of the 90° directional coupler 221 to terminate a bandpass impedance matching network, which can also be called a bandpass filter network, at the isolation port of the 90° directional coupler 221, which can provide adjustable equivalent impedances at the two input ports of the 90° directional coupler 211. For example, a capacitive impedance and an inductive impedance can be equivalently provided at the two input ports, respectively, and the structure of the matching network can be adjusted according to the impedance values of the equivalent capacitive impedance and inductive impedance, so as to realize the wideband characteristics of the Outphasing system.

[0101] Exemplarily, in this embodiment, the broadband impedance matching network 222 includes at least one inductive impedance and at least one capacitive impedance. In one example, the at least one inductive impedance and at least one capacitive impedance are connected in series; in another example, the at least one inductive impedance and at least one capacitive impedance are connected in parallel; and in yet another example, the broadband impedance matching network 222 includes at least one inductive impedance and at least one capacitive impedance connected in both series and parallel. Exemplarily, in this application, at least one inductive impedance and at least one capacitive impedance constitute a bandpass impedance matching network.

[0102] In one example, such as Figure 14 The diagram shown is a schematic representation of a bandpass impedance matching network. (Refer to...) Figure 14 The bandpass impedance matching network includes parallel inductor impedance L1, capacitor impedance C1 and capacitor impedance C3, and series capacitor impedance C2 and inductor impedance L3.

[0103] like Figure 15 The following is based on Figure 14 The efficiency simulation results of the outphasing system with a bandpass impedance matching network are presented across different frequency ranges. These simulation results are obtained by scanning the phase difference between two signals based on an ideal voltage source. (Refer to...) Figure 15 The figure shows the efficiency simulation results in the frequency range of 1.3GHz to 2.5GHz. The figures are illustrated from left to right with the following frequencies: 1.3GHz, 1.4GHz, 1.5GHz, 1.6GHz, 1.7GHz, 1.8GHz, 1.9GHz, 2.0GHz, 2.1GHz, 2.2GHz, 2.3GHz, 2.4GHz, and 2.5GHz. Figure 15 The horizontal axis represents the normalized relative output power (in dB), and the vertical axis represents the output efficiency. As shown in the figure, within the 1.3GHz to 2.5GHz frequency range, the efficiency value at the 5dB backoff point is essentially the same as the efficiency value corresponding to the highest output power. That is, for a signal with a bandwidth of 1.2GHz, the relative bandwidth is 70%, based on... Figure 14 After processing by the outphasing system using the bandpass impedance matching network, a 5dB backoff efficiency can be achieved. In other words, this application achieves a 5dB backoff region while also achieving broadband characteristics with 70% of the relative bandwidth.

[0104] In another example, such as Figure 16 The diagram shown is a schematic representation of another bandpass impedance matching network. (Refer to...) Figure 16 The bandpass impedance matching network includes parallel inductor impedance L2, capacitor impedance C5, capacitor impedance C6 and inductor impedance L3, and series inductor impedance L1 and capacitor impedance C4.

[0105] like Figure 17 The following is based on Figure 16 The efficiency simulation results of the outphasing system with a bandpass impedance matching network are presented across different frequency ranges. These simulation results are obtained by scanning the phase difference between two signals based on an ideal voltage source. (Refer to...) Figure 17 The figure shows the efficiency simulation results within the frequency range of 1.5GHz to 3.5GHz. The figures, from left to right, use the following frequencies as examples: 1.5GHz, 1.7GHz, 1.9GHz, 2.1GHz, 2.3GHz, 2.5GHz, 2.7GHz, 2.9GHz, 3.1GHz, 3.3GHz, and 3.5GHz. Figure 17 The horizontal axis represents the normalized relative output power (in dB), and the vertical axis represents the output efficiency. As shown in the figure, within the 1.5 GHz to 3.5 GHz frequency range, the efficiency value at the 5 dB backoff point is essentially the same as the efficiency value corresponding to the highest output power. That is, for a signal with a 2.0 GHz bandwidth, after normalization based on… Figure 16 After processing by the outphasing system using the bandpass impedance matching network, a 5dB backoff efficiency can be achieved. In other words, this application achieves a 5dB backoff region while also realizing broadband characteristics with a relative bandwidth of 80%.

[0106] It should be noted that, depending on the bandpass impedance matching network, the coverage frequency, i.e., the relative bandwidth, of the outphasing system may be the same or different.

[0107] The design principle of the bandpass impedance matching network in this application is mainly to ensure that the impedance of the bandpass impedance matching network does not change with the frequency of the signal. The design principle is explained in detail below. Figure 16 Taking the bandpass impedance matching network shown as an example, refer to... Figure 18 Specifically:

[0108] 1) Configure impedance matching network 1.

[0109] Specifically, refer to Figure 18 Impedance matching network 1 includes a parallel LC network, i.e., the inductor impedance L2 and the capacitor impedance C5 are connected in parallel. When configuring this LC network, its resonant point is selected to be located at the center frequency of the required bandwidth. For example, in this embodiment, as mentioned above, the coverage frequency is 1.5GHz to 3.5GHz, then the resonant frequency of this LC is equal to 2.5GHz. Figures 19a to 19c The diagram shows the impedance variation trend, which can be viewed as the impedance variation trend of the LC network equivalent to the 90° directional coupler. It illustrates the change in the equivalent impedance after the matching network transformation. Specifically, the equivalent impedance value corresponding to impedance matching network 1 is shown on the Smith chart as follows. Figure 19a The curve in the figure is shown.

[0110] 2) configuring the impedance matching network 2.

[0111] Specifically, referring to Figure 18 , the impedance matching network 2 includes a series LC network, that is, the inductive impedance L1 is in series with the capacitive impedance C4. When configuring the LC network, the resonant frequency thereof is selected to be far greater than the required frequency range 1.5GHz-3.5GHz, for example, 3*3.5GHz, the purpose is to move the impedance value, that is, the curve in Figure 19a , to rotate counterclockwise along the impedance circle and reduce the arc thereof on the Smith chart, that is, after adding the impedance matching network 2, the equivalent impedance value is moved to the vicinity of the predetermined impedance value, for example, the predetermined impedance value can be-j*50Ω, after adding the impedance matching network 2, the curve in Figure 19a , for example, can be moved to-j*50Ω, to the vicinity of-j*35Ω. Wherein, the arc of the impedance curve is reduced, which can be understood as the fluctuation of the equivalent impedance with the change of the signal frequency is reduced, that is, during the change of the signal frequency, the fluctuation of the equivalent impedance value is smaller, as shown in Figure 19b .

[0112] 3) configuring the impedance matching network 3.

[0113] Specifically, referring to Figure 18 , the impedance matching network 3 includes a parallel LC network, that is, the inductive impedance L3 is in parallel with the capacitive impedance C6. When configuring the LC network, the resonant frequency thereof is selected to be within the required frequency range 1.5GHz-3.5GHz, for example, 2.5GHz, to further reduce the arc of the curve in Figure 19b , that is, to further reduce the impedance fluctuation, which can be understood as, during the change of the signal frequency, the fluctuation range of the equivalent impedance is smaller than that in Figure 19b , that is, the purpose of the present application is to achieve that the equivalent impedance does not change (or fluctuate) with the change of the signal frequency, or the fluctuation of the equivalent impedance with the change of the signal frequency is only within a small range, for example, within-j*50Ω±5Ω, as shown in Figure 19c . It should be noted that Figures 19a to 19c , the Smith chart is a simplified diagram, which can refer to the Smith chart in Figure 11 .

[0114] Based on the same technical concept, the present application also provides a signal processing device for executing the above method embodiments.

[0115] Based on the same technical concept, the embodiment of the present application further provides a chip, which comprises a processor and a transceiving pin. The transceiving pin and the processor communicate with each other through an internal connection path. The processor is used for the method embodiment to control the receiving pin to receive a signal and to control the sending pin to send a signal.

[0116] Based on the same technical concept, the embodiment of the present application further provides a computer readable medium for storing a computer program, which comprises instructions for executing the method embodiment.

[0117] Based on the same technical concept, the embodiment of the present application further provides a computer program, which comprises instructions for executing the method embodiment.

[0118] Based on the same technical concept, the embodiment of the present application further provides a signal processing system, which can comprise the device described in the present application.

[0119] The embodiments of the present application are described above in combination with the drawings, but the present application is not limited to the specific embodiments described above, which are only illustrative but not restrictive. Those skilled in the art can make many forms under the inspiration of the present application without departing from the scope of the present application and the protection scope of the claims.

Claims

1. A signal processing device, characterized by, The out-phasing amplifier and the synthetic matching network are included. The out-phasing amplifier includes: The first power amplifier is configured to amplify the first signal and output a first amplified signal in response to the received first signal. The second power amplifier is configured to amplify the second signal and output a second amplified signal in response to the received second signal, wherein the first amplified signal and the second amplified signal have the same frequency and a phase offset. The synthetic matching network includes a 90° directional coupler and a wideband impedance matching network. The 90° directional coupler includes a first input terminal, a second input terminal, a first output terminal, and an isolation terminal, wherein the first input terminal is connected to the first power amplifier, the second input terminal is connected to the second power amplifier, and the first output terminal is a signal output terminal. The 90° directional coupler is configured to synthesize the first amplified signal received through the first input terminal and the second amplified signal received through the second input terminal to obtain a third amplified signal, and output the third amplified signal through the first output terminal. The wideband impedance matching network is connected to the isolation terminal, and includes at least one capacitive impedance and at least one inductive impedance, and is configured to provide an adjustable equivalent impedance between the first input terminal and the second input terminal of the 90° directional coupler.

2. The apparatus of claim 1, wherein, The wideband impedance matching network is configured to provide an equivalent impedance of a corresponding size during a frequency change of the third amplified signal.

3. The apparatus of claim 2, wherein, The wideband impedance matching network includes at least one capacitive impedance and at least one inductive impedance, and the at least one capacitive impedance and the at least one inductive impedance are connected in series and / or parallel, wherein the impedance value of the equivalent impedance provided by the wideband impedance matching network between the first input terminal and the second input terminal changes within a predetermined range.

4. The apparatus of claim 3, wherein, The wideband impedance matching network is an N-order bandpass impedance matching network, and N is an integer greater than 2.

5. The apparatus of claim 3, wherein, The wideband impedance matching network includes a first impedance matching network, a second impedance matching network, and a third impedance matching network, wherein the first impedance matching network is connected to the 90° directional coupler, the second impedance matching network is connected to the first impedance matching network, and the third impedance matching network is connected to the second impedance matching network. The first impedance matching network includes a capacitive impedance and an inductive impedance connected in parallel, and the resonant frequency of the first impedance matching network is equal to a center frequency of a preset bandwidth. The second impedance matching network includes a capacitive impedance and an inductive impedance connected in series, and the resonant frequency of the second impedance matching network is greater than the center frequency. The third impedance matching network includes a capacitive impedance and an inductive impedance connected in parallel, and the resonant frequency of the third impedance matching network is equal to any frequency within the preset bandwidth.

6. The apparatus of claim 1, wherein, The phase difference between the first amplified signal and the second amplified signal is 90°.

7. The apparatus of claim 1, wherein, The relative bandwidth of the third amplified signal is greater than or equal to 70%.

8. A signal processing method characterized by, The application is applied to a signal processing device, the signal processing device comprises an out-of-phase amplifier and a synthesis matching network, and the method comprises: The out-of-phase amplifier amplifies a first signal received and outputs a first amplified signal, and amplifies a second signal received and outputs a second amplified signal, wherein the first amplified signal and the second amplified signal have the same frequency and a phase shift; The synthesis matching network synthesizes the first amplified signal received through a first input terminal and the second amplified signal received through a second input terminal, obtains a third amplified signal, and outputs the third amplified signal; The synthesis matching network comprises a 90° directional coupler and a wideband impedance matching network, the wideband impedance matching network comprises at least one capacitive impedance and at least one inductive impedance, and the wideband impedance matching network provides adjustable equivalent impedance between the first input terminal and the second input terminal of the 90° directional coupler.

9. The method of claim 8, wherein, The wideband impedance matching network provides an equivalent impedance of a corresponding size during the frequency change of the third amplified signal.

10. The method of claim 9, wherein, The wideband impedance matching network comprises at least one capacitive impedance and at least one inductive impedance, and the at least one capacitive impedance and the at least one inductive impedance are connected in series and / or parallel; wherein the impedance value of the equivalent impedance provided by the wideband impedance matching network between the first input terminal and the second input terminal changes within a predetermined range.

11. The method of claim 10, wherein, The wideband impedance matching network is an N-order bandpass impedance matching network, and N is an integer greater than 2.

12. The method of claim 10, wherein, The wideband impedance matching network comprises a first impedance matching network, a second impedance matching network, and a third impedance matching network, the first impedance matching network is connected to the 90° directional coupler, the second impedance matching network is connected to the first impedance matching network, and the third impedance matching network is connected to the second impedance matching network; The first impedance matching network comprises a capacitive impedance and an inductive impedance connected in parallel, and the resonant frequency of the first impedance matching network is equal to the center frequency of a preset bandwidth; The second impedance matching network comprises a capacitive impedance and an inductive impedance connected in series, and the resonant frequency of the second impedance matching network is greater than the center frequency; The third impedance matching network comprises a capacitive impedance and an inductive impedance connected in parallel, and the resonant frequency of the third impedance matching network is equal to any frequency within the preset bandwidth.

13. The method of claim 8, wherein, The phase difference between the first amplified signal and the second amplified signal is 90°.

14. The method of claim 8, wherein, The relative bandwidth of the third amplified signal is greater than or equal to 70%.

15. A chip, characterized by The device comprises processing circuitry and transceiver pins; wherein the transceiver pins and the processing circuitry communicate with each other through internal connection paths, and the processing circuitry is used for the method of any one of claims 8-14.

16. A signal processing system characterized by The device comprises the signal processing device of any one of claims 1-7.

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