Printed wiring board and method for manufacturing the same

Abstract

One scheme of the present disclosure involves a printed wiring board including: an insulating base film and a plurality of wiring portions formed on the surface of the base film, the wiring portions having a seed layer directly or indirectly stacked on the surface of the base film and a metal layer stacked on the seed layer, the base film having a wiring area including the plurality of wiring portions and a non-wiring area not containing the wiring portions, the plurality of wiring portions including one or more outermost boundary wiring portions and a plurality of inner wiring portions other than the outermost boundary wiring portions, the outermost boundary wiring portion being the outermost side of the base film in the wiring area and being formed at a boundary between the wiring area and the non-wiring area, the average width of the outermost boundary wiring portion being greater than 30 μm, the average width of the inner wiring portion being less than 20 μm, and the average aspect ratio of the inner wiring portion being greater than 1.5.

Description

Technical Field

[0001] The present disclosure relates to a printed wiring board and a method of manufacturing the printed wiring board.

[0002] This application claims the benefit of priority based on Japanese Application No. 2019-063746 filed on March 28, 2019, and all the contents described in the above Japanese Application are incorporated herein by reference. Background Art

[0003] As electronic devices become smaller and lighter, the wiring portion of a printed wiring board has become finer in pitch. As a method for making the wiring portion of a printed wiring board a high-density fine pitch, a semi-additive method is used. In the semi-additive method, for example, a seed layer is formed on the surface of an insulating resin layer, and after the portion other than the portion forming the circuit is coated with a plating resist, a metal layer is selectively formed only on the circuit portion by electroplating. Furthermore, the plating resist is peeled off and the seed layer other than the circuit portion is etched to form a printed wiring board (see Japanese Patent Publication No. 2004-6773).

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Publication No. 2004-6773 Summary of the invention

[0007] One scheme of the present disclosure involves a printed wiring board including: an insulating base film, and a plurality of wiring portions formed on the surface of the base film, the wiring portions having a seed layer directly or indirectly stacked on the surface of the base film and a metal layer stacked on the seed layer, the base film having a wiring area including the plurality of wiring portions and a non-wiring area not containing the wiring portions, the plurality of wiring portions including one or more outermost boundary wiring portions and a plurality of inner wiring portions other than the outermost boundary wiring portions, the outermost boundary wiring portion being at the outermost side of the base film in the wiring area and being formed at a boundary between the wiring area and the non-wiring area, the average width of the outermost boundary wiring portion being greater than 30 μm, the average width of the inner wiring portion being less than 20 μm, and the average aspect ratio of the inner wiring portion being greater than 1.5.

[0008] Another embodiment of the present invention relates to a method for manufacturing a printed wiring board, which is a method for manufacturing a printed wiring board that uses a semi-additive method to directly or indirectly form a conductive pattern including a plurality of wiring portions on the surface of an insulating base film, comprising: a seed layer stacking process of directly or indirectly stacking a conductive seed layer on the surface of the base film, a resist pattern forming process of forming a resist pattern having an inverse shape of the plurality of wiring portions on the surface of the seed layer, a metal layer stacking process of stacking a metal layer on the surface of the seed layer exposed from the resist pattern by electroplating, a resist pattern stripping process of stripping the resist pattern, and a resist pattern forming process of stripping the resist pattern. A seed layer stripping process for stripping the seed layer exposed after the resist pattern stripping process, wherein the base film has a wiring area including the multiple wiring parts and a non-wiring area not including the wiring parts, the multiple wiring parts include one or more outermost boundary wiring parts and multiple inner wiring parts other than the outermost boundary wiring parts, the outermost boundary wiring part is the outermost side of the base film in the wiring area, and is formed by the boundary between the wiring area and the non-wiring area, the average width of the outermost boundary wiring part is greater than 30μm, the average width of the inner wiring part is less than 20μm, and the average aspect ratio of the inner wiring part is greater than 1.5. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a schematic partial plan view showing a printed wiring board according to one embodiment.

[0010] Figure 2 It is a schematic partial cross-sectional view showing a printed wiring board according to one embodiment.

[0011] Figure 3 It is a schematic diagram showing a state after the seed layer lamination step in the method for producing a printed wiring board according to one embodiment.

[0012] Figure 4 It is a schematic diagram showing a state after the resist pattern forming step in the method for producing a printed wiring board according to one embodiment.

[0013] Figure 5 It is a schematic diagram showing a state after a metal layer lamination step in a method for producing a printed wiring board according to one embodiment.

[0014] Figure 6 This is a microscope photograph showing the appearance of the outermost wiring portion in the example.

[0015] Figure 7 It is a schematic partial plan view showing a printed wiring board according to another embodiment. DETAILED DESCRIPTION

[0016] [Technical Problems to be Solved by the Present Disclosure]

[0017] In the above-mentioned circuit formation process, the pressure generated by the spray of the etching solution in the stripping process and the physical force generated by the contact of the ring roller during transportation are applied to the wiring part. The fine pitch circuit formed by the semi-additive method is not resistant to the force from the side because the wiring part is small in area, and the wiring part set at the boundary of the area without wiring part and the area with dense wiring part is easy to be stripped. Furthermore, this effect becomes more significant for the wiring part with a high average aspect ratio.

[0018] Therefore, when the wiring portion is peeled off during the circuit forming process, it may come into contact with the adjacent wiring portion and cause a short circuit, or the wiring portion that is lifted up due to the peeling of a part of the installation surface may be torn and disconnected. In addition, the peeled and fallen wiring portion becomes a conductive foreign matter, which may contaminate other printed wiring boards and cause poor mounting or malfunction of other components.

[0019] The present disclosure is completed based on such actual conditions, and aims to provide a printed wiring board and a method for manufacturing a printed wiring board that can suppress the peeling of a wiring portion set at a boundary between a wiring area forming the wiring portion and a non-wiring area without the wiring portion when including a wiring portion with a high average aspect ratio.

[0020] [Effects of the present disclosure]

[0021] The printed wiring board disclosed in the present invention can suppress the peeling of the wiring portion provided at the boundary between the wiring region forming the wiring portion and the non-wiring region without the wiring portion when the printed wiring board includes the wiring portion with a high average aspect ratio. In addition, the manufacturing method of the printed wiring board disclosed in the present invention can manufacture a printed wiring board that can suppress the peeling of the wiring portion provided at the boundary between the wiring region forming the wiring portion and the non-wiring region without the wiring portion when the printed wiring board includes the wiring portion with a high average aspect ratio.

[0022] [Description of Embodiments of the Present Disclosure]

[0023] First, embodiments of the present disclosure are listed and described.

[0024] One scheme of the present disclosure involves a printed wiring board including: an insulating base film, and a plurality of wiring portions formed on the surface of the base film, the wiring portions having a seed layer directly or indirectly stacked on the surface of the base film and a metal layer stacked on the seed layer, the base film having a wiring area including the plurality of wiring portions and a non-wiring area not containing the wiring portions, the plurality of wiring portions including one or more outermost boundary wiring portions and a plurality of inner wiring portions other than the outermost boundary wiring portions, the outermost boundary wiring portion being at the outermost side of the base film in the wiring area and being formed at a boundary between the wiring area and the non-wiring area, the average width of the outermost boundary wiring portion being greater than 30 μm, the average width of the inner wiring portion being less than 20 μm, and the average aspect ratio of the inner wiring portion being greater than 1.5.

[0025] The inventors of the present invention have learned that when the average aspect ratio of the wiring portion in a fine pitch circuit with an average width of less than 20 μm is designed to be high, specifically, when the average aspect ratio is greater than 1.5, the peeling of the wiring portion located at the outermost side of the base film and arranged at the boundary between the wiring area forming the wiring portion and the non-wiring area without the wiring portion becomes significant due to the pressure generated by the spraying of the etching liquid in the peeling process and the physical force generated by the contact of the ring roller during transportation. According to the printed wiring board, the average width of the outermost boundary wiring portion formed by the outermost side of the base film in the wiring area and the boundary between the wiring area and the non-wiring area is greater than 30 μm, so that sufficient adhesion can be exerted on the base film. As a result, the peeling of the outermost boundary wiring portion in the circuit forming process can be suppressed.

[0026] In the past, in order to suppress the peeling of the outermost wiring portion, the circuit was covered with a cover coat after the circuit was formed. However, since the circuit is exposed to physical forces such as the spray of etching liquid in the circuit formation process before covering with the cover coat, it is difficult to fully suppress the peeling of the outermost wiring portion by the means of covering with the cover coat. On the other hand, according to this printed wiring board, the peeling suppression effect of the outermost wiring portion can be obtained in the process until covering with the cover coat.

[0027] Furthermore, in the case of a fine pitch circuit, since the base film is easily bent, there is a tendency for wrinkles to be easily generated. However, by setting the average width of the outermost wiring portion to 30 μm or more, the generation of wrinkles can be reduced.

[0028] The average width of the outermost wiring portion is preferably 50 μm or more. Thus, the effect of suppressing peeling of the outermost wiring portion can be further improved by setting the average width of the outermost wiring portion to 50 μm or more.

[0029] Another embodiment of the present invention relates to a method for manufacturing a printed wiring board, which is a method for manufacturing a printed wiring board that directly or indirectly forms a conductive pattern including a plurality of wiring portions on a surface of an insulating base film by a semi-additive method, comprising: a seed layer laminating step of directly or indirectly laminating a conductive seed layer on the surface of the base film, a resist pattern forming step of forming a resist pattern having an inverse shape of the plurality of wiring portions on the surface of the seed layer, a metal layer laminating step of laminating a metal layer by electroplating on the surface of the seed layer exposed from the resist pattern, a resist pattern stripping step of stripping the resist pattern, and a resist pattern stripping step of stripping the resist pattern. A seed layer stripping process for stripping the seed layer exposed after the resist pattern stripping process, wherein the base film has a wiring area including the multiple wiring parts and a non-wiring area not including the wiring parts, the multiple wiring parts include one or more outermost boundary wiring parts and multiple inner wiring parts other than the outermost boundary wiring parts, the outermost boundary wiring part is the outermost side of the base film in the wiring area, and is formed by the boundary between the wiring area and the non-wiring area, the average width of the outermost boundary wiring part is greater than 30μm, the average width of the inner wiring part is less than 20μm, and the average aspect ratio of the inner wiring part is greater than 1.5.

[0030] The printed wiring board manufactured by the manufacturing method of the printed wiring board includes: the outermost boundary wiring portion formed by the boundary between the wiring area and the non-wiring area and the outermost side of the base film in the wiring area including the plurality of wiring portions. Moreover, the average width of the outermost boundary wiring portion is 30 μm or more, the average width of the inner wiring portion is 20 μm or less, and the average aspect ratio of the inner wiring portion is 1.5 or more, so that in the case of including the wiring portion with a high average aspect ratio, it is possible to obtain a printed wiring board capable of suppressing the peeling of the outermost boundary wiring portion.

[0031] In the method for manufacturing a printed wiring board, preferably, a dry film photoresist is used to form the resist pattern in the resist pattern forming step of forming the resist pattern. By using the dry film photoresist in the resist pattern forming step of forming the resist pattern, the thickness of the resist layer can be arbitrarily selected in a wide range, and the workability is excellent.

[0032] It should be noted that in the present disclosure, the "average width" of the wiring portion refers to the average value of the values ​​obtained by measuring the maximum width at a cross section perpendicular to the long side direction of the wiring portion at any five points in the long side direction of the wiring portion. The "average aspect ratio" of the wiring portion refers to the average value of the values ​​obtained by measuring the aspect ratio at a cross section perpendicular to the long side direction of the wiring portion at any five points in the long side direction of the wiring portion. In addition, the "aspect ratio" is expressed by A / B when the maximum length in the thickness direction at the cross section perpendicular to the long side direction of the wiring portion is set to A and the average width is set to B. The "average thickness" refers to the average value of the thickness measured at any five points.

[0033] [Details of the embodiments of the present disclosure]

[0034] Hereinafter, a printed wiring board and a method for manufacturing the printed wiring board according to an embodiment of the present disclosure will be described in detail with reference to the drawings.

[0035] <Printed wiring board>

[0036] Figure 1 1 is a schematic partial plan view showing a printed wiring board 50 according to one embodiment. Figure 2 for Figure 1 Schematic partial cross-sectional view of the X region of the printed wiring board 50. Figure 1 As shown, the printed wiring board 50 includes a conductive pattern including a plurality of wiring portions having a U-shaped folding area when viewed from above. The plurality of wiring portions are arranged at approximately equal intervals without short-circuiting the wiring. The plurality of wiring portions are composed of an outermost boundary wiring portion 11 located at the outermost side in the base film 1 and arranged at the boundary between the wiring area 22 forming the above-mentioned wiring portion and the non-wiring area 12 without the above-mentioned wiring portion, and a plurality of wiring portions other than the outermost boundary wiring portion 11, namely, an inner wiring portion 10. In more detail, the wiring area 22 refers to an area of ​​the base film 1 including a plurality of wiring portions. In addition, the plurality of wiring portions include one outermost boundary wiring portion 11 and a plurality of inner wiring portions 10 other than the outermost boundary wiring portion 11. On the other hand, the non-wiring area 12 refers to an area of ​​the non-wiring portion further outward of the outermost boundary wiring portion 11 located at the outermost side of the wiring area 22 in the base film 1. Furthermore, the outermost boundary wiring portion 11 is formed at the outermost side of the base film 1 in the wiring region 22 and at the boundary between the wiring region 22 and the non-wiring region 12. Figure 2 As shown, the printed wiring board 50 includes: a seed layer 2 having conductivity directly or indirectly laminated on the surface of a base film 1, and a conductive pattern 20 including a plurality of wiring portions directly or indirectly laminated on the surface of the seed layer 2. The outermost boundary wiring portion 11 and the inner wiring portion 10 have the seed layer 2, and a metal layer 3 laminated on the seed layer 2.

[0037] [Basement membrane]

[0038] The base film 1 has a synthetic resin as a main component and has electrical insulation. The base film 1 is a base film for forming a conductive pattern. The base film 1 may be flexible. When the base film 1 is flexible, the printed wiring board 50 can be used as a flexible printed wiring board.

[0039] Examples of the synthetic resin include polyimide, polyethylene terephthalate, liquid crystal polymer, and fluororesin.

[0040] When the printed wiring board 50 is used as a flexible printed wiring board, the lower limit of the average thickness of the base film 1 is preferably 5 μm, and more preferably 10 μm. On the other hand, the upper limit of the average thickness of the base film 1 is preferably 50 μm, and more preferably 40 μm. If the average thickness of the base film 1 is less than the above lower limit, the insulation strength of the base film 1 may become insufficient. On the other hand, if the average thickness of the base film 1 exceeds the above upper limit, the printed wiring board may become thicker than necessary, and the flexibility may become insufficient.

[0041] [Seed layer]

[0042] The seed layer 2 is a metal layer for forming a plating layer for electroplating on one side of the base film 1. In addition, the seed layer 2 can be a sintered layer of metal particles formed by coating ink containing metal particles on one side of the base film 1 and sintering the metal particles. As the main component of the seed layer 2, for example, nickel, gold, silver, tungsten, molybdenum, copper, tin, cobalt, chromium, iron, zinc, etc. can be listed, among which copper with high adhesion to the base film 1 and suitable as the starting surface of plating is preferred. As the average thickness of the seed layer 2, from the viewpoint of preventing the generation of gaps in the planar direction and improving the removal efficiency of etching, for example, it can be set to be more than 10nm and less than 2μm.

[0043] [Metal layer]

[0044] The metal layer 3 is formed by electroplating. The main component of the metal layer 3 includes copper, nickel, silver, etc. Among them, copper is preferred because it has high conductivity and is relatively cheap. When the main component of the seed layer 2 is copper, high adhesion with the seed layer 2 can be obtained. When the main component of the metal layer 3 is copper, the metal layer 3 is preferably formed by electroplating using a copper sulfate plating bath containing an additive from the viewpoints of being relatively cheap and easy to adjust the thickness.

[0045] The average thickness of the metal layer 3 is set according to what kind of printed circuit is produced and is not particularly limited, but can be set to, for example, 1 μm or more and 100 μm or less.

[0046] [Conductive pattern]

[0047] The plurality of wiring portions constituting the conductive pattern 20 are composed of an outermost boundary wiring portion 11 which is located at the outermost side of the plurality of wiring portions in the base film 1 and is arranged at the boundary between the wiring region forming the wiring portion and the non-wiring region 12 without the wiring portion, and a plurality of inner wiring portions 10 other than the outermost boundary wiring portion 11. The plurality of inner wiring portions 10 are formed into linear and substantially identical shapes. The plurality of inner wiring portions 10 each have a small width and are arranged at a narrow pitch. In other words, the plurality of inner wiring portions 10 are arranged at a fine pitch.

[0048] The lower limit of the average width W1 of the outermost wiring portion 11 is 30 μm, and more preferably 50 μm. On the other hand, the upper limit of the average width W1 of the outermost wiring portion 11 is not particularly limited, and can be set to 200 μm, for example. If the average width W1 is less than the lower limit, it may be difficult to fully suppress the peeling of the outermost wiring portion 11 in the circuit forming process.

[0049] The upper limit of the average aspect ratio of the outermost wiring portion 11 is preferably 1.5. When the upper limit of the average aspect ratio of the outermost wiring portion 11 is within the above range, circuit peeling can be suppressed. On the other hand, the lower limit of the average aspect ratio is not particularly limited, and can be set to 0.3, for example.

[0050] The lower limit of the average width W2 of the wiring portion other than the outermost boundary wiring portion 11, i.e., the inner wiring portion 10, is 2 μm, and more preferably 5 μm. On the other hand, the upper limit of the average width W2 of the inner wiring portion 10 is 20 μm, and preferably 18 μm. If the average width W2 is less than the lower limit, the manufacture of the inner wiring portion 10 may become difficult. On the other hand, if the average width W2 exceeds the upper limit, it may become difficult to obtain the desired wiring density.

[0051] The lower limit of the average aspect ratio of the wiring portion other than the outermost boundary wiring portion 11, that is, the inner wiring portion 10, is 1.5, preferably 1.7. As described above, the fine pitch circuit is formed by the semi-additive method, and the wiring portion is small in area, so it cannot withstand the force from the side, and it is particularly easy to peel off the wiring portion set at the boundary between the area without wiring portion and the area with dense wiring portion. Furthermore, this effect becomes more significant for the wiring portion with a high average aspect ratio. Therefore, the present embodiment is more effective when the above-mentioned average aspect ratio is greater than 1.5. On the other hand, the upper limit of the average aspect ratio of the inner wiring portion 10 other than the outermost boundary wiring portion 11 is preferably 10, and more preferably 8. If the average aspect ratio of the inner wiring portion 10 exceeds the above-mentioned upper limit, the area of ​​the inner wiring portion 10 becomes excessively small, and there is a possibility that the inner wiring portion 10 becomes easy to peel off.

[0052] The lower limit of the average spacing D of the plurality of inner wiring portions 10 is preferably 2 μm, and more preferably 5 μm. On the other hand, the upper limit of the average spacing D of the plurality of inner wiring portions 10 is preferably 30 μm, and more preferably 25 μm. If the average spacing D is less than the lower limit, it may be difficult to manufacture the plurality of inner wiring portions 10. On the other hand, if the average spacing D exceeds the upper limit, it may be difficult to obtain the desired wiring density. The “average spacing D of the plurality of inner wiring portions 10” refers to the average distance between the end face of the inner wiring portion 10 and the end face of the inner wiring portion 10 adjacent thereto.

[0053] The lower limit of the ratio (W2 / D) of the average width W2 of the inner wiring portion 10 to the average spacing D between the plurality of the inner wiring portions 10 is preferably 0.3, and more preferably 0.5. On the other hand, the upper limit of W2 / D is preferably 10.0, and more preferably 5.0. If W2 / D is less than the above lower limit, the average spacing D between the plurality of inner wiring portions 10 becomes larger unnecessarily, and it may become difficult to obtain the desired wiring density. Furthermore, if the average width W2 of the inner wiring portion 10 becomes smaller, the wiring portion may become easily peeled off. On the other hand, if W2 / D exceeds the above upper limit, the average width W2 of the inner wiring portion 10 becomes larger unnecessarily, and it may become difficult to obtain the desired wiring density.

[0054] According to this printed wiring board 50 , even when the average aspect ratio of the plurality of inner wiring portions 10 is high, peeling of the outermost boundary wiring portion 11 formed at the outermost side of the base film 1 in the wiring region 22 and at the boundary between the wiring region 22 and the non-wiring region 12 can be suppressed.

[0055] <Manufacturing method of printed wiring board>

[0056] Secondly, refer to Figure 2 to Figure 6 right Figure 1 An example of a method for manufacturing the printed wiring board 50 will be described.

[0057] The method for manufacturing a printed wiring board is a method for manufacturing a printed wiring board that directly or indirectly forms a conductive pattern including a plurality of wiring portions on a surface of an insulating base film by a semi-additive method. Specifically, the method for manufacturing a printed wiring board includes: a process of stacking a seed layer (seed layer stacking process), a resist pattern forming process of forming a resist pattern (resist pattern forming process), a metal layer stacking process of stacking metal layers by electroplating (metal layer stacking process), a resist pattern stripping process of stripping the resist pattern (resist pattern stripping process), and a seed layer stripping process of stripping the seed layer (seed layer stripping process).

[0058] [Seed layer lamination process]

[0059] In the seed layer lamination step, a conductive seed layer 2 is directly or indirectly laminated on the surface of the base film 1. In the seed layer lamination step, for example, electroless plating, coating and sintering of a metal fine particle dispersion, etc. are used. Figure 3 As shown, the seed layer 2 is formed on substantially the entire surface of the base film 1 .

[0060] (Seed layer)

[0061] like Figure 3 As shown, in the above-mentioned seed layer lamination process, a seed layer 2 for forming a plating layer for electroplating is laminated on substantially the entire surface of one side of the base film 1. There is no particular limitation on the method of laminating the seed layer 2 in the above-mentioned seed layer lamination process, and examples thereof include a vapor deposition method, a sputtering method, and the like. In addition, as described above, in the above-mentioned seed layer lamination process, an ink containing metal particles may be applied to substantially the entire surface of one side of the base film 1 to sinter the metal particles, thereby laminating a sintered layer of metal particles on one side of the base film 1.

[0062] In addition, before the above-mentioned seed layer lamination step, a thin adhesion layer with high adhesion between the base film 1 and the seed layer 2 can be laminated on the surface of the base film 1. As a lamination method of the adhesion layer, for example, non-electrolytic plating, sputtering, evaporation, coupling agent coating, etc. can be listed, among which sputtering that can form an adhesion layer with excellent adhesion is particularly preferred.

[0063] The material of the adhesion layer is a metal containing nickel as a main component, and a nickel-chromium alloy having a large adhesion strength is particularly preferred.

[0064] [Resist pattern forming step]

[0065] In the resist pattern forming step, a resist pattern R having a reverse shape of a plurality of inner wiring portions 10 is formed on the surface of the seed layer stacked in the above-mentioned seed layer stacking step. In the resist pattern forming step, a resist film is stacked on the surface of the seed layer 2, such as Figure 4 As shown, a resist pattern R is formed by photolithography technology.

[0066] As a lamination method of the resist film, for example, a liquid resist composition is applied and dried, or a dry film photoresist having no fluidity at room temperature is formed on the surface of the seed layer 2 by thermal compression bonding. In the resist pattern forming step of forming the resist pattern, it is preferred to use a dry film photoresist to form the resist pattern. By using a dry film photoresist in the resist pattern forming step of forming the resist pattern, the thickness of the resist layer can be arbitrarily selected in a wide range, and the workability is excellent.

[0067] In the resist pattern forming step, first, a photoresist film is laminated on substantially the entire surface of the seed layer laminated in the seed layer lamination step. The photoresist film is formed, for example, using a positive resist composition that weakens polymer bonding by exposure and increases solubility in a developer.

[0068] Next, in the resist pattern forming step, the photoresist film is selectively exposed using a photomask or the like, thereby forming a portion that dissolves in a developer and a portion that does not dissolve in the photoresist film. Then, the dissolved portion is washed away using a developer, thereby forming a resist pattern. Figure 4 As shown, a resist pattern R having openings corresponding to the formation regions of the above-mentioned outermost boundary wiring portion and the plurality of inner wiring portions is formed.

[0069] As described above, the openings corresponding to the wiring portions in the openings of the resist pattern R are adjusted so that the average width of the outermost wiring portion is 30 μm or more, the average width of the inner wiring portion 10 is 20 μm or less, and the average aspect ratio is 1.5 or more. By setting the average width of the outermost wiring portion and the average width and average aspect ratio of the inner wiring portion 10 to the above ranges, a printed wiring board can be obtained in which peeling of the outermost wiring portion can be suppressed when the wiring portion has a high average aspect ratio.

[0070] [Metal layer lamination process]

[0071] In the metal layer lamination step, a metal layer 3 is laminated by electroplating on the surface of the seed layer exposed from the resist pattern formed in the resist pattern forming step. Figure 5 As shown, the metal layer 3 is stacked on the surface of the seed layer 2. In the metal layer stacking step, the metal layer 3 is stacked on the surface of the seed layer 2 in a non-stacked region of the resist pattern R (region corresponding to the opening of the resist pattern R).

[0072] As the metal used for the above-mentioned metal layer lamination process, copper, nickel, silver, etc. can be listed. Among these, copper with high conductivity and relatively cheap price is preferred. Furthermore, when the main component of the seed layer 2 is copper, copper that can obtain high adhesion with the seed layer 2 can be used. When the metal used in this process is copper, there is no particular limitation as the lamination method of the above-mentioned metal layer. From the viewpoint of relatively cheap price and easy adjustment of the thickness of the metal layer 3, it is preferred to perform electroplating using a copper sulfate plating bath containing additives.

[0073] [Resist pattern peeling step]

[0074] In the resist pattern stripping step, the resist pattern R formed in the resist pattern forming step is stripped. In the resist pattern stripping step, first, the resist pattern R is removed by stripping the resist pattern R from the seed layer 2. Specifically, the laminated body after the metal layer lamination step including the base film 1, the seed layer 2, the metal layer 3 and the resist pattern R is immersed in a stripping liquid, so that the resist pattern R is expanded by the stripping liquid. As a result, a repulsive force is generated between the resist pattern R and the seed layer 2, and the resist pattern R is stripped from the seed layer 2. As the stripping liquid, a known stripping liquid can be used.

[0075] [Seed layer peeling process]

[0076] In the seed layer stripping step, the seed layer 2 exposed after the resist pattern stripping step is stripped. In this etching, an etching solution that corrodes the metal forming the seed layer 2 is used. In this way, the resist pattern R and the region of the seed layer 2 that overlaps with the resist pattern R when viewed from above are removed, thereby manufacturing a plurality of inner wiring portions 10 and an outermost boundary wiring portion 11. The conductive pattern 20 after the resist pattern stripping step and the seed layer stripping step is as shown in FIG. Figure 2 shown.

[0077] As described above, in the case of the printed wiring board 50 manufactured by the method for manufacturing the printed wiring board, the base film 1 has a wiring area 22 including a plurality of wiring portions and a non-wiring area 12 not including a wiring portion. The outermost boundary wiring portion 11 is formed at the outermost side of the base film 1 in the wiring area 22 and at the boundary between the wiring area 22 and the non-wiring area 12. Moreover, the average width of the outermost boundary wiring portion 11 is 30 μm or more. In addition, the average width of the inner wiring portion 10 other than the outermost boundary wiring portion 11 is 20 μm or less, and the average aspect ratio of the inner wiring portion 10 is 1.5 or more. Therefore, according to the method for manufacturing the printed wiring board, even when the average aspect ratio of the plurality of inner wiring portions 10 is high, the peeling of the outermost boundary wiring portion 11 provided at the boundary between the wiring area 22 forming the inner wiring portion 10 and the non-wiring area 12 without a wiring portion can be suppressed.

[0078] [Other embodiments]

[0079] The embodiments disclosed this time should be considered to be illustrative in all aspects and not restrictive. The scope of the present disclosure is not limited to the configuration of the above-mentioned embodiments, but is indicated by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.

[0080] In the above embodiment, the configuration of stacking the conductive pattern on one side of the base film is described, but the printed wiring board may also stack a pair of conductive patterns on both sides of the base film. In addition, the manufacturing method of the printed wiring board may form a pair of conductive patterns on both sides of the base film.

[0081] In the above embodiment, the structure of stacking U-shaped conductive patterns when viewed from above is described, but the shape of the conductive patterns is not particularly limited, and various shapes such as a straight line and a spiral can be used. As a specific example of other conductive patterns, for example Figure 7 As shown, the conductive pattern may have no folded structure and may be arranged in a straight line, substantially parallel and at substantially equal intervals. Figure 7 The printed wiring board 100 shown includes: a base film 1 and a conductive pattern 55 including a plurality of wiring portions formed on the surface of the base film 1. The plurality of wiring portions are arranged at approximately equal intervals without short-circuiting the wiring. The base film 1 has a wiring area 33 including the plurality of wiring portions and a non-wiring area 32 not including the plurality of wiring portions. The plurality of wiring portions include two outermost boundary wiring portions 31 and a plurality of inner wiring portions 30 other than the outermost boundary wiring portions 31. In addition, the outermost boundary wiring portion 31 is formed at the outermost side of the base film 1 in the wiring area 33 and at the boundary between the wiring area 33 and the non-wiring area 32.

[0082] Furthermore, the average width of the outermost wiring portion 31 is 30 μm or more. In addition, the average width of the inner wiring portion 30 is 20 μm or less, and the average aspect ratio of the inner wiring portion 30 is 1.5 or more. Therefore, in the printed wiring board 100, even when the average aspect ratio of the plurality of inner wiring portions 30 is high, the peeling of the outermost wiring portion 31 can be suppressed.

[0083] Example

[0084] The present disclosure will be described in more detail below through examples, but the present disclosure is not limited to these examples.

[0085] [No.1~No.5]

[0086] A base film composed of a polyimide film with an average thickness of 25 μm was prepared. A conductive pattern including 10 wiring portions arranged in parallel was formed on both sides of the base film by a semi-additive method. Specifically, first, a seed layer with an average thickness of 0.4 μm composed of copper was stacked (seed layer stacking process). Secondly, after a photoresist film was stacked on substantially the entire surface of the seed layer by thermocompression bonding of an acrylic dry film resist, the photoresist film was selectively exposed using a photomask, thereby forming a portion that was soluble in a developer and an insoluble portion in the photoresist film, and the soluble portion was rinsed off using a developer, thereby forming a resist pattern having openings corresponding to the formation areas of the multiple wiring portions (resist pattern forming process).

[0087] Next, the surface of the seed layer after the resist pattern forming step was electroplated with copper using a 25° C. copper sulfate plating bath containing 100 g / L of copper sulfate pentahydrate to laminate a metal layer having an average thickness of 10 μm (metal layer laminating step).

[0088] Next, after the metal layer lamination step, the resist pattern was removed using a dry film stripping solution (resist pattern stripping step) to produce printed wiring boards No. 1 to No. 5. Table 1 shows the average width and average aspect ratio of the wiring portions of the printed wiring boards No. 1 to No. 5.

[0089] [Table 1]

[0090] [Table 1]

[0091]

[0092] [evaluate]

[0093] (Determination of peeling by appearance evaluation)

[0094] The state of each outermost wiring portion when the dry film stripping liquid was sprayed under three spray pressures of 0.1 MPa, 0.3 MPa and 0.5 MPa in the printed wiring boards No. 1 to No. 5 was determined by visual inspection under a microscope. Specifically, the state of the outermost wiring portion was evaluated using the following three levels of A to C. The evaluation results are shown in Table 1. In addition, Figure 6 : Electron microscope photographs showing the appearance of the outermost wiring portion of the No. 1 printed wiring board evaluated as B after the resist pattern stripping step was performed at a spray pressure of 0.3 MPa, and the No. 1 printed wiring board evaluated as C after the resist pattern stripping step was performed at a spray pressure of 0.5 MPa.

[0095] A: No peeling of the outermost wiring portion occurs

[0096] B: The outermost wiring portion is observed to fall down, and it can be determined that the outermost wiring portion has peeled off.

[0097] C: The outermost wiring portion does not exist at a predetermined position in the conductive pattern, and it can be determined that the peeling state of the outermost wiring portion has further deteriorated.

[0098] <Evaluation Results>

[0099] As shown in Table 1, the printed wiring boards No. 3 and No. 4, whose average width of the outermost wiring portion was 30 μm or more, did not experience peeling of the outermost wiring portion under all the spray pressure conditions of 0.1 MPa, 0.3 MPa and 0.5 MPa.

[0100] On the other hand, the printed wiring boards No. 1 and No. 2, whose average width of the outermost wiring portion was less than 30 μm, experienced peeling of the outermost wiring portion under the conditions of spray pressures of 0.3 MPa and 0.5 MPa, and the peeling state of the outermost wiring portion worsened as the spray pressure increased.

[0101] In addition, the No. 4 printed wiring board shown as a reference example with a small average aspect ratio of the inner wiring portion did not peel off at the outermost wiring portion under all spray pressure conditions of 0.1MPa, 0.3MPa and 0.5MPa, even though the average width of the outermost wiring portion was less than 30μm.

[0102] From the above, it can be seen that, for a printed wiring board including wiring portions with a high average aspect ratio, if the pressure generated by the spray is applied to the wiring portions, it becomes easy for the wiring portions set at the boundary between the area without wiring portions and the area with dense wiring portions to peel off. However, even if the printed wiring board includes such wiring portions with a high average aspect ratio, the peeling of the wiring portions set at the above-mentioned boundary can be suppressed.

[0103] As described above, the printed wiring board according to the embodiment of the present disclosure can suppress peeling of the wiring portion provided at the boundary between the wiring region where the wiring portion is formed and the non-wiring region where the wiring portion is not formed, when including the wiring portion with a high average aspect ratio, and is therefore suitable as a printed wiring board for small electronic devices.

[0104] Description of Reference Numerals

[0105] 1 Basement membrane

[0106] 2 Seed layer

[0107] 3 Metal Layer

[0108] 10, 30 Inner wiring section

[0109] 11, 31 Outermost boundary wiring part

[0110] 12, 32 No wiring area

[0111] 20, 55 Conductive pattern

[0112] 22, 33 wiring area

[0113] 50, 100 Printed wiring boards.

Claims

1. A printed wiring board, include: A base film having insulating properties; and A plurality of wiring portions are formed on the surface of the base film, The wiring portion includes a seed layer directly or indirectly stacked on a surface of a base film and a metal layer stacked on the seed layer. The base film has a wiring area including the plurality of wiring portions and a non-wiring area not including the wiring portions, The plurality of wiring portions include one or more outermost boundary wiring portions and a plurality of inner wiring portions other than the outermost boundary wiring portion. The outermost boundary wiring portion is formed at the outermost side of the base film in the wiring region and at the boundary between the wiring region and the non-wiring region. The average width of the outermost wiring portion is 30 μm or more, The average width of the inner wiring portion is 20 μm or less, The average aspect ratio of the inner wiring portion composed of a seed layer and a metal layer stacked on the seed layer is 2.2 or more, The aspect ratio is represented by dividing the maximum length of the inner wiring portion in a cross section in a thickness direction perpendicular to the longitudinal direction by an average width of the inner wiring portion.

2. The printed wiring board according to claim 1, in, The average width of the outermost wiring portion is 50 μm or more.

3. A method for manufacturing a printed wiring board, wherein a conductive pattern including a plurality of wiring portions is directly or indirectly formed on a surface of a base film having insulating properties by a semi-additive process, include: A seed layer lamination step of laminating a conductive seed layer directly or indirectly on the surface of the base film; a resist pattern forming step of forming a resist pattern having an inverse shape of the plurality of wiring portions on a surface of the seed layer; a metal layer laminating step of laminating a metal layer on the surface of the seed layer exposed from the resist pattern by electroplating; a resist pattern stripping step of stripping the resist pattern; as well as a seed layer stripping step of stripping the seed layer exposed after the resist pattern stripping step, The base film has a wiring area including the plurality of wiring portions and a non-wiring area not including the wiring portions, The plurality of wiring portions include one or more outermost boundary wiring portions and a plurality of inner wiring portions other than the outermost boundary wiring portion. The outermost boundary wiring portion is formed at the outermost side of the base film in the wiring region and at the boundary between the wiring region and the non-wiring region. The average width of the outermost wiring portion is 30 μm or more. The average width of the inner wiring portion is 20 μm or less, The average aspect ratio of the inner wiring portion composed of a seed layer and a metal layer stacked on the seed layer is 2.2 or more, The aspect ratio is represented by dividing the maximum length of the inner wiring portion in a cross section in a thickness direction perpendicular to the longitudinal direction by an average width of the inner wiring portion.

4. The method for manufacturing a printed wiring board according to claim 3, in, In the resist pattern forming step of forming the resist pattern, the resist pattern is formed using a dry film photoresist.

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