A low-noise charge-sensitive preamplifier and a method for reducing input capacitance

Abstract

The present invention relates to nuclear instrument electronic technology, and in particular to a low-noise charge-sensitive preamplifier and a method for reducing input capacitance, wherein the amplifier comprises a charge collection electrode, a shielding layer, a guardring, an amplifier and a clamping diode D; the charge collection electrode, the shielding layer and the clamping diode D are all connected to the amplifier. The amplifier can effectively reduce the detector's capacitance to ground, the parasitic capacitance of the input wiring and the input MOS tube through the shielding technology, thereby reducing the input capacitance of the charge-sensitive preamplifier, and the final total input capacitance is the capacitance of the detector itself to ground, which can effectively reduce the input capacitance of the charge-sensitive preamplifier and thus improve the ENC performance.

Description

Technical Field

[0001] The invention belongs to the field of nuclear instrument electronic technology, and particularly relates to a low-noise charge-sensitive preamplifier and a method for reducing input capacitance. Background Art

[0002] Preamplifiers are widely used in the detection and processing of weak signals output by detectors in the field of nuclear physics. They are used to improve the signal-to-noise ratio of the entire system and reduce external interference on the signal output by the detector. Currently, there are three types of preamplifiers used for such weak signal detection and processing: voltage-sensitive, current-sensitive, and charge-sensitive. Charge-sensitive preamplifiers are widely used due to their good performance such as stable gain and high signal-to-noise ratio. The signal-to-noise ratio is a key indicator of charge-sensitive preamplifiers, and the signal-to-noise ratio increases with the increase of the detector input capacitance.

[0003] Conventional charge sensitive preamplifiers such as Figure 1 As shown, IN is the detector input, Cd is the detector capacitance to ground, Rf and Cf are the feedback resistor and capacitor respectively, OUT is the output, and VREF provides the reference voltage. The feedback capacitor Cf integrates the charge Q generated by the detector, and the feedback resistor Rf acts to discharge the charge. The open-loop gain of the amplifier amp is set to A. Under the condition of A*Cf>>Cd, the output voltage of the traditional charge-sensitive preamplifier is VOUT=Q / Cf, and its input equivalent charge noise ENC is expressed as follows:

[0004]

[0005] Among them, Rs is the equivalent series noise resistance, ts is the shaping time, Kf is the input tube 1 / f noise coefficient, and a1, a2, and a3 are noise indices related to the shaping circuit.

[0006] To obtain low (equivalent noise charge) ENC, a small detector input capacitance Cd is required, and to obtain high gain, a small feedback capacitance Cf is required. However, the detector input capacitance is closely related to the size of its charge collection electrode, and is affected by the parasitic capacitance of the routing and input MOS tube, and too small feedback capacitance Cf will lead to poor consistency.

[0007] The input capacitance of a traditional charge-sensitive preamplifier is the sum of the detector-to-ground capacitance, the input wiring, and the parasitic capacitance of the input MOS tube. It is impossible to reduce or eliminate these three capacitances. In addition, in order to improve the ENC performance, the traditional charge-sensitive preamplifier needs to reduce Cf, which will increase the difference in Cf between different pixels or different chips, ultimately leading to inconsistent charge conversion gains between different pixels or different chips. Summary of the invention

[0008] In view of the problems existing in the background technology, the present invention provides a low-noise charge-sensitive preamplifier and a method for reducing input capacitance.

[0009] To solve the above technical problems, the present invention adopts the following technical solution: a low-noise charge-sensitive preamplifier, including a charge collection electrode, a shielding layer, a guardring, an amplifier and an embedded diode D; the charge collection electrode, the shielding layer and the embedded diode D are all connected to the amplifier.

[0010] In the above low-noise charge-sensitive preamplifier, the charge collection electrode is hexagonal and the bottom metal is a shielding layer.

[0011] In the above-mentioned low-noise charge-sensitive preamplifier, the amplifier includes a first field effect transistor M1, a second field effect transistor M2, a third field effect transistor M3, a fourth field effect transistor M4, a fifth field effect transistor M5, a sixth field effect transistor M6, a seventh field effect transistor M7, an eighth field effect transistor M8, a ninth field effect transistor M9, a tenth field effect transistor M10, an eleventh field effect transistor M11, a first capacitor Cs, and a second capacitor Cc; the charge collection electrode is connected to the gate of the first field effect transistor M1, and the first field effect The source of the transistor M1 is connected to the drain of the seventh field effect transistor M7, the source of the third field effect transistor M3 and one plate of the first capacitor Cs, the drain of the first field effect transistor M1 is connected to the source of the second field effect transistor M2 and the gate of the third field effect transistor M3, the gate of the second field effect transistor M2 is connected to the drain of the third field effect transistor M3 and the drain of the fourth field effect transistor M4, the drain of the second field effect transistor M2 is connected to the drain of the ninth field effect transistor M9, the source of the tenth field effect transistor M10 and the load capacitor C L The gate of the ninth field effect transistor M9 is connected to the first capacitor C s and the second capacitor C c The source of the ninth field effect transistor M9, the source of the fourth field effect transistor M4, the source of the sixth field effect transistor M6, and the second capacitor C c One plate, load capacitance C LThe fourth field effect transistor M4 is connected to the ground, the gate of the fourth field effect transistor M4 is connected to the gate and drain of the sixth field effect transistor M6 and the drain of the fifth field effect transistor M5, the gates of the seventh field effect transistor M7 and the fifth field effect transistor M5 are connected together and are provided with a bias voltage by VBIAS1, the drain of the tenth field effect transistor M10 is connected to the drain of the eleventh field effect transistor M11, the gate of the tenth field effect transistor M10 is provided with a bias voltage by VBIAS3, the gate of the eleventh field effect transistor M11 is provided with a bias voltage by VBIAS2, the sources of the seventh field effect transistor M7, the fifth field effect transistor M5 and the eleventh field effect transistor M11 are connected to the power supply AVDD, the cathode of the clamping diode D is connected to the gate of the first field effect transistor M1, and the anode of the clamping diode D is connected to the clamping voltage VCLAMP; the shielding layer is connected to the source or drain of the first field effect transistor M1.

[0012] In the above-mentioned low-noise charge-sensitive preamplifier, the first field effect transistor M1, the second field effect transistor M2, the third field effect transistor M3, the fifth field effect transistor M5, the seventh field effect transistor M7, and the eleventh field effect transistor M11 are P-type field effect transistors; the fourth field effect transistor M4, the second field effect transistor M6, the third field effect transistor M9, and the tenth field effect transistor M10 are N-type field effect transistors.

[0013] A method for reducing the input capacitance of a low-noise charge-sensitive preamplifier, wherein a first field effect transistor M1, a second field effect transistor M2 and a third field effect transistor M3 are used as amplifier tubes; a ninth field effect transistor M9 is used as an active load tube; an embedded diode D provides a DC bias voltage for an input terminal and discharges the charge at the input terminal; a fourth field effect transistor M4, a fifth field effect transistor M5 and a sixth field effect transistor M6 provide a DC bias current for the third field effect transistor M3, a seventh field effect transistor M7 provides a DC bias current for the first field effect transistor M1, and a tenth field effect transistor M10 and an eleventh field effect transistor M11 provide a DC bias voltage for an output node OUT; the currents of the first field effect transistor M1, the second field effect transistor M2, the seventh field effect transistor M7 and the ninth field effect transistor M9 branches and the third field effect transistor M3 and the fourth field effect transistor M4 branches are constant , then the gate-source voltage difference of the first field effect transistor M1 and the third field effect transistor M3 remains unchanged, and the gate-source and gate-drain voltage differences of the input tube first field effect transistor M1 remain constant; according to the Miller effect theorem, the parasitic capacitance between the gate and source and the parasitic capacitance between the gate and drain of the first field effect transistor M1 contribute zero to the input capacitance, thereby reducing the input capacitance of the detector; by connecting the shielding layer to the source of the amplifier input tube first field effect transistor M1, the coupling capacitance between the charge collection electrode and the shielding layer is converted into the gate-source capacitance of the first field effect transistor M1, so that the source and drain potentials of the first field effect transistor M1 can follow its gate potential, then the coupling capacitance between the gate and the source or drain of the first field effect transistor M1 contributes zero to the total input capacitance of the amplifier, and then the parasitic capacitance of the first field effect transistor M1 and the charge collection electrode contributes zero to the total input capacitance.

[0014] Compared with the prior art, the potential of the input tube source and drain of the charge-sensitive preamplifier of the present invention can follow its gate potential. According to the Miller effect theorem, the coupling capacitance between the gate and the source or drain of the input tube does not contribute to the total input capacitance, and thus the parasitic capacitance of the input tube contributes zero to the total input capacitance. The connecting wire between the detector and the input tube is shielded by the bottom metal through the shielding technology, and the shielding wire is connected to the source or drain of the input tube, thereby eliminating the contribution of the connecting wire between the detector and the input tube to the total input capacitance. The final total input capacitance is the capacitance of the detector itself to the ground, which can effectively reduce the input capacitance of the charge-sensitive preamplifier. Even more, the detector charge collecting electrode can be shielded by the bottom metal through the shielding technology, and the shielding wire is also connected to the source or drain of the input tube, further reducing the capacitance of the detector to the ground, and ultimately improving the ENC performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a prior art charge sensitive preamplifier;

[0016] Figure 2 This is a structural diagram of a low-noise charge-sensitive preamplifier according to an embodiment of the present invention. DETAILED DESCRIPTION

[0017] The technical solutions in the embodiments of the present invention will be described clearly and completely below in combination with the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0019] The present invention will be further described below in conjunction with specific embodiments, but the present invention is not limited thereto.

[0020] The purpose of this embodiment is to solve the problem of large input capacitance of the charge-sensitive preamplifier deteriorating the ENC. The ENC of the charge-sensitive preamplifier is proportional to its input capacitance, which is the sum of the detector-to-ground capacitance, the input wiring, and the parasitic capacitance of the input MOS tube. In view of the problem that the traditional charge-sensitive preamplifier cannot reduce these three capacitances, this embodiment proposes a low-noise charge-sensitive preamplifier, which can effectively reduce the detector-to-ground capacitance, the parasitic capacitance of the input wiring and the input MOS tube through shielding technology, thereby reducing the input capacitance of the charge-sensitive preamplifier and improving the ENC performance.

[0021] The present embodiment is realized by the following technical scheme: a low-noise charge-sensitive preamplifier, comprising a charge collection electrode, a shielding layer, a guardring, an amplifier and a clamping diode, wherein the amplifier comprises a P-type field effect transistor: a first field effect transistor M1, a second field effect transistor M2, a third field effect transistor M3, a fifth field effect transistor M5, a seventh field effect transistor M7, an eleventh field effect transistor M11, an N-type field effect transistor: a fourth field effect transistor M4, a sixth field effect transistor M6, a ninth field effect transistor M9, a tenth field effect transistor M10 and a first capacitor Cs, a second capacitor Cc, and a charge The collecting electrode is connected to the gate of the first field effect transistor M1 of the amplifier input tube, the source of the first field effect transistor M1 is connected to the drain of the first field effect transistor M7 of the load transistor, the source of the third field effect transistor M3 and one plate of the first capacitor Cs, the drain of the first field effect transistor M1 is connected to the source of the second field effect transistor M2 and the gate of the third field effect transistor M3, the gate of the second field effect transistor M2 is connected to the drain of the third field effect transistor M3 and the drain of the fourth field effect transistor M4, the drain of the second field effect transistor M2 is connected to the drain of the ninth field effect transistor M9, the source of the tenth field effect transistor M10 and the load capacitor Cs L A plate is connected to the gate of the ninth field effect transistor M9 and the first capacitor C s and the second capacitor C c A plate is connected, the source of the ninth field effect transistor M9, the source of the fourth field effect transistor M4, the source of the sixth field effect transistor M6, the second capacitor C c One plate, load capacitance C L The fourth field effect transistor M4 is connected to the ground, the gate of the fourth field effect transistor M4 is connected to the gate and drain of the sixth field effect transistor M6 and the drain of the fifth field effect transistor M5, the gates of the seventh field effect transistor M7 and the fifth field effect transistor M5 are connected together and are provided with a bias voltage by VBIAS1, the drain of the tenth field effect transistor M10 is connected to the drain of the eleventh field effect transistor M11, the gate of the tenth field effect transistor M10 is provided with a bias voltage by VBIAS3, the gate of the eleventh field effect transistor M11 is provided with a bias voltage by VBIAS2, the sources of the seventh field effect transistor M7, the fifth field effect transistor M5 and the eleventh field effect transistor M11 are connected to the power supply AVDD, the cathode of the clamping diode D is connected to the gate of the first input field effect transistor M1, and the anode of the clamping diode D is connected to the clamping voltage VCLAMP.

[0022] like Figure 2As shown, the potentials of the source and drain terminals of the input tube of the charge-sensitive preamplifier of this embodiment can follow the gate potential thereof, and the total input capacitance is reduced by shielding technology. The first field effect transistor M1, the second field effect transistor M2, and the third field effect transistor M3 are amplifier tubes, the ninth field effect transistor M9 is an active load tube, the embedded diode D provides a DC bias voltage for the input terminal and discharges the charge at the input terminal, the fourth field effect transistor M4, the fifth field effect transistor M5, and the sixth field effect transistor M6 provide a DC bias current for the third field effect transistor M3 of the amplifier tube, the seventh field effect transistor M7 provides a DC bias current for the first field effect transistor M1 of the input tube, and the tenth field effect transistor M10 and the eleventh field effect transistor M11 provide a DC bias voltage for the output node OUT. Since the first field effect transistor M1, the second field effect transistor M2, the seventh field effect transistor M7, the ninth field effect transistor M9 branch and the third field effect transistor M3, the fourth field effect transistor M4 branch all have constant currents, the gate-source voltage difference of the first field effect transistor M1 and the third field effect transistor M3 remains unchanged, that is, the gate-source and gate-drain voltage differences of the input tube first field effect transistor M1 remain constant. According to the Miller effect theorem, the parasitic capacitance between the gate and source and the parasitic capacitance between the gate and drain of the input tube first field effect transistor M1 contribute zero to the input capacitance, thereby reducing the input capacitance of the detector. There is a coupling capacitance between the hexagonal charge collection electrode and the wafer substrate. If the charge collection electrode is shielded with the bottom metal, and the shielding layer is connected to the source or drain of the amplifier input tube first field effect transistor M1, as shown in FIG. Figure 2 As shown in the hexagonal shielding layer on the left, the coupling capacitance between the charge collection electrode and the shielding layer is converted into the gate-source capacitance of the first field effect transistor M1 of the amplifier input tube. The source and drain potentials of the input tube of the charge sensitive preamplifier in this embodiment can follow its gate potential. According to the Miller effect theorem, the coupling capacitance between the gate and the source or drain of the input tube does not contribute to the total input capacitance, and thus the parasitic capacitance of the input tube and the charge collection electrode contributes zero to the total input capacitance. Therefore, this embodiment achieves the goal of reducing the input capacitance of the detector, which is conducive to the low-noise design of the charge sensitive preamplifier.

[0023] In this embodiment, the source and drain potentials of the amplifier input tube follow the gate characteristics, and the shielding technology and the Miller effect can be used to reduce the input capacitance of the amplifier, thereby improving the equivalent input charge noise.

[0024] The above are only preferred embodiments of the present invention, and are not intended to limit the implementation methods and protection scope of the present invention. Those skilled in the art should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the contents of the specification of the present invention should be included in the protection scope of the present invention.

Claims

1. A low noise charge sensitive preamplifier, It is characterized in that The invention comprises a charge collection electrode, a shielding layer, a guardring, an amplifier and a clamping diode, wherein the amplifier comprises a P-type field effect transistor: a first field effect transistor (M1), a second field effect transistor (M2), a third field effect transistor (M3), a fifth field effect transistor (M5), a seventh field effect transistor (M7), and an eleventh field effect transistor (M11), an N-type field effect transistor: a fourth field effect transistor (M4), a sixth field effect transistor (M6), a ninth field effect transistor (M9), and a tenth field effect transistor (M10), and a first capacitor (C s )、Second capacitor(C c ), the charge collection electrode is connected to the gate of the first field effect transistor (M1) of the amplifier input tube, the source of the first field effect transistor (M1) is connected to the drain of the first field effect transistor (M7) of the load transistor, the source of the third field effect transistor (M3) and the first capacitor (C s ), the drain of the first field effect transistor (M1) is connected to the source of the second field effect transistor (M2) and the gate of the third field effect transistor (M3), the gate of the second field effect transistor (M2) is connected to the drain of the third field effect transistor (M3) and the drain of the fourth field effect transistor (M4), the drain of the second field effect transistor (M2) is connected to the drain of the ninth field effect transistor (M9), the source of the tenth field effect transistor (M10) and a plate of the load capacitor (CL), the gate of the ninth field effect transistor (M9) is connected to the first capacitor (C s ) and the second capacitor (C c ) is connected to a plate, the source of the ninth field effect transistor (M9), the source of the fourth field effect transistor (M4), the source of the sixth field effect transistor (M6), the second capacitor (C c ) one plate, a load capacitor (CL) and ground are connected, the gate of the fourth field effect transistor (M4) is connected to the gate and drain of the sixth field effect transistor (M6) and the drain of the fifth field effect transistor (M5), the gates of the seventh field effect transistor (M7) and the fifth field effect transistor (M5) are connected together and a bias voltage is provided by VBIAS1, the drain of the tenth field effect transistor (M10) is connected to the drain of the eleventh field effect transistor (M11), the gate of the tenth field effect transistor (M10) is provided with a bias voltage by VBIAS3, the gate of the eleventh field effect transistor (M11) is provided with a bias voltage by VBIAS2, the sources of the seventh field effect transistor (M7), the fifth field effect transistor (M5) and the eleventh field effect transistor (M11) are connected to the power supply AVDD, the cathode of the clamping diode (D) is connected to the gate of the first input field effect transistor (M1), and the anode of the clamping diode (D) is connected to the clamping voltage VCLAMP; The source and drain potentials of the input tube of the charge sensitive preamplifier can follow the gate potential, and the total input capacitance is reduced by shielding technology. The first field effect transistor (M1), the second field effect transistor (M2), and the third field effect transistor (M3) are amplifier tubes, the ninth field effect transistor (M9) is an active load tube, the embedded diode (D) provides a DC bias voltage for the input end and discharges the charge at the input end, the fourth field effect transistor (M4), the fifth field effect transistor (M5), and the sixth field effect transistor (M6) provide a DC bias current for the third field effect transistor (M3) of the amplifier tube, the seventh field effect transistor (M7) provides a DC bias current for the first field effect transistor (M1) of the input tube, the tenth field effect transistor (M10), and the eleventh field effect transistor (M11) provides a DC bias voltage for the output node OUT; since the first field effect transistor (M1), the second field effect transistor (M2), the seventh field effect transistor (M7), the ninth field effect transistor (M9) branch and the third field effect transistor (M3), the fourth field effect transistor (M4) branch all have constant currents, the gate-source voltage difference of the first field effect transistor (M1) and the third field effect transistor (M3) remains unchanged, that is, the gate-source and gate-drain voltage differences of the input tube first field effect transistor (M1) remain constant; according to the Miller effect theorem, the parasitic capacitance between the gate and the source and the parasitic capacitance between the gate and the drain of the input tube first field effect transistor (M1) contributes zero to the input terminal capacitance, thereby reducing the input capacitance of the detector; There is a coupling capacitance between the hexagonal charge collection electrode and the wafer substrate. If the charge collection electrode is shielded by the bottom metal, and the shielding layer is connected to the source or drain of the first field effect transistor (M1) of the amplifier input tube, the coupling capacitance between the charge collection electrode and the shielding layer is converted into the gate-source capacitance of the first field effect transistor (M1) of the amplifier input tube; The potential of the source and drain of the input tube of the charge sensitive preamplifier can follow its gate potential. According to the Miller effect theorem, the coupling capacitance between the gate and the source or drain of the input tube does not contribute to the total input capacitance, and thus the contribution of the parasitic capacitance of the input tube and the charge collection electrode to the total input capacitance is zero. Therefore, the goal of reducing the input capacitance of the detector is achieved, which is conducive to the design of low noise of the charge sensitive preamplifier. By making the source and drain potentials of the amplifier input tube follow the gate characteristics, shielding technology and Miller effect can be used to reduce the input capacitance of the amplifier, thereby improving the equivalent input charge noise.

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