Package with suspended inductor

Abstract

The present disclosure relates to packages with suspended inductors. Techniques for providing a regulator circuit using a component-on-package (CoP) package are described. The CoP package includes: a system-in-package (SIP) including a regulator circuit, the SIP having a top and a first side; and an inductor on the top of the SIP, wherein the inductor is coupled to the regulator circuit through the top of the SIP; and a first end of the inductor extends beyond the first side of the SIP.

Description

Technical Field

[0001] This document relates generally, but not limitingly, to a top component on package (CoP) regulator device. Background Art

[0002] Typical systems use discrete physical components coupled together on a printed circuit board to provide a regulator, such as a DC / DC regulator. The differences between these discrete components are often addressed using a variety of passive components that introduce noise and inefficiencies, and take up board space. As a result, combining all of these discrete components on a printed circuit board to provide a regulator limits the system's versatility and performance reliability, increases manufacturing complexity and cost, and consumes a significant amount of physical board space. Summary of the invention

[0003] The present disclosure describes techniques for providing a regulator circuit using a CoP package. The CoP package includes a system-in-package (SIP) including: a regulator circuit, the SIP having a top and a first side; and an inductor on the top of the SIP, wherein the inductor is coupled to the regulator circuit through the top of the SIP; and a first end of the inductor extends beyond the first side of the SIP.

[0004] In some implementations, the inductor and regulator circuit of the SIP together implement a switching regulator.

[0005] In some implementations, the regulator circuit includes a switching circuit for charging and discharging the inductor.

[0006] In some implementations, the inductor delivers charge to a load coupled to the CoP package.

[0007] In some embodiments, the second end of the inductor extends beyond the second side portion of the SIP. In some embodiments, the second end of the inductor is parallel to or perpendicular to the first end of the inductor. In some embodiments, the second end of the inductor is parallel to the second side portion of the SIP.

[0008] In some implementations, the SIP has four sides, and wherein each end of the inductor extends beyond each of the four sides of the SIP.

[0009] In some embodiments, the inductor includes first and second terminals, wherein the first and second terminals extend vertically downward from a bottom of the inductor through a top of the SIP to the regulator circuit. In some embodiments, the first terminal is located at a first location on the bottom of the inductor, the first location is a specified distance from a first end of the inductor, and the first location overlaps with a top of the SIP.

[0010] In some embodiments, a SIP is coupled to a printed circuit board, wherein a passive or active component external to the SIP is coupled to the SIP through the circuit board, and at least a portion of the passive or active component is physically placed in an area between the first end of the inductor and the first side of the SIP. In some embodiments, the passive or active component includes another SIP, a resistor, a capacitor, an integrated passive device, a transistor, or an inductor.

[0011] In some embodiments, a SIP is coupled to a printed circuit board, wherein a plurality of passive or active components external to the SIP are coupled to the SIP through the circuit board, and at least a portion of the plurality of passive or active components are physically placed around the periphery of the SIP in an area between an end of the inductor and a side of the periphery of the SIP.

[0012] In some implementations, a void area is formed between a bottom portion of the inductor and a top portion of the SIP.

[0013] In some embodiments, the operations performed by the present disclosure include: generating a regulated voltage signal by a regulator circuit implemented on a system-in-package (SIP), the SIP having a top and a first side, the SIP being coupled to an inductor via the top of the SIP, and the first end of the inductor extending beyond the first side portion of the SIP; and delivering the regulated voltage to a load.

[0014] This summary is intended to provide an overview of the subject matter of this patent application. It is not intended to provide an exclusive or exhaustive explanation of the subject matter of the present invention. The detailed description is included to provide more information about this patent application. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In the accompanying drawings, which are not necessarily drawn to scale, like numbers may describe similar components in different views. Like numbers with different letter suffixes may represent different instances of similar components. The accompanying drawings generally illustrate various embodiments discussed in this document by way of example and not limitation.

[0016] Figure 1 is a block diagram of an example of a CoP package regulator device according to various embodiments.

[0017] Figure 2is a block diagram of an example of a switching regulator implemented by a CoP package according to various embodiments.

[0018] Figure 3 is a block diagram of an example physical layout of a CoP packaged regulator device according to various embodiments.

[0019] Figure 4 is a block diagram of an example of a side view of a physical layout of a CoP packaged regulator device according to various embodiments.

[0020] Figure 5 is a block diagram of an example of a top view of a physical layout of a CoP packaged regulator device according to various embodiments.

[0021] Figure 6 is a block diagram illustrating an example of a machine upon which one or more embodiments may be implemented. DETAILED DESCRIPTION

[0022] A System-in-Package (SIP) or System-in-Package is a physical assembly made of multiple integrated circuits integrated into a single module (package). The die containing the integrated circuits can be stacked vertically on a substrate. They are connected internally by fine wires, which are connected to the package. Additionally, with flip-chip technology, the stacked chips can be connected together using solder bumps. SIP dies can be stacked vertically or horizontally, unlike the slightly less dense multi-chip modules, which place the dies horizontally on a carrier. This means that complete functional units can be built in a multi-chip package, allowing fewer external components to make the functional unit work properly.

[0023] CoP packaging (or package-on-package PoP) is an integrated circuit packaging method that combines vertical discrete logic and memory ball grid array (BGA) packages, such as two or more SIP packages. Two or more packages are stacked on top of each other (e.g., stacked) and have a standard interface to route signals between them. This allows for higher component density in devices such as mobile phones, personal digital assistants (PDAs), and digital cameras at the expense of higher height requirements.

[0024] The package size on the printed circuit board (PCB) and the power output of the regulator (such as a DC / DC switching regulator) are usually considered in manufacturing the regulator. Conventional capacitors with larger sizes may have higher power output, but may occupy a larger area on the PCB. Some systems use CoP packaging to build some components of the regulator into one package and then stack it on another package. The physical size of the PCB in these systems is determined by the package on the top, because the package on the bottom is designed to be the same size or larger than the package on the top. For example, in these systems, the amount of space on the PCB is determined by the size of the inductor (top or bottom).

[0025] Some typical systems rely on higher DC / DC regulator switching frequencies to reduce the physical size of the regulator on the PCB. However, this approach usually results in lower operating efficiency, higher power losses, and increased junction temperature. That is, efficiency and thermal performance are sacrificed to achieve a smaller PCB footprint through the regulator.

[0026] The present disclosure describes, among other things, techniques for providing a regulator such as a DC / DC regulator using a CoP package, wherein an inductor is physically suspended above the top of a regulator package at the bottom. In particular, the present disclosure provides a CoP package that includes a SIP package having a regulator circuit and an inductor. The SIP has a top and a first side portion, and the inductor on the top of the SIP is coupled to the regulator circuit through the top of the SIP. The first end of the inductor extends beyond the first side portion of the SIP. In this way, the physical space occupied by the regulator circuit at the bottom of the CoP package is not limited by the size of the inductor at the top of the package. This allows a smaller footprint to be occupied by the regulator on the PCB, and improves the efficiency and thermal performance of the regulator, relative to a system that increases the switching frequency of the regulator to occupy a similar sized footprint.

[0027] Figure 1 is a block diagram of an example of a top component package regulator device 100 according to various embodiments. The top component package regulator device 100 includes a SIP regulator circuit 110 and an inductor 120. Although the SIP regulator circuit 110 is shown as being implemented in the top component package regulator device 100, any other type of amplifier, digital-to-analog converter, RF transmitter / receiver, or other device may be used instead of or in addition to the SIP regulator circuit 110.

[0028] The top component package regulator device 100 also includes an integrated passive component network (e.g., an integrated passive resistor and capacitor network) (not shown) coupled within and / or outside the top component package regulator device 100. One or more external passive or active elements (e.g., capacitors, inductors, resistors, transistors, etc.) are connected to the top component package regulator device 100 to adjust the parameters of the SIP regulator circuit 110.

[0029] The top component package regulator device 100 receives an analog signal 112, which can be a differential signal or a single input signal. The analog signal 112 can be an AC or DC signal. Although Figure 1Only one differential or single analog signal 112 is shown, but any number of other differential or single input signals can be received and processed in parallel by the top component package regulator device 100. The top component package regulator device 100 processes the analog signal 112 to generate an output signal 132, such as a regulated DC voltage that is stepped up or down relative to the analog signal 112.

[0030] Each component of the SIP regulator circuit 110 can be implemented and manufactured together in the same system-level package and interconnected with one or more wires bonded to the SIP. The system-level package can be a land grid array (LGA), ball grid array (BGA), or pin grid array (PGA) package. The inductor 120 can be manufactured with the SIP regulator circuit 110 or separately from the SIP regulator circuit 110. The inductor 120 is physically connected to the SIP regulator circuit 110 from the top of the SIP regulator circuit 110 to form the top component package regulator device 100.

[0031] In some embodiments, a first portion of components implemented on the SIP regulator circuit 110 and / or the top component packaged regulator device 100 may be fabricated using a first fabrication process (e.g., low voltage MOS, high voltage MOS, low voltage DMOS, high voltage DMOS, low voltage bipolar, high voltage bipolar, high speed bipolar, BiCMOS, JFET, silicon germanium, silicon carbide, gallium nitride, gallium arsenide, gallium nitride on silicon carbide, gallium nitride on silicon, or silicon on insulator). A second portion of components implemented on the SIP regulator circuit 110 and / or the top component packaged regulator device 100 may be fabricated using a second fabrication process different from the first fabrication process (e.g., low voltage MOS, high voltage MOS, low voltage DMOS, high voltage DMOS, low voltage bipolar, high voltage bipolar, high speed bipolar, BiCMOS, JFET, silicon germanium, silicon carbide, gallium nitride, gallium arsenide, gallium nitride on silicon carbide, gallium nitride on silicon, or silicon on insulator). For example, the SIP regulator circuit 110 may be implemented with low voltage JFET devices, and the inductor 120 may be implemented with discrete passive or active physical components.

[0032] The components in the SIP regulator circuit 110 and / or the top component package regulator device 100 can be coupled together through a series of integrated passive devices (resistors and capacitors) by connecting to one or more wires in or within the SIP. These integrated passive devices can be manufactured using standard wafer manufacturing techniques, such as thin film and photolithography processing. The substrate for the integrated passive devices can be a thin film substrate such as silicon, alumina or glass. For example, the integrated passive resistors can be manufactured from high precision thin film silicon chromium (SiCr). The integrated passive capacitors can be manufactured as metal-insulator-metal (MIM) capacitors.

[0033] The use of such integrated passive devices (components) (iPassive devices) provides a technical improvement over conventional systems using discrete passive components. In particular, the implementation of integrated passive devices in the SIP regulator circuit 110 and / or the top component package regulator apparatus 100 can achieve performance that is superior to that obtained using discrete passive components, and the part-to-part variation of the integrated passive devices is lower than the variation of discrete passive components on a printed circuit board that is typically used to implement conventional regulators.

[0034] Figure 2 is a block diagram of an example of a switching regulator implemented by the top component package regulator device 100 according to various embodiments. As an example, the top component package regulator device 100 implements a single-input multiple-output (SIMO) switching regulator.

[0035] The top component package regulator device 100 may be a current mode (CM) DC / DC switching power supply, also referred to as a current mode DC / DC converter. Many other converter configurations may also benefit from the present disclosure. Figure 2 The converter type shown is a peak current mode converter. Figure 2 An overview of the switching regulator function is shown, and further details are provided in U.S. Patent No. 5,617,015, filed on June 7, 1995, which is incorporated herein by reference in its entirety.

[0036] During operation, a control circuit (not shown) included in the top component package regulator device 100 (e.g., as part of the SIP regulator circuit 110) turns on and off the common loop switches 132A-C (S1, S2, and S3, respectively) of the switching regulator based on a common loop signal of a specific frequency to control the current flow to the negative channel 133 (Vnegk ... Vneg1) and the positive channel 134 (Vposi ... Vpos1). The control circuit also turns on and off the differential loop switches (Snk ... Sn1 and Spi ... Sp1) based on the differential loop signal to control the current flow to the respective positive and negative channels.

[0037] In one example, when the control circuit turns on the common loop switches 132A and 132C, the input voltage Vin (e.g., the analog signal 112) is applied to the inductor 120 through the common loop switch 132A (S1), and a ramp current is caused to flow through the inductor 120 in one phase. The current flows through the current sensor 135 (e.g., a current detection circuit). In another phase, the current from the inductor 120 (which may be different from the ramp current in the previous phase) flows through each negative channel 133 coupled to one terminal of the inductor 120, and flows through each positive channel 134 coupled. The control circuit controls which channel receives the current flowing through the inductor 120 in the positive and negative directions by turning on and off each differential loop switch (Snk...Sn1 and Spi...Sp1).

[0038] The inductor 120 may be implemented as a top component of the top component package regulator device 100, and Figure 2 The remaining circuit components shown may be implemented by the bottom components of the top component package regulator device 100. In some cases, Figure 2 The inductor 120 and the first group of other components shown in the figure can be implemented by the top component of the top component package regulator device 100, while the remaining second group of components can be implemented by the bottom component of the top component package regulator device 100. In some cases, the inductor 120 can be implemented by the top component of the top component package regulator device 100, Figure 2 The first set of remaining circuit components shown in FIG. 1 can be implemented by the bottom components of the top component packaging regulator device 100, while Figure 2 The second set of remaining circuit components shown in can be implemented off-chip and outside the components of the top component package regulator device 100.

[0039] In some cases, the second set of remaining circuit components can be at least partially or completely covered by one or more sides of the inductor 120. For example, one side of the inductor 120 on the second or top layer of the components of the top component encapsulating the regulator device 100 overhangs and extends beyond a side of the bottom component on a first or bottom level of the top component encapsulating the regulator device 100. This physical arrangement creates a physical gap between the side of the bottom component and the side of the inductor 120. One or more passive or active circuit elements (e.g., resistors, capacitors, transistors, integrated passive components, inductors, etc.) can be at least partially placed within the physical empty space on the same layer or level as the bottom component of the components of the top component encapsulating the regulator device 100.

[0040] The control circuit receives the voltage output of each channel in the positive channel and the negative channel. Based on the comparison of the voltage with the reference voltage, the control circuit determines when to turn on or off the common loop switch 132A-C. In one embodiment, the control circuit calculates the sum of all positive channel voltages (Vposi...Vpos1) and also calculates the sum of all negative channel voltages (Vnegk...Vneg1). The control circuit calculates the difference between the sum of the positive voltage and the negative voltage and applies the voltage difference to the negative input of the transconductance error amplifier (not shown). The reference voltage Vref is applied to the positive input of the transconductance error amplifier. The output current of the transconductance error amplifier corresponds to the difference between the average actual output voltage and the desired output voltage on all channels. Based on the positive or negative current output of the transconductance error amplifier, the voltage across the capacitor at the output of the transconductance error amplifier can be adjusted up or down. This voltage is called the control voltage Vcomp.

[0041] The control voltage Vcomp is applied to a pulse width modulation (PWM) comparator (also referred to as a current comparator, not shown). When the common loop switch 132A is turned on, the ramp voltage across the current detection circuit is sensed by a differential amplifier having a certain gain in the current sensor 135, and when the output of the amplifier in the current sensor 135 exceeds the control voltage Vcomp, the PWM comparator is triggered to output a signal in the control circuit. The control circuit logically combines the signal with the clock signal received by the control circuit to turn on or off the common loop switch 132A and control the companion switches 132B and 132C. In one embodiment, the control companion switches 132B and 132C are companion switches of the common loop switch 132A, and are turned on or off at the same time that the switch 132A is turned on or off. In one embodiment, when the common loop switch 132A is turned on, the control companion switches 132B and / or 132C are turned off. For example, when the common loop switch 132A is turned off, the companion switch 132B is controlled to turn on to discharge the inductor 120, thereby causing a downward ramp current. In this way, the peak current through the inductor 120 is adjusted for each cycle to provide the required average current to maintain a regulated output voltage at each positive and negative channel. An example of turning on and off certain common loop switches 132A-C and differential loop switches based on the output of a PWM comparator associated with each loop is provided in U.S. Patent No. 9,479,052 filed on March 13, 2015, which is incorporated herein by reference in its entirety.

[0042] Figure 3 is a CoP packaged regulator device (eg, a top component packaged regulator device 100 ( Figure 1)) is a block diagram of an example physical layout 300 of a PCB. As shown in the physical layout 300, an inductor 310 (corresponding to the inductor 120) is physically placed on top of another component 320 (corresponding to the SIP regulator circuit 110). The component 320 can be referred to as a bottom component or a first layer / horizontal component placed on top of the PCB, and the inductor 310 can be referred to as a top component or a second layer / horizontal component placed on top of the first layer / horizontal component 320.

[0043] Inductor 310 includes a first side 314 and a bottom 316. Component 320 may include a top 322. First side 314 of inductor 310 extends beyond one end or side of component 320. As a result, inductor 310 has a blank area between bottom 316 and a PCB on which component 320 is placed. Although both sides of inductor 310 are shown as extending beyond the respective sides of component 320, any number of sides of inductor 310 may extend beyond the respective sides of component 320. For example, only one side of inductor 310 may extend beyond only one side of component 320, while another side of inductor 310 may be adjacent to another corresponding side of component 320. In some cases, all four sides of inductor 310 (which may be rectangular) may extend beyond the perimeter of component 320.

[0044] Inductor 310 includes a first terminal 330A and a second terminal 330B. The first terminal 330A can extend vertically downward from the middle, non-end or non-side portion of the inductor 310. Specifically, the first terminal 330A can extend from a first position, which is a threshold or a specified distance from one side of the inductor 310 to the center of the inductor 310. Similarly, the second terminal 330B can extend vertically downward from the relative middle or non-end or non-side portion of the inductor 310. Specifically, the second terminal 330B can extend from a second position, which is a threshold or a specified distance from the opposite side of the inductor 310 toward the center of the inductor 310. The first terminal 330A and the second terminal 330B can be equally or unequally spaced or positioned relative to the center of the inductor 310. The first terminal 330A extends vertically through the component 320 to couple the inductor 310 to the first part of the circuit implemented by the component 320. The second terminal 330B extends vertically through the component 320 to couple the inductor 310 to a second portion of the circuit implemented by the component 320 .

[0045] Figure 4 is a CoP packaged regulator device (eg, a top component packaged regulator device 100 ( Figure 1)) is a block diagram of an example of a side view 400 of an inductor. As shown in the side view 400, the length of the inductor (e.g., inductor 310) is 410 (e.g., 4 mm to 8 mm). The width 413 of the component 320 (below the inductor 310) can be 3 mm to 9 mm. As an example, the length 410 of the inductor 310 can be 8 mm, while the width of the component 320 is 3 mm. In this example, the inductor 310 can extend beyond the component 320 by an amount 440 (e.g., 2.5 mm) on each side thereof.

[0046] The height of the leads or terminals 330A and 330B of the inductor 310 can be selected or adjusted to control the stick-out gap 411 from the bottom of the inductor 310 to the top of the component 320 (e.g., how much empty space there is between the bottom of the inductor 310 and the top of the component 320). By creating longer leads or terminals 330A and 330B, more empty space can be provided between the inductor 310 and the component 320, thereby allowing the component 320 to dissipate more heat. In this way, rather than increasing the mold thickness of the component 320 as a way to dissipate heat, the mold thickness 416 can be kept small and heat can be dissipated through the inductor 310 in high airflow or liquid immersion applications. That is, in such applications, the increased space between the inductor and the molded package allows for greater heat dissipation. Alternatively, the shorter leads or terminals 330A and 330B of the inductor 310 can be used to bring the inductor 310 closer to the component 320 to act as a heat sink for the component 320.

[0047] In one example, height 414 represents the standoff clearance from the bottom of inductor 310 to the top of the PCB on which component 320 is placed, and may be 1.5 mm to 2.7 mm. Height 412 represents 412, represents the overall height of the CoP packaged regulator device, and may be 4 mm to 10 mm.

[0048] In some embodiments, one or more active and / or passive components 419 and 418 can be coupled to and external to the CoP packaged regulator device. These components 419 and 418 can be coupled to the PCB on the same layer as component 320. Component 419 can be completely covered or covered by inductor 310 (e.g., inductor 310 extends beyond an area within number 440 of the sides of component 320), while component 418 is partially covered or covered by inductor 310. Height 420 is the upper clearance from below inductor 310 and above the top of components 419 and 418.

[0049] Figure 5 is a CoP packaged regulator device (eg, a top component packaged regulator device 100 ( Figure 1)) is a block diagram of an example of a top view 500 of the inductor 310. As shown in the top view 500, the inductor 310 has a width 520 (e.g., 4 mm to 8 mm) that extends beyond the length 530 (e.g., 2 mm to 6.25 mm) of the component 320. The inductor 310 has four sides that extend beyond the periphery of the component 320. A first component 544 (e.g., an active or passive capacitor or resistor) can be placed in an area that completely covers one of the sides of the inductor 310 or below, and the area extends beyond the side of the component 320. A second component 540 (e.g., an active or passive capacitor or resistor) can be placed in an area that partially covers a portion of or below the second side of the inductor 310, and the area extends beyond the second side of the component 320. A third component 542 (e.g., an active or passive capacitor or resistor) can be placed in an area outside the area of ​​the inductor 310, and the area extends beyond the side of the component 320. Each of the first, second, and third components 540 , 542 , and 544 may be an external component of the CoP packaged regulator device that is coupled to the CoP packaged regulator device through a PCB on which the CoP packaged regulator device is placed.

[0050] Figure 6 A block diagram of an example machine 600 is shown, on which any one or more of the techniques (e.g., methods) discussed herein can be executed. In alternative embodiments, the machine 600 can be run as a standalone device, or can be connected (e.g., networked) to other machines. In a network deployment, the machine 600 can be run in the capacity of a server machine, a client machine, or both in a server-client network environment. In one example, the machine 600 can act as a peer machine in a peer-to-peer (P2P) (or other distributed) network environment. The machine 600 can be a personal computer (PC), a tablet computer, a set-top box (STB), a personal digital assistant (PDA), a mobile phone, a network device, an IoT device, an automotive system, an aviation system, or any machine capable of executing instructions (sequentially or otherwise) that specify the actions to be taken by the machine. In addition, although only a single machine is shown, the term "machine" should also be understood to include any collection of machines that individually or collectively execute a set of instructions (or multiple groups) to perform any one or more of the methods discussed herein, such as cloud computing, software as a service (SaaS), and other computer cluster configurations.

[0051] As described herein, examples may include logic, components, devices, packages, or mechanisms, or may be operated by them. A circuit is a collection (e.g., a group) of circuits implemented in a tangible entity including hardware (e.g., simple circuits, gates, logic, etc.). Circuit membership may become flexible over time and with potential hardware variability. A circuit includes members that can perform specific tasks individually or in combination when operating. In one example, the hardware of the circuit may be designed to perform specific operations (e.g., hardwired) invariably. In one example, the hardware of the circuit may include variably connected physical components (e.g., execution units, transistors, simple circuits, etc.), including a computer-readable medium that is physically modified (e.g., by magnetism, electricity, removably placing particles of constant mass, etc.) to encode instructions for specific operations. When connecting physical components, the underlying electrical properties of the hardware components change, such as changing from an insulator to a conductor, or vice versa. The instruction enables the participating hardware (e.g., an execution unit or a loading mechanism) to create members of the circuit in hardware through variable connections to perform part of a specific task when operating. Thus, when the device is operating, the computer-readable medium is communicatively coupled to other components of the circuit. In one example, any physical component can be used in more than one component of more than one circuit. For example, under operation, an execution unit can be used in a first circuit of a first circuit at one point in time, and can be reused by a second circuit in the first circuit or a third circuit in the second circuit at a different time.

[0052] The machine (e.g., computer system) 600 may include a hardware processor 602 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 604, and a static memory 606, some or all of which may communicate with each other via an interconnection link (e.g., a bus) 608. The machine 600 may further include a display unit 610, an alphanumeric input device 612 (e.g., a keyboard), a user interface (UI) navigation device 614 (e.g., a mouse). In an example, the display unit 610, the input device 612, and the UI navigation device 614 may be a touch screen display. The machine 600 may additionally include a storage device (e.g., a drive unit); a signal generating device 618 (e.g., a speaker); a network interface device 620; and one or more sensors 616, such as a global positioning system (GPS) sensor, a wing sensor, a mechanical equipment sensor, a temperature sensor, an ICP sensor, a bridge sensor, an audio sensor, an industrial sensor, a compass, an accelerometer, or other sensors. The machine 600 may include an output controller 628, such as a serial (e.g., Universal Serial Bus (USB)), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate with or control one or more peripheral devices (e.g., a printer, a card reader, etc.).

[0053] The storage device may include a machine-readable medium 622 on which is stored one or more sets of data structures or instructions 624 (e.g., software) embodied or utilized by any one or more of the techniques or functionality described herein. The instructions 624 may also reside completely or at least partially within the main memory 604, within the static memory 606, or within the hardware processor 602 during their execution by the machine 600. In an example, one or any combination of the hardware processor 602, the main memory 604, the static memory 606, or the storage device 621 may constitute the machine-readable medium 622.

[0054] Although the machine-readable medium 622 is illustrated as a single medium, the term “machine-readable medium” may include a single medium or multiple media (eg, a centralized or distributed database, or associated caches and servers) configured to store one or more instructions 624 .

[0055] The term "machine-readable medium" may include any temporary or non-temporary medium capable of storing, encoding or carrying temporary or non-temporary instructions executed by the machine 600, and any temporary or non-temporary medium that causes the machine 600 to perform any one or more of the techniques of the present disclosure, or any temporary or non-temporary medium capable of storing, encoding or carrying data structures used by or associated with such instructions. Non-limiting examples of machine-readable media may include solid-state memory and optical and magnetic media. In one example, a popular machine-readable medium includes a machine-readable medium having a plurality of particles with a constant (e.g., stationary) mass. Therefore, a popular machine-readable medium is not a transiently propagating signal. Specific examples of high-capacity machine-readable media may include non-volatile memory, such as semiconductor memory devices (e.g., electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM)) and flash memory devices; disks, such as internal hard disks and removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks.

[0056] Instructions 624 (e.g., software, programs, operating systems (OS), etc.) or other data are stored on storage devices 621 and can be accessed by main memory 604 for use by hardware processors 602. Main memory 604 (e.g., DRAM) is typically fast, but volatile, so a different type of storage than storage devices 621 (e.g., SSD) is suitable for long-term storage, including when in an "off" state. Instructions 624 or data being used by a user or machine 600 are typically loaded into main memory 604 for use by hardware processors 602. When main memory 604 is full, virtual space from storage devices 621 can be allocated to supplement main memory 604; however, because storage devices 621 are typically slower than main memory 604, and write speeds are typically at least twice as fast as read speeds, using virtual memory can greatly reduce the user experience due to the latency of storage devices (as opposed to main memory 604 (e.g., DRAM)). In addition, using storage devices 621 for virtual memory can greatly reduce the usable life of storage devices 621.

[0057] The instructions 624 may also be sent or received over the communication network 626 using a transmission medium via the network interface device 620 using any of a variety of transmission protocols (e.g., frame relay, Internet Protocol (IP), transmission control protocol (TCP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), etc.). Exemplary communication networks may include a local area network (LAN), a wide area network (WAN), a packet data network (e.g., the Internet), a mobile telephone network (e.g., a cellular network), a plain old telephone service (POTS) network, a wireless data network (e.g., a wireless network called The Institute of Electrical and Electronics Engineers (IEEE) 802.11 series of standards, known as The network interface device 620 may include one or more physical jacks (e.g., Ethernet, coaxial, or telephone jacks) or one or more antennas to connect to the communication network 626. In an example, the network interface device 620 may include multiple antennas to communicate wirelessly using at least one of single-input multiple-output (SIMO), multiple-input multiple-output (MIMO), or multiple-input single-output (MISO) technologies. The term "transmission medium" should be taken to include any tangible or intangible medium that can store, encode, or carry instructions executed by the machine 600, and includes digital or analog communication signals or other tangible or intangible media to facilitate the communication of such software.

[0058] Various annotations

[0059] Each non-limiting aspect or example described herein may stand alone or may be combined with one or more of the other examples in various permutations or combinations.

[0060] The above detailed description includes reference to the accompanying drawings, which form a part of the detailed description. The accompanying drawings show specific embodiments in which the subject matter of the present invention can be practiced by way of illustration. These embodiments are also referred to as "examples" in this article. In addition to the elements shown or described, such examples may include elements. However, the inventors also contemplate examples that only provide those elements shown or described. In addition, the inventors also contemplate examples of any combination or arrangement of those elements (or one or more aspects thereof) shown or described, about specific examples (or one or more aspects thereof) shown or described herein, or other examples (or one or more aspects thereof).

[0061] In the event of an inconsistency in usage between this document and any document incorporated by reference, the usage in this document controls.

[0062] In this document, the terms "a" or "an" are used in patent documents to include one or more, independent of any other instances or uses of "at least one" or "one or more". In this document, unless otherwise stated, the term "or" is used to indicate non-exclusivity, for example, "A or B" includes "A but not B", "B but not A", and "A and B". In this document, the terms "including" and "wherein" are used as ordinary equivalents of the respective terms "comprising" and "wherein". In addition, in the appended claims, the terms "including" and "comprising" are open-ended; that is, systems, devices, articles, compositions, preparations, or methods that include other elements in addition to the elements listed after the term in the claim are still considered to fall within the scope of the claim. In addition, in the appended claims, the terms "first", "second", "third", etc. are used merely as labels and are not intended to impose numerical requirements on their objects.

[0063] The method examples described herein may be at least partially machine or computer-implemented. Some examples may include a computer-readable medium or machine-readable medium encoded with temporary or non-temporary instructions, which may be operable to configure an electronic device to perform the method as described in the above example. The implementation of such a method may include code, such as microcode, assembly language code, high-level language code, etc. Such code may include temporary or non-temporary computer-readable instructions for performing various methods. The code may constitute a part of a computer program product. In addition, in an example, the code may be tangibly stored on one or more volatile, non-temporary or non-volatile tangible computer-readable media, such as during execution or at other times. Examples of these tangible computer-readable media may include, but are not limited to, hard disks, removable disks, removable optical disks (such as optical disks and digital video disks), cassettes, memory cards or memory sticks, random access memories (RAM), read-only memories (ROM), etc.

[0064] The above description is intended to be illustrative, not restrictive. For example, the above examples (or one or more aspects thereof) may be used in combination with each other. After reviewing the above description, other embodiments may be used, for example, by a person of ordinary skill in the art. An abstract is provided to comply with 37 C.FR § 1.72 (b) to allow readers to quickly determine the nature of the technical disclosure. When submitting this document, it should be understood that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the above detailed description, various features may be grouped together to simplify the present disclosure. This should not be interpreted as intending to make the disclosed features that are not claimed to be essential to any claim. Instead, the subject matter of the invention may be less than all the features of a specific disclosed embodiment. Therefore, the following claims are thus incorporated into the detailed description as examples or embodiments, each claim existing independently as an independent embodiment, and it is expected that such embodiments may be combined with each other in various combinations or arrangements. The scope of the subject matter of the present invention should be determined with reference to the attached claims and the full range of equivalent forms given by these claims.

Claims

1. Top-level component CoP packaging, including: A system-in-package (SIP) including a regulator circuit, the SIP having a top portion and a first side portion; and an inductor on top of the SIP, the inductor including a first terminal and a second terminal, the first terminal and the second terminal each being located within a specified distance within a perimeter formed by ends of the inductor, the first terminal and the second terminal extending from a bottom surface of the inductor, the first terminal and the second terminal being physically directly connected to the top of the SIP to form an empty space region between the bottom surface of the inductor and the top of the SIP, the empty space region having a portion located between the first terminal and the second terminal, the portion having a width corresponding to the distance between the first terminal and the second terminal and a height corresponding to the length of the first terminal and the second terminal, the SIP being a first discrete component, and the inductor being a second discrete component, in: The inductor is coupled to the regulator circuit through the top of the SIP; and A perimeter formed by the ends of the inductor extends beyond the perimeter of the SIP.

2. The CoP package of claim 1, wherein the inductor and the regulator circuit of the SIP together implement a switching regulator, and the first terminal and the second terminal extend vertically from a bottom surface of the inductor.

3. The CoP package of claim 1, wherein the regulator circuit comprises a switching circuit for charging and discharging the inductor, and the SIP comprises a ball grid array package. 4 . The CoP package of claim 1 , wherein a first portion of the SIP is manufactured using a first manufacturing process, and wherein a second portion of the SIP is manufactured using a second manufacturing process different from the first manufacturing process.

5. The CoP package of claim 1, wherein the components on the SIP are bonded together by a series of integrated passive devices fabricated using thin film or photolithography processes.

6. The CoP package of claim 1, wherein heat is dissipated by the inductor via the empty space region in a liquid immersion application. 7 . The CoP package of claim 1 , wherein an amount of heat dissipation is controlled based on a size of the empty space region determined by lengths of the first terminal and the second terminal.

8. The CoP package of claim 1, wherein the first terminal and the second terminal are unequally spaced relative to a center of the inductor.

9. The CoP package of claim 1, wherein the first terminal is a first distance from a center of the inductor and the second terminal is a second distance from the center, the first distance being greater than the second distance.

10. The CoP package of claim 9, wherein the first terminal is located at a first position on a bottom of the inductor, the first position being a specified distance from a first end of the inductor, and the first position overlapping a top of the SIP.

11. The CoP package of claim 1 , wherein the SIP is coupled to a circuit board.

12. The CoP package of claim 11, wherein the passive or active components on the circuit board include another SIP, a resistor, a capacitor, an integrated passive device, a transistor, or an inductor.

13. The CoP package of claim 1, wherein at least a portion of the plurality of passive or active components are physically placed around a periphery of the SIP in an area between an end of the inductor and a side of the periphery of the SIP.

14. A packaging method, comprising: generating a regulated voltage signal by a regulator circuit implemented on a system-in-package (SIP), the SIP having a top and a first side, the SIP being coupled to an inductor via the top of the SIP, the inductor including a first terminal and a second terminal, the first terminal and the second terminal each being located within a specified distance within a perimeter formed by ends of the inductor, the first terminal and the second terminal extending from a bottom surface of the inductor, the first terminal and the second terminal being physically directly connected to the top of the SIP to form an empty space region between the bottom surface of the inductor and the top of the SIP, the empty space region having a portion located between the first terminal and the second terminal, the portion having a width corresponding to the distance between the first terminal and the second terminal and a height corresponding to the length of the first terminal and the second terminal, the SIP being a first discrete component, and the inductor being a second discrete component, the perimeter formed by the ends of the inductor extending beyond the perimeter of the SIP; and The regulated voltage is delivered to the load.

15. The method of claim 14, wherein the amount of heat dissipation is controlled based on a size of the empty space region determined by lengths of the first terminal and the second terminal.

16. The method of claim 14, wherein the inductor and the regulator circuit of the SIP together implement a switching regulator.

17. The method of claim 14, wherein the regulator circuit includes a switching circuit for charging and discharging the inductor.

18. The method of claim 14, wherein the second end of the inductor extends beyond the second side portion of the SIP.

19. A device comprising: a means for generating a regulated voltage signal by a regulator circuit implemented on a system-in-package (SIP), the SIP having a top and a first side, the SIP being coupled to an inductor via the top of the SIP, the inductor including a first terminal and a second terminal, the first terminal and the second terminal each being located within a specified distance within a perimeter formed by ends of the inductor, the first terminal and the second terminal extending from a bottom surface of the inductor, the first terminal and the second terminal being physically directly connected to the top of the SIP to form an empty space region between the bottom surface of the inductor and the top of the SIP, the empty space region having a portion located between the first terminal and the second terminal, the portion having a width corresponding to the distance between the first terminal and the second terminal and a height corresponding to the length of the first terminal and the second terminal, the SIP being a first discrete component, and the inductor being a second discrete component, the perimeter formed by the ends of the inductor extending beyond the perimeter of the SIP; and means for delivering the regulated voltage to a load.

20. The apparatus of claim 19, wherein the inductor and the regulator circuit of the SIP together implement a switching regulator.

21. The apparatus of claim 19, wherein the regulator circuit comprises a switching circuit for charging and discharging the inductor.

22. The apparatus of claim 19, wherein the second end of the inductor extends beyond the second side portion of the SIP.

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