Protecting Die Corners Using Polymer Deposition Techniques

Abstract

This application relates to die corner protection by using polymer deposition techniques. A method for separating semiconductor dies of a semiconductor die assembly includes depositing a first coating on a first surface of the assembly. The assembly includes a die wafer having a plurality of semiconductor dies and a first surface and a second surface. A first portion of the die wafer and the first coating are removed between adjacent semiconductor dies to form a trench having an intermediate depth between the first surface and the second surface in the die wafer such that die corners are formed on either side of the trench. A protective coating is deposited on the first surface of the die assembly to cover at least a portion of the die corners, the trench, and the first coating. The first coating is selectively removed such that the portions of the protective coating covering the die corners and the trench remain on the die wafer. The adjacent semiconductor dies are separated from each other and the protective coating remains covering the die corners.

Description

Technical Field

[0001] The present technology relates to semiconductor manufacturing. More specifically, some embodiments of the present technology relate to techniques for protecting the corners, edges, and / or sidewalls of a die during separation and other manufacturing processes. Background Art

[0002] Semiconductor dies are typically manufactured by arranging multiple dies in a grid pattern on a device wafer having one or more layers. The dies are then separated from each other. The separation process can be accomplished, for example, by plasma cutting, laser ablation, or a rotating blade. During the separation process and other manufacturing steps (such as back grinding of the device wafer), damage to the die may occur, such as cracking along the die corners and edges, and delamination of the layers. Physical damage to the die can reduce its reliability and yield. Summary of the Invention

[0003] In one aspect, the present application provides a method for separating semiconductor dies of a semiconductor die assembly, including: depositing a first coating on a first surface of the semiconductor die assembly, the semiconductor die assembly including a die wafer having a plurality of semiconductor dies, the die wafer having a first surface and a second surface; removing a first portion between a first portion of the first coating and adjacent semiconductor dies of the die wafer to form a trench having an intermediate depth between the first surface and the second surface in the die wafer, such that die corners of adjacent semiconductor dies are formed on either side of the trench; depositing a protective coating on the first surface of the die assembly, the protective coating covering at least a portion of the die corners, the trench, and the first coating; selectively removing the first coating such that the portions of the protective coating covering the die corners and the trench remain on the die wafer; and separating the adjacent semiconductor dies from each other such that the protective coating remains covering the die corners.

[0004] In another aspect, the present application provides a method for separating semiconductor dies of a semiconductor die assembly, including: applying a mask over an outer surface of the semiconductor die assembly including a die wafer having a plurality of semiconductor dies; removing a first portion of the die wafer and a corresponding portion of the mask to form a trench extending to an intermediate depth into the die wafer and die corners on adjacent semiconductor dies on opposite sides of the trench; removing a second portion between the die corners of the die wafer to form a channel having sidewalls within the width of the trench; depositing a protective coating over at least the die corners and the sidewalls; and removing the mask and the protective coating deposited over the mask.

[0005] In another aspect, the present application provides a semiconductor die, including: a die wafer having a first surface and a second surface; die corners formed along an outer edge of the first surface of the die wafer; sidewalls extending from the first surface of the die wafer to the second surface; and a protective coating adhered to the die corners. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Many aspects of the present technology can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale. Instead, the emphasis lies in illustrating the principles of the present technology.

[0007] Figure 1A is a cross-sectional view of two adjacent dies of a semiconductor die assembly according to the present technology, where a protective coating is deposited on the corners of the dies before separation.

[0008] Figure 1B is separated according to the present technology Figure 1A cross-sectional view of two adjacent dies of the semiconductor die assembly.

[0009] Figure 2A shows another cross-sectional view of two adjacent dies of a semiconductor die assembly according to the present technology, where a protective coating is deposited on the corners and sidewalls of the dies before separation.

[0010] Figure 2B is after separation according to the present technology Figure 2A cross-sectional view of two adjacent dies of the die assembly.

[0011] Figure 3A is a cross-sectional view of a semiconductor die assembly according to the present technology, showing two semiconductor dies before separation.

[0012] Figure 3B is according to the present technology after the die wafer has been thinned Figure 3A cross-sectional view of the semiconductor die assembly.

[0013] Figure 3C is according to the present technology mounted to a device wafer Figure 3B cross-sectional view of the semiconductor die assembly.

[0014] Figure 3D is according to the present technology after applying a first coating and forming a trench between adjacent dies, Figure 3C cross-sectional view of the semiconductor die assembly.

[0015] Figure 3E is according to the present technology after depositing a protective coating Figure 3D cross-sectional view of the semiconductor die assembly.

[0016] Figure 3F is according to the present technology Figure 3E cross-sectional view of the semiconductor die assembly, where the first coating is removed and the protective coating adheres to the corners of the dies.

[0017] Figure 3G is after die separation according to the present technologyFigure 3F Cross-sectional view of a semiconductor die assembly in which a protective coating adheres to the corners of the die.

[0018] Figure 4A is a cross-sectional view of a semiconductor die assembly according to the present technology, showing two semiconductor dies before separation.

[0019] Figure 4B is, after applying a first coating and forming trenches between adjacent dies according to the present technology, Figure 4A cross-sectional view of a semiconductor die assembly.

[0020] Figure 4C shows, after removing additional material of the die wafer between adjacent dies according to the present technology, Figure 4B cross-sectional view of a semiconductor die assembly.

[0021] Figure 4D is a semiconductor die assembly according to the present technology on which a protective coating is deposited Figure 4C cross-sectional view of.

[0022] Figure 4E shows according to the present technology Figure 4D cross-sectional view of a semiconductor die assembly, in which the protective coating adheres to the die corners and sidewalls of the die before separation.

[0023] Figure 4F shows, after thinning the die wafer and mounting it on the device wafer according to the present technology, Figure 4E cross-sectional view of a semiconductor die assembly. DETAILED DESCRIPTION

[0024] The following describes specific details of several embodiments for protecting the corners and / or sidewalls of a semiconductor die during manufacturing. In one example, a first coating can be applied over the die assembly before cutting trenches between adjacent dies. Then, before separating the dies, a protective coating can be applied over the die assembly. The protective coating adheres to the die corners (e.g., corners and edges) and protects the die corners from cracking during the separation process. Additionally, the protective coating can protect at least a portion of the layers of the die to help prevent delamination. In other embodiments, the first coating can be applied over the die assembly before performing a semi-cutting process or other process to remove material between adjacent dies. The protective coating can be applied over the die assembly after the semi-cutting process. The protective coating adheres to and protects the die corners as well as the sidewalls of the die. Thus, the die corners are protected from cracking, and the sidewalls are also protected to help prevent delamination of the layers. As a result, the reliability and yield of the semiconductor die are improved.

[0025] Figures 1A to 2B shows an overview of the present technology, while Figures 3A to 4FFurther details of this technique are shown in Figures 1A to 4F In the present invention, the same reference numbers refer to similar components and features. The present technology solves the technical problem that the corners of the tube die may be damaged during the cutting, separation and / or assembly process. Physical damage to the tube die corners can cause cracking (e.g., separation or delamination), which can extend into the tube die material. When mounted on a printed circuit board, the cracking can increase the electrical and / or functional failure of the tube die, thereby effectively reducing the expected yield.

[0026] Figure 1A 1 is a cross-sectional view of two adjacent dies 104a, 104b (collectively referred to as "die 104") of semiconductor die assembly 100 before separation according to the present technology. Die 104 is formed within die wafer 122, and grooves 106 (individually indicated as 106a to 106c) having an intermediate depth "D" are formed by removing material between adjacent dies 104 of die wafer 122. For example, groove 106b is formed between dies 104a, 104b. Groove 106 can be formed using, for example, wet etching, plasma etching, plasma cutting, laser grooving and / or laser cutting. Groove 106 forms die corners 102 (individually indicated as 102a, 102b, 102c and 102d) on either side of die 104. After the trenches 106 are formed to an intermediate depth D, a protective coating 108 (shown as dark grey dots) is applied to protect the die corners 102 before the die 104 are separated.

[0027] Although only two dies 104 are shown, the semiconductor die assembly 100 may include more semiconductor dies 104 arranged in a grid pattern. Each die 104 may be substantially square and / or rectangular in shape. Thus, the term "die corner" as used herein may include a portion or the entire edge of a semiconductor die 104, which may extend between two outer corners of a die 104. Thus, each semiconductor die 104 may have four die corners 102, which may include the entire length of all four die edges or only a portion of the length.

[0028] Figure 1B Has been separated according to this technology Figure 1A 104a, 104b of the semiconductor die assembly 100. The die 104 can be separated from each other at this stage of the process using a rotary saw that forms a cut 110 that is smaller than the width of the trench 106. In other embodiments, plasma dicing, laser dicing, or other die separation techniques can be used to remove desired portions from between adjacent die 104 of the die wafer 122. After the die 104 are separated, the protective coating 108 remains intact and adhered to the die corner 102.

[0029] In some embodiments, plasma cutting can be used to cut the die wafer 122 with a plasma gas that uses ion bombardment with chemical reactivity. For example, oxide etching using a carbon-fluoride (C-F) based chemical, silicon etching using a fluorine (F) based chemical, or other suitable materials and techniques can be used. In other embodiments, a Bosch process with cyclic steps of etching and polymer deposition (e.g., depositing the protective coating 108) can be used.

[0030] Figure 2A Another cross-sectional view of two adjacent dies 104a, 104b of the semiconductor die assembly 100 at an alternative manufacturing process stage according to the present technology is shown. In this process, as described above, trenches 106 are formed at an intermediate depth D between the dies 104, and then channels 112 are formed from the intermediate depth D to a second depth "T". The depth T can be a second intermediate depth in the die wafer 122 as shown, or it can pass completely through the die wafer 122. The depth "T" can be greater than or approximately equal to the desired thickness of the final product. The channels 112 form the sidewalls 114 (designated as 114a, 114b, 114c, and 114d respectively) of the dies 104, and the sidewalls are spaced apart from each other by a distance less than the width of the trenches 106. A rotary saw, laser, etching, or other suitable technique can be used to form the channels 112. After forming the trenches 106 and the channels 112, a protective coating 108 is applied over the die assembly 100 to conform to the die corners 102 and the sidewalls 114. Figure 2A A cross-sectional view of the semiconductor die assembly 100 after the die wafer 122 has been thinned to separate the dies 104 according to the present technology. The die wafer 122 can be thinned from the bottom side, such as by back grinding, until the channels 112 are exposed to separate the dies 104. During the thinning process, the protective coating 108 remains intact on the die corners 102 and the sidewalls 114 of the dies 104 to further protect the dies 104.

[0031] Figure 2B is according to the present technology after Figure 2A The protective coating 108 and its application method provide advantages and benefits, such as protecting the die corners 102 and / or the sidewalls, which is expected to prevent cracking due to physical damage. The protective coating 108 can improve process yield, electrical function test yield, increase reliability, enhance die strength, and provide low-K layer protection. The protective coating 108 can protect the die corners 102 and / or the sidewalls 114 during any movement and / or handling of the dies 104, such as process transportation, die pick-up, and die bonding.

[0032] The protective coating 108 and its application method provide advantages and benefits, such as protecting the die corners 102 and / or the sidewalls, which is expected to prevent cracking due to physical damage. The protective coating 108 can improve process yield, electrical function test yield, increase reliability, enhance die strength, and provide low-K layer protection. The protective coating 108 can protect the die corners 102 and / or the sidewalls 114 during any movement and / or handling of the dies 104, such as process transportation, die pick-up, and die bonding.

[0033] Figures 3A to 3G is according to the present technology for processing Figure 1A and Figure 1BSequential cross-sectional views of the semiconductor die assembly 100 shown. As discussed above, regarding Figures 3A to 3G The described method is expected to protect the die corners 102 from cracking and prevent or inhibit delamination of one or more layers of the die 104 during the separation process and during subsequent steps. The method includes applying two different coatings and processing the semiconductor die assembly 100 such that one of the coatings remains adhered to the die corners 102 of the die 104 after separation.

[0034] Figure 3A FIG. 6 is a cross-sectional view of a semiconductor die assembly 100 according to the present technology, showing adjacent semiconductor dies 104 before separation. Although only two dies 104 are shown, in practice, there are typically more dies 104 arranged in a grid pattern and separated by saw streets 120. A saw street 120 is shown between dies 104a, 104b. The die assembly 100 may include a die wafer 122 made of a semiconductor material such as silicon, and an integrated circuit system formed on / in the silicon. Each die 104 has conductive pillars or bumps 124 (identified as bumps 124a, 124b, 124c, and 124d, respectively) that are attached to bond pads at the active surface 126 of the wafer 122. In some embodiments, the bumps 124 may be solder bumps or may be made of copper or other conductive materials. The die wafer 122 has a first surface to which the bumps 124 may be attached and a second surface opposite the first surface.

[0035] Figure 3B FIG. 10 is a cross-sectional view of the semiconductor die assembly 100 after the die wafer 122 has been thinned. For example, the die wafer 122 may be thinned by back grinding. In some embodiments, the die wafer 122 may be thinned based on the desired thickness of the finished die 104. Additionally, in this step, the die wafer 122 may be processed using laser marking.

[0036] Figure 3C FIG. 14 is a cross-sectional view of the semiconductor die assembly 100 after the die wafer 122 has been mounted on a device wafer 128. In some embodiments, the device wafer 128 may be silicon. Although not shown, an adhesive is typically applied between the die wafer 122 and the device wafer 128. In operation, the device wafer 128 supports the die 104 during the separation process.

[0037] Figure 3DFIG. 0 is a cross-sectional view of semiconductor die assembly 100 after a first coating 130 has been applied and then trenches 106b are formed. A first coating 130 (shown in black) is deposited or applied over the outer surface of die assembly 100 to conform to the profile of features including the surfaces of bumps 124 and saw streets 120. The first coating 130 forms a mask over die assembly 100 and may be referred to as a common coating in some embodiments. The first coating 130 may be water-soluble and is applied to protect bumps 124 and the entire top surface of die assembly 100 from dust and debris during laser / plasma processes and / or other separation or manufacturing processes.

[0038] After the first coating 130 is deposited, trenches 106 may be formed by removing material between adjacent dies 104 (e.g., from the top or first surface of die wafer 122). Processes such as plasma cutting, SF6 isotropic etching, and laser scribing may be used for this stage of the process. The process of forming trenches 106 first removes the first coating 130 in the saw street 120 region and then removes material of die wafer 122 to an intermediate depth D between the first surface and the second surface of die wafer 122. Die corners 102 are formed on opposite sides of trenches 106 and are substantially free of the first coating 130. As previously discussed in Figures 1A to 1B several trenches 106 are also formed simultaneously (although not shown) to form and expose die corners 102 on the outer sides of dies 104 on die wafer 122.

[0039] Figure 3E FIG. 9 is a cross-sectional view of semiconductor die assembly 100 after a protective coating 108 has been deposited. A protective coating 108 is applied or deposited over at least a portion of the outer surface of die assembly 100 and particularly over die corners 102. In some embodiments, the protective coating 108 is applied or deposited over die corners 102 and at least a portion of bumps 124 and trenches 106. Thus, the protective coating 108 may be deposited over the first coating 130 covering bumps 124 and any other regions on the surface 126 of die wafer 122. The protective coating 108 may be applied by the same tool used for plasma cutting. In still some other embodiments, the protective coating 108 may be deposited using a molding process such as an epoxy molding process.

[0040] The protective coating 108 can be a polymeric material, such as a deposition of carbon fluoride (C4F8) or silicon nitride (SiN). Other materials can be used as long as the materials are not removed by the same removal process as the first coating 130. Additionally, the selected polymeric material is compatible with any underfill or other materials used in the die wafer 122. Since the protective coating 108 remains adhered to the die corner 102, the polymeric material is also compatible with subsequent processing steps.

[0041] Figure 3F is a cross-sectional view of the semiconductor die assembly 100 after removing the first coating 130 in accordance with the present technology. In some embodiments, the first coating 130 is soluble in a solution (e.g., water) that does not dissolve the protective coating 108. The water can reach under the protective coating 108 and dissolve the first coating 130. The portions of the protective coating 108 in the trenches 106 and at the die corners 102 adhere to the silicon or other materials of the die wafer 122. Thus, selectively dissolving the first coating 130 in the regions where the protective coating 108 is on the first coating 130, such as above the bumps 124, is expected to cause these portions of the protective coating 108 to be removed during the wash process. However, the protective coating 108 in the scribe lanes 120 remains attached to the surfaces of the die corners 102 and the trenches 106. In other embodiments, other suitable processes can be used to remove the first coating 130 as long as the protective coating 108 remains adhered to the surfaces of the die corners 102 and the trenches 106.

[0042] Figure 3G is a cross-sectional view of the semiconductor die assembly 100 after the dies 104 have been separated from each other in accordance with the present technology. In some embodiments, plasma cutting techniques such as SF6 isotropic etching or laser cutting processes (e.g., laser ablation) are used to separate the dies 104. In some cases, plasma cutting and applying the protective coating 108 can be done in the same chamber. Thus, after applying the protective coating 108, the semiconductor die assembly 100 can remain in the chamber. Thus, an expected advantage is that the handling and transportation of the semiconductor die assembly 100 are minimized. When the dies 104 are separated from each other, the protective coating 108 remains on the die corners 102. Figure 3F and Figure 3G An expected advantage of the illustrated embodiment is that the protective coating 108 protects the die corners 102 from cracking during separation and any post-laser ablation processes, such as during process transportation. For example, during multiple steps of the manufacturing process, such as during dicing, die pick-up, and die bonding, the die corners 102 may be exposed to potential physical damage. The protective coating 108 also protects the metal structures at the active surface of the die wafer 122 from delamination during the same manufacturing steps.

[0043] Figures 4A to 4Fis processed according to the present technology Figure 2A and Figure 2B are sequential cross-sectional views of the semiconductor die assembly 100 shown in Figures 4A to 4F . Regarding the method described above, it is expected to protect the die corners 102 and layers of the die 104 as discussed above. The method includes applying two different coatings and processing the die assembly 100 such that one of the coatings remains adhered to the die corners 102 and sidewalls 114 of the die 104 after the die 104 is separated.

[0044] Figure 4A is a cross-sectional view of the semiconductor die assembly 100 showing adjacent dies 104 before separation. As discussed above in connection with Figure 3A , a number of dies 104 may be arranged in a grid pattern and separated by saw streets 120. Each die 104 has bumps 124 adhered to the active surface 126 of the wafer 122.

[0045] Figure 4B is a cross-sectional view of the semiconductor die assembly 100 after applying the first coating 130 and then forming trenches 106b, such as by laser scribing. The first coating 130 (shown in black) may be a mask applied over the active surface 126 of the die assembly 100 to conform to the profile of features (including the surfaces of the bumps 124 and saw streets 120). After depositing the first coating 130, trenches 106 may be formed by first removing the first coating 130 in the areas of the saw streets 120. Then the material of the die wafer 122 may be removed to an intermediate depth D, such as by laser scribing. Although not shown in Figure 4B , trenches 106a and 106c (shown in Figure 2A ) are also formed by removing the material between adjacent dies 104, and die corners 102 are formed on the outer sides of dies 104a, 104b.

[0046] Figure 4C shows a cross-sectional view of the semiconductor die assembly 100 after forming channels 112 at a second depth "T". The depth "T" may be a second intermediate depth in the die wafer 122, which may be greater than or approximately equal to the desired thickness of the final product. The channels 112 form sidewalls 114 that are spaced apart from each other by a distance less than the width of the trenches 106. A rotary saw, laser, etching, or other suitable technique may be used to form the channels 112.

[0047] Figure 4D ​​​​​​​​Is a cross-sectional view of the semiconductor die assembly 100 after depositing the protective coating 108 according to the present technology. The protective coating 108 can be deposited on the die corners 102 and sidewalls 114 of the channel 112, as well as on the profiles of the bumps 124 and other outer surface regions of the die assembly 100. Thus, the protective coating 108 is deposited on at least a portion of the first coating 130. The protective coating 108 can be a polymeric material such as the deposition of C4F8 or SiN previously discussed in connection with Figure 3E The deposition of C4F8 or SiN discussed. In other embodiments, the protective coating 108 can be deposited using a molding process.

[0048] Figure 4E Is a cross-sectional view of the semiconductor die assembly 100 after removing the first coating 130 according to the present technology. The first coating 130 can be removed with a solution that does not dissolve or otherwise remove the protective coating 108. Regardless of where the protective coating 108 is on the first coating 130, such as on the bump 124, the protective coating 108 will also be removed. This selective dissolution of the first coating 130 is expected to adhere the portions of the protective coating 108 on the die corners 102 and sidewalls 114 to the silicon or other material of the die wafer 122.

[0049] Figure 4F Is a cross-sectional view of the semiconductor die assembly 100 after thinning the die wafer 122 according to the present technology. For example, the bumps 124 and / or the surface 126 of the die wafer 122 can be attached to a tape or carrier film (not shown) to secure the die assembly 100 during wafer thinning (e.g., backgrinding). In some embodiments, the die wafer 122 can be thinned to be equal to or slightly less than the thickness "T" ( Figure 4E ), such that the thinning separates the adjacent dies 104. After thinning, the die assembly 100 can be attached to the device wafer 128. Additionally, laser marking can be used to process the die wafer 122 in this step.

[0050] The protective coating 108 remains adhered to the die corners 102 to prevent cracking of the die corners 102 and delamination of the layers of the die 104. The protective coating 108 remains adhered to the sidewalls 114 of the channel 112 to prevent damage (e.g., dust and debris) that may occur during backgrinding and / or movement / transport of the die 104 during the manufacturing process. For example, applying the protective coating 108 to the sidewalls 114 can help prevent delamination associated with the metal layers of the die wafer 122 (e.g., the active layer and the intermediate layer of the die 104).

[0051] In other embodiments, the protective coating 108 can be applied more than once. For example, when the sidewalls 114 are exposed, such as in Figure 4CWhen the die wafer 122 is being cut, it may be desirable to remove less material at a time. Therefore, one or more intermediate steps may be performed so that two or more layers of protective coating 108 may be applied between iterative steps of etching or cutting. After the desired thickness of the die wafer 122 is reached, the first coating 130 may be removed.

[0052] The present disclosure is not intended to be exhaustive or limit the present technology to the precise form disclosed herein. Although specific embodiments are disclosed herein for the purpose of illustration, various equivalent modifications are possible without departing from the present technology, as will be appreciated by those skilled in the relevant art. In some cases, well-known structures and functions are not shown or described in detail to avoid unnecessarily obscuring the description of the embodiments of the present technology. Although the steps of the method may be presented in a particular order herein, alternative embodiments may perform these steps in a different order. Similarly, certain aspects of the present technology disclosed in the context of a particular embodiment may be combined or eliminated in other embodiments. In addition, although the advantages associated with certain embodiments of the present technology may have been disclosed in the context of those embodiments, other embodiments may also exhibit such advantages, and not all embodiments need to exhibit such advantages or other advantages disclosed herein to fall within the scope of the present technology. Therefore, the present disclosure and associated technology may encompass other embodiments that are not explicitly shown or described herein.

[0053] Throughout this disclosure, the singular terms "a," "an," and "the" include plural referents unless the context clearly indicates otherwise. Similarly, unless the word "or" is expressly limited to mean only a list of two or more items,

[0054] (a) If the word “or” is used in a list other than the other items in the list, it shall be construed to include any of the items in the list.

[0055] (a) any single item, (b) all items in the list, or (c) any combination of items in the list. In addition, the term "comprising" is used throughout to mean including at least the features described, so that any greater number of the same features and / or other features of additional types are not excluded. Reference herein to "one embodiment," "some embodiments," or similar expressions means that the specific features, structures, operations, or characteristics described in conjunction with the embodiments may be included in at least one embodiment of the present technology. Therefore, these phrases or expressions appearing herein do not necessarily all refer to the same embodiment. In addition, in one or more embodiments, various specific features, structures, operations, or characteristics may be combined in any suitable manner.

[0056] As will be understood from the foregoing, specific embodiments of the present technology have been described herein for purposes of illustration, but various modifications can be made without departing from the scope of the invention. The present technology is not limited except as by the appended claims.

Claims

1. A method for separating semiconductor dies of a semiconductor die assembly, comprising: Depositing a first coating on a first surface of the semiconductor die assembly, the semiconductor die assembly including a die wafer having a plurality of semiconductor dies, the die wafer having the first surface and a second surface; Removing a first portion between a portion of the first coating and adjacent semiconductor dies of the die wafer to form a trench having an intermediate depth between the first surface and the second surface in the die wafer, such that die corners of adjacent semiconductor dies are formed on either side of the trench; Depositing a protective coating on the first surface of the die assembly, the protective coating covering at least a portion of the die corners, the trench, and the first coating; Selectively removing the first coating such that portions of the protective coating covering the die corners and the trench remain on the die wafer; And Separating adjacent semiconductor dies from each other such that the protective coating remains covering the die corners.

2. The method according to claim 1, wherein the first coating comprises a water-soluble material, and the method further comprises removing the first coating after depositing the protective coating.

3. The method according to claim 2, wherein the protective coating comprises a polymeric material that adheres to the die corners and remains attached to the die corners after removing the first coating.

4. The method according to claim 1, further comprising removing a second portion between adjacent semiconductor dies of the die wafer before depositing the protective coating to form a channel extending from the trench through at least a portion between the adjacent semiconductor dies of the die wafer.

5. The method according to claim 4, wherein depositing the protective coating further comprises depositing the protective coating on sidewalls of the channel.

6. The method according to claim 4, wherein the first portion and the second portion are removed using a plasma cutting process.

7. The method according to claim 6, wherein both depositing the protective coating and the plasma cutting process occur in the same chamber.

8. The method according to claim 1, further comprising back-grinding the die wafer before depositing the first coating or after depositing the protective coating.

9. The method according to claim 1, wherein depositing the protective coating comprises molding a material on an outer surface of the die assembly.

10. The method according to claim 1, wherein the protective coating comprises fluorocarbon or silicon nitride (SiN).

11. The method according to claim 1, wherein removing the first portion of the die wafer comprises laser grooving.

12. A method for separating semiconductor dies of a semiconductor die assembly, comprising: Applying a mask over an outer surface of a semiconductor die assembly including a die wafer having a plurality of semiconductor dies; Remove a first portion of the die wafer and a corresponding portion of the mask to form a trench extending to an intermediate depth within the die wafer and die corners on adjacent semiconductor dies on opposite sides of the trench; Remove a second portion between the die corners of the die wafer to form a channel having sidewalls within the width of the trench; Deposit a protective coating over at least the die corners and the sidewalls; And Remove the mask and the protective coating deposited over the mask.

13. The method of claim 12, wherein removing the first portion and the second portion comprises a plasma cutting process.

14. The method of claim 12, wherein the mask comprises a water-soluble material.

15. The method of claim 12, wherein the protective coating comprises a polymeric material.

16. The method of claim 12, wherein the protective coating comprises fluorocarbon or silicon nitride (SiN).

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