Expansion Module, CPU Module, System, and Communication Method

Abstract

The present application relates to an expansion module, a CPU module, a system, and a communication method. The problem of the present application is to improve the performance of a system having a plurality of modules communicably connected via a bus. Solution: The expansion module (20) includes: an interface (21) for inputting and outputting external signals; and a communication circuit (23) that communicates via serial buses (1) and (2). The communication circuit (23) has a first slave communication function (24) for communicating via the serial bus (1), a second slave communication function (25) for communicating via the serial bus (2), a third slave communication function (26) for integrating and communicating the serial buses (1) and (2), and a master communication function (27) for communicating via the serial bus (2), each of which can be switched between effective and invalid respectively.

Description

Technical Field

[0001] The present invention relates to an expansion module, a CPU module, a system, and a communication method. Background Art

[0002] Conventionally, a system including a plurality of modules communicably connected via a bus, such as a PLC (Programable Logic Controller), has been known. For example, Patent Document 1 discloses a PLC including a PLC module and a selection module, and transmitting data of the selection module to a control device by communication at a fixed cycle.

[0003] Prior Art Documents

[0004] Patent Documents

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2003-202907 Summary of the Invention

[0006] Problems to be Solved by the Invention

[0007] In a system including a plurality of modules communicably connected via a bus, an improvement in performance such as an improvement in I / O expandability with an external device such as a field device is desired.

[0008] The present disclosure has been made in view of the above circumstances, and an object thereof is to improve the performance of a system including a plurality of modules communicably connected via a bus.

[0009] Means for Solving the Problems

[0010] The expansion module involved in some embodiments is an expansion module connected to multiple serial buses, comprising: an interface for inputting and outputting external signals; and a communication circuit for communicating via a first serial bus and a second serial bus. The communication circuit has a first slave communication function for communicating via the first serial bus, a second slave communication function for communicating via the second serial bus, a third slave communication function for integrating the first serial bus and the second serial bus for communication, and a master communication function for communicating via the second serial bus, which can be switched between effective and ineffective respectively. The first slave communication function and the third slave communication function each include returning a response to a command sent to this station received from a slave CPU module and relaying a command sent to other stations received from the slave CPU module and relaying a response received from other stations. The second slave communication function includes returning a response to a command sent to this station received from the CPU module or other stations and relaying a command sent to other stations received from the CPU module or other stations and relaying a response received from other stations. The master communication function includes sending a command to other stations and receiving a response from the other stations. According to the expansion module involved in some embodiments, in a system using the expansion module, the performance is improved in terms of enhancing the expandability of I / O between the external device.

[0011] In one embodiment, the expansion module may further include a separation circuit for separating the second serial bus. In this way, when the second serial bus is separated, the data flowing in one of the separated buses will not enter the other bus, so the waiting time during communication contention can be reduced, and the input / output response can be speeded up.

[0012] In one embodiment, when any one of the second slave communication function, the third slave communication function, and the master communication function is made effective, the communication circuit may make the other two functions ineffective. In this way, among the multiple functions using the second serial bus, if one function is effective, the other functions are ineffective, so the possibility of occurrence of problems such as inability to communicate via the second serial bus due to incorrect setting is reduced.

[0013] In one embodiment, the expansion module may further include an arithmetic circuit for executing a program. When the master communication function is effective, the arithmetic circuit performs arithmetic processing on the response received from other stations that are the destinations of the commands and determines the output value. In this way, by making the expansion module have an arithmetic circuit, the processing such as input / output response can be performed without a CPU module.

[0014] In one embodiment, when the main communication function is valid, the communication circuit may send the output value to other stations via the second serial bus. In this way, the communication circuit sends the output value to other stations, so that the output signal including the output value can be output to an external device via the interface of other stations, improving the I / O expandability with the external device.

[0015] The CPU module according to some embodiments is a CPU module connected to multiple serial buses and includes a communication circuit for communicating via a first serial bus and a second serial bus; the communication circuit has a first main communication function for communicating via the first serial bus, a second main communication function for communicating via the second serial bus, and a third main communication function for integrating the first serial bus and the second serial bus for communication, which can be switched between valid / invalid respectively; the first main communication function, the second main communication function, and the third main communication function each include the function of sending a command to other stations and receiving a response from the other stations. According to the CPU module according to some embodiments, by simply switching the configuration of the communication circuit, the usage mode of multiple serial buses can be easily changed. Therefore, the performance of the system using the CPU module is improved.

[0016] The system according to some embodiments is a system including a first serial bus, a second serial bus, a CPU module, and multiple expansion modules, wherein the CPU module and the multiple expansion modules are respectively connected to the first serial bus and the second serial bus. According to the system according to some embodiments, multiple serial buses can be used. Therefore, compared with a structure that can only use a single serial bus, for example, the performance of the system is improved.

[0017] In one embodiment, the communication method executed by the above system may also include: a step of a certain expansion module separating the second serial bus into two; a step of the CPU module communicating with the multiple expansion modules via the first serial bus; a step of the CPU module communicating with the expansion module connected to one of the separated second serial buses via the one separated second serial bus; and a step of two or more expansion modules connected to the other separated second serial bus communicating with each other via the other second serial bus. In this way, if the second serial bus is separated, the data flowing through one of the separated buses does not enter the other bus. Therefore, the waiting time when communication competition occurs can be reduced, and the input / output response can be speeded up.

[0018] In one embodiment, the communication method performed by the above system may also include: the step of the CPU module and the plurality of expansion modules integrating the first serial bus and the second serial bus; and the step of the CPU module and the plurality of expansion modules communicating via the integrated first serial bus and second serial bus. Thus, since communication is performed via the integrated plurality of serial buses, the communication speed is increased compared to a configuration where communication is performed via, for example, a single serial bus.

[0019] Advantages of the Invention

[0020] According to the present disclosure, it is possible to improve the performance of a system including a plurality of modules communicably connected via a bus. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a block diagram showing a first example of a PLC according to a comparative example.

[0022] Figure 2 It is a block diagram showing a second example of a PLC according to a comparative example.

[0023] Figure 3 It is a block diagram showing a third example of a PLC according to a comparative example.

[0024] Figure 4 It is a diagram showing an example of communication scheduling of a PLC according to a comparative example.

[0025] Figure 5 It is a block diagram showing a structural example of a system according to an embodiment of the present disclosure.

[0026] Figure 6 It is a diagram showing an example of the configuration of the communication mode between expansion modules of a system according to an embodiment of the present disclosure.

[0027] Figure 7 It is a flowchart showing an example of the operation of a system according to an embodiment of the present disclosure when set to the communication mode between expansion modules and starting communication.

[0028] Figure 8 It is a flowchart showing an example of the operation of the communication between expansion modules of a system according to an embodiment of the present disclosure.

[0029] Figure 9 It is a flowchart showing an example of the operation of normal communication or high-speed communication in a system according to an embodiment of the present disclosure.

[0030] Figure 10 It is a diagram showing an example of the configuration of the high-speed communication mode of a system according to an embodiment of the present disclosure.

[0031] Figure 11 It is a flowchart showing an operation example in which the system according to an embodiment of the present disclosure is set to the high-speed communication mode and starts communication.

[0032] Figure 12 It is a diagram showing another example of the configuration of the I / O communication mode of the system according to an embodiment of the present disclosure.

[0033] Figure 13 It is a diagram showing a modified example of the configuration of the system according to an embodiment of the present disclosure.

[0034] Description of Reference Numerals

[0035] A System

[0036] 1, 2 Serial Bus

[0037] 1a, 2a Downlink

[0038] 1b, 2b Uplink

[0039] 10 CPU Module

[0040] 11 Arithmetic Circuit

[0041] 12 Main Communication Circuit

[0042] 13 Main Communication Function [0]

[0043] 14 Main Communication Function [1]

[0044] 15 Main Communication Function [0,1]

[0045] 20 - 60 Expansion Module

[0046] 21 - 61 External Interface

[0047] 22 - 62 Arithmetic Circuit

[0048] 23 - 63 Master / Slave Communication Circuit

[0049] 24 - 64 Slave Communication Function [0]

[0050] 25 - 65 Slave Communication Function [1]

[0051] 26 - 66 Slave Communication Function [0,1]

[0052] 27 - 67 Main Communication Function [1]

[0053] 28 - 68 Separation Circuit Detailed Description of the Invention

[0054] (Comparative Example)

[0055] First, the PLC involved in the comparative example will be described, and its problems will be discussed.

[0056] The buses of PLCs are roughly divided into two categories. Specifically, for example, Figure 1 the parallel bus type shown in Figure 2 and the serial bus type shown in Figure 3 are known. In addition, as an expansion module of a PLC, in addition to general modules, for example, Figure 3 as shown, a special expansion module having a dedicated external interface and a dedicated arithmetic circuit is sometimes used. The special expansion module can be used in both the parallel bus type and the serial bus type.

[0057] · Parallel bus type

[0058] As Figure 1 shown, in the parallel bus type, generally, a CPU module and an expansion module are installed on a base module. Each module is connected via a parallel bus wired on the base module. The CPU module becomes a communication master and performs read / write access to the expansion module via the parallel bus. The parallel bus is a bus capable of two-way communication.

[0059] · Serial bus type

[0060] As Figure 2 shown, in the serial bus type, generally, a base module is not required, and adjacent modules are connected to each other via a serial bus. The CPU module becomes a communication master and sends commands to the expansion module. The expansion module that receives a command destined for this station returns a response to the CPU module. The serial bus is a unidirectional bus, and commands and responses are transmitted in a specified direction. When each expansion module receives commands and responses destined for other stations, it sends them to the next expansion module. Thus, the commands and responses are transmitted.

[0061] · Special expansion module

[0062] Generally, the processing of input / output responses is performed as follows: The CPU module reads input values from the input module, processes them through the CPU module, and then writes the output values to the output module. On the other hand, in specific high-speed applications, for example, in the conventional method using general expansion modules, etc., the response time requirements may sometimes not be met. In this case, as Figure 3 shown, a special expansion module having a dedicated external interface and a dedicated arithmetic circuit is used, and the input / output response processing is performed within the special expansion module without going through the CPU module, thereby achieving high-speed response time.

[0063] (Problems of the comparative example)

[0064] · Parallel bus type

[0065] The parallel bus is a multi-point circuit topology. Therefore, during an access, the entire bus is occupied, and the next access cannot be started until one access is completed. In addition, when the number of modules connected to the parallel bus increases, the signal waveform is likely to be disturbed, so it is difficult to increase the forwarding speed.

[0066] · Serial bus type

[0067] The serial bus is a point-to-point circuit topology. Therefore, a stable signal waveform can be obtained regardless of the number of modules connected to the serial bus, so it is easy to increase the forwarding speed. In addition, compared with the parallel bus, the number of signals to be forwarded is also small. For these reasons, in recent years, there has been a tendency to adopt serial buses. In addition, the serial bus does not have the situation where the entire bus is occupied during an access like the parallel bus. Therefore, by sending and receiving multiple commands and responses at once on the serial bus, the bus utilization efficiency can be improved compared with the parallel bus.

[0068] However, even if the bus utilization efficiency is improved, for example, in the case where high-priority communication and low-priority communication are mixed, sometimes the time requirements of high-priority communication cannot be met. Regarding this, for example, as Figure 4 shown, a method of dividing time periods according to each priority by scheduling communication (that is, time division) can be used, but there are drawbacks such as the scheduling management in the CPU module becoming complicated.

[0069] · Special expansion module

[0070] The I / O that can be used for the processing of input / output responses within the special expansion module is only the I / O connected to the dedicated external interface provided in the special expansion module itself. Therefore, when it is desired to increase the number of I / Os, it is necessary to re-develop a dedicated special expansion module, and there is a lack of expandability of I / O with external devices.

[0071] (The system of the present disclosure)

[0072] An object of the present disclosure is, in view of the above problems, to improve the expandability of I / O with external devices in a system including a plurality of modules communicably connected via a bus. Hereinafter, a system according to an embodiment of the present disclosure will be described with reference to the drawings.

[0073] As Figure 5As shown, system A includes multiple serial buses 1 and 2, a CPU module 10, and multiple expansion modules 20, 30, 40, 50, and 60. The number of serial buses included in system A only needs to be 2 or more. In addition, the number of expansion modules included in system A only needs to be 1 or more. The CPU module 10 and the multiple expansion modules 20 to 60 are connected to the first serial bus 1 and the second serial bus 2. System A functions as, for example, a PLC or a data logger.

[0074] Serial bus 1 includes a downstream 1a and an upstream 1b.

[0075] Serial bus 2 includes a downstream 2a and an upstream 2b.

[0076] The CPU module 10 has an arithmetic circuit 11 and a main communication circuit 12.

[0077] The arithmetic circuit 11 may also include a processor that executes an arbitrary control program and a memory accessible by the processor. The processor is, for example, an MCU (Micro Controller Unit) or an MPU (MicroProcessor Unit), etc., but is not limited to these. Alternatively, the arithmetic circuit 11 may also include a logic circuit such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field-Programmable Gate Array).

[0078] The main communication circuit 12 includes a communication circuit that communicates via the serial buses 1 and 2. Specifically, the main communication circuit 12 includes a communication circuit that reads and writes to and from the expansion modules 20 to 60 via the serial buses 1 and 2. In the present embodiment, the main communication circuit 12 has a main communication function [0] 13, a main communication function [1] 14, and a main communication function [0, 1] 15 in a manner that can be switched between valid / invalid respectively.

[0079] The main communication function [0] 13 is a function of reading and writing to and from the expansion modules 20 to 60 in the channel using the serial bus 1.

[0080] Specifically, the main communication function [0] 13 includes a function of communicating via the channel using the serial bus 1, a function of sending commands to other stations, and a function of receiving responses from other stations.

[0081] The main communication function [1] 14 is a function of communicating via the channel using the serial bus 2.

[0082] Specifically, the main communication function [1] 14 includes the function of communicating via a channel using the serial bus 2, the function of sending commands to other stations, and the function of receiving responses from other stations.

[0083] The main communication function [0,1] 15 is a function of reading and writing to and from the expansion modules 20 to 60 in a channel integrating the serial buses 1 and 2.

[0084] Specifically, the main communication function [0,1] 15 includes the function of communicating via a channel integrating the serial buses 1 and 2, the function of sending commands to other stations, and the function of receiving responses from other stations.

[0085] The expansion module 20 is, for example, a basic digital input module, digital output module, analog input module, analog output module, or generally a high-function module used in a PLC (Programable Logic Controller) (for example, a sub-CPU module, communication module, or positioning module, etc.), but is not limited to these. The expansion module 20 includes an external interface 21, an arithmetic circuit 22, a master / slave communication circuit 23, and a separation circuit 28.

[0086] The external interface 21 includes, for example, an interface for inputting and outputting to external devices such as field devices. Via the external interface 21, in addition to simple input / output signals, signals for external communication can also be input and output.

[0087] The arithmetic circuit 22 may also include a processor that executes operations within the expansion module 20 by executing an arbitrary program, and a memory accessible by the processor. The processor is, for example, an MCU or MPU, etc., but is not limited to these. Alternatively, the arithmetic circuit 22 may include a logic circuit such as an ASIC or FPGA.

[0088] The master / slave communication circuit 23 includes a communication circuit for communicating with the CPU module or other expansion modules 30 to 60. The master / slave communication circuit 23 has a slave communication function [0] 24, a slave communication function [1] 25, a slave communication function [0,1] 26, and a main communication function [1] 27 in a manner that can be switched between valid / invalid respectively.

[0089] The slave communication function [0] 24 is a function of, in response to a read / write from the slave CPU module 10 to this station in a channel using the serial bus 1, sending commands and responses destined for other stations to the next module.

[0090] Specifically, the slave communication function [0] 24 includes functions of communicating via a channel using the serial bus 1, returning a response to a command sent to this station received from the CPU module 10, relaying a command sent to other stations received from the CPU module 10, and relaying a response received from other stations.

[0091] The slave communication function [1] 25 is a function of, in a channel using the serial bus 2, sending a command and a response to other stations to the next module in response to a read / write sent to this station from the CPU module 10 or other expansion modules 30 - 60.

[0092] Specifically, the slave communication function [1] 25 includes functions of communicating via a channel using the serial bus 2, returning a response to a command sent to this station received from the CPU module 10 or other stations, relaying a command sent to other stations received from the CPU module 10 or other stations, and relaying a response received from other stations.

[0093] The slave communication function [0, 1] 26 is a function of, in a channel integrating the serial buses 1 and 2, sending a command and a response to other stations to the next module in response to a read / write sent to this station from the CPU module 10.

[0094] Specifically, the slave communication function [0, 1] 26 includes functions of communicating via a channel integrating the serial buses 1 and 2, returning a response to a command sent to this station received from the CPU module 10, relaying a command sent to other stations received from the CPU module 10, and relaying a response received from other stations.

[0095] The master communication function [1] 27 is a function of performing read / write operations on other expansion modules 30 - 60 in a channel using the serial bus 2.

[0096] Specifically, the master communication function [1] 27 includes functions of communicating via a channel using the serial bus 2, sending a command to other stations, and receiving a response from other stations.

[0097] In addition, the master / slave communication circuit 23 controls in such a way that multiple functions common to the serial buses used in communication among the above four functions are not simultaneously valid. For example, when the slave communication function [0] 24 or the slave communication function [0, 1] 26 using the serial bus 1 in communication is made valid, the master / slave communication circuit 23 makes other functions invalid. Another example is that when any one of the slave communication function [1] 25, the slave communication function [0, 1] 26, and the master communication function [1] 27 using the serial bus 2 in communication is made valid, the master / slave communication circuit 23 makes other functions invalid.

[0098] Alternatively, when enabling the slave communication function [0] 24 and the slave communication function [1] 25, the master / slave communication circuit 23 can also disable other functions. In addition, when enabling the slave communication function [0] 24 and the master communication function [1] 27, the master / slave communication circuit 23 can also disable other functions. In addition, when enabling the slave communication function [0,1] 26, the master / slave communication circuit 23 can also disable other functions.

[0099] The separation circuit 28 includes a circuit that logically separates the serial bus 2 between an adjacent module. In the present embodiment, when the separation circuit 28 is turned on, on the upstream side of the expansion module 20 ( Figure 5 which is the left side in this case), that is, on the CPU module 10 side, the serial bus 2 is logically separated. In this state, communication via the serial bus 2 is not performed between the expansion module 20 and another module ( Figure 5 which is the CPU module 10 in this case) adjacent to the CPU module 10 side. On the other hand, when the separation circuit 28 is turned off, on the upstream side of the expansion module 20, the serial bus 2 is logically connected. In addition, by the separation circuit 28, an embodiment can also be realized in which the serial bus is logically separated / connected on the downstream side ( Figure 5 which is the right side in this case), that is, on the side opposite to the CPU module 10 rather than on the upstream side of the expansion module 20.

[0100] The expansion modules 30 to 60 each have the same structure and function as the expansion module 20. For this same structure and function, the same name as the structure and function of the expansion module 20 is given, and the reference numerals are changed for marking. For example, the "external interfaces" provided in the expansion modules 30, 40, 50, and 60 are respectively marked as external interfaces 31, 41, 51, and 61.

[0101] Next, the operation of the system A according to an embodiment of the present disclosure will be described. The system A according to an embodiment of the present disclosure can operate in multiple modes including an expansion module - to - expansion module communication mode and a high - speed communication mode. Hereinafter, each mode will be described.

[0102] (Expansion module - to - expansion module communication mode)

[0103] First, the expansion module - to - expansion module communication mode will be described. In the expansion module - to - expansion module communication mode, normal communication is performed using the serial bus 1, normal communication is performed using one of the two separated serial buses 2, and expansion module - to - expansion module communication is performed using the other. In normal communication, the CPU module 10 is the master, and other modules are slaves. In expansion module - to - expansion module communication, a specific expansion module is the master, and other expansion modules are slaves.

[0104] Reference Figure 6 An example of the configuration for operating System A in the communication mode between expansion modules will be described. In this example, in the communication between expansion modules, expansion module 50 is the host, and expansion modules 40 and 60 are slaves. An input signal from an external device is input to expansion module 40. Expansion module 60 outputs an output signal to the external device.

[0105] · Configuration of the main communication circuit of the CPU module

[0106] The main communication circuit 12 of CPU module 10 enables main communication function [0] 13 and main communication function [1] 14, and disables other functions (main communication function [0,1] 15). In Figure 6 For simplicity of explanation, the illustration of the functions that are set to be disabled is omitted.

[0107] · Configuration of the master / slave communication circuit of the expansion module

[0108] The master / slave communication circuit 53 of expansion module 50 enables slave communication function [0] 54 and main communication function [1] 57, and disables other functions (slave communication function [1] 55 and slave communication function [0,1] 56). In addition, the master / slave communication circuits 23, 33, 43, and 63 of the other expansion modules 20, 30, 40, and 60 enable slave communication function [0] 24, 34, 44, and 64, and slave communication function [1] 25, 35, 45, and 65 respectively, and disable other functions (slave communication function [0,1] 26, 36, 46, and 66, and main communication function [1] 27, 37, 47, and 67). In Figure 6 For simplicity of explanation, the illustration of the functions that are set to be disabled is omitted.

[0109] · Configuration of the separation circuit of the expansion module

[0110] The separation circuit 48 of expansion module 40 sets the operation state to open (ON) and logically separates the serial bus 2 between expansion modules 30 and 40. In addition, the separation circuits 28, 38, 58, and 68 of the other expansion modules 20, 30, 50, and 60 set the operation state to closed (OFF) and are respectively connected to the serial bus 2. In Figure 6 For simplicity of explanation, the illustration of the separation circuits 28, 38, 58, and 68 with the operation state of closed is omitted.

[0111] With the above configuration, a channel for normal communication is formed using Serial Bus 1. The channel for normal communication using Serial Bus 1 can be used independently of Serial Bus 2. In addition, a channel for normal communication is formed using one of the separated Serial Buses 2 (here, the part from the CPU module 10 to the expansion module 30). The channel for normal communication using one of the separated Serial Buses 2 can be used independently of Serial Bus 1. In addition, another one of the separated Serial Buses 2 (here, the part from the expansion module 40 to 60) is used to form a channel for communication between expansion modules. The channel for communication between expansion modules using another one of the separated Serial Buses 2 can be used independently of the channel for normal communication.

[0112] Refer to Figure 7 , and an example of the operation of setting System A to the communication mode between expansion modules and starting communication will be described.

[0113] Step S100: The main communication circuit 12 of the CPU module 10 performs configuration. Specifically, in the example shown in Figure 6 , the main communication circuit 12 enables the main communication function [0] 13 and the main communication function [1] 14, and disables other functions (the main communication function [0,1] 15).

[0114] Step S101: The master / slave communication circuits 23 to 63 of the expansion modules 20 to 60 respectively perform configuration. Specifically, in the example shown in Figure 6 , the master / slave communication circuit 53 of the expansion module 50 enables the slave communication function [0] 54 and the main communication function [1] 57, and disables other functions (the slave communication function [1] 55 and the slave communication function [0,1] 56). In addition, the master / slave communication circuits 23, 33, 43, and 63 of the other expansion modules 20, 30, 40, and 60 respectively enable the slave communication functions [0] 24, 34, 44, and 64, and the slave communication functions [1] 25, 35, 45, and 65, and disable other functions (the slave communication functions [0,1] 26, 36, 46, and 66, and the main communication functions [1] 27, 37, 47, and 67).

[0115] Step S102: The separation circuits 28 to 68 of the expansion modules 20 to 60 respectively perform configuration. Specifically, in the example shown in Figure 6 , the separation circuit 48 of the expansion module 40 sets the operation state to open and logically separates Serial Bus 2 between the expansion modules 30 and 40. In addition, the separation circuits 28, 38, 58, and 68 of the other expansion modules 20, 30, 50, and 60 respectively set the operation state to closed and connect to Serial Bus 2.

[0116] Step S103: System A starts using normal communication on Serial Bus 1, normal communication on one of the separated Serial Buses 2 (here, the part from CPU module 10 to expansion module 30), and expansion module - to - expansion module communication on the other of the separated Serial Buses 2 (here, the part from expansion module 40 to 60).

[0117] Refer to Figure 8 , and an operation example of the expansion module - to - expansion module communication of System A in the expansion module - to - expansion module communication mode will be described.

[0118] Step S200: In Figure 6 the example shown, expansion module 40 obtains an input value from the input signal 49 input via external interface 41.

[0119] Step S201: Expansion module 50 reads the input value from expansion module 40. Specifically, in Figure 6 the example shown, the master / slave communication circuit 53 of expansion module 50 sends the command 74 read via the upstream 2b of Serial Bus 2 to expansion module 40 through the master communication function [1] 57. The master / slave communication circuit 43 of expansion module 40 returns a response 75 via the downstream 2a of Serial Bus 2 through the slave communication function [1] 45.

[0120] Step S202: Expansion module 50 performs arithmetic operations for input - output response processing through arithmetic circuit 52 and determines the output value.

[0121] Step S203: Expansion module 50 writes the output value to expansion module 60. Specifically, in Figure 6 the example shown, the master / slave communication circuit 53 of expansion module 50 sends the command 76 written via the downstream 2a of Serial Bus 2 to expansion module 60 through the master communication function [1] 57. The master / slave communication circuit 63 of expansion module 60 returns a response 77 via the upstream 2b of Serial Bus 2 through the slave communication function [1] 65.

[0122] Step S204: Expansion module 60 outputs an output signal 69 containing the output value via external interface 61 (refer to Figure 6 ).

[0123] Refer to Figure 9 , and an operation example of the normal communication of System A in the expansion module - to - expansion module communication mode will be described.

[0124] Step S300: The CPU module 10 sends a command to the expansion module. Specifically, in Figure 6In the example shown, the main communication circuit 12 of the CPU module 10 sends command 70 to the expansion module 40 via the downstream 1a of the serial bus 1 through the main communication function [0]13. In addition, the main communication circuit 12 sends command 72 to the expansion module 30 via the downstream 2a of the serial bus 2 through the main communication function [1]14.

[0125] Step S301: The expansion module that receives the command returns a response. Specifically, in Figure 6 the example shown, the master / slave communication circuit 43 of the expansion module 40 returns response 71 via the upstream 1b of the serial bus 1 through the slave communication function [0]44. In addition, the master / slave communication circuit 33 of the expansion module 30 returns response 73 via the upstream 2b of the serial bus 2 through the slave communication function [1]35.

[0126] (High-speed communication mode)

[0127] Next, the high-speed communication mode will be described. In the high-speed communication mode, high-speed communication is performed via a channel that integrates serial buses 1 and 2. Specifically, as the downstream of the channel that integrates serial buses 1 and 2, the downstream 1a of serial bus 1 and the downstream 2a of serial bus 2 are used. As the upstream of the channel that integrates serial buses 1 and 2, the upstream 1b of serial bus 1 and the upstream 2b of serial bus 2 are used. Therefore, in high-speed communication, compared with the above-mentioned normal communication, the bit width of each of the downstream and upstream becomes twice as large. In high-speed communication, the CPU module 10 becomes the host, and other modules become slaves.

[0128] Refer to Figure 10 to describe an example of the configuration for operating system A in the high-speed communication mode. In this example, the CPU module 10 becomes the host, and the expansion modules 20 to 60 become slaves.

[0129] ·Configuration of the main communication circuit of the CPU module

[0130] The main communication circuit 12 of the CPU module 10 enables the main communication functions [0,1]15 and disables other functions (the main communication function [0]13 and the main communication function [1]14). In Figure 10 for simplicity of explanation, the illustration of the functions that are set to invalid is omitted.

[0131] ·Configuration of the master / slave communication circuit of the expansion module

[0132] The master / slave communication circuits 23 to 63 of the expansion modules 20 to 60 enable the slave communication functions [0,1]26 to 66 respectively and disable other functions (the slave communication functions [0]24 to 64, the slave communication functions [1]25 to 65, and the main communication functions [1]27 to 67) respectively. InFigure 10 In this case, for simplicity of explanation, illustrations of functions set to be invalid are omitted.

[0133] · Configuration of the separation circuit of the expansion module

[0134] The separation circuits 28 to 68 of the expansion modules 20 to 60 set their operation states to off and are respectively connected to the serial bus 2. In Figure 10 this case, for simplicity of explanation, illustrations of the separation circuits 28 to 68 with the operation state of off are omitted.

[0135] With the above configuration, the serial buses 1 and 2 are integrated to form a channel for high-speed communication.

[0136] Refer to Figure 11 for an example of the operation of starting communication by setting System A to the high-speed communication mode.

[0137] Step S400: The main communication circuit 12 of the CPU module 10 performs configuration. Specifically, in the example shown in Figure 10 , the main communication circuit 12 enables the main communication function [0,1] 15 and disables other functions (the main communication function [0] 13 and the main communication function [1] 14).

[0138] Step S401: The master / slave communication circuits 23 to 63 of the expansion modules 20 to 60 respectively perform configuration. Specifically, in the example shown in Figure 10 , the master / slave communication circuits 23 to 63 respectively enable the slave communication functions [0,1] 26 to 66 and disable other functions (the slave communication functions [0] 24 to 64, the slave communication functions [1] 25 to 65, and the main communication function [1] 27 to 67).

[0139] The operations in the above steps S400 and S401, in other words, are the operations of the CPU module 10 and the expansion modules 20 to 60 integrating the serial buses 1 and 2 to form a channel for high-speed communication.

[0140] Step S402: The separation circuits 28 to 68 of the expansion modules 20 to 60 respectively perform configuration. Specifically, in the example shown in Figure 10 , the separation circuits 28 to 68 of the expansion modules 20 to 60 respectively set their operation states to off and are connected to the serial bus 2.

[0141] Step S403: System A starts high-speed communication via the channel integrating the serial buses 1 and 2.

[0142] Next, an operation example of high-speed communication of System A in the high-speed communication mode will be described. In high-speed communication, compared with the above-mentioned normal communication, the details of the configuration and the channels used in communication are different, but the operation process is the same. Therefore, for the operation example of high-speed communication, reference is also made to the above-mentioned Figure 9 for description.

[0143] Step S300: The CPU module 10 sends a command to the expansion module. Specifically, in the example shown in Figure 10 , the main communication circuit 12 of the CPU module 10 sends the command 80 to the expansion module 40 via the downlinks 1a and 2a of the serial buses 1 and 2 through the main communication function [0,1]15. In addition, the main communication circuit 12 sends the command 82 to the expansion module 60 via the downlinks 1a and 2a of the serial buses 1 and 2 through the main communication function [0,1]15.

[0144] Step S301: The expansion module that receives the command returns a response. Specifically, in the example shown in Figure 10 , the master / slave communication circuit 43 of the expansion module 40 returns the response 81 via the uplinks 1b and 2b of the serial buses 1 and 2 through the slave communication function [0,1]46. In addition, the master / slave communication circuit 63 of the expansion module 60 returns the response 83 via the uplinks 1b and 2b of the serial buses 1 and 2 through the slave communication function [0,1]66.

[0145] · Effects of the expansion module intercommunication mode

[0146] In the example of Figure 6 , the expansion module 50 that functions as the master in the expansion module intercommunication can directly read and write to the expansion modules 40 and 60 that function as the slaves. Thus, the expansion module 50 can perform high-speed and intelligent input / output response processing using the arithmetic circuit 52 without the CPU module 10. In addition, since the external interfaces of any expansion modules can be used according to the configuration, compared with, for example, the structure that adopts the special expansion module shown in Figure 3 , the shortage of I / O numbers can be compensated.

[0147] Furthermore, by using a separation circuit to separate the serial bus 2, a dedicated channel for expansion module intercommunication can be ensured.

[0148] For example, compared with the embodiment shown in Figure 6 , Figure 12The difference in the example shown is that the separation circuit 48 is off (i.e., the serial bus 2 is not separated). In this comparative example, the command 90 is a broadcast command that is sent from the CPU module 10 to all the expansion modules 20 to 60 at once. This broadcast communication can be regarded as part of normal communication. In this case, when the timing of the broadcast communication and the communication between the expansion modules repeats, competition occurs and the input / output response time becomes longer. In addition, the command 91 is a command for incorrect communication that is sent from the expansion module 50. Incorrect communication of commands may occur, for example, during the development of the device. In this case, the incorrect command will enter the channel on the unseparated side (upstream side), and unnecessary error handling will occur.

[0149] In contrast, as in Figure 6 the example shown, in the present embodiment, commands other than the communication between the expansion modules do not enter the separated side (downstream side) channel, so the waiting time when communication competition occurs can be reduced. As a result, the input / output response can be made faster. In addition, even in the channel on the unseparated side (upstream side), entry of unnecessary commands or responses from the separated side channel can be prevented.

[0150] · Effects of the high-speed communication mode

[0151] In Figure 10 the example shown, by integrating the serial buses 1 and 2 into one channel for high-speed communication, communication can be performed at twice the speed of normal communication. Therefore, the high-speed communication mode is effective in cases where the data volume is relatively large, such as in applications for high-speed data collection, or where the requested forwarding time is relatively short.

[0152] · Effects of the configuration

[0153] As in Figure 6 and Figure 10 the example shown, according to the present embodiment, by simply configuring the main communication circuit 12 of the CPU module 10 and the main / slave communication circuits 23 to 63 and the separation circuits 28 to 68 of the expansion modules 20 to 60, the usage mode of the serial bus can be changed.

[0154] It should be noted that although the present disclosure has been described based on the respective drawings and embodiments, those skilled in the art can also make various deformations and modifications based on the present disclosure. Therefore, it should be noted that these deformations and modifications are included in the scope of the present disclosure. For example, the functions included in each structure or each step, etc., can be reorganized without logical conflict, and multiple structures or steps, etc., can be combined into one or divided.

[0155] (Application / Deformation of Serial Bus)

[0156] For example, the signals for the downstream and upstream of the serial bus are not limited to 1 bit, and can also be 2 bits or more. In addition, the number of serial buses is not limited to two, and can also be three or more. In addition, the functions of serial buses 1 and 2 can also be interchanged.

[0157] (Application / Variation of the Inter-Expansion Module Communication Mode)

[0158] The number of expansion modules may be one or more. In addition, the number of expansion modules that become the host in the inter-expansion module communication can also be two or more. In addition, through the separation circuits 28 to 68, the serial bus can be separated not only at one place but also at multiple places. In addition, the number of serial buses that can be separated can also be two or more.

[0159] (Application / Variation of the High-Speed Communication Mode)

[0160] The number of expansion modules may be one or more. In addition, the number of integrated serial buses can also be two or more.

[0161] (Application / Variation of the Expansion Module)

[0162] Some of the expansion modules included in System A may not have an external interface. In addition, some of the expansion modules may not have an arithmetic circuit. In addition, some of the expansion modules may not have a separation circuit. In addition, some of the expansion modules may not have the main communication function [1].

[0163] (Application / Variation of the Configuration)

[0164] Figure 13 The configuration and operation examples in the case where inter-expansion module communication is not performed are shown as Figure 6 a variation example.

[0165] · Configuration of the Main Communication Circuit of the CPU Module

[0166] The main communication circuit 12 of the CPU module 10 enables the main communication function [0] 13 and the main communication function [1] 14, and disables other functions (main communication function [0,1] 15). In Figure 13 order to simplify the description, the illustration of the functions set to be invalid is omitted.

[0167] · Configuration of the Main / Slave Communication Circuit of the Expansion Module

[0168] The main / slave communication circuits 23 to 63 of the expansion modules 20 to 60 enable the slave communication function [0] 24 to 64 and the slave communication function [1] 25 to 65, respectively, and disable other functions (slave communication function [0,1] 26 to 66 and main communication function [1] 27 to 67). In Figure 13In the following, for the sake of simplicity of explanation, illustrations of functions set to be invalid are omitted.

[0169] · Configuration of the disconnection circuit of the expansion module

[0170] The disconnection circuits 28 to 68 of the expansion modules 20 to 60 set their operation states to off and are respectively connected to the serial bus 2. In Figure 13 the following, for the sake of simplicity of explanation, illustrations of the disconnection circuits 28 to 68 with their operation states set to off are omitted.

[0171] · Operations in the modified example

[0172] With the above configuration, all communications become only normal communications. In this case, the CPU module 10 becomes the host, and all the expansion modules 20 to 60 become slaves. The CPU module 10 sends a command to the destination expansion module, and the expansion module that receives the command returns a response to the CPU module 10. The channel for normal communication using the serial bus 1 and the channel for normal communication using the serial bus 2 can be used independently of each other.

[0173] · Example of normal communication on the serial bus 1

[0174] In Figure 13 the example shown, the main communication circuit 12 of the CPU module 10 sends a command 70 to the expansion module 40 via the downstream 1a of the serial bus 1 through the main communication function [0] 13. The main / slave communication circuit 43 of the expansion module 40 returns a response 71 via the upstream 1b of the serial bus 1 through the slave communication function [0] 44.

[0175] · Example of normal communication on the serial bus 2

[0176] In Figure 13 the example shown, the main communication circuit 12 of the CPU module 10 sends a command 78 to the expansion module 60 via the downstream 2a of the serial bus 2 through the main communication function [1] 14. The main / slave communication circuit 63 of the expansion module 60 returns a response 79 via the upstream 2b of the serial bus 2 through the slave communication function [1] 65.

[0177] · Effects of the modified example

[0178] In the modified example, the channel for normal communication using the serial bus 1 and the channel for normal communication using the serial bus 2 can be used independently of each other. For example, in a case where it is desired to control an external device while collecting data, this structure is effective. For example, by allocating the serial bus 1 for control and the serial bus 2 for data collection, it is possible to simultaneously perform control of the external device and data collection without affecting the control cycle.

Claims

1. An expansion module, which is an expansion module connected to multiple serial buses, and has: An interface for inputting and outputting external signals; and A communication circuit that communicates via a first serial bus and a second serial bus. The communication circuit has a first slave communication function for communicating via the first serial bus, a second slave communication function for communicating via the second serial bus, a third slave communication function for integrating the first serial bus and the second serial bus for communication, and a master communication function for communicating via the second serial bus, each of which can be switched between effective and ineffective. The first slave communication function and the third slave communication function each include the function of returning a response to a command sent to this station received from a slave CPU module, relaying a command sent to other stations received from the CPU module, and relaying a response received from other stations. The second slave communication function includes the function of returning a response to a command sent to this station received from the CPU module or other stations, relaying a command sent to other stations received from the CPU module or other stations, and relaying a response received from other stations. The master communication function includes the function of sending a command to other stations and receiving a response from the other stations.

2. The expansion module according to claim 1, wherein The expansion module further includes a separation circuit for separating the second serial bus.

3. The expansion module according to claim 1 or 2, wherein When any one of the second slave communication function, the third slave communication function, and the master communication function is made effective, the communication circuit makes the other two functions ineffective.

4. The expansion module according to any one of claims 1 to 3, wherein The expansion module further includes an arithmetic circuit for executing a program. When the master communication function is effective, the arithmetic circuit performs arithmetic processing on a response received via the second serial bus from another station that is the destination of the command, and determines an output value.

5. The expansion module according to claim 4, wherein When the master communication function is effective, the communication circuit sends the output value to other stations via the second serial bus.

6. A CPU module, which is a CPU module connected to multiple serial buses, wherein The CPU module includes a communication circuit that communicates via a first serial bus and a second serial bus. The communication circuit has a first master communication function for communicating via the first serial bus, a second master communication function for communicating via the second serial bus, and a third master communication function for integrating the first serial bus and the second serial bus for communication, each of which can be switched between effective and ineffective. The first master communication function, the second master communication function, and the third master communication function each include the function of sending a command to other stations and receiving a response from the other stations.

7. A system includes a first serial bus, a second serial bus, a CPU module, and multiple expansion modules, wherein The CPU module and the multiple expansion modules are respectively connected to the first serial bus and the second serial bus. Each of the multiple expansion modules has a first slave communication function for communicating via the first serial bus, a second slave communication function for communicating via the second serial bus, a third slave communication function for integrating communication via the first serial bus and the second serial bus, and a master communication function for communicating via the second serial bus, in a manner that can be respectively switched between effective / invalid. The first slave communication function, the second slave communication function, and the third slave communication function respectively include the function of relaying commands received from the CPU module and destined for other stations. The master communication function includes the function of sending commands to other stations.

8. The system according to claim 7, wherein The first slave communication function and the third slave communication function respectively include the function of returning a response to a command received from the CPU module and destined for this station, relaying commands received from the CPU module and destined for other stations, and relaying responses received from other stations. The second slave communication function includes the function of returning a response to a command received from the CPU module or other stations and destined for this station, relaying commands received from the CPU module or other stations and destined for other stations, and relaying responses received from other stations. The master communication function includes the function of sending commands to other stations and receiving responses from the other stations.

9. A communication method, which is the communication method of the system according to claim 7, includes: A step in which one of the expansion modules separates the second serial bus into two; A step in which the CPU module communicates with the multiple expansion modules via the first serial bus; A step in which the CPU module communicates with the expansion module connected to one of the separated second serial buses via the separated one of the second serial buses; And A step in which two or more expansion modules connected to the other separated second serial bus communicate with each other via the other second serial bus.

10. A communication method, which is the communication method of the system according to claim 7, includes: A step in which the CPU module and the multiple expansion modules integrate the first serial bus and the second serial bus; and A step in which the CPU module and the multiple expansion modules communicate via the integrated first serial bus and second serial bus.

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