Task delay determination method, device, system and related equipment

Abstract

The embodiments of the present application provide a method, device, system and related equipment for determining task delays, the method comprising: obtaining the total amount of task requests and the total amount of task delays of target tasks among multiple tasks that need to be executed by a module under test within a preset number of clock cycles; based on the total amount of task requests and the total amount of task delays of the target tasks, determining the average task delay of the target tasks, and then reflecting the performance level of the module from the perspective of task delay, and determining the operating characteristics of each module in the chip.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of chip design and testing technology, and specifically to a method, device, system and related equipment for determining task delay. Background Art

[0002] During the design and testing of the chip, the performance of the chip needs to be evaluated. The delay parameter of the chip is an important parameter that reflects the performance of the chip. It can reflect the operating characteristics of the chip and the characteristics of the internal interconnection structure of the chip, and then the internal structure of the chip can be adjusted based on the delay parameter. In the prior art, the signal delay of the actual circuit of the chip is usually evaluated. For example, the signal transmission delay of various circuits in the FPGA circuit chip is tested, so that the chip circuit is designed or the chip circuit structure is adjusted according to the test results.

[0003] However, the evaluation based on the signal delay of the actual circuit of the chip can only reflect the limited operating characteristics of the chip that can be tested during the testing phase. How to determine the operating characteristics of each module in the chip is a technical problem that technical personnel in this field urgently need to solve. Summary of the invention

[0004] In view of this, an embodiment of the present application provides a method, apparatus, system and related equipment for determining task delay. The method can determine the operating characteristics of each module in a chip.

[0005] To achieve the above objectives, the embodiments of the present application provide the following technical solutions.

[0006] In a first aspect, an embodiment of the present application provides a method for determining task delay, comprising:

[0007] Obtaining the total number of task requests and the total number of task delays of target tasks among multiple tasks that the module under test needs to execute within a preset number of clock cycles;

[0008] Based on the total amount of task requests and the total amount of task delays of the target class tasks, an average task delay of the target class tasks is determined.

[0009] Optionally, the target type task is a target type task among multiple tasks required to be executed by the module under test, and / or a task requested to be executed by a target module connected to the module under test.

[0010] Optionally, determining the average task delay of the target task includes:

[0011] The total task delay is divided by the total task request amount to obtain the average task delay of the target class tasks.

[0012] Optionally, determining the average task delay of the target task includes:

[0013] The total task delay is divided by the difference between the total task request amount and the total task delay amount to obtain the average task delay of the target class task.

[0014] Optionally, the obtaining of the total number of task requests and the total number of task delays of target tasks among the multiple tasks that the module to be tested needs to execute within a preset number of clock cycles includes:

[0015] Obtaining in sequence the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles;

[0016] The task request amount and the task delay amount of the target class task in each clock cycle within a preset number of clock cycles are accumulated to obtain the total task request amount and the total task delay amount of the target class task.

[0017] Optionally, the step of sequentially acquiring a task request amount and a task delay amount of a target task in each clock cycle within a preset number of clock cycles includes:

[0018] Obtain the task request amount of the target task in each clock cycle in turn;

[0019] Obtain the task completion amount of the target task in each clock cycle in turn;

[0020] The difference between the task request amount and the task completion amount in each clock cycle is calculated to obtain the task delay amount of the target class task in each clock cycle.

[0021] Optionally, the target task is a task requested to be executed by a target module connected to the module under test, and sequentially obtaining a task request amount and a task delay amount of the target task in each clock cycle within a preset number of clock cycles includes:

[0022] Sequentially obtaining the task request amount issued by the target module in each clock cycle;

[0023] Sequentially obtaining the task completion feedback amount received by the target module in each clock cycle, and taking the task completion feedback amount as the task completion amount;

[0024] The difference between the task request amount and the task completion amount in each clock cycle is calculated to obtain the task delay amount of the target class task in each clock cycle.

[0025] Optionally, a first counter and a second counter are provided between the target module and the module to be tested;

[0026] In the step of sequentially obtaining the amount of task requests issued by the target module in each clock cycle, a first counter is used to obtain the amount of task requests issued by the target module in each clock cycle;

[0027] In the step of sequentially acquiring the task completion feedback amount received by the target module in each clock cycle, a second counter is used to acquire the task completion feedback amount received by the target module in each clock cycle.

[0028] Optionally, the module to be tested is an arbitration module, and the target module is a cache module among multiple cache modules.

[0029] Optionally, the obtaining of the total number of task requests and the total number of task delays of target tasks among the multiple tasks that the module to be tested needs to execute within a preset number of clock cycles includes:

[0030] Obtaining the total amount of task requests of the target task within a preset number of clock cycles of the module under test;

[0031] Obtaining the total amount of target tasks completed by the module under test within a preset number of clock cycles;

[0032] The difference between the total amount of task requests and the total amount of task completion is calculated to obtain the total amount of task delays of the target type tasks within a preset number of clock cycles.

[0033] Optionally, when there are multiple target type tasks, the task delay determination method is executed in parallel to determine the average task delay of the multiple target type tasks; wherein, when there are multiple target type tasks, the preset numbers corresponding to the multiple target type tasks are the same.

[0034] Optionally, in the preset number of clock cycles, the value of the preset number is greater than or equal to 1, and is less than or equal to the maximum value of the statistical range of the total number of task requests.

[0035] In a second aspect, an embodiment of the present application provides a task delay determination device, comprising:

[0036] A total amount acquisition module is used to obtain the total amount of task requests and the total amount of task delays of target tasks among multiple tasks that need to be executed by the module under test within a preset number of clock cycles;

[0037] The delay determination module is used to determine the average task delay of the target class tasks based on the total task request amount and the total task delay amount of the target class tasks.

[0038] In a third aspect, an embodiment of the present application provides a task delay determination system, including a chip simulation device, wherein the chip simulation device is configured to execute the above-mentioned task delay determination method.

[0039] In a fourth aspect, an embodiment of the present application provides a task delay determination system, including a chip testing device, wherein the chip testing device is configured to execute the above-mentioned task delay determination method.

[0040] In a fifth aspect, an embodiment of the present application provides a computer device comprising: at least one memory and at least one processor; the memory stores one or more computer executable instructions, and the processor calls the one or more computer executable instructions to execute the above-mentioned task delay determination method.

[0041] In a sixth aspect, an embodiment of the present application provides a storage medium, wherein the storage medium stores one or more computer executable instructions, and the one or more computer executable instructions are used to execute the above-mentioned task delay determination method.

[0042] The embodiments of the present application provide a method, device, system and related equipment for determining task delays, the method comprising: obtaining a total amount of task requests and a total amount of task delays for target tasks among multiple tasks that need to be executed by a module under test within a preset number of clock cycles; and determining an average task delay for the target tasks based on the total amount of task requests and the total amount of task delays for the target tasks.

[0043] By obtaining the total task requests and the total task delays of the target tasks among the multiple tasks that the module to be tested needs to execute within a preset number of clock cycles, the average task delay of the target tasks can be determined based on the total task requests and the total task delays of the target tasks, thereby reflecting the performance level of the module from the perspective of task delay and determining the operating characteristics of each module in the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0045] Figure 1 A schematic diagram of the module operation provided in the embodiment of the present application.

[0046] Figure 2 An optional flowchart of a method for determining task delay provided in an embodiment of the present application.

[0047] Figure 3 An optional flowchart of another task delay determination method provided in an embodiment of the present application.

[0048] Figure 4Another optional flowchart of another task delay determination method provided in an embodiment of the present application.

[0049] Figure 5 Another optional flowchart of another task delay determination method provided in an embodiment of the present application.

[0050] Figure 6 An optional flowchart of another method for determining task delay provided in an embodiment of the present application.

[0051] Figure 7 A block diagram of a task delay determination device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0052] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0053] As described in the background technology, the evaluation based on the signal delay of the actual circuit of the chip reflects the limited operating characteristics of the chip that can be tested during the testing phase. How to determine the operating characteristics of each module in the chip is a technical problem that technical personnel in this field urgently need to solve.

[0054] The inventor believes that during the operation of the chip, the module is used to execute the corresponding tasks, and reflecting the chip delay from the perspective of task completion (i.e., task delay) can accurately reflect the operating characteristics of the chip. At the same time, considering that during the operation of the chip, multiple tasks are usually executed at the same time, task delay statistics based on different types of tasks can accurately reflect the execution characteristics of various tasks in the module, such as the priority of various tasks and the execution speed of various tasks, and further accurately determine the operating characteristics of the chip.

[0055] As an optional implementation, Figure 1 The schematic diagram of the module operation provided by the embodiment of the present application is shown as an example. Figure 1 As shown, taking module IV as an example, module IV is connected to multiple modules, such as module I, module II, module III, etc., and can handle multiple types of tasks. It can be understood that only some structures are listed in the figure for exemplary description, while other structures of the modules are omitted.

[0056] Suppose that the task sent by module I is task A, the task sent by module II is task B, and the task sent by module III is task C. Module IV can receive task A request, task B request and task C request, and execute the corresponding tasks based on the corresponding requests; or, suppose that the task sent to module V is task D, the task sent to module VI is task E, and the task sent to module VII is task F. Module IV can send task D request, task E request and task F request to the corresponding module based on its own processing needs, so that the corresponding module executes the corresponding task based on the corresponding request.

[0057] Correspondingly, after module IV completes the corresponding task, it will send a task completion feedback message to the module that issued the task. For example, after module IV completes the corresponding task, it sends a task A completion feedback message to module I, sends a task B completion feedback message to module II, and sends a task C completion feedback message to module III; correspondingly, after the task issued by module IV is completed, the module that executes the task will also send a task completion feedback message to module IV, for example, module V sends a task D completion feedback message to module IV, module VI sends a task E completion feedback message to module IV, and module VII sends a task F completion feedback message to module IV.

[0058] When evaluating the operating characteristics of module IV, it can be determined by calculating the average delay of the module in processing a certain type of task or several types of tasks over a period of time.

[0059] Based on this, an embodiment of the present invention discloses a task delay determination method, device, system and related equipment, the method comprising: obtaining the total task requests and the total task delays of target tasks among multiple tasks that need to be executed by a module to be tested within a preset number of clock cycles; based on the total task requests and the total task delays of the target tasks, determining the average task delay of the target tasks.

[0060] By obtaining the total task requests and the total task delays of the target tasks among the multiple tasks that the module to be tested needs to execute within a preset number of clock cycles, the average task delay of the target tasks can be determined based on the total task requests and the total task delays of the target tasks, thereby reflecting the performance level of the module from the perspective of task delay, and evaluating or determining the operating characteristics of each module in the chip.

[0061] It should be noted that the task delay determination method described in the present invention can be determined based on simulation during the chip design phase, or can be determined based on specific circuits and interfaces during the chip testing phase, so that it can be implemented in the design or testing phase based on actual needs, providing corresponding parameter support for chip design or testing.

[0062] Furthermore, compared with the evaluation based on the signal delay of the actual circuit of the chip in the background technology, the task delay determination method provided in the embodiment of the present invention can reflect the operating characteristics of the module to be tested in more detail, thereby providing better parameter support for the design or testing of the chip.

[0063] In an alternative implementation, Figure 2 An optional flow chart of the task delay determination method provided by an embodiment of the present application is shown as an example. Figure 2 As shown, the method includes:

[0064] Step S100: obtaining the total number of task requests and the total number of task delays of target tasks among multiple tasks that the module to be tested needs to execute within a preset number of clock cycles;

[0065] The clock cycle is also called the oscillation period, which is defined as the reciprocal of the clock frequency. The clock cycle is the most basic and smallest unit of time in a computer. During the operation of a module, the duration is measured in clock cycles.

[0066] The preset number of clock cycles is used to define the duration of statistically analyzing the task execution status in the task delay determination method. The value of the preset number is greater than or equal to 1, and less than or equal to the maximum value of the task quantity statistical range.

[0067] The module under test can be understood as a circuit with one or more functions in the integrated circuit design, and the circuit can include one or more components such as logic gates. The module under test can be a specific circuit module in the chip testing stage, or a circuit module simulated in the chip design stage.

[0068] The task performed by the module under test can be understood as an action that the module under test needs to implement, for example, the task performed can be the distribution and arbitration of instructions, the execution of instructions, the access to data, etc. It can be understood that during the operation of the module under test, the tasks that the module under test needs to perform can belong to multiple categories, or can belong to the same category, for example, the distribution of instructions, or the arbitration of instructions, etc.

[0069] The target class task described in the embodiment of the present invention can be one of the multiple categories to which the tasks required to be performed by the module to be tested belong, and this category can be called a target category. Correspondingly, the target class task is a task of the target category among the multiple tasks required to be performed by the module to be tested.

[0070] In an optional example, during the operation of the module to be tested, tasks requested to be executed by multiple modules connected to the module to be tested may be executed simultaneously. Figure 1For example, module IV can receive task A request, task B request and task C request, and execute corresponding tasks based on corresponding requests. The target task described in the embodiment of the present invention can be a task requested to be executed by a module connected to the module to be tested, and the module can be called a target module. Accordingly, the target task is a task requested to be executed by the target module connected to the module to be tested.

[0071] Alternatively, in an optional example, during the operation of the module to be tested, tasks belonging to multiple categories requested to be executed by multiple modules connected to the module to be tested can be executed simultaneously. Accordingly, the target category tasks can be tasks requested to be executed by the target module connected to the module to be tested, or tasks of a target category among multiple tasks required to be executed by the module to be tested, and the tasks of the target category can include only tasks requested to be executed by a module connected to the module to be tested (the module can be referred to as the target module), or tasks requested to be executed by multiple modules connected to the module to be tested; or, the target category tasks can be tasks requested to be executed by the target module connected to the module to be tested, and the target category tasks can include only tasks of one category (the category can be referred to as the target category) among multiple categories requested by the target module, or tasks of multiple categories requested by the target module.

[0072] It is understandable that the above-mentioned target type tasks are determined based on the type and source of the tasks. In other examples, the target type tasks can also be determined based on other characteristics of the tasks, such as various attribute values ​​of the tasks, etc., which will not be elaborated in the present invention.

[0073] The target class task may be one or more. When there are multiple target class tasks, the task delay determination method may be executed in parallel to simultaneously determine the average task delay of the multiple target class tasks. When there are multiple target class tasks, the preset numbers corresponding to the multiple target class tasks are the same, so that the delay status of the multiple target class tasks within the same preset number of clock cycles can be determined.

[0074] The total number of task requests is the total number of requests for target tasks received within a preset number of clock cycles of the module to be tested, or, when the target task is a task requested to be executed by the target module, it can also be understood as the total number of requests for target tasks issued within a preset number of clock cycles of the target module. The total number of task delays is the total number of target tasks that have not been completed within a preset number of clock cycles of the module to be tested.

[0075] During the operation of the module to be tested, the total number of task requests and the total number of task delays within a certain period of time are obtained to confirm the average task delay.

[0076] Step S200: determining the average task delay of the target class tasks based on the total task request amount and the total task delay amount of the target class tasks.

[0077] After the total amount of task requests and the total amount of task delays of the target type tasks are obtained, calculations may be performed to determine the average task delay of the target type tasks.

[0078] The calculation method of the task average delay can be defined based on design requirements or test requirements. For example, the task average delay can be defined as the ratio of the total task delay to the total task request. Accordingly, determining the task delay of the target task can include: dividing the total task delay by the total task request to obtain the task average delay of the target task.

[0079] In other optional examples, the average task delay can also be defined as the ratio of the total task delay to the total task completion. Accordingly, determining the task delay of the target type task can include: dividing the total task delay by the difference between the total task request and the total task delay to obtain the average task delay of the target type task.

[0080] By obtaining the total task requests and the total task delays of the target tasks among the multiple tasks that the module to be tested needs to execute within a preset number of clock cycles, the average task delay of the target tasks can be determined based on the total task requests and the total task delays of the target tasks, thereby reflecting the performance level of the module from the perspective of task delay, and evaluating or determining the operating characteristics of each module in the chip.

[0081] It should be noted that the task delay determination method can be determined based on simulation in the chip design phase, or can be determined based on specific circuits and interfaces in the chip testing phase.

[0082] In an optional implementation, the total amount of task requests and the total amount of task delays can be calculated based on the amount of task requests and the amount of task delays in each clock cycle within a preset number of clock cycles. Figure 3 An optional flow chart of another task delay determination method provided by an embodiment of the present application is shown, such as Figure 3 As shown, in the method, step S100 may include:

[0083] Step S110: sequentially obtaining the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles;

[0084] Among them, based on the determination method, relevant task data within a preset number of clock cycles are required. In this example, the task request amount and task delay amount in each clock cycle are obtained in turn, and based on the task request amount and task delay amount in each clock cycle, the relevant task data within a preset number of clock cycles are calculated.

[0085] The task request amount is the number of target task requests received by the module under test within one clock cycle, or, when the target task is a task requested to be executed by the target module, it can also be understood as the number of target task requests issued by the target module within one clock cycle. The task delay amount is the number of target tasks that have not been completed by the module under test within one clock cycle.

[0086] The task delay amount can be calculated based on the task request amount and the task completion amount. Specifically, in an optional example, Figure 4 Another optional flowchart of another task delay determination method provided by an embodiment of the present application is shown, step S110 may include:

[0087] Step S111: sequentially obtaining the task request amount of the target task in each clock cycle;

[0088] In the process of calculating the task delay amount, the task request amount can be understood as an increment. When obtaining the task request amount of a clock cycle, the task delay amount is calculated by adding the task request amount.

[0089] Step S112: sequentially obtaining the task completion amount of the target task in each clock cycle;

[0090] The task completion amount is the number of target tasks completed by the module under test within one clock cycle. The task delay amount can be calculated based on the task request amount and the task completion amount.

[0091] In the process of calculating the task delay amount, the task completion amount can be understood as a reduction. When obtaining the task completion amount of a clock cycle, the task request amount is subtracted when calculating the task delay amount.

[0092] Step S113: Calculate the difference between the task request amount and the task completion amount in each clock cycle to obtain the task delay amount of the target task in each clock cycle;

[0093] It can be understood that the task delay amount is the difference between the task request amount and the task completion amount. By calculating the difference between the task request amount and the task completion amount in each clock cycle, the task delay amount of the target task in each clock cycle can be obtained.

[0094] Based on the definition of increment and decrement in the above steps, the task delay of the target task in each clock cycle can be calculated.

[0095] It should be noted that in step S110, the execution order of step S111 and step S112 is not limited to this. In other embodiments, step S112 may be executed first and then step S111. Step S111 has obtained the task request amount of the target task in each clock cycle, and can be used as the calculation basis of step S120. Based on step S112 and step S113, the task delay amount of the target task in each clock cycle can be obtained.

[0096] Step S120: Accumulating the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles to obtain the total task request amount and the total task delay amount of the target task;

[0097] After obtaining the task request amount and task delay amount of each clock cycle, the total task request amount and the total task delay amount of the target type tasks can be obtained by accumulation.

[0098] It is understandable that after obtaining the total amount of task requests and the total amount of task delays, step S200 may be performed to determine the average task delay of the target class tasks based on the total amount of task requests and the total amount of task delays of the target class tasks. In an embodiment of the present invention, step S200 includes:

[0099] Step S210: Divide the total task delay by the total task request to obtain the average task delay of the target class tasks.

[0100] After the total number of task requests and the total number of task delays are obtained, the average task delay of the target class tasks is calculated by dividing the total number of task delays by the total number of task requests.

[0101] In an embodiment of the present invention, the total amount of task requests and the total amount of task delays are calculated based on the cumulative amount of task requests and task delays in each clock cycle within a preset number of clock cycles, and then the average task delay of the target class tasks is calculated.

[0102] In an optional implementation, the target task may be a task requested to be executed by a target module connected to the module under test. Accordingly, based on the number of information exchanges between the module under test and the target module, the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles may be obtained. Figure 5 Another optional flow chart of another task delay determination method provided by an embodiment of the present application is shown, such as Figure 5As shown, in the method, step S110 may include:

[0103] Step S116: sequentially obtaining the task request amount issued by the target module in each clock cycle;

[0104] It is understandable that, during the interaction between the target module and the module under test, when the target module needs the module under test to perform a corresponding task, it needs to send a task request to the module under test. The task request amount is the number of task requests sent by the target module to the module under test.

[0105] Accordingly, in the process of calculating the task delay amount, the task request amount can be understood as an increment. When obtaining the task request amount of a clock cycle, the task delay amount is calculated by adding the task request amount.

[0106] by Figure 5 Taking another module operation schematic diagram provided in the embodiment of the present application as an example, the module to be tested may be an arbitration module, the target module may be one of multiple cache modules, and the target class task is an arbitration request issued by the target module. Accordingly, the number of task requests issued by the target module may be understood as the task request amount in this example.

[0107] Continue with Figure 5 For example, a first counter may be set between the module to be tested and the target module, so as to count the task request amount based on the first counter. That is, the first counter may be used to obtain the task request amount issued by the target module in each clock cycle.

[0108] Step S117: sequentially obtaining the task completion feedback amount received by the target module in each clock cycle, and taking the task completion feedback amount as the task completion amount;

[0109] It can be understood that, during the interaction between the target module and the module to be tested, after the module to be tested completes the corresponding task, it will feed back a task completion feedback message to the target module. The task completion feedback amount is the number of task completion feedback messages sent by the module to be tested to the target module, and the task completion feedback amount can be understood as the task completion amount.

[0110] Accordingly, in the process of calculating the task delay amount, the task completion amount can be understood as a reduction. When obtaining the task completion amount of a clock cycle, the task request amount is subtracted when calculating the task delay amount.

[0111] Continue with Figure 5For example, after obtaining the corresponding arbitration request, the arbitration module needs to select one arbitration request issued in each cache module to obtain approval, and feed back the agreed arbitration request to the cache module that issued the request. After the arbitration module selects an arbitration request in the target module to obtain approval, the agreed arbitration request is fed back to the target module. Accordingly, the number of feedback messages of the arbitration request issued by the module under test to the target module can be understood as the task completion amount in this example.

[0112] Continue with Figure 5 For example, a second counter can be set between the module to be tested and the target module, so as to perform task completion statistics based on the second counter. That is, the second counter can be used to obtain the task completion feedback received by the target module in each clock cycle.

[0113] Step S118: Calculate the difference between the task request amount and the task completion amount in each clock cycle to obtain the task delay amount of the target task in each clock cycle;

[0114] The execution process of step S118 may refer to step S113, so as to calculate the task delay of the target task in each clock cycle.

[0115] It should be noted that in step S110, the execution order of step S116 and step S117 is not limited to this. In other embodiments, step S117 may be executed first and then step S116. Step S116 has obtained the task request amount of the target task in each clock cycle, and can be used as the calculation basis of step S120. Based on step S117 and step S118, the task delay amount of the target task in each clock cycle can be obtained.

[0116] Furthermore, in this example, step S120 can be further executed to accumulate the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles to obtain the total task request amount and task delay amount of the target task. This example will not be repeated here.

[0117] After obtaining the total amount of task requests and the total amount of task delays of the target class tasks, step S200 is further performed to determine the average task delay of the target class tasks based on the total amount of task requests and the total amount of task delays of the target class tasks.

[0118] In an embodiment of the present invention, the task request amount and task delay amount are obtained based on the amount of information interaction between the module to be tested and the target module, and then the total task request amount and the total task delay amount of the target class tasks and the average task delay of the target class tasks are calculated.

[0119] In an optional implementation, the total amount of task requests and the total amount of task delays can be calculated based on the accumulated amount of task requests and the accumulated amount of task completions within a preset number of clock cycles. Figure 6 The optional flow chart of another task delay determination method provided by the embodiment of the present application is shown as follows: Figure 6 As shown, in the method, step S100 may include:

[0120] Step S160: obtaining the total amount of task requests of the target task of the module under test within a preset number of clock cycles;

[0121] Among them, based on the determination method, relevant task data within a preset number of clock cycles is required. In this example, the total amount of task delay is calculated based on the total amount of task requests and the total amount of task completion within the preset number of clock cycles.

[0122] Specifically, the task request amount in each clock cycle within a preset number of clock cycles can be obtained, and the task request amount in each clock cycle is accumulated to obtain the total task request amount of the target task of the module under test within the preset number of clock cycles.

[0123] Step S170: Obtaining the total amount of target tasks completed by the module under test within a preset number of clock cycles;

[0124] Specifically, the task completion amount in each clock cycle within a preset number of clock cycles can be obtained, and the task completion amount in each clock cycle is accumulated to obtain the total task completion amount of the target task of the module under test within the preset number of clock cycles.

[0125] Step S180: Calculate the difference between the total number of task requests and the total number of task completions to obtain the total number of task delays of the target task within a preset number of clock cycles;

[0126] After obtaining the total amount of task requests and the total amount of task completions of the target type tasks within a preset number of clock cycles, the total amount of task delays of the target type tasks can be obtained by calculation.

[0127] It should be noted that in step S100, step S160 has obtained the total task request of the target task within a preset number of clock cycles, and based on steps S170 and S180, the total task delay of the target task within a preset number of clock cycles can be obtained.

[0128] It is understandable that after obtaining the total amount of task requests and the total amount of task delays, step S200 may be executed to determine the average task delay of the target class tasks based on the total amount of task requests and the total amount of task delays of the target class tasks.

[0129] The following is an introduction to the task delay determination device provided in the embodiment of the present application. The device content described below can be considered as a chip testing device or a computer device, which is a functional module required to implement the task delay determination provided in the embodiment of the present application. The device content described below can be referenced to the method content described above.

[0130] Figure 7 FIG. 4 is a block diagram of a task delay determination device provided by an embodiment of the present application. Figure 7 As shown, the device may include:

[0131] A total amount acquisition module 300 is used to acquire the total amount of task requests and the total amount of task delays of target tasks among multiple tasks that need to be executed by the module under test within a preset number of clock cycles;

[0132] The delay determination module 310 is used to determine the average task delay of the target class task based on the total task request amount and the total task delay amount of the target class task.

[0133] In some embodiments, the target type task is a target type task among multiple tasks required to be executed by the module under test, and / or a task requested to be executed by a target module connected to the module under test.

[0134] In some embodiments, the delay determination module 310 is used to determine the average task delay of the target task, including:

[0135] The total task delay is divided by the total task request amount to obtain the average task delay of the target class tasks.

[0136] In some embodiments, the delay determination module 310 is used to determine the average task delay of the target task, including:

[0137] The total task delay is divided by the difference between the total task request amount and the total task delay amount to obtain the average task delay of the target class task.

[0138] In some embodiments, the total amount acquisition module 300 is used to acquire the total amount of task requests and the total amount of task delays of target tasks among the multiple tasks that the module under test needs to execute within a preset number of clock cycles, including:

[0139] Obtaining in sequence the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles;

[0140] The task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles are accumulated to obtain the total task request amount and task delay amount of the target task

[0141] In some embodiments, the total amount acquisition module 300 is used to sequentially acquire the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles, including:

[0142] Obtain the task request amount of the target task in each clock cycle in turn;

[0143] Obtain the task completion amount of the target task in each clock cycle in turn;

[0144] The difference between the task request amount and the task completion amount in each clock cycle is calculated to obtain the task delay amount of the target class task in each clock cycle.

[0145] In some embodiments, the target task is a task requested to be executed by a target module connected to the module under test, and the total amount acquisition module 300 is used to sequentially acquire the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles, including:

[0146] Sequentially obtaining the task request amount issued by the target module in each clock cycle;

[0147] Sequentially obtaining the task completion feedback amount received by the target module in each clock cycle, and taking the task completion feedback amount as the task completion amount;

[0148] The difference between the task request amount and the task completion amount in each clock cycle is calculated to obtain the task delay amount of the target class task in each clock cycle.

[0149] In some embodiments, a first counter and a second counter are provided between the target module and the module to be tested;

[0150] The total amount acquisition module 300 is used to sequentially acquire the amount of task requests issued by the target module in each clock cycle by using a first counter to acquire the amount of task requests issued by the target module in each clock cycle;

[0151] The total amount acquisition module 300 is used to sequentially acquire the task completion feedback amount received by the target module in each clock cycle, and uses a second counter to acquire the task completion feedback amount received by the target module in each clock cycle.

[0152] In some embodiments, the module to be tested is an arbitration module, and the target module is a cache module among a plurality of cache modules.

[0153] In some embodiments, the total amount acquisition module 300 is used to acquire the total amount of task requests and the total amount of task delays of target tasks among the multiple tasks that the module under test needs to execute within a preset number of clock cycles, including:

[0154] Obtaining the total amount of task requests of the target task within a preset number of clock cycles of the module under test;

[0155] Obtaining the total amount of target tasks completed by the module under test within a preset number of clock cycles;

[0156] The difference between the total amount of task requests and the total amount of task completion is calculated to obtain the total amount of task delays of the target type tasks within a preset number of clock cycles.

[0157] In some embodiments, when there are multiple target type tasks, the task delay determination method is executed in parallel to determine the average task delay of multiple target type tasks; wherein, when there are multiple target type tasks, the preset numbers corresponding to the multiple target type tasks are the same.

[0158] In the preset number of clock cycles, the value of the preset number is greater than or equal to 1, and is less than or equal to the maximum value of the statistical range of the total number of task requests.

[0159] The present application also provides a task delay determination system. In some embodiments, the task delay determination system may include a chip simulation device. The chip simulation device may be configured to execute the task delay determination method provided in the present application.

[0160] The present application also provides a task delay determination system. In some embodiments, the task delay determination system may include a chip testing device. The chip testing device may be configured to execute the task delay determination method provided in the present application.

[0161] An embodiment of the present application also provides a computer device, which may include: at least one memory and at least one processor; the memory stores one or more computer executable instructions, and the processor calls the one or more computer executable instructions to execute the task delay determination method provided in the embodiment of the present application.

[0162] An embodiment of the present application provides a storage medium, wherein the storage medium stores one or more computer executable instructions, and the one or more computer executable instructions are used to execute the above-mentioned task delay determination method.

[0163] The above describes multiple implementation schemes provided by the embodiments of the present application. The various optional methods introduced in each implementation scheme can be combined and cross-referenced with each other without conflict, thereby extending a variety of possible implementation schemes, which can all be considered as implementation schemes disclosed and open in the embodiments of the present application.

[0164] Although the embodiments of the present application are disclosed above, the present application is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be subject to the scope defined by the claims.

Claims

1. A method for determining task delay, characterized in that: include: Obtaining the total amount of task requests and the total amount of task delays of target tasks among multiple tasks that need to be performed by the module under test in the chip within a preset number of clock cycles, wherein the target tasks are tasks of a target type among the multiple tasks that need to be performed by the module under test, and / or tasks requested to be performed by a target module connected to the module under test; Based on the total amount of task requests and the total amount of task delays of the target type tasks, the average task delay of the target type tasks is determined, where the average task delay is the ratio of the total amount of task delays to the total amount of task requests, or the ratio of the total amount of task delays to the total amount of task completions, where the total amount of task completions is the amount of task completions of the target type tasks within a preset number of clock cycles.

2. The method according to claim 1, characterized in that: The determining the average task delay of the target class task includes: The total task delay is divided by the total task request amount to obtain the average task delay of the target class tasks.

3. The method according to claim 1, characterized in that The determining the average task delay of the target class task includes: The total task delay is divided by the difference between the total task request amount and the total task delay amount to obtain the average task delay of the target class task.

4. The method according to claim 1, characterized in that: The step of obtaining the total task request amount and the total task delay amount of the target task among the multiple tasks that the module to be tested needs to execute within the preset number of clock cycles includes: Obtaining in sequence the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles; The task request amount and the task delay amount of the target class task in each clock cycle within a preset number of clock cycles are accumulated to obtain the total task request amount and the total task delay amount of the target class task.

5. The method according to claim 4, characterized in that The step of sequentially obtaining the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles includes: Obtain the task request amount of the target task in each clock cycle in turn; Obtain the task completion amount of the target task in each clock cycle in turn; The difference between the task request amount and the task completion amount in each clock cycle is calculated to obtain the task delay amount of the target class task in each clock cycle.

6. The method according to claim 4, characterized in that The target task is a task requested to be executed by the target module connected to the module to be tested, and the step of sequentially obtaining the task request amount and task delay amount of the target task in each clock cycle within a preset number of clock cycles includes: Sequentially obtaining the task request amount issued by the target module in each clock cycle; Sequentially obtaining the task completion feedback amount received by the target module in each clock cycle, and taking the task completion feedback amount as the task completion amount; The difference between the task request amount and the task completion amount in each clock cycle is calculated to obtain the task delay amount of the target class task in each clock cycle.

7. The method according to claim 6, characterized in that A first counter and a second counter are provided between the target module and the module to be tested; In the step of sequentially obtaining the amount of task requests issued by the target module in each clock cycle, a first counter is used to obtain the amount of task requests issued by the target module in each clock cycle; In the step of sequentially acquiring the task completion feedback amount received by the target module in each clock cycle, a second counter is used to acquire the task completion feedback amount received by the target module in each clock cycle.

8. The method according to claim 6, characterized in that The module to be tested is an arbitration module, and the target module is a cache module among a plurality of cache modules.

9. The method according to claim 1, characterized in that: The step of obtaining the total task request amount and the total task delay amount of the target task among the multiple tasks that the module to be tested needs to execute within the preset number of clock cycles includes: Obtaining the total amount of task requests of the target task within a preset number of clock cycles of the module under test; Obtaining the total amount of target tasks completed by the module under test within a preset number of clock cycles; The difference between the total amount of task requests and the total amount of task completion is calculated to obtain the total amount of task delays of the target type tasks within a preset number of clock cycles.

10. The method according to claim 1, characterized in that When there are multiple target tasks, the task delay determination method is executed in parallel to determine the average task delay of the multiple target tasks; wherein, when there are multiple target tasks, the preset numbers corresponding to the multiple target tasks are the same.

11. The method according to claim 1, characterized in that: In the preset number of clock cycles, the value of the preset number is greater than or equal to 1, and is less than or equal to the maximum value of the statistical range of the total number of task requests.

12. A task delay determination device, characterized in that: include: A total amount acquisition module is used to obtain the total amount of task requests and the total amount of task delays of target tasks among multiple tasks that need to be performed by the module under test in the chip within a preset number of clock cycles, wherein the target tasks are tasks of a target type among the multiple tasks that need to be performed by the module under test, and / or tasks requested to be performed by a target module connected to the module under test; A delay determination module is used to determine the average task delay of the target class task based on the total task requests and the total task delays of the target class task, wherein the average task delay is the ratio of the total task delay to the total task requests, or the ratio of the total task delay to the total task completion, wherein the total task completion is the task completion amount of the target class task within a preset number of clock cycles.

13. A task delay determination system, characterized in that: It comprises a chip simulation device, wherein the chip simulation device is configured to execute the task delay determination method as described in any one of claims 1-11.

14. A task delay determination system, characterized in that: It comprises a chip testing device, wherein the chip testing device is configured to execute the task delay determination method as described in any one of claims 1-11.

15. A computer device, characterized in that: include: at least one memory and at least one processor; The memory stores one or more computer executable instructions, and the processor calls the one or more computer executable instructions to execute the task delay determination method according to any one of claims 1-11.

16. A storage medium, characterized in that: The storage medium stores one or more computer executable instructions, and the one or more computer executable instructions are used to execute the task delay determination method according to any one of claims 1-11.

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