Method of forming a silicon nitride encapsulation layer
By combining PECVD and PEALD, and employing pulsed gas flow and low-temperature, low-RF power processing, a silicon nitride encapsulation layer with excellent conformability and hermeticity is formed. This solves the problems of insufficient conformability and material damage in existing encapsulation layers, and achieves stable and efficient encapsulation layer deposition.
Patent Information
- Application Number
- CN202080038432.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-03-10
- Filing Date
- 2020-04-01
- Publication Date
- 2026-01-16
- Estimated Expiration
- 2040-04-01
AI Technical Summary
In the formation of the packaging layer for phase change memory (PCRAM) devices, conventional PECVD methods cannot achieve sufficient conformability and may damage chalcogenide materials, while PEALD methods result in material loss.
A method using pulsed flow of processing gas and low temperature and low RF power during PECVD processing is adopted, combined with PEALD to form a conformal silicon nitride layer. A first silicon nitride layer is deposited by PECVD and a second silicon nitride layer is deposited on it to improve conformality and hermeticity.
A silicon nitride encapsulation layer with high conformability and hermeticity is formed at low temperatures, reducing damage to PCM device materials and ensuring that the encapsulation layer is stable at high temperatures and does not desorb hydrogen, oxygen or water vapor.
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Figure CN113874982B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The embodiments described herein relate generally to the field of semiconductor device manufacturing, and more particularly, to methods for forming a conformal silicon nitride encapsulation layer for phase change memory random access memory (PCRAM) devices. BACKGROUND
[0002] Non-volatile memory (NVM) technology plays a fundamental role in the microelectronics industry. One such emerging NVM technology is phase change memory (PCM).
[0003] A typical PCM device includes an array of memory cells, where each memory cell includes a memory element and a selection element, such as a bidirectional threshold switch (OTS). Typically, the memory element is formed of a chalcogenide alloy that electrically switches between different detectable states in a local order of a spectrum between amorphous and crystalline states, or between states across a full amorphous and a full crystalline state. Typically, the individual memory cells of the memory cell array are spaced apart and functionally isolated from one another by a dielectric material disposed therebetween. The dielectric material prevents cell-to-cell interference, such as crosstalk, between adjacently disposed memory cells. Typically, the dielectric material includes an encapsulation layer for lining the walls of the openings disposed between the individual memory cells. The encapsulation layer protects the phase change and OTS materials from moisture and oxygen. Unfortunately, conventional methods of depositing an encapsulation layer onto the surface of a PCRAM memory cell using a PECVD (plasma enhanced chemical vapor deposition) method can fail to achieve the conformality required for next generation PCRAM nodes having sufficient film coverage at the bottom of the trench. Plasma enhanced atomic layer deposition (PEALD) can achieve the desired conformality, but due to plasma induced damage, can result in undesirable loss of chalcogenide material.
[0004] Accordingly, there is a need in the art for improved methods of forming an encapsulation layer on a PCM device. SUMMARY
[0005] Embodiments described herein generally relate to methods of forming a encapsulation layer for a phase change memory (PCM) device. More specifically, embodiments of the present disclosure relate to methods of forming a conformal silicon nitride layer by pulsing a process gas during a PECVD process. Additionally, the methods herein provide a conformal silicon nitride layer with enhanced conformality at a relatively low temperature and a relatively low RF power when compared to conventional plasma enhanced chemical vapor deposition (PECVD) methods. Furthermore, the methods herein further provide a multi-operation process including depositing a first silicon nitride layer by a PECVD process, such as described herein. Further, a second silicon nitride layer is deposited on the PECVD film by PEALD to achieve a desired conformality and hermeticity. In some examples, the PECVD process or the PEALD process occurs at a substrate temperature below 280 degrees Celsius.
[0006] In one embodiment, a method of processing a substrate includes placing a substrate in a processing volume of a processing chamber. The substrate includes a patterned surface having a plurality of features. Each feature of the plurality of features is defined by one or more openings formed through a multilayer stack, and the multilayer stack includes a chalcogen-containing material. The method further includes flowing pulses of a silicon precursor and a nitrogen precursor into the processing volume. The method further includes igniting a plasma of the silicon precursor and the nitrogen precursor. The method further includes depositing a first silicon nitride layer onto the patterned surface of the substrate.
[0007] In another embodiment, a method of processing a substrate includes placing a substrate in a processing volume of a processing chamber. The substrate includes a patterned surface having a plurality of features. Each feature of the plurality of features is defined by one or more openings formed through a multilayer stack, and the multilayer stack includes a chalcogen-containing material. The substrate is maintained at a temperature below 280 degrees Celsius. The method further includes flowing pulses of a silicon precursor and a nitrogen precursor into the processing volume. The method further includes igniting the silicon precursor and the nitrogen precursor. The method further includes depositing a first silicon nitride layer onto the patterned surface of the substrate, wherein the first silicon nitride layer has a conformality of about 80% or more. The method further includes depositing a second silicon nitride layer on the first silicon nitride layer, including sequential cycles of exposing the substrate to a second silicon precursor and exposing the substrate to a second nitrogen precursor, igniting a plasma, and exposing the substrate to the plasma.
[0008] In another embodiment, a computer readable medium having instructions stored thereon for implementing a method of processing a substrate when executed by a processor is provided. The method includes placing a substrate in a processing volume of a processing chamber. The substrate includes a patterned surface having a plurality of features. Each feature of the plurality of features is defined by one or more openings formed through a multilayer stack, and the multilayer stack includes a material containing a chalcogen element. The substrate is maintained at a temperature below 280 degrees Celsius. The method further includes flowing pulses of a silicon precursor and a nitrogen precursor into the processing volume. The method further includes generating a plasma of the silicon precursor and the nitrogen precursor. The method further includes depositing a first silicon nitride layer onto the patterned surface of the substrate, wherein the first silicon nitride layer has a conformality of about 80% or more. BRIEF DESCRIPTION OF DRAWINGS
[0009] For a more detailed understanding of the above-recited features of the present disclosure, reference can be made to the more detailed description of the disclosure (briefly summarized above) that is described one embodiment illustrated in the drawings. It should be noted, however, that the drawings only illustrate example embodiments, and should therefore not be considered to limit the scope thereof, and that other equally effective embodiments can be allowed.
[0010] Figure 1 is a schematic cross-sectional view of an exemplary processing chamber for implementing the methods set forth herein according to one embodiment.
[0011] Figures 2A-2B schematically illustrates the flow of processing gases and RF power for igniting and sustaining a plasma according to various embodiments described herein.
[0012] Figure 3 is a flow chart illustrating a method of forming a silicon nitride layer according to one embodiment.
[0013] Figures 4A-4C schematically illustrates a substrate during the method set forth in Figure 3
[0014] Figure 4D schematically illustrates a substrate during a method of forming a second silicon nitride layer via PEALD according to one embodiment.
[0015] For ease of understanding, the same reference numbers and characters are used in the different drawings to designate the same elements when they appear in various illustrations. It can be expected that elements and features of one embodiment can be beneficially incorporated into other embodiments without further recitation. DETAILED DESCRIPTION
[0016] Embodiments herein generally relate to methods of forming encapsulation layers for encapsulating memory cells of phase change memory (PCM) devices. In particular, embodiments of the disclosure relate to methods of forming conformal silicon nitride layers by pulsing process gases during a PECVD process. Further, the methods herein provide conformal silicon nitride layers at temperatures below 280 °C and at relatively low RF power when compared to conventional plasma enhanced chemical vapor deposition (PECVD) methods.
[0017] Figure 1 is a schematic cross-sectional view of an exemplary processing chamber for implementing the methods set forth herein according to one embodiment. Other exemplary deposition chambers that can be used to implement the methods described herein include: an Ultima HDP system, or PECVD system, or PEALD system, etc. can be obtained from Applied Materials, Inc. of Santa Clara, California, as well as suitable deposition chambers available from other manufacturers.
[0018] The processing chamber 100 is a processing chamber configured to implement PECVD, PEALD, and / or ALD. The processing chamber 100 is configured to ignite and sustain a plasma of a process gas by capacitive coupling. The processing chamber 100 includes a chamber lid assembly 101, one or more sidewalls 102, and a chamber base 104. The chamber lid assembly 101 includes a chamber lid 106, a showerhead 107 disposed in the chamber lid 106, and an electrically insulating ring 108 disposed between the chamber lid 106 and the one or more sidewalls 102. The showerhead 107, the one or more sidewalls 102, and the chamber base 104 together define a processing volume 105. A gas inlet 109 disposed through the chamber lid 106 is fluidly coupled to a gas source 110. The showerhead 107 (with a plurality of openings 111 disposed through the showerhead 107) can be used to uniformly distribute a process gas from the gas source 110 into the processing volume 105. The showerhead 107 is electrically coupled to a first power source 112, such as an RF power source, which is powered to ignite and sustain a plasma 113 of the process gas by capacitive coupling with the process gas. Here, the RF power has a frequency from about 400 kHz to about 40 MHz, such as about 400 kHz or about 13.56 MHz. In other embodiments, the processing chamber 100 includes an inductive plasma generator, and the plasma is formed by inductively coupling RF power to the process gas.
[0019] The processing volume 105 is fluidly coupled through a vacuum outlet 114 to a vacuum source, such as to one or more dedicated vacuum pumps, that maintains the processing volume 105 at sub-atmospheric conditions and thereby evacuates process and other gases. A substrate support 115 disposed in the processing volume 105 is disposed on a movable support shaft 116 that extends sealingly through the chamber base 104, such as being encircled by bellows (not shown) in the area beneath the chamber base 104. Here, the processing chamber 100 is configured to facilitate transfer of a substrate 117 from and to the substrate support 115 through an opening 118 in one or more of the sidewalls 102, which can be sealed using a door or valve (not shown) during substrate processing.
[0020] One or both of a heater, such as a resistive heating element 119, and one or more cooling channels 120 disposed in the substrate support 115 are used to maintain the substrate 117 disposed on the substrate support 115 at a desired processing temperature. The one or more cooling channels 120 are fluidly coupled to a coolant source (not shown), such as a modified water source or a refrigerant source having a relatively high electrical resistance. In at least one embodiment, the substrate support 115 or one or more electrodes thereof are electrically coupled to a second power source 121, such as a continuous wave (CW) RF power source or a pulsed RF power source, that supplies a bias voltage to the substrate support 115 or one or more electrodes thereof. In some embodiments, as further illustrated in Figure 2A and 2B During processing of the substrate, a pulse of one or both of the flow of process gas and the RF power source is emitted.
[0021] The processing chamber 100 further includes a system controller 122 that is used to control the operation of the processing chamber 100 and to perform the methods set forth herein. The system controller 122 includes a programmable central processing unit, here a central processing unit (CPU) 124, that is operable with memory 126 (e.g., non-volatile memory) and support circuits 128. The support circuits 128 are coupled to the CPU 124 and include cache, clock circuits, input / output subsystems, power supplies, and combinations of the foregoing coupled to the various components of the processing chamber 100 to facilitate control thereof. The CPU 124 is one of any form of general purpose computer processor that can be used to control the various components and sub-processors of the processing chamber 100, such as a programmable logic controller (PLC). The memory 126 coupled to the CPU 124 is non-transitory and is typically one or more forms of readily available memory, such as random access memory (RAM), read only memory (ROM), floppy drive, hard disk, or any other form of digital storage, local or remote.
[0022] Generally, the memory 126 is in the form of a computer readable storage medium (e.g., non-volatile memory) containing instructions that, when executed by the CPU 124, facilitate operation of the processing chamber 100. The instructions in the memory 126 are in the form of a program product, such as a program that performs the methods of the present disclosure. The program code can be in any of a variety of different programming languages. In one example, the present disclosure can be implemented as a program product stored on a computer readable storage medium for use with a computer system. The program(s) of the program product define the functions of the embodiments (including the methods described herein).
[0023] Figures 2A-2B Pulsed flow of a process gas into a processing volume of a processing chamber, such as Figure 1 the processing chamber described in
[0024] In Figure 2A , continuous RF power 202 is used to ignite and sustain plasma of the pulsed process gas flow 200. Here, each pulse period of the process gas flow 200 has a duration T1 having an on-time duration t 开启 (during which a valve controlling the flow of the process gas into the processing chamber is opened) and an off-time duration t 关闭 (during which the valve controlling the flow of the process gas is closed). In some embodiments, the pulse period time T1 has a duration of about 20 seconds or less, such as in a range from about 0.001 seconds to about 20 seconds, such as from about 0.1 seconds to about 15 seconds, such as from about 0.5 seconds to about 12.5 seconds, such as from about 0.75 seconds to about 10 seconds. Further, each on-period has an on-duration t 开启 of about 10 seconds or less, such as about 7.5 seconds or less, such as about 5 seconds or less, such as about 2.5 seconds or less, such as about 1 second or less, or for example, about 0.5 seconds or less. The on-time duty cycle of the flow pulses is about 5% to about 95% of the pulse period time T1, such as about 10% to about 90%, such as about 15% to about 85%, such as about 20% to about 80%. In further embodiments, the duration t 关闭 of the off-time of the gas flow of the process gas is about 0.001 seconds to 10 seconds, such as about 0.05 seconds to 7.5 seconds, such as about 0.2 seconds to about 5 seconds, such as about 0.3 seconds to about 2.5 seconds, such as about 0.4 seconds to about 2 seconds, such as about 0.5 seconds to about 1 second. The process gas can be a mixture of at least two gases, such as a first gas (e.g., a silicon precursor) and a second gas (e.g., a nitrogen precursor). In some embodiments, the first gas and the second gas are pulsed simultaneously or continuously with the same on-duration t开启 with the same off duration t 关闭 and / or with the same on time duty cycle of the flow pulses. In another embodiment, the first gas flows continuously at t 开启 1 and the second gas flows in pulses at t 开启 2 where t 开启 2 is less than t 开启 1 is less than t 开启 1 overlap, do not overlap, partially overlap.
[0025] Figure 2B is shown where pulses of both the process gas flow 200 and the RF power 204 for igniting and sustaining a plasma of the process gas are emitted. The pulses of the RF power 204 for igniting and sustaining a plasma are emitted while the process gas flows in pulses as described above, where the pulses include a plurality of on periods and off periods. Here, each on period has an on duration t 开启 and each off period has an off duration t 关闭 where each (t 开启 + t 关闭 ) is equal to a total duration T2. Here, the total duration T2 is about 0.001 seconds to about 40 seconds, such as about 0.1 seconds to about 35 seconds, such as about 0.5 seconds to about 30 seconds, such as about 0.75 seconds to about 25 seconds, such as about 1 second to about 20 seconds. Further, each on period has a duration t 开启 of less than about 40 seconds, such as about less than about 30 seconds, such as less than about 20 seconds, less than about 10 seconds, less than about 5 seconds, less than about 0.05 seconds. The on time duty cycle of the pulses is about 5% to about 95% of the total duty cycle time, such as about 10% to about 90%, such as about 15% to about 85%, such as about 20% to about 80%. In further embodiments, the off duration t 关闭 of the RF power being turned off is less than about 40 seconds, such as about less than about 30 seconds, such as less than about 20 seconds, less than about 10 seconds, less than about 5 seconds, less than about 0.05 seconds. In some embodiments, the pulsed gas flow t 开启 and the RF pulse t 开启 have the same duration and run simultaneously. In other embodiments, the on time of the pulsed gas flow and the on time of the RF pulse are different and partially overlap or do not overlap in time.
[0026] In some examples, a pulsed process gas flow can be established by flowing an inert or carrier gas continuously into the chamber but pulsing a flow of a deposition (e.g., reactive) precursor gas. In such examples, the continuous flow of inert or carrier gas facilitates maintenance of a plasma within the process chamber while the pulses of deposition precursor achieve the benefits disclosed herein. In one example, which can be combined with other examples herein, each individual deposition precursor is pulsed for a time t 开启 and t 关闭 may be substantially the same and overlap during the PECVD process.
[0027] Figure 3 is a flowchart setting forth a method 300 of forming a silicon nitride layer according to one embodiment. Figures 4A-4C illustrates a substrate during the method 300 set forth in Figure 3 according to one embodiment. Figure 4D illustrates a substrate during a method of forming a second silicon nitride layer via PEALD.
[0028] In block 302, the method 300 includes placing a patterned substrate 400A in a processing volume of a processing chamber, such as the processing chamber 100 described in Figure 1 . Here, the patterned substrate 400A includes a substrate 414 (such as a silicon wafer) having a plurality of memory cells (such as a plurality of features 402 disposed thereon). The plurality of features 402 are formed from a multilayer stack, with individual features of the plurality of features 402 being defined by openings 401 formed through the multilayer stack. The multilayer stack includes a first electrode layer 404, a first chalcogen-containing layer 406 disposed on the first electrode layer 404, a second electrode layer 408 disposed on the first chalcogen-containing layer 406, a second chalcogen-containing layer 410 disposed on the second electrode layer 408, and a third electrode layer 412 disposed on the second chalcogen-containing layer 410.
[0029] Here, a "chalcogenide alloy" is any material that includes at least one of the Group 16 elements of the periodic table, such as sulfur, selenium, tellurium, or combinations thereof, and / or at least one of the Group 14 or Group 15 elements, such as carbon (C), silicon (Si), germanium (Ge), tin (Sn), lead (Pb), nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), or bismuth (Bi) in the periodic table.
[0030] The openings 401 formed through the multi-layer stack to define the plurality of features 402 have a width W of about 100 nm or less, such as about 90 nm or less, about 70 nm or less, about 60 nm or less, about 50 nm or less, for example about 20 nm or less. In some embodiments, the aspect ratio (ratio of the depth D of the openings 401 to the width W of the openings 401) is in a range of about 4: 1 to about 40: 1, such as from about 5: 1 to about 15: 1, from about 7: 1 to about 25: 1, such as about 10: 1 or higher (by way of example). In at least one embodiment, individual ones of the plurality of openings 401 have an aspect ratio of 10: 1 or higher and a width W of 20 nm or less.
[0031] At block 304, the method 300 includes flowing a pulse of a process gas into the processing volume. Here, the process gas includes a silicon precursor and a nitrogen precursor. Suitable silicon precursors include silane (SiH4), trisilylamine (TSA, N(SiH3)3), neopentasilane (NPS, (SiH3)4Si), iodosilane, bromosilane, alkylaminosilane (e.g., SiH(N(CH3)2)3, (SiH2(NH t Bu)2), C9H 29 N3Si3, C6H 17 NSi, C9H 25 N3Si, C8H 22 N2Si), or combinations thereof. Suitable nitrogen precursors include nitrogen gas (N2), ammonia (NH3), hydrazine (N2H4), or combinations thereof. The process gas can also include a carrier gas, such as an inert gas, such as argon or helium.
[0032] Suitable iodosilanes are SiI4, Si2I6, SiH2I2, Si3I8, SiH3I, and combinations thereof. Suitable bromosilanes are SiBr4, Si2Br6, SiH2Br2, Si3Br8, SiH3Br, and combinations thereof. In some embodiments, the silicon precursor is substantially free of fluorine or chlorine atoms to avoid damaging the phase change or OTS material of the memory cell due to exposure to fluorine or chlorine atoms. In at least one embodiment, a halogenated silicon precursor that is substantially free of chlorine atoms and substantially free of fluorine atoms consists of less than about 1% halogen atoms, such as less than about 0.5%, such as less than about 0.1% based on an atomic count.
[0033] The flow rate of the process gas into the processing volume depends on the size of the substrate to be processed and / or the chamber configuration. For example, for a chamber sized to process a 300 mm diameter substrate, the flow rate of the process gas into the processing volume is in a range of about 100 seem to about 1000 seem, such as about 200 seem to about 800 seem, such as about 300 seem to about 600 seem, such as about 400 seem to about 500 seem, such as about 450 seem to about 550 seem, such as about 475 seem to about 525 seem, such as about 500 seem, for a pulse duration t 开启During the period, the flow rate of the silicon precursor is in a range from about 5 seem to about 1,000 seem, such as from about 10 seem to about 500 seem, from about 25 seem to about 250 seem, such as about 50 seem, for example.
[0034] The flow rate of the nitrogen precursor (e.g., NH3) is from about 5 seem to about 2,500 seem, such as from about 10 seem to about 2,000 seem, such as from about 25 seem to about 1,000 seem, such as from about 50 seem to about 250 seem, such as about 100 seem, for example. In a chamber configured to process a 300 mm diameter substrate, the N2 flow rate is from about 100 seem to about 4,000 seem, such as from about 250 seem to about 3,000 seem, such as from about 500 seem to about 2,500 seem, such as about 2,000 seem, for example.
[0035] The combined flow rate of the silicon and nitrogen precursors is from about 5 seem to about 2,500 seem, such as from about 10 seem to about 2,000 seem, such as from about 25 seem to about 1,000 seem, such as from about 50 seem to about 250 seem, such as about 100 seem, for example.
[0036] The optional carrier gas can be an inert gas, such as argon or helium. In at least one embodiment, the carrier gas flow rate is from about 100 seem to about 5,000 seem, such as from about 250 seem to about 4,500 seem, such as from about 500 seem to about 4,000 seem. The flow rate of the silicon precursor can be slower than the flow rate of the nitrogen precursor (and the carrier gas, which results in a process gas having a low concentration of the silicon precursor).
[0037] Method 300 further includes igniting a plasma of the process gas at block 306 by applying RF power to an electrode of the processing chamber, such as a showerhead. The plasma activates the process gas in the processing volume to form reactive species, such as radicals and ions, from less reactive precursors that form the process gas. Here, the applied RF power is continuous or pulsed. The plasma formed using one or both of pulsed gas flow and pulsed RF power as described herein increases the ratio of neutral to ionic species in the plasma. The increase in long-lived neutral species allows diffusion into nanoscale features, avoids electron shadowing effects, and increases the migration of adsorbed species on the substrate surface, thereby improving conformality. For example, in some embodiments, the activated species (e.g., TSA) of a silicon precursor using the above-described method 300 has a lower sticking coefficient and greater surface migration when compared to a deposition method using both continuous gas flow and continuous RF power. Beneficially, the pulses of RF power (e.g., RF power of about 250 Watts or less) are combined with pulses of the process gas, which increases the formation of radicals while simultaneously reducing the formation of ions. Ideally, radicals diffuse faster in the openings than ions because the sticking coefficient of radicals is lower than the sticking coefficient of ions. In some embodiments, the pressure of the processing volume is less than about 15 Torr, such as about 1 mTorr to about 15 Torr, to reduce gaseous molecular interactions or recombination. For example, in some embodiments, the pressure of the processing volume is maintained at about 1 mTorr to about 15 Torr, such as about 0.5 Torr to about 12 Torr, such as about 1 Torr to about 10 Torr, such as about 3 Torr to about 8 Torr, such as 6 Torr (by way of example).
[0038] The RF power provided to the showerhead 107 can depend on the size of the substrate 117 and the chamber 100. For example, for a chamber sized to process a 300 mm diameter substrate, the RF power is about 250 Watts or less, such as about 200 Watts or less, such as about 150 Watts or less, such as about 100 Watts or less, such as about 75 Watts or less, such as about 50 Watts or less, such as about 25 Watts or less. The RF power provided herein can be scaled up or down for chambers configured to process different sizes of substrates. For example, in some embodiments, the RF power (of the substrate processing surface) is about 0.35 W / cm 2 or less, such as about 0.28 W / cm 2 or less, such as about 0.21 W / cm 2 or less, such as about 0.14 W / cm 2 or less, such as about 0.11 W / cm 2 or less, such as about 0.07 W / cm 2 or less, such as about 0.035 W / cm2 or less. In further embodiments, the RF power has a frequency from about 400 kHz to about 40 MHz, such as about 400 kHz or about 13.56 MHz.
[0039] The method 300 further includes depositing a first silicon nitride layer 416 onto the patterned surface of the substrate in block 308. Figures 4A-4B A patterned surface of a substrate 414 is shown, Figure 4C The first silicon nitride layer 416 deposited on the substrate 414 according to the method 300 is shown. Figure 4D A second silicon nitride layer 418 conformally deposited on the surface of the first silicon nitride is shown, where the second silicon nitride layer 418 is formed according to a PEALD process.
[0040] In at least one embodiment, the method 300 includes maintaining a temperature of the substrate 414 at about 300 degrees Celsius or less, such as about 200 degrees Celsius or less, about 100 degrees Celsius or less, or for example in a range from about 50 degrees Celsius to about 300 degrees Celsius, such as about 75 degrees Celsius to about 250 degrees Celsius, from about 100 degrees Celsius to about 200 degrees Celsius, or for example about 80 degrees Celsius, during deposition of the silicon nitride layer. Figures 4C-4D The first silicon nitride layer 416 shown in block 406 is a dielectric film having a thickness of about to about , or about or less, such as about or less, for example or less. The first silicon nitride layer 416 conforms to the underlying patterned surface of the substrate, here the patterned surface of the substrate 414 and the features 402 disposed on the substrate 414, so as to provide uniform encapsulation of the features 402, forming the structure 400B (shown in block 408). The first silicon nitride layer 416 conforms to the underlying surface so as to provide uniform encapsulation of the PCM device and any contaminant particles disposed thereon. Figure 4C
[0041] The conformal nature of a film / layer is defined by the conformality of the film, e.g., the conformality of the first silicon nitride layer. The term "conformality" refers to the ratio of the thickness of the silicon nitride layer at the bottom sidewalls of the openings 401 to the thickness of the silicon nitride layer at the top of the openings 401 (as shown in block 406). The conformality of the film / layer is defined by the conformality of the film, e.g., the conformality of the first silicon nitride layer. The term "conformality" refers to the ratio of the thickness of the silicon nitride layer at the bottom sidewalls of the openings 401 to the thickness of the silicon nitride layer at the top of the openings 401 (as shown in block 406). Figure 4C As noted, the conformality is equal to the bottom thickness "a" divided by the top thickness "b". As used in this regard, the term "conformal" means that the thickness of the silicon film is uniform over the patterned surface of the substrate 414. The term "substantially conformal" means that the thickness of the film varies no more than about 10%, such as about 5%, such as about 2%, such as about 1%, such as about 0.5% relative to the average thickness of the film. In at least one embodiment, the first silicon nitride layer 416 is deposited onto the patterned surface of the substrate 414 such that the first silicon nitride layer 416 is a conformal silicon nitride layer having a conformality of about 80% or greater, such as a conformality of about 90% to about 99.99%, such as from about 92.5% to about 97.5%.
[0042] In one example, the block 308 occurs while the substrate is maintained at a temperature of less than about 280 degrees Celsius. By forming the first silicon nitride layer 416 at a temperature of less than 280 degrees Celsius, while pulsing the process gas, the conformality of the first silicon nitride layer 416 is improved as compared to conventional regimes. In addition, the current leakage, etch rate, and density of the first silicon nitride layer 416 is also improved.
[0043] In some embodiments, the method 300 further includes depositing a second silicon nitride layer 418 on the first silicon nitride layer 416 using a PEALD process to improve the hermeticity. Generally, silicon nitride layers formed using a PEALD process have increased hermeticity as compared to silicon nitride layers formed using a PECVD process. Unfortunately, PEALD processes can cause undesirable damage to chalcogenide materials. Thus, in some embodiments, the first silicon nitride layer 416 is used to form a protective barrier layer to prevent ion damage to chalcogenide materials of the PCM device that would otherwise occur if the PCM device were exposed to the PEALD process used to form the second silicon nitride layer 418.
[0044] To improve film quality, a plasma treatment can be implemented. In one example, the plasma treatment facilitates removal of dangling bonds from the deposited film. In some embodiments, the method 300 further includes periodically plasma treating the first silicon nitride layer 416 during deposition of the first silicon nitride layer 416. In these embodiments, the method 300 includes sequential repetition of between about 5 cycles and about 100 cycles of the following steps: depositing a portion of the first silicon nitride layer 416, and exposing the plasma treated deposited portion. For example, in one embodiment, the plasma treating the at least partially deposited first silicon nitride layer 416 includes flowing a process gas including nitrogen N2 and He into the processing volume, igniting and maintaining a plasma of the process gas using an RF power of about 250 Watts to about 750 Watts, and exposing the partially deposited silicon nitride layer 416 to the plasma treatment. In one embodiment, the substrate is exposed to the plasma treatment after every 5 pulses to 50 pulses of the process gas until the first silicon nitride layer has a thickness of about to about .
[0045] During the plasma treatment, the pressure in the processing volume is maintained at about 0.1 Torr to about 10 Torr, such as about 1 Torr to about 3 Torr; for example, the RF power is about 50 Watts to about 1,500 Watts, such as about 250 Watts to about 1,000 Watts, such as about 500 Watts; the N2 flow rate is about 50 seem to about 5,000 seem, such as about 250 seem to about 4,000 seem, such as about 500 seem to about 2,000 seem; the flow rate of the gas carrier (e.g., He) is about 50 seem to about 10,000 seem, such as about 500 seem to about 8,000 seem, such as about 1,000 seem to about 6,000 seem, such as about 2,000 seem to about 4,000 seem; and / or the RF power is about 50 Watts to about 1,500 Watts, such as about 250 Watts to about 1,000 Watts, such as about 500 Watts to about 750 Watts.
[0046] Here, forming the second silicon nitride layer 418 by PEALD processing includes sequential cycles of exposing the substrate to a silicon precursor in the gas phase before exposing the substrate, and thus the first silicon nitride layer 416, to a nitrogen precursor in the gas phase, and vice versa, and exposing the substrate to plasma to facilitate film growth. Typically, a purge gas, such as an inert gas, is used to purge the processing volume 105 after flowing the silicon precursor into the processing volume 105 and after flowing the nitrogen precursor into the processing volume 105. For example, a purge gas, such as argon, can be introduced into the processing chamber to purge the reaction zone, or otherwise remove any residual reactive compounds or reaction byproducts from the reaction zone. Alternatively, the purge gas can be flowed continuously throughout the deposition process, such that only the purge gas flows during the time delay between pulses of the precursors. Pulses of the precursors can be alternately issued until a film thickness is formed on the surface of the first silicon nitride layer 416. Here, the silicon and nitrogen precursors used to form the second silicon nitride layer 418 are selected from those described in block 304 of the above method 300, and can be the same or different from the precursors used to form the first silicon nitride layer 416.
[0047] In one embodiment, the second silicon nitride layer 418 is deposited in the same chamber as the first silicon nitride layer 416. In another embodiment, the second silicon nitride layer 418 is deposited in a different chamber than the first silicon nitride layer 416. In some embodiments, the substrate is maintained at a temperature of about 25 degrees Celsius to about 300 degrees Celsius, such as about 100 degrees Celsius to about 275 degrees Celsius, such as about 150 degrees Celsius to about 250 degrees Celsius, or at about 300 degrees Celsius or less, such as about 275 degrees Celsius or less, for example about 250 degrees Celsius or less. In at least one embodiment, the processing volume is maintained at a pressure of about 0.1 Torr to about 100 Torr, such as about 1 Torr to about 50 Torr, for example about 2 Torr to about 30 Torr.
[0048] In at least one embodiment, the second silicon nitride layer 418 is deposited using a PEALD process that requires plasma growth, and the silicon nitride film is processed with respect to forming the first silicon nitride layer 416. Here, each of the first and second silicon nitride layers 416 and 418 are deposited to a thickness of about to about such as about to about about to about for example about to about Here, the second silicon nitride layer 418 has a conformality of at least 70% or more, such as 80% or more, for example 90% or more.
[0049] The methods described herein provide for deposition of encapsulation layers for use in phase change memory (PCM) devices. More particularly, embodiments of the present disclosure provide for methods of forming conformal silicon nitride layers at relatively low temperatures and relatively low RF power by pulsing the flow of process gases during a PECVD process as compared to conventional plasma enhanced chemical vapor deposition (PECVD) methods. Beneficially, the methods herein provide for deposition of conformal layers of silicon nitride encapsulation to patterned surfaces of substrates with minimal damage to the materials of the PCM devices.
[0050] Additionally, the encapsulation layers disclosed herein are deposited at relatively low temperatures (e.g., less than about 280 degrees Celsius), but are stable even at higher temperatures (e.g., up to about 500 degrees Celsius) so as not to be damaged during thermal annealing. Moreover, the disclosed encapsulation layers desorb minimal or no hydrogen, oxygen, or water vapor and exhibit high gas tightness. Furthermore, the methods herein provide for conformal deposition of silicon nitride encapsulation layers with minimal or substantially no damage to the chalcogenide alloys used to form the OTS of the memory elements and memory cells.
[0051] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure can be devised without departing from the basic scope thereof, and the scope of the present disclosure is determined by the following claims.
Claims
1. A method of processing a substrate comprising the steps of: placing a substrate in a processing volume of a processing chamber, the substrate comprising a patterned surface having a plurality of features, wherein each feature of the plurality of features is defined by one or more openings formed through a multilayer stack, wherein at least one layer of the multilayer stack comprises a chalcogen-containing material; flowing pulses of a silicon precursor and a nitrogen precursor into the processing volume; igniting a plasma of the silicon precursor and the nitrogen precursor; depositing a first silicon nitride layer onto the patterned surface of the substrate, including sequential cycles of depositing a portion of the first silicon nitride layer and exposing the deposited portion to a plasma process; and depositing a second silicon nitride layer on the first silicon nitride layer during a plasma enhanced atomic layer deposition (PEALD) process, wherein the PEALD process comprises sequential cycles of exposing the substrate to a silicon precursor, exposing the substrate to a nitrogen precursor, and exposing the substrate to a plasma.
2. The method of claim 1, wherein the silicon precursor and the nitrogen precursor are introduced to the processing volume at the same duty cycle, and the silicon precursor and the nitrogen precursor flow simultaneously.
3. The method of claim 1, wherein one of the silicon precursor and the nitrogen precursor has a greater duty cycle than the other of the silicon precursor and the nitrogen precursor.
4. The method of claim 1, wherein each pulse cycle of the pulses of the nitrogen precursor or the silicon precursor has a cycle time of 20 seconds or less, and each on-time of the cycle is 10 seconds or less.
5. The method of claim 1, wherein an RF power of the plasma used to ignite the silicon precursor and the nitrogen precursor is 0.035 Watts per square centimeter (W / cm2) or less of a substrate processing surface.
6. The method of claim 1, wherein the silicon precursor is a silane precursor. 2 ) or less of a substrate processing surface.
6. The method of claim 1, further comprising the step of: maintaining the substrate at a temperature of less than 280 degrees Celsius.
7. The method of claim 1, wherein the silicon precursor comprises silane, trimethylsilylamine, neopentylsilane, a halogenated silane, an alkylaminosilane, or a combination thereof, and the nitrogen precursor comprises nitrogen gas, ammonia, hydrazine, or a combination thereof.
8. The method of claim 1, wherein the first silicon nitride layer is deposited to Or even thinner, with 80% or higher shape retention.
9. The method of claim 1, wherein the second silicon nitride layer is deposited to a thickness of to and has a percent conformality greater than 80%.
10. A method of processing a substrate comprising the steps of: placing a substrate in a processing volume of a processing chamber, the substrate comprising a patterned surface having a plurality of features, wherein each feature of the plurality of features is defined by one or more openings formed through a multilayer stack, wherein at least one layer of the multilayer stack comprises a chalcogen-containing material, and wherein the substrate is maintained at a temperature of less than 280 degrees Celsius; flowing pulses of a silicon precursor and a nitrogen precursor into the processing volume; igniting a plasma of the silicon precursor and the nitrogen precursor; depositing a first silicon nitride layer onto the patterned surface of the substrate, including sequential cycles of depositing a portion of the first silicon nitride layer and exposing the deposited portion to a plasma process, wherein the first silicon nitride layer has a conformality of 80% or more; and depositing a second silicon nitride layer on the first silicon nitride layer during a plasma enhanced atomic layer deposition (PEALD) process, wherein the PEALD process comprises sequential cycles of exposing the substrate to a silicon precursor, exposing the substrate to a nitrogen precursor, and exposing the substrate to a plasma. depositing a second silicon nitride layer on the first silicon nitride layer, comprising sequential cycles of exposing the substrate to a second silicon precursor and exposing the substrate to a second nitrogen precursor, igniting a plasma, and exposing the substrate to the plasma.
11. The method of claim 10, further comprising the step of: purging the processing volume with a purge gas after exposing the substrate to the silicon precursor and after exposing the substrate to the nitrogen precursor, wherein the purge gas is an inert gas.
12. A computer readable medium having stored thereon instructions for implementing a method of processing a substrate when executed by a processor, the method comprising the steps of: placing a substrate in a processing volume of a processing chamber, the substrate comprising a patterned surface having a plurality of features, wherein each feature of the plurality of features is defined by one or more openings formed through a multilayer stack, wherein at least one layer of the multilayer stack comprises a chalcogen-containing material, and wherein the substrate is maintained at a temperature below 280 degrees Celsius; flowing pulses of a silicon precursor and a nitrogen precursor into the processing volume; igniting a plasma of the silicon precursor and the nitrogen precursor; depositing a first silicon nitride layer onto the patterned surface of the substrate, comprising sequential cycles of depositing a portion of the first silicon nitride layer and exposing the deposited portion to a plasma process, wherein the first silicon nitride layer has a conformality of 80% or more; depositing a second silicon nitride layer on the first silicon nitride layer using a plasma enhanced atomic layer deposition (PEALD) process, comprising sequential cycles of exposing the substrate to a second silicon precursor and exposing the substrate to a second nitrogen precursor, igniting a plasma and exposing the substrate to the plasma; and purging the processing volume after exposing the substrate to the silicon precursor and after exposing the substrate to the nitrogen precursor during the PEALD process.
13. The computer readable medium of claim 12, wherein the silicon precursor and the nitrogen precursor have the same duty cycle.
14. The computer readable medium of claim 12, wherein each pulse cycle of the pulses of the silicon precursor and the nitrogen precursor has a cycle time of 20 seconds or less, and each on-time of the cycle is 10 seconds or less.
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