A Method for Suppressing Harmonics of Inverter Output Voltage without Voltage Sensor, a Multi-Harmonic Suppression Controller for Inverter and an Application Method

Abstract

The present invention discloses a method for suppressing the harmonic of the inverter output voltage without a voltage sensor, a multiple harmonic suppression controller, and a harmonic suppression method applied to a three-phase two-level inverter, including: extracting the harmonic components of the inverter output inductor current i o , taking the derivative, and then multiplying by the value L of the inverter output filter inductor to obtain the h-th harmonic voltage drop u L‑h of the output filter inductor L; delaying the harmonic compensation voltage output by the inverter controller at the previous moment by one cycle to obtain the actual output harmonic compensation voltage u cmp‑h ' of the inverter at the current moment, and subtracting it from the h-th harmonic voltage drop u L‑h of the output filter inductor L to obtain the h-th harmonic voltage u o‑h on the load side of the inverter. Setting the harmonic reference voltage to zero, adjusting the harmonic voltage u o‑h on the load side, calculating the output h-th harmonic compensation voltage u cmp‑h of the controller in the current cycle; and superimposing it with the fundamental wave output voltage u r of the inverter to obtain the output voltage u of the inverter controller.

Description

Technical Field

[0001] The present invention relates to the technical field of inverter control, and in particular to a method for suppressing harmonic components in the output voltage of an inverter without a voltage sensor, a multi-harmonic suppression controller for an inverter, and an application method thereof. Background Art

[0002] An inverter is a device that converts direct current into alternating current. Inverters are widely used in microgrids, distributed generation systems, and train auxiliary power supply systems. When the output terminal of an inverter is connected to a nonlinear load, the load causes a large amount of harmonic components in the inductor current of the inverter output, resulting in a large amount of harmonics in the output voltage on the load side of the inverter, leading to a sharp decline in the quality of the output voltage on the load side of the inverter. Therefore, suppressing the harmonic voltage of the inverter is of great significance for improving the power quality of microgrids and train power supply systems.

[0003] The suppression of harmonic components in the output voltage on the load side of an inverter can be divided into two methods: software and hardware. The hardware method usually filters the harmonic components in the output voltage on the load side by reasonably designing an LC filter or an LCL filter and adjusting the impedance at the harmonic frequency. The software method samples the output voltage on the load side and calculates the compensation voltage for a specific harmonic voltage, also known as the harmonic voltage injection method. Its control effect depends on the accuracy of the sampling sensor and the robustness of the control algorithm.

[0004] The output terminal of the inverter is connected to the load terminal through an LC filter, and the output impedance of the inverter is Z f (s). A nonlinear load or a load using pulse width modulation will cause the current i to contain harmonic components, and the harmonic current will generate a corresponding harmonic voltage drop on Z f When no harmonic compensation is added, the output voltage on the inverter side usually only contains a pure sine component and does not contain any harmonic components. The harmonic voltage of the output impedance Z f will appear at the load terminal, which will reduce the quality of the output voltage on the load side and result in a high THD. The basic idea of the harmonic voltage injection method is to calculate the corresponding compensation voltage based on the sampled voltage at the load terminal, thereby adjusting the output impedance of the inverter at the harmonic frequency to achieve the purpose of improving the quality of the output waveform of the inverter.

[0005] Generally, an inverter power supply is equipped with a DC bus voltage sensor, an output inductor current sensor, and a load-side output voltage sensor. Among them, the DC bus voltage sensor and the output inductor current sensor are both indispensable for ensuring the safety of the inverter. The sampling value of the DC voltage sensor can be used for overvoltage protection of the DC bus, and the sampling value of the output inductor current sensor can be used for overcurrent protection of the inverter bridge arm. The inverter load-side output voltage sensor is an important part of the hardware cost of the inverter. Removing the load-side output voltage sensor of the inverter does not prevent the normal operation of the inverter power supply. At the same time, it can reduce the hardware cost and improve the reliability of the inverter. Currently, there is little research on harmonic suppression of inverter power supplies without load-side output voltage sensors, and conventional harmonic suppression methods cannot be directly applied, which limits the application range of this type of inverter. Summary of the Invention

[0006] It should be understood that the above general description and the following detailed description of the present disclosure are both exemplary and explanatory, and are intended to provide further explanation of the present disclosure as claimed.

[0007] The present invention proposes an implementation process for estimating the harmonic voltage at the load end of an inverter. The transient harmonic voltage at the load end is calculated in real time according to the filter inductor and inductor current of the inverter, and then harmonic injection is performed according to the obtained harmonic voltage to achieve harmonic compensation of the inverter without a voltage sensor, thereby improving the quality of the output voltage on the load side.

[0008] To achieve the above invention purpose, the present invention discloses an inverter output voltage harmonic suppression method without a voltage sensor, which is characterized by including:

[0009] Step 1, extract the harmonic components of the output inductor current i o of the inverter;

[0010] Step 2, take the derivative of the harmonic components of the inductor current i o and multiply it by the value L of the output filter inductor of the inverter to obtain the h -th harmonic voltage drop u L-h of the output filter inductor L;

[0011] Step 3, delay the harmonic compensation voltage output by the inverter controller at the previous moment by one period to obtain the actual output harmonic compensation voltage u cmp-h ′ of the inverter at the current moment. Subtract the h -th harmonic voltage drop u cmp-h ′ of the current inverter output harmonic compensation voltage u L-h from the output filter inductor L to obtain the h -th harmonic voltage u o-h on the load side of the inverter;

[0012] Step 4, set the harmonic reference voltage to zero, and for the harmonic voltage u o-hAdjust, and calculate the h - harmonic compensation voltage u of the current - cycle controller output cmp-h ;

[0013] Step Five, superimpose the harmonic compensation voltage u cmp-h output by the inverter and the fundamental - wave output voltage u r of the inverter to obtain the output voltage u of the inverter controller.

[0014] Preferably, the present invention further discloses a method for suppressing the harmonic of the inverter output voltage without a voltage sensor, characterized in that, in the step four,

[0015] the h - harmonic compensation voltage u cmp-h output by the current - cycle controller is obtained by adjusting the feedback error signal through a quasi - resonant controller R h (s), and the quasi - resonant controller R h (s) is:

[0016]

[0017] where hω0 is the h - order target frequency, K rh is the resonance coefficient, and ω c affects the bandwidth of the quasi - resonant controller.

[0018] Preferably, the present invention further discloses a method for suppressing the harmonic of the inverter output voltage without a voltage sensor, characterized in that, in the step one,

[0019] adopt a band - pass filter to extract the harmonic components of the inverter output inductor current i o , and the band - pass filter is:

[0020]

[0021] where ω c affects the bandwidth of the band - pass filter, and hω0 is the h - order target frequency.

[0022] Preferably, the present invention further discloses a method for suppressing the harmonic of the inverter output voltage without a voltage sensor, characterized in that, in the step two, use a differentiator to take the derivative of the harmonic components of the inductor current i o .

[0023] The present invention also discloses a computer storage medium, on which a computer program is stored, characterized in that the computer program, when executed by a processor, implements the steps of the method for suppressing the harmonic of the inverter output voltage without a voltage sensor as described in any one of the above.

[0024] The present invention further discloses a multiple harmonic suppression controller, which includes a plurality of harmonic suppression controllers connected in parallel, and is characterized in that any one of the harmonic suppression controllers includes:

[0025] An extraction unit for extracting the harmonic components of the inverter output inductor current i o ;

[0026] A derivative unit for taking the derivative of the harmonic components of the inductor current i o , and then multiplying by the value L of the inverter output filter inductor to obtain the h - th harmonic voltage drop u L-h of the output filter inductor L;

[0027] A first calculation unit for delaying the harmonic compensation voltage output by the inverter controller at the previous moment by one period to obtain the actual harmonic compensation voltage u cmp-h ' of the inverter at the current moment. The actual harmonic compensation voltage u cmp-h ' of the current inverter is subtracted from the h - th harmonic voltage drop u L-h of the output filter inductor L to obtain the h - th harmonic voltage u o-h on the load side of the inverter;

[0028] A second calculation unit for setting the harmonic reference voltage to zero, adjusting the harmonic voltage u o-h on the load side, and calculating the h - th harmonic compensation voltage u cmp-h output by the controller in the current period;

[0029] A superimposing unit for superimposing the harmonic compensation voltage u cmp-h output by the inverter and the fundamental wave output voltage u r of the inverter to obtain the output voltage u of the inverter controller.

[0030] Preferably, the present invention further discloses a multiple harmonic suppression controller, which is characterized in that

[0031] the second calculation unit includes a quasi - resonant controller R h (s) for adjusting the feedback error signal to obtain the h - th harmonic compensation voltage u cmp-h output by the controller in the current period. Yes, the quasi - resonant controller R h (s) is:

[0032]

[0033] where hω0 is the h - th target frequency, K rh is the resonance coefficient, and ω c affects the bandwidth of the quasi - resonant controller.

[0034] Preferably, the present invention further discloses a multiple harmonic suppression controller, characterized in that

[0035] The extraction unit uses a band-pass filter to extract the harmonic components of the inverter output inductor current i o . The band-pass filter is:

[0036]

[0037] where ω c affects the bandwidth of the quasi-resonant controller, and hω0 is the hth target frequency.

[0038] The present invention discloses a method for suppressing voltage harmonics of a three-phase two-level inverter, characterized in that the method includes:

[0039] Step 1, sampling the inverter output inductor currents i a , i b , i c , and obtaining the αβ stationary coordinate system currents i α and i β through Clark transformation;

[0040] Step 2, the currents i α and i β respectively enter the multiple harmonic suppression controller according to any one of claims 5 to 7, and obtain the harmonic compensation voltages u cmp-α and u cmp-β ;

[0041] Step 3, the fundamental output voltages u rα , u rβ of the inverter are superimposed with the harmonic compensation voltages u cmp-α and u cmp-β to obtain the inverter controller output voltages u α * and u β * , which are sent to the space vector modulation link to generate actual switching signals T1 to T6, and the switching signals are respectively sent to the inverter.

[0042] The present invention also discloses a computer storage medium, on which a computer program is stored, characterized in that the computer program is executed by a processor to implement the steps of the method for suppressing voltage harmonics of the three-phase two-level inverter as described above.

[0043] The present invention does not add additional hardware and is implemented purely by software, with wide applicability, and can be used in the working conditions of independent operation or parallel power supply of the inverter power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. Preferred embodiments of the present disclosure will now be described in detail, and examples thereof are shown in the accompanying drawings. Whenever possible, the same reference numerals will be used throughout the drawings to denote the same or similar parts. In addition, although the terms used in the present disclosure are selected from well-known and commonly used terms, some of the terms mentioned in the description of the present disclosure may be selected by the applicant according to his or her judgment, and the detailed meanings thereof are explained in the relevant parts of the description herein. In addition, it is required to understand the present disclosure not only by the actual terms used, but also by the meaning implied by each term.

[0045] Next, with reference to the accompanying drawings, for those skilled in the art of the present technology, the above and other objects, features, and advantages of the present invention will be apparent from the detailed description of the present invention.

[0046] Figure 1 is a schematic diagram of a three-phase two-level inverter in the prior art;

[0047] Figure 2 is a schematic diagram of the principle of suppressing the harmonic voltage output by the inverter;

[0048] Figure 3 schematically shows an equivalent physical control block diagram of the controller in the stationary coordinate system;

[0049] Figure 4(1) is a schematic diagram of harmonic suppression control without a voltage sensor according to the present invention;

[0050] Figure 4(2) is a block diagram of the composition of the harmonic voltage suppression controller in Figure 4(1);

[0051] Figure 5 schematically shows a schematic diagram of the parallel connection of multiple harmonic voltage suppression controllers;

[0052] Figure 6 schematically shows a schematic diagram of the present invention applied to a three-phase inverter.

[0053] Reference numerals

[0054] 41 - - extraction unit

[0055] 42 - - derivative unit

[0056] 43 - - first calculation unit

[0057] 44 - - second calculation unit

[0058] 45 - - superposition unit Detailed implementation manners

[0059] To more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the accompanying drawings required for the description of the embodiments. Obviously, the accompanying drawings in the following description are only some examples or embodiments of the present application. For those of ordinary skill in the art, without creative efforts, the present application can also be applied to other similar scenarios based on these drawings. Unless obvious from the language context or otherwise stated, the same reference numerals in the figures represent the same structure or operation.

[0060] As shown in the present application and the claims, unless the context clearly indicates otherwise, words such as "a", "an", "one", and / or "the" are not specifically singular and may also include the plural. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.

[0061] Unless otherwise specifically stated, the relative arrangements, numerical expressions, and numerical values of the components and steps described in these embodiments do not limit the scope of the present application. At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. Technologies, methods, and devices known to those of ordinary skill in the relevant field may not be discussed in detail, but in appropriate cases, the said technologies, methods, and devices should be regarded as part of the authorization specification. In all the examples shown and discussed here, any specific value should be interpreted as merely exemplary and not as a limitation. Therefore, other examples of the exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0062] In the description of the present application, it should be understood that the orientation or positional relationships indicated by orientation words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal", and "top, bottom" are usually based on the orientation or positional relationships shown in the accompanying drawings. It is only for the convenience of describing the present application and simplifying the description. Without contrary instructions, these orientation words do not indicate and imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation. Therefore, it cannot be understood as a limitation on the protection scope of the present application; the orientation words "inside, outside" refer to the inside and outside relative to the contour of each component itself.

[0063] For ease of description, spatial relative terms, such as "above", "over", "on the upper surface", "upper", etc., may be used herein to describe the spatial positional relationship of one device or feature to other devices or features as shown in the figures. It should be understood that the spatial relative terms are intended to encompass different orientations in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is inverted, a device described as "above" or "over" other devices or structures will then be positioned "below" or "under" the other devices or structures. Thus, the exemplary term "above" can include both the orientations of "above" and "below". The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and corresponding interpretations of the spatial relative descriptions used herein will be made.

[0064] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is merely for the convenience of differentiating the corresponding components. Without additional statements, the above terms have no special meanings, and thus should not be construed as limiting the protection scope of the present application. In addition, although the terms used in the present application are selected from well-known and commonly used terms, some of the terms mentioned in the specification of the present application may be selected by the applicant according to his or her judgment, and their detailed meanings are described in the relevant parts of the present description. In addition, it is required to understand the present application not only through the actual terms used, but also through the meanings implied by each term.

[0065] Flowcharts are used in the present application to illustrate the operations performed by the systems according to the embodiments of the present application. It should be understood that the operations before or below do not necessarily need to be precisely executed in sequence. On the contrary, various steps may be executed in reverse order or simultaneously. At the same time, other operations may be added to these processes, or one or more steps may be removed from these processes.

[0066] Please refer to Figure 1 , which shows a schematic diagram of the composition of a three-phase two-level inverter.

[0067] In the composition of this three-phase two-level inverter, it includes: V dc DC bus voltage; C dc DC bus capacitor; L a , L b , L c Output filter inductors; C a , C b , C c Output filter capacitors; u a , u b , u c Load side output voltage; i a, i b , i c Inductive current.

[0068] The working process of this inverter is as follows: The DC bus voltage V dc passes through a three-phase two-level inverter and then through three-phase filter inductors L a , L b , L c to obtain three-phase output inductor currents i La , i Lb , i Lc , and then through filter capacitors C a , C b , C c to obtain three-phase output phase voltages u a , u b , u c . These three-phase output phase voltages u a , u b , u c are connected to loads Za, Zb, and Zc. The loads can be linear loads composed of resistors, capacitors, and inductors or non-linear loads composed of power electronic devices such as diode rectifiers.

[0069] Generally, it is required that the THD of the output voltage on the load side is < 5%, approximately a sinusoidal waveform.

[0070] Figure 2 is the schematic diagram for suppressing the harmonic voltage output by the inverter in the αβ stationary coordinate system.

[0071] According to the superposition principle, the harmonic reference voltage u o * can be set to 0. The feedback error signal is adjusted by the quasi-resonant controller R h (s) to obtain the compensation voltage u cmp-h . The compensation voltage u cmp-h is added to the fundamental output voltage u r of the inverter to obtain the output voltage u of the final inverter controller, that is:

[0072]

[0073] where hω0 is the hth target frequency, K rh is the resonance coefficient, and ω c affects the bandwidth of the said quasi-resonant controller.

[0074] In formula (1), the resonant controller has a band-pass characteristic, with a relatively large gain at the selected frequency hω0 and a relatively low gain at other frequencies. The voltage at the load end is u o (s), and u r has no harmonic components.

[0075] The above control method can be implemented in the ABC natural coordinate system or the αβ stationary coordinate system.

[0076] Since the quasi-resonant controller R h (s) only acts on specific sub-harmonics, according to the superposition principle, it can be achieved by paralleling multiple resonant controllers.

[0077] For the suppression of different sub-harmonics, as the following formula:

[0078] R(s) = R h＝5 (s) + R h＝7 (s) + …… (2)

[0079] Figure 2 The shown mathematical relationship can be expressed as:

[0080] u r -R(s)u0 - sLi a = u0 (3)

[0081] If there are no harmonic components in the fundamental output voltage u of the inverter, the above formula can be adjusted to: r

[0082]

[0083] Figure 3 Schematically shows the equivalent physical control block diagram of the above controller in the stationary coordinate system.

[0084] That is, the controller is equivalent to adding a admittance R(s) in parallel with the filter capacitor C o , which reduces the output impedance of the inverter.

[0085] The above harmonic suppression algorithm for the output voltage on the load side of the inverter must feedback the output voltage on the load side of the inverter in real time, and the effect of the control algorithm is affected by the sampling accuracy and sampling delay.

[0086] Based on Figure 2 the harmonic voltage compensation method, the present invention proposes a harmonic suppression method without a voltage sensor. The method for suppressing the hth harmonic voltage in the αβ stationary coordinate system is shown in Figure 4.

[0087] Figure 4(1) is improved on the basis of Figure 2 , and an observation link for the hth load output harmonic voltage u o-h is added. The observation link consists of several parts including a delay function G d (s), a differentiator G diff (s), and a band-pass filter G bandpass (s).

[0088] Figure 4(2) shows the composition of the block diagram of the harmonic voltage suppression controller in Figure 4(1). The controller includes an extraction unit 41, a derivative unit 42, a first calculation unit 43, a second calculation unit 44, and a superposition unit 45.

[0089] Combined with Figure 4(1) and 4(2) , the harmonic suppression method of the present invention will be introduced in detail below:

[0090] Step 1: Extract the harmonic components of the inverter output inductor current i bandpass through the band-pass filter G o .

[0091] In a preferred embodiment, a common band-pass filter shown in formula (5) can be used, where ω c affects the bandwidth of the quasi-resonant controller, hω0 is the h-th target frequency, which is only an illustrative example here, and other types of band-pass filters can also be used;

[0092]

[0093] The extraction unit 41 in Figure 4(2) implements the function of Step 1.

[0094] Step 2: Use a differentiator G diff (s) to differentiate the harmonic components of the inverter output inductor current i o , and then multiply by the value of the inverter output filter inductor L, where L is the equivalent value of the three-phase filter inductors L a , L b , L c in the αβ stationary coordinate system, to obtain the h-th harmonic voltage drop u L-h on the output filter inductor L.

[0095] The derivative unit 42 in Figure 4(2) corresponds to Step 2.

[0096] Step 3: Use G d (s) to simulate the delay of the inverter numerical control system, delay the harmonic compensation voltage output by the inverter controller at the previous moment by one cycle, and obtain the actual output harmonic compensation voltage u cmp-h ′ of the inverter at the current moment. Subtract u cmp-h ′ from u L-h to obtain the h-th output harmonic voltage u o-h of the inverter load side at the current moment.

[0097] Here, due to the inherent delay time of the inverter numerical control system, the actual output compensation voltage of the inverter is now the calculated value of the controller in the previous cycle.

[0098] The first calculation unit 43 in Figure 4(2) corresponds to Step 3.

[0099] Step 4: Set the harmonic reference voltage to zero, and adjust the harmonic voltage u o-h on the load side, and calculate the output h - th harmonic compensation voltage u cmp-h of the controller in the current cycle;

[0100] The second calculation unit 44 in Fig. 4(2) corresponds to Step 4.

[0101] Step 5: Superimpose the harmonic compensation voltage u cmp-h output by the inverter and the fundamental wave output voltage u r of the inverter to obtain the output voltage u on the inverter side.

[0102] The superimposing unit 45 in Fig. 4(2) corresponds to Step 5.

[0103] Figure 5 Fig. [ID] shows a schematic diagram of the parallel connection of the multi - harmonic voltage suppression controller.

[0104] Among them, K h (s) still only has an inhibitory effect on specific harmonics. Similarly, multiple controllers can be connected in parallel. A single controller is configured as shown in Fig. 4(2), and thus a multi - harmonic suppression controller is formed, and the transfer function is as shown in formula (7).

[0105] In this formula, K5(s), K7(s), K 11 (s), K 13 (s) respectively represent the 5th, 7th, 11th, and 13th harmonic suppression controllers.

[0106] K(s)=K5(s)+K7(s)+K 11 (s)+K 13 (s)…… (7)

[0107] Figure 6 Fig. [ID] shows a schematic diagram of the harmonic suppression controller K h (s) shown in Fig. 4(1) of the present invention applied to a three - phase inverter.

[0108] Sample the output inductor currents i a , i b , i c of the inverter and perform a Clarke transformation to obtain the αβ stationary coordinate system currents i α and i β ; then input the currents i α and i β into the controller disclosed in Fig. 4 above respectively to obtain the compensation voltages u cmp-α and u cmp-β ; the fundamental wave output voltages u rα , u rβAdded to the harmonic compensation voltage to obtain the actual output voltage u of the inverter side α * and u β * , which is sent to the space vector modulation (SVPWM) link to generate the actual switching signals T1 to T6, and the actual switching signals are respectively sent to Figure 1 the corresponding switching tubes T1 to T6 in, thus achieving the effect of harmonic suppression.

[0109] In summary, the present invention proposes a method for suppressing the harmonic voltage of the inverter output. The transient harmonic voltage is calculated in real time according to the filter inductance and the output inductance current of the inverter, and then the corresponding harmonic voltage compensation is carried out, overcoming the problem of harmonic suppression of the load side output voltage of the inverter under the condition of no load side output voltage sensor. This application omits the load side output voltage sensor of the inverter, which can not only reduce the hardware cost of the inverter, but also reduce the failure rate of the inverter and improve the reliability of the inverter.

[0110] Applying the method of the present invention has the following technical effects better than the traditional ones:

[0111] First, the harmonic compensation of the load side output voltage is carried out according to the output inductance current of the inverter, improving the quality of the load output voltage.

[0112] Second, the present invention is implemented by software without increasing the hardware cost.

[0113] Third, the present invention can be applied to both the independent operation and the parallel power supply conditions of the inverter, does not depend on the load side output voltage sensor, has strong algorithm versatility, and is suitable for various application occasions of inverter power supplies.

[0114] The basic concepts have been described above. Obviously, for those skilled in the art, the above invention disclosure is only an example and does not constitute a limitation to this application. Although not explicitly stated here, those skilled in the art may make various modifications, improvements, and corrections to this application. Such modifications, improvements, and corrections are proposed in this application, so such modifications, improvements, and corrections still belong to the spirit and scope of the exemplary embodiments of this application.

[0115] At the same time, this application uses specific words to describe the embodiments of this application. Such as "one embodiment", "an embodiment", and / or "some embodiments" mean a certain feature, structure, or characteristic related to at least one embodiment of this application. Therefore, it should be emphasized and noted that the "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more at different positions in this specification is not necessarily the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of this application can be appropriately combined.

[0116] Similarly, it should be noted that, in order to simplify the description disclosed in the present application and thus help the understanding of one or more embodiments of the invention, in the foregoing description of the embodiments of the present application, sometimes multiple features are merged into one embodiment, drawing or description thereof. However, this disclosure method does not mean that the features required by the subject matter of the present application are more than those mentioned in the claims. In fact, the features of the embodiments are fewer than all the features of the single embodiment disclosed above.

[0117] In some embodiments, numbers are used to describe components and the quantity of attributes. It should be understood that such numbers used for the description of embodiments are modified by the modifiers "about", "approximate" or "substantially" in some examples. Unless otherwise specified, "about", "approximate" or "substantially" indicate that the said numbers allow a variation of ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, and such approximate values may vary according to the characteristics required by individual embodiments. In some embodiments, the numerical parameters should consider the specified significant digits and adopt the method of retaining the general number of digits. Although the numerical ranges and parameters used in some embodiments of the present application to confirm the breadth of their scope are approximate values, in specific embodiments, such numerical settings are made as precise as possible within the feasible range.

[0118] Although the present application has been described with reference to the current specific embodiments, those of ordinary skill in the art in the technical field of the present application should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions can be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the scope of the spirit of the present application, they will fall within the scope of the claims of the present application.

Claims

1. A method for suppressing harmonic waves of inverter output voltage without a voltage sensor, characterized in that Including: Step 1, extract the harmonic components of the inverter output inductor current i o ; Step 2: Differentiate the harmonic components of the inductor current i o , and then multiply the result by the value L of the output filter inductor of the inverter to obtain the h-th harmonic voltage drop u L-h of the output filter inductor L; Step 3: Delay the harmonic compensation voltage output by the inverter controller at the previous moment by one cycle to obtain the actual harmonic compensation voltage u of the inverter at the current moment cmp-h ′, where the actual harmonic compensation voltage u of the inverter at the current moment cmp-h ′ is subtracted from the h-th harmonic voltage drop u of the output filter inductor L L-h to obtain the h-th harmonic voltage u of the load side of the inverter o-h ; Step 4: Set the harmonic reference voltage to zero and adjust the harmonic voltage u o-h on the load side, and calculate the h - th harmonic compensation voltage u cmp-h output by the controller in the current cycle; Step 5: Add the harmonic compensation voltage u cmp-h output by the inverter to the fundamental wave output voltage u r of the inverter to obtain the output voltage u of the inverter controller.

2. The method for suppressing harmonic waves of inverter output voltage without a voltage sensor according to claim 1, characterized in that In the fourth step, The current cycle controller outputs the h -th harmonic compensation voltage u cmp-h which is obtained by adjusting the feedback error signal through the quasi - resonant controller R h (s). The quasi - resonant controller R h (s) is as follows: Among them, hω0 is the h-th target frequency, and K rh is the resonance coefficient, and ω c affects the bandwidth of the quasi-resonant controller.

3. The method for suppressing harmonic waves of inverter output voltage without a voltage sensor according to claim 2, characterized in that In the first step, Extract the harmonic components of the inverter output inductor current i by using a band-pass filter. o The band-pass filter is as follows: Among them, ω c affects the bandwidth of the band-pass filter, and hω0 is the h-th target frequency.

4. The method for suppressing harmonic waves of inverter output voltage without a voltage sensor according to claim 3, characterized in that In the second step, a differentiator is used to take the derivative of the harmonic components of the inductor current i o .

5. A multiple harmonic wave suppression controller, comprising a plurality of harmonic wave suppression controllers connected in parallel, characterized in that Any harmonic suppression controller includes: Extraction unit, which extracts the harmonic components of the inverter output inductor current i o ; Derivative unit, which takes the derivative of the harmonic components of the inductor current i o and multiplies it by the value L of the output filter inductor of the inverter to obtain the h-th harmonic voltage drop u L-h ; The first calculation unit delays the harmonic compensation voltage output by the inverter controller at the previous moment by one cycle to obtain the actual harmonic compensation voltage u of the inverter at the current moment cmp-h ′, where the actual harmonic compensation voltage u of the inverter at the current moment cmp-h ′ is subtracted from the h-th harmonic voltage drop u of the output filter inductor L L-h to obtain the h-th harmonic voltage u on the load side of the inverter o-h ; The second calculation unit sets the harmonic reference voltage to zero and adjusts the harmonic voltage u o-h on the load side, and calculates the h-th harmonic compensation voltage u cmp- h of the controller output in the current cycle; Superposition unit, which superimposes the harmonic compensation voltage u output by the inverter cmp-h with the fundamental wave output voltage u of the inverter r to obtain the output voltage u of the inverter controller.

6. The multiple harmonic wave suppression controller according to claim 5, characterized in that The second calculation unit includes a harmonic compensation voltage u of the hth order obtained by adjusting the feedback error signal through a quasi-resonant controller R h (s), and the quasi-resonant controller R cmp-h (s) is: h (s) is as follows: Among them, hω0 is the h-th target frequency, and K rh is the resonance coefficient, and ω c affects the bandwidth of the quasi-resonant controller.

7. The multiple harmonic wave suppression controller according to claim 6, characterized in that The extraction unit extracts the harmonic components of the inverter output inductor current i o using a band-pass filter, and the band-pass filter is as follows: where ω c affects the bandwidth of the quasi-resonant controller, and hω0 is the h-th target frequency.

8. A method for suppressing voltage harmonics of a three-phase two-level inverter, characterized in that, The method includes: Step 1: Sample the output inductor currents i a 、i b 、i c of the inverter, and obtain the αβ stationary coordinate system currents i α and i β ; Step 2, the current i α and i β respectively enter the multiple harmonic suppression controller described in any one of claims 5 to 7 to obtain harmonic compensation voltages u cmp-α and u cmp-β ; Step 3: The fundamental output voltage u of the inverter in the αβ stationary coordinate system rα and u rβ are superimposed with the harmonic compensation voltages u cmp-α and u cmp-β to obtain the output voltages u α * and u β * of the inverter controller, which are sent to the space vector modulation link to generate actual switching signals T1~T6, and the switching signals are respectively sent to the inverter.

9. A computer storage medium, on which a computer program is stored, characterized in that, The computer program is executed by a processor to implement the steps of the inverter output voltage harmonic suppression method without a voltage sensor according to any one of claims 1-4.

10. A computer storage medium, on which a computer program is stored, characterized in that, The computer program is executed by a processor to implement the steps of the three-phase two-level inverter voltage harmonic suppression method according to claim 8.

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