A pulse circuit and a control method

Abstract

The present invention discloses a pulse circuit and a control method. In this circuit: The power supply module includes a battery, a DC / DC buck circuit, an RC charging circuit, and a voltage switching circuit. The battery is connected to the main control circuit and the DC / DC buck circuit respectively; The main control circuit is connected to the DC / DC buck circuit, the RC charging circuit, and the voltage switching circuit in the power supply module respectively, and the RC charging circuit is arranged between the main control circuit and the voltage switching circuit; The other end of the main control circuit is connected to the human body successively through a pulse generating circuit, a voltage clamping circuit, and a current limiting circuit; The present invention utilizes the DC / DC switching buck circuit to be responsible for the output of the pulse voltage in the high voltage segment, and the RC charging circuit to be responsible for the output of the pulse voltage in the low voltage segment, which has the characteristics of high output efficiency, wide voltage regulation range, and high voltage regulation accuracy; By using a three-state level conversion chip to replace the switching circuit built with discrete MOS transistors, it has the characteristics of high integration, and the output polarity and pulse channels can be freely switched.

Description

Technical Field

[0001] The present invention relates to the technical field of pulse generation circuits, and particularly to a pulse circuit and a control method. Background Art

[0002] Most traditional pacemaker-like pulse generation circuits use digital-to-analog converters, charge pump circuits, or combinations thereof to generate configurable charging voltages, and use a combination circuit of MOS transistors and resistors to be responsible for polarity switching and stimulation pulse output, which have the disadvantages of low output efficiency, excessive number of components, and large occupied area. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a pulse circuit and a control method in view of the defects in the prior art.

[0004] The technical solution adopted by the present invention to solve its technical problems is as follows:

[0005] The present invention provides a pulse circuit, which includes: a power supply module, a main control circuit, a pulse generation circuit, a voltage clamping circuit, and a current limiting circuit; wherein:

[0006] The power supply module includes a battery, a DC / DC buck circuit, an RC charging circuit, and a voltage switching circuit. The battery is respectively connected to the main control circuit and the DC / DC buck circuit; the main control circuit is respectively connected to the DC / DC buck circuit, the RC charging circuit, and the voltage switching circuit in the power supply module, and the RC charging circuit is arranged between the main control circuit and the voltage switching circuit; the other end of the main control circuit is sequentially connected to the human body through the pulse generation circuit, the voltage clamping circuit, and the current limiting circuit; a three-state level conversion chip is arranged in the pulse generation circuit;

[0007] A charging voltage with a configurable voltage value range is provided through a DC / DC buck circuit with adjustable output voltage and an RC charging circuit. The DC / DC buck circuit is used to realize the voltage output of high-voltage pulses, and the RC charging circuit is used to realize the voltage output of low-voltage pulses; and the three-state level conversion chip in the pulse generation circuit is used for polarity switching and generation of stimulation pulses.

[0008] Further, the specific circuit structure of the power supply module of the present invention is:

[0009] The power supply module includes: a DC / DC power chip, a capacitor C1, a capacitor C2, a capacitor C3, a resistor R1, an inductor L1, a diode DIOD1, a load switch, and ports D1, D2, D3, D4, D5, D6, ADC1 connected to the main control circuit; wherein:

[0010] The positive electrode of capacitor C1 is connected to the VIN pin of the DC / DC power supply chip, the negative electrode of capacitor C1 is connected to the power ground, one end of inductor L1 is connected to the SW pin of the DC / DC power supply chip, the other end of inductor L1 is connected to the positive electrode of capacitor C2 and the VOUT pin of the DC / DC power supply chip, the negative electrode of capacitor C2 is connected to the power ground, and the VOUT pin of the DC / DC power supply chip is connected to the VIN pin of the load switch; one end of resistor R1 is connected to port D5, the other end of resistor R1 is connected to the P pole of diode DIOD1, the N pole of diode DIOD1 is connected to the positive electrode of capacitor C3 and the VOUT pin of the load switch, and the negative electrode of capacitor C3 is connected to the power ground.

[0011] Further, the specific circuit structure of the pulse generation circuit of the present invention is:

[0012] The pulse generation circuit includes: DC-blocking capacitors C4 and C5, three-state level conversion chips U1, U2, U3, ports D7, D8, D9, D10, D11, D12 connected to the main control circuit; where:

[0013] The configurable input voltage with a voltage value range generated by the power supply module is connected to the VIN pins of three-state level conversion chips U1, U2, U3. The VOUT pin of three-state level conversion chip U1 is connected to DC-blocking capacitor C4, and the other end of DC-blocking capacitor C4 is connected to the VIN1 pin of the current limiting chip. The VOUT pin of three-state level conversion chip U2 is connected to DC-blocking capacitor C5, and the other end of DC-blocking capacitor C5 is connected to the VIN2 pin of the current limiting chip. The VOUT pin of three-state level conversion chip U3 is connected to the pacemaker housing.

[0014] Further, the specific circuit structure of the voltage clamping circuit of the present invention is:

[0015] The voltage clamping circuit includes: TVS diodes TVS1, TVS2, TVS3; where:

[0016] The N pole of TVS diode TVS1 is connected to the VOUT pin of three-state level conversion chip U1, and the P pole is connected to the power ground; the N pole of TVS diode TVS2 is connected to the VOUT pin of three-state level conversion chip U2, and the P pole is connected to the power ground; the N pole of TVS diode TVS3 is connected to the VOUT pin of three-state level conversion chip U3, and the P pole is connected to the power ground;

[0017] When the human body gets an electric shock, during an electrocautery surgery, defibrillation, or MRI, a high voltage will be generated at the output end of the three-state level conversion chip. When the voltage exceeds a certain threshold, the TVS diode conducts in the reverse direction to prevent overvoltage damage to the output end of the three-state level conversion chip.

[0018] Further, the specific circuit structure of the current limiting circuit of the present invention is:

[0019] The current limiting circuit is composed of a dedicated current limiting chip. The VIN1 pin of the current limiting chip is connected to the DC blocking capacitor C4, and the other end of the DC blocking capacitor C4 is connected to the three-state level conversion chip U1. The VOUT1 pin of the current limiting chip is connected to the positive electrode of the electrode. The VIN2 pin of the current limiting chip is connected to the DC blocking capacitor C5, and the other end of the DC blocking capacitor C5 is connected to the three-state level conversion chip U2. The VOUT2 pin of the current limiting chip is connected to the negative electrode of the electrode; there is complete isolation between VIN1, VOUT1 and VIN2, VOUT2 of the current limiting chip.

[0020] The present invention provides a control method for a pulse circuit, and the method includes the following steps:

[0021] Step 1: The main control circuit selects whether to turn on the DC / DC buck circuit or the RC charging circuit according to the set pulse voltage; when it is necessary to output a 0 - 1.8V pulse voltage, turn on the RC charging circuit, turn off the DC / DC buck circuit, close the load switch, and control the RC charging circuit to make the output voltage the set value; when it is necessary to output a 1.8 - 3.3V pulse voltage, turn off the RC charging circuit, turn on the DC / DC buck circuit, open the load switch, and control the DC / DC buck circuit to make the output voltage the set value; when it is necessary to output a 3.6V - 6.6V pulse voltage, turn off the RC charging circuit, turn on the DC / DC buck circuit, open the load switch, and control the DC / DC buck circuit to make the output voltage half of the set value;

[0022] Step 2: The main control circuit configures three three-state level conversion chips according to the output channel setting and the polarity setting, sets the unused channels to the high impedance state, and sets the selected channels to the pulse output positive electrode or the pulse output negative electrode;

[0023] Step 3: The main control circuit selects to adopt a non-doubling working mode or a doubling working mode according to the set pulse voltage. When the set pulse voltage is 0 - 3.3V, adopt the non-doubling working mode. When the set pulse voltage is 3.6 - 6.6V, adopt the doubling working mode;

[0024] Step 4: The main control circuit controls the three-state level conversion chip to output a stimulation pulse according to a preset process.

[0025] Further, the specific method of step 1 of the present invention is:

[0026] When it is necessary to generate a 0.8V - 1.8V configurable charging voltage, the load switch is closed. By detecting the voltage of the capacitor C3 after each pulse occurs, the pulse time for charging C3 is generated through proportional-integral operation, realizing the closed-loop control of the voltage of C3, and generating a configurable charging voltage of 0 - 1.8V with a step size of 0.1V;

[0027] When a configurable charging voltage of 1.8V - 3.3V is required, the load switch is turned on. By configuring the 4-bit input digital bits of the DC / DC power chip, a configurable charging voltage ranging from 1.8V to 3.3V with a step of 0.1V is generated.

[0028] When a configurable charging voltage of 3.6V - 6.6V is required, the RC charging circuit is turned off, the DC / DC buck circuit is turned on, the load switch is turned on, and the DC / DC buck circuit is controlled to make the output voltage half of the set value, generating a configurable charging voltage ranging from 3.6V to 6.6V with a step of 0.1V.

[0029] Furthermore, the specific control method of the proportional-integral operation of the present invention is as follows:

[0030] Port D5 outputs a high level with a voltage of 2.0V. Port D5 charges C3 through the current limiting of resistor R1. The voltage on C3 rises slowly. At this time, the voltage of port ADC1 is measured. The voltage of port ADC1 is equal to the voltage of C3 plus the voltage drop of diode DIOD1. Diode DIOD1 is a Schottky diode with a low voltage drop of 0.2V. The voltage of C3 is the voltage of port ADC1 minus 0.2V: Vc3 = Vadc1 - 0.2V; The pulse time for charging C3 is generated through proportional-integral operation and delayed for this time. Then port D5 outputs a low level and the charging stops. Diode DIOD1 is used to prevent current backflow.

[0031] Calculate the difference between the voltage Vc3 of capacitor C3 and the set voltage Vset. If Vc3 is greater than Vset, the charging process ends; if Vc3 is less than Vset, calculate the charging pulse time Tcharge = Tp + Ti, where Tp = P * (Vset - Vc3), P is the proportional coefficient, Ti = I * + Ti’, I is the integral coefficient, and Ti’ is the value of Ti in the previous cycle.

[0032] The main control circuit controls port D5 to output a high level of 2.0V. After delaying Tcharge, it outputs a low level and capacitor C3 stops charging.

[0033] Furthermore, the specific method of step 3 of the present invention is as follows:

[0034] The main control circuit configures the outputs of the three-state level conversion chips U1, U2, and U3 to 0 - 3.3V high level, low level, and high impedance state respectively by controlling ports D7, D8, D9, D10, D11, and D12; when the stimulation pulse is generated only between two electrodes connected to the human body or between one electrode connected to the human body and the pacemaker housing, the pacemaker housing or the other electrode is set to the high impedance state; when the pulse is generated between two electrodes, C4 and C5 are connected in series to form a DC blocking capacitor.

[0035] The 0 - 3.3V configurable charging voltage charges the DC - blocking capacitor to generate a pacing pulse within the 0 - 3.3V power supply voltage, that is, without voltage multiplication; the 0 - 3.3V configurable charging voltage charges the capacitor, and when discharging, the other end of the capacitor is connected to the configurable charging voltage to generate a pacing pulse with twice the configurable charging voltage, that is, with voltage multiplication.

[0036] Further, the specific method of step 4 of the present invention is as follows:

[0037] When the current is less than 50 mA, the resistance value between VIN1 and VOUT1 of the current - limiting chip is less than a certain threshold, which has no impact on the circuit; when the current is greater than 50 mA, the resistance between VIN1 and VOUT1 of the current - limiting chip increases rapidly to limit the current flowing through the circuit; the current - limiting chip is a passive device that limits the maximum current to 50 mA and the maximum withstand voltage to 850 V, preventing tissue fibrosis damage caused by excessive current flowing through the electrode during electric shock, electrosurgical operation, defibrillation, and magnetic resonance imaging.

[0038] The beneficial effects produced by the present invention are as follows: For the pulse circuit and control method, the power supply module uses a DC / DC switching buck circuit to be responsible for the output of the pulse voltage in the high - voltage section, and the RC charging circuit is responsible for the output of the pulse voltage in the low - voltage section, and the voltage is switched through a load switch and a diode. The pulse - generating circuit uses a three - state level - conversion chip to replace the pulse - generating circuit built with discrete MOS transistors. The present invention uses a DC / DC switching buck circuit to be responsible for the output of the pulse voltage in the high - voltage section and an RC charging circuit to be responsible for the output of the pulse voltage in the low - voltage section, which has the characteristics of high output efficiency, wide voltage regulation range, and high voltage regulation accuracy; using a three - state level - conversion chip to replace the switching circuit built with discrete MOS transistors has the characteristics of high integration, and the output polarity and pulse channels can be freely switched. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The present invention will be further described below in conjunction with the drawings and embodiments. In the drawings:

[0040] Figure 1 is the system block diagram of the embodiment of the present invention;

[0041] Figure 2 is the circuit diagram of the power supply module of the embodiment of the present invention;

[0042] Figure 3 is the closed - loop control flowchart of the embodiment of the present invention;

[0043] Figure 4 is the circuit diagram of the pulse - generating circuit, voltage - clamping circuit, and current - limiting circuit of the embodiment of the present invention;

[0044] In the figure: 1 - battery, 2 - main control circuit, 3 - DC / DC buck circuit, 4 - RC charging circuit, 5 - voltage switching circuit, 6 - pulse generating circuit, 7 - voltage clamping circuit, 8 - current limiting circuit. Detailed implementation

[0045] In order to make the objectives, technical solutions and advantages of the present invention more clear and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0046] As Figure 1 shown, the pulse circuit of the embodiment of the present invention includes: a power supply module, a main control circuit, a pulse generating circuit, a voltage clamping circuit and a current limiting circuit; where:

[0047] The power supply module includes a battery, a DC / DC buck circuit, an RC charging circuit and a voltage switching circuit. The battery is respectively connected to the main control circuit and the DC / DC buck circuit; the main control circuit is respectively connected to the DC / DC buck circuit, the RC charging circuit and the voltage switching circuit in the power supply module, and the RC charging circuit is arranged between the main control circuit and the voltage switching circuit; the other end of the main control circuit is sequentially connected to the human body through the pulse generating circuit, the voltage clamping circuit and the current limiting circuit; a three-state level conversion chip is arranged in the pulse generating circuit;

[0048] The DC / DC buck circuit with adjustable output voltage and the RC charging circuit provide a charging voltage with a configurable voltage value range. The DC / DC buck circuit is used to realize the voltage output of high-voltage pulses, and the RC charging circuit is used to realize the voltage output of low-voltage pulses; and the three-state level conversion chip in the pulse generating circuit is used for polarity switching and the generation of stimulating pulses.

[0049] As Figure 2 shown, the power supply module includes: a DC / DC power chip, capacitor C1, capacitor C2, capacitor C3, resistor R1, inductor L1, diode DIOD1, a load switch, and ports D1, D2, D3, D4, D5, D6, ADC1 connected to the main control circuit; where:

[0050] The positive electrode of the capacitor C1 is connected to the VIN pin of the DC / DC power supply chip, the negative electrode of the capacitor C1 is connected to the power ground, one end of the inductor L1 is connected to the SW pin of the DC / DC power supply chip, the other end of the inductor L1 is connected to the positive electrode of the capacitor C2 and the VOUT pin of the DC / DC power supply chip, the negative electrode of C2 is connected to the power ground, and the VOUT pin of the DC / DC power supply chip is connected to the VIN pin of the load switch; one end of the resistor R1 is connected to the port D5, the other end of the resistor R1 is connected to the P pole of the diode DIOD1, the N pole of the diode DIOD1 is connected to the positive electrode of the capacitor C3 and the VOUT pin of the load switch, and the negative electrode of the capacitor C3 is connected to the power ground.

[0051] When a configurable charging voltage of 1.8 - 3.3V needs to be generated, the load switch is turned on. By configuring the 4-bit input digital bits of the DC / DC power supply chip, a configurable charging voltage ranging from 1.8V to 3.3V with a step of 0.1V can be generated.

[0052] The output voltage of the power supply chip is set as shown in the following table:

[0053]

[0054]

[0055] When a configurable charging voltage of 0.8 - 1.8V needs to be generated, the load switch is turned off. By detecting the voltage of the capacitor C3 after each pulse occurs and generating the pulse time for charging C3 through proportional-integral (PI) operation, a closed-loop control of the voltage of C3 is achieved, and a configurable charging voltage ranging from 0V to 1.8V with a step of 0.1V can be generated.

[0056] The specific implementation steps are as follows: The port D5 outputs a high level with a voltage of 2.0V. The port D5 charges the C3 through the resistor R1 for current limiting. The voltage on the C3 rises slowly. At this time, the voltage of the ADC1 port is measured. The voltage of the ADC1 port is equal to the voltage of the C3 plus the voltage drop of the diode DIOD1. DIOD1 uses a Schottky diode with a low voltage drop, and the voltage drop is generally 0.2V. The voltage of the C3 is the voltage of the ADC1 port minus 0.2V; the pulse time for charging C3 is generated through proportional-integral (PI) operation and delayed for that time. Then the port D5 outputs a low level and the charging stops. The diode DIOD1 is used to prevent current backflow. The specific flowchart is as Figure 3 shown.

[0057] As Figure 4 shown, the pulse generation circuit includes: a DC-blocking capacitor C4, a DC-blocking capacitor C5, a tri-state level conversion chip U1, a tri-state level conversion chip U2, a tri-state level conversion chip U3, ports D7, D8, D9, D10, D11, D12 connected to the main control circuit (2); where:

[0058] The 0 - 3.3V configurable input voltage generated by the power supply module is connected to the VIN pins of the three - state level conversion chips U1, U2, and U3. The VOUT pin of the three - state level conversion chip U1 is connected to the DC - blocking capacitor C4, and the other end of the DC - blocking capacitor C4 is connected to the VIN1 pin of the current - limiting chip. The VOUT pin of the three - state level conversion chip U2 is connected to the DC - blocking capacitor C5, and the other end of the DC - blocking capacitor C5 is connected to the VIN2 pin of the current - limiting chip. The VOUT pin of the three - state level conversion chip U3 is connected to the pacemaker housing.

[0059] The main control circuit can configure the outputs of the three - state level conversion chips U1, U2, and U3 to 0 - 3.3V high level, low level, and high - impedance state respectively through the control ports D7, D8, D9, D10, D11, and D12. When the stimulation pulse is generated only between two electrodes connected to the human body or between one electrode connected to the human body and the pacemaker housing, the pacemaker housing or the other electrode can be set to the high - impedance state. When the pulse is generated between two electrodes, C4 and C5 are connected in series to form a DC - blocking capacitor.

[0060] The 0 - 3.3V configurable charging voltage charges the DC - blocking capacitor to generate a pacing pulse (without voltage doubling) within the 0 - 3.3V power supply voltage; the 0 - 3.3V configurable charging voltage charges the capacitor, and when discharging, the other end of the capacitor is connected to the configurable charging voltage to generate a pacing pulse (voltage doubling) of twice the configurable charging voltage.

[0061] Flowchart of the working process when there is no voltage - doubling pulse output (taking the example between the positive electrode and the housing):

[0062] - U1 outputs low level, U3 outputs low level, and the capacitor C4 discharges to the tissue, generating a non - voltage - doubled positive pulse output;

[0063] - U1 outputs high - impedance state, and the output is turned off;

[0064] - U1 outputs high level, and the capacitor C4 starts to charge, generating a negative pulse output;

[0065] - U1 outputs high - impedance state, and the output is turned off.

[0066] Flowchart of the working process when there is voltage - doubling pulse output (taking the example between the positive electrode and the housing):

[0067] - U1 outputs low level, U3 outputs low level, and the capacitor C4 discharges to the tissue, generating a non - voltage - doubled positive pulse output;

[0068] - U1 outputs low level, U3 outputs high level, and the capacitor C4 and the power supply voltage are connected in series to discharge to the tissue, generating a voltage - doubled positive pulse output;

[0069] - U1 outputs low level, U3 outputs low level, and the capacitor C4 discharges to the tissue, generating a non - voltage - doubled positive pulse output;

[0070] - The output of U1 is in a high impedance state and the output is turned off;

[0071] - The output of U1 is at a high level, and the capacitor C4 starts to charge, generating a negative pulse output;

[0072] - The output of U1 is in a high impedance state and the output is turned off.

[0073] The voltage clamping module includes: TVS diodes TVS1, TVS2, TVS3; where:

[0074] The N poles of the TVS diodes are respectively connected to the VOUT pins of the three-state level conversion chip, and the P poles are connected to the power ground.

[0075] When a person gets an electric shock, during electrocautery surgery, defibrillation, or MRI, a high voltage will be generated at the output end of the three-state level conversion chip. When the voltage exceeds 5V, the TVS diode conducts in the reverse direction to prevent overvoltage damage to the output end of the three-state level conversion chip.

[0076] The current limiting module is composed of a dedicated current limiting chip; where:

[0077] The VIN1 pin of the current limiting chip is connected to the DC-blocking capacitor C4, the other end of the DC-blocking capacitor C4 is connected to the three-state level conversion chip U1, the VOUT1 pin of the current limiting chip is connected to the positive electrode of the electrode, the VIN2 pin of the current limiting chip is connected to the DC-blocking capacitor C5, the other end of the DC-blocking capacitor C5 is connected to the three-state level conversion chip U2, and the VOUT2 pin of the current limiting chip is connected to the negative electrode of the electrode.

[0078] The VIN1, VOUT1 and VIN2, VOUT2 of the current limiting chip are completely isolated. Taking VIN1, VOUT1 as an example, when the current is less than 50 mA, the resistance between VIN1 and VOUT1 is very small and has almost no impact on the circuit; when the current is greater than 50 mA, the resistance between VIN1 and VOUT1 increases rapidly, which can limit the current flowing through the circuit. The current limiting chip is a passive device, which can limit the maximum current to 50 mA and the maximum withstand voltage to 850 V to prevent tissue fibrosis damage caused by excessive current flowing through the electrode during electric shock, electrocautery surgery, defibrillation, or MRI.

[0079] The control method of the pulse circuit according to the embodiment of the present invention, the method includes the following steps:

[0080] Step 1: The main control circuit selects whether to turn on the DC / DC buck circuit or the RC charging circuit according to the set pulse voltage; when it is necessary to output a 0-1.8V pulse voltage, turn on the RC charging circuit, turn off the DC / DC buck circuit, close the load switch, and control the RC charging circuit to make the output voltage the set value; when it is necessary to output a 1.8-3.3V pulse voltage, turn off the RC charging circuit, turn on the DC / DC buck circuit, open the load switch, and control the DC / DC buck circuit to make the output voltage the set value; when it is necessary to output a 3.6V-6.6V pulse voltage, turn off the RC charging circuit, turn on the DC / DC buck circuit, open the load switch, and control the DC / DC buck circuit to make the output voltage half of the set value;

[0081] Step 2: The main control circuit configures a three-way three-state level conversion chip according to the output channel setting and the polarity setting, sets the unused channels to the high-impedance state, and sets the selected channels to the positive pulse output or the negative pulse output;

[0082] Step 3: The main control circuit selects to adopt a non-doubling working mode or a doubling working mode according to the set pulse voltage. When the set pulse voltage is 0-3.3V, the non-doubling working mode is adopted. When the set pulse voltage is 3.6-6.6V, the doubling working mode is adopted;

[0083] Step 4: The main control circuit controls the three-state level conversion chip to output a stimulation pulse according to a preset process.

[0084] It should be understood that those of ordinary skill in the art can make improvements or transformations according to the above description, and all such improvements and transformations should fall within the protection scope of the appended claims of the present invention.

Claims

1. A pulse circuit, characterized in that, the circuit comprises: a power supply module, a main control circuit (2), a pulse generating circuit (6), a voltage clamping circuit (7) and a current limiting circuit (8); wherein: the power supply module includes a battery (1), a DC / DC buck circuit (3), an RC charging circuit (4) and a voltage switching circuit (5), the battery (1) is respectively connected to the main control circuit (2) and the DC / DC buck circuit (3); the main control circuit (2) is respectively connected to the DC / DC buck circuit (3), the RC charging circuit (4) and the voltage switching circuit (5) in the power supply module, and the RC charging circuit (4) is arranged between the main control circuit (2) and the voltage switching circuit (5); the other end of the main control circuit (2) is sequentially connected to the human body (9) through the pulse generating circuit (6), the voltage clamping circuit (7) and the current limiting circuit (8); a three-state level conversion chip is arranged in the pulse generating circuit (6); a charging voltage with a configurable voltage value range is provided by the DC / DC buck circuit (3) with adjustable output voltage and the RC charging circuit (4), the DC / DC buck circuit (3) is used to realize the voltage output of high-voltage pulses, and the RC charging circuit (4) is used to realize the voltage output of low-voltage pulses; and the polarity switching and the generation of stimulating pulses are carried out by the three-state level conversion chip in the pulse generating circuit (6); the specific circuit structure of the pulse generating circuit (6) is: the pulse generating circuit (6) includes: a DC blocking capacitor C4, a DC blocking capacitor C5, three-state level conversion chips U1, U2, U3, ports D7, D8, D9, D10, D11, D12 connected to the main control circuit (2); wherein: the input voltage with a configurable voltage value range generated by the power supply module is connected to the VIN pins of the three-state level conversion chips U1, U2, U3, the VOUT pin of the three-state level conversion chip U1 is connected to the DC blocking capacitor C4, the other end of the DC blocking capacitor C4 is connected to the VIN1 pin of the current limiting chip, the VOUT pin of the three-state level conversion chip U2 is connected to the DC blocking capacitor C5, the other end of the DC blocking capacitor C5 is connected to the VIN2 pin of the current limiting chip, and the VOUT pin of the three-state level conversion chip U3 is connected to the pacemaker housing.

2. The pulse circuit according to claim 1, characterized in that, the specific circuit structure of the power supply module is: the power supply module includes: a DC / DC power chip, capacitors C1, C2, C3, a resistor R1, an inductor L1, a diode DIOD1, a load switch, and ports D1, D2, D3, D4, D5, D6, ADC1 connected to the main control circuit (2); wherein: The positive electrode of capacitor C1 is connected to the VIN pin of the DC / DC power supply chip, the negative electrode of capacitor C1 is connected to the power ground, one end of inductor L1 is connected to the SW pin of the DC / DC power supply chip, the other end of inductor L1 is connected to the positive electrode of capacitor C2 and the VOUT pin of the DC / DC power supply chip, the negative electrode of capacitor C2 is connected to the power ground, and the VOUT pin of the DC / DC power supply chip is connected to the VIN pin of the load switch; one end of resistor R1 is connected to port D5, the other end of resistor R1 is connected to the P pole of diode DIOD1, the N pole of diode DIOD1 is connected to the positive electrode of capacitor C3 and the VOUT pin of the load switch, and the negative electrode of capacitor C3 is connected to the power ground.

3. The pulse circuit according to claim 1, characterized in that the specific circuit structure of the voltage clamping circuit (7) is: The voltage clamping circuit (7) includes: TVS diode TVS1, TVS diode TVS2, TVS diode TVS3; wherein: The N pole of TVS diode TVS1 is connected to the VOUT pin of the tri-state level conversion chip U1, and the P pole is connected to the power ground; the N pole of TVS diode TVS2 is connected to the VOUT pin of the tri-state level conversion chip U2, and the P pole is connected to the power ground; the N pole of TVS diode TVS3 is connected to the VOUT pin of the tri-state level conversion chip U3, and the P pole is connected to the power ground; When a person gets an electric shock, during an electrocautery operation, defibrillation, or magnetic resonance imaging, a high voltage will be generated at the output end of the tri-state level conversion chip. When the voltage exceeds a certain threshold, the TVS diode conducts reversely to prevent overvoltage damage to the output end of the tri-state level conversion chip.

4. The pulse circuit according to claim 1, characterized in that the specific circuit structure of the current limiting circuit (8) is: The current limiting circuit (8) is composed of a dedicated current limiting chip. The VIN1 pin of the current limiting chip is connected to the DC-blocking capacitor C4, the other end of the DC-blocking capacitor C4 is connected to the tri-state level conversion chip U1, the VOUT1 pin of the current limiting chip is connected to the positive electrode of the electrode, the VIN2 pin of the current limiting chip is connected to the DC-blocking capacitor C5, the other end of the DC-blocking capacitor C5 is connected to the tri-state level conversion chip U2, and the VOUT2 pin of the current limiting chip is connected to the negative electrode of the electrode; there is complete isolation between VIN1, VOUT1 and VIN2, VOUT2 of the current limiting chip.

5. A control method for a pulse circuit, used to control the pulse circuit according to any one of claims 1-4, characterized in that the method includes the following steps: Step 1: The main control circuit selects whether to turn on the DC / DC buck circuit or the RC charging circuit according to the set pulse voltage; when it is necessary to output a 0-1.8V pulse voltage, turn on the RC charging circuit, turn off the DC / DC buck circuit, close the load switch, and control the RC charging circuit to make the output voltage the set value; when it is necessary to output a 1.8-3.3V pulse voltage, turn off the RC charging circuit, turn on the DC / DC buck circuit, open the load switch, and control the DC / DC buck circuit to make the output voltage the set value; when it is necessary to output a 3.6V-6.6V pulse voltage, turn off the RC charging circuit, turn on the DC / DC buck circuit, open the load switch, and control the DC / DC buck circuit to make the output voltage half of the set value; Step 2: The main control circuit configures a three-channel three-state level conversion chip according to the output channel setting and the polarity setting, sets the unused channels to the high-impedance state, and sets the selected channels to the pulse output positive or the pulse output negative; Step 3: The main control circuit selects to adopt the non-doubling working mode or the doubling working mode according to the set pulse voltage. When the set pulse voltage is 0-3.3V, the non-doubling working mode is adopted. When the set pulse voltage is 3.6-6.6V, the doubling working mode is adopted; Step 4: The main control circuit controls the three-state level conversion chip to output the stimulation pulse according to the preset process.

6. The control method of the pulse circuit according to claim 5, wherein, the specific method of the said Step 1 is: When it is necessary to generate a 0.8V-1.8V configurable charging voltage, the load switch is closed. By detecting the voltage of the capacitor C3 after each pulse occurs, the pulse time for charging C3 is generated through proportional-integral operation, realizing the closed-loop control of the voltage of C3, and generating a configurable charging voltage of 0-1.8V with a step of 0.1V; When it is necessary to generate a 1.8V-3.3V configurable charging voltage, the load switch is opened. By configuring the 4-bit input digital bits of the DC / DC power chip, a configurable charging voltage from 1.8V to 3.3V with a step of 0.1V is generated; When it is necessary to generate a 3.6V-6.6V configurable charging voltage, turn off the RC charging circuit, turn on the DC / DC buck circuit, open the load switch, and control the DC / DC buck circuit to make the output voltage half of the set value, generating a configurable charging voltage from 3.6V to 6.6V with a step of 0.1V.

7. The control method of the pulse circuit according to claim 6, wherein, the specific control method of the said proportional-integral operation is: The port D5 outputs a high level with a voltage of 2.0V. The port D5 charges the capacitor C3 through the current-limiting resistor R1. The voltage on C3 rises slowly. At this time, the voltage of the port ADC1 is measured. The voltage of the port ADC1 is equal to the voltage of C3 plus the voltage drop of the diode DIOD1. The diode DIOD1 is a Schottky diode with a low voltage drop, and the voltage drop is 0.2V. The voltage of C3 is the voltage of the port ADC1 minus 0.2V: Vc3 = Vadc1 - 0.2V; Generate the pulse time for charging C3 through proportional-integral operation and delay this time. Then the port D5 outputs a low level and the charging stops. The diode DIOD1 is used to prevent current backflow. Calculate the difference between the voltage Vc3 of the capacitor C3 and the set voltage Vset. If Vc3 is greater than Vset, the charging process ends. If Vc3 is less than Vset, calculate the charging pulse time Tcharge = Tp + Ti, where Tp = P * (Vset - Vc3), P is the proportionality coefficient, Ti = I * (Vset - Vc3) + Ti’, I is the integral coefficient, and Ti’ is the value of Ti in the previous cycle. The main control circuit controls the port D5 to output a high level of 2.0V. After delaying Tcharge, it outputs a low level and the capacitor C3 stops charging.

8. The control method of the pulse circuit according to claim 5, characterized in that, the specific method of step 3 is: The main control circuit configures the outputs of the tri-state level conversion chips U1, U2, and U3 to 0 - 3.3V high level, low level, and high impedance state respectively by controlling the ports D7, D8, D9, D10, D11, and D12; when the stimulation pulse only occurs between two electrodes connected to the human body or between one electrode connected to the human body and the pacemaker housing, the pacemaker housing or the other electrode is set to the high impedance state; when the pulse occurs between two electrodes, C4 and C5 are connected in series to form a DC-blocking capacitor. Charge the DC-blocking capacitor with a configurable charging voltage of 0 - 3.3V to generate a pacing pulse within the power supply voltage of 0 - 3.3V, that is, without voltage doubling; charge the capacitor with a configurable charging voltage of 0 - 3.3V. When discharging, the other end of the capacitor is connected to the configurable charging voltage to generate a pacing pulse with twice the configurable charging voltage, that is, voltage doubling.

9. The control method of the pulse circuit according to claim 5, characterized in that, the specific method of step 4 is: When the current is less than 50MA, the resistance value between VIN1 and VOUT1 of the current limiting chip is less than a certain threshold and has no effect on the circuit; when the current is greater than 50MA, the resistance between VIN1 and VOUT1 of the current limiting chip increases rapidly to limit the current flowing through the circuit; the current limiting chip is a passive device, which limits the maximum current to 50mA and the maximum withstand voltage to 850V to prevent tissue fibrosis damage caused by excessive current flowing through the electrode during electric shock, electrocautery surgery, defibrillation, and MRI.

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