Piezoelectric micromechanical ultrasonic transducer and method of manufacturing the same
By using a blocking structure protruding from the top surface of the substrate and surrounding the cavity edge in a piezoelectric micromechanical ultrasonic transducer, the size and position of the film layer can be precisely controlled, thus solving the problem of non-uniform resonant frequency and improving the reliability and electrical performance of the device.
Patent Information
- Application Number
- CN202010642684.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-07-06
- Publication Date
- 2025-12-16
- Estimated Expiration
- 2041-06-14
AI Technical Summary
The resonant frequency of existing piezoelectric micromechanical ultrasonic transducers is non-uniform due to variations in the size of the cavity opening beneath the membrane.
A barrier structure protrudes from the top surface of the substrate, surrounds the edge of the cavity, and forms a film layer by etching. The barrier structure is used to precisely control the size and position of the film layer, and the substrate is etched to form a cavity to release stress.
This improved the resonant frequency uniformity of the piezoelectric micromechanical ultrasonic transducer, thereby enhancing the device's reliability and electrical performance.
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Figure CN113896165B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of Micro Electro Mechanical System (MEMS), and in particular, to a piezoelectric micromachined ultrasonic transducer (PMUT) and a manufacturing method thereof. BACKGROUND
[0002] In the past decades, Micro Machined Ultrasonic Transducers (MUTs) have been extensively studied and become an important component in various consumer electronics, such as components in fingerprint sensors, proximity sensors, and gesture sensors. Generally, MUTs can be divided into two major categories, such as Capacitive Micro Machined Ultrasonic Transducers (CMUTs) and Piezoelectric Micro Machined Ultrasonic Transducers (PMUTs). For a typical piezoelectric micromachined ultrasonic transducer, the piezoelectric micromachined ultrasonic transducer includes a membrane layer composed of an elastic material, an electrode, and a piezoelectric material, which is disposed on a cavity as an acoustic resonator to improve the acoustic performance of the piezoelectric micromachined ultrasonic transducer. During the operation of the piezoelectric micromachined ultrasonic transducer, ultrasonic waves generated by the vibration of the membrane layer are transmitted from the piezoelectric micromachined ultrasonic transducer to a target object, and then the piezoelectric micromachined ultrasonic transducer can detect the reflected acoustic waves generated after the ultrasonic waves hit the target object.
[0003] Generally, the piezoelectric micromachined ultrasonic transducer operates at the bending resonance frequency of the membrane layer, which can be determined by selecting the correct material, the size, and the thickness of the membrane. Therefore, the good matching of the resonance frequency of the individual piezoelectric micromachined ultrasonic transducer is a necessary condition for normal operation. However, since the cavity below the membrane layer is usually formed by etching the back surface of the substrate, a cavity opening is formed on the front surface of the substrate for defining the size of the membrane layer. The cavity opening size can have considerable variation in different areas within the same wafer or between different wafers, thus inevitably leading to the variation of the resonance frequency of each piezoelectric micromachined ultrasonic transducer.
[0004] Therefore, it is necessary to provide an improved piezoelectric micromachined ultrasonic transducer and a manufacturing method thereof, so that the size of the membrane layer in the piezoelectric micromachined ultrasonic transducer can be accurately controlled. SUMMARY
[0005] Therefore, in order to improve the uniformity of the resonance frequency of the piezoelectric micromachined ultrasonic transducer, it is necessary to provide an improved piezoelectric micromachined ultrasonic transducer and a manufacturing method thereof.
[0006] According to an embodiment of the present application, a piezoelectric micromechanical ultrasonic transducer includes a substrate, a blocking structure and a membrane layer, wherein the substrate and the blocking structure are composed of the same material. The substrate includes a cavity penetrating the substrate, and the blocking structure protrudes from a top surface of the substrate and surrounds an edge of the cavity. The membrane layer is disposed on the cavity and attached to the blocking structure.
[0007] According to another embodiment of the present application, a method for manufacturing a piezoelectric micromechanical ultrasonic transducer is disclosed, including the following steps. First, etching a substrate to form a blocking structure protruding from the substrate, and then forming a sacrificial layer on the substrate, wherein the blocking structure is exposed to the sacrificial layer. Then, forming a membrane layer on the blocking structure and the sacrificial layer. Then, forming a cavity penetrating the substrate to expose a portion of the sacrificial layer. Subsequently, removing the portion of the sacrificial layer exposed to the cavity by using the blocking structure as an etching stop structure.
[0008] According to the above-mentioned embodiments of the present application, the blocking structure is a structure protruding from the top surface of the substrate, and by controlling the position of the blocking structure, the size of the membrane layer can be adjusted. Since the blocking structure is formed by etching the substrate, the blocking structure can have a vertical sidewall in addition to being closely attached to the substrate without peeling off from the substrate. Through the above, the reliability and electrical performance of the piezoelectric micromechanical ultrasonic transducer can be effectively improved. BRIEF DESCRIPTION OF DRAWINGS
[0009] For the purposes of this disclosure, the following terms shall have the meanings indicated below. It will be apparent to one of ordinary skill in the art in view of the disclosure herein that the following terms can be used interchangeably and that the choice of term will depend on the context in which the term is used. The terms "comprises", "comprising", "including", "includes", "contains", "containing" or variations thereof do not have a limiting meaning and are used interchangeably. The term "consisting essentially of to indicate that a composition or method includes additional components or steps, but only if the additional components or steps do not materially alter the basic and novel characteristics of the claimed composition or method. The term "consisting of indicates that a composition or method includes only the listed components or steps. The term "or" is meant to be inclusive and not exclusive, unless explicitly indicated otherwise or indicated otherwise by context. The terms "about" and "substantially" mean largely, but not necessarily exactly, as understood by one of ordinary skill in the art. In the context of numerical values, "about" and "substantially" mean largely, but not necessarily exactly, as understood by one of ordinary skill in the art. The term "and / or" means "and" or "or", i.e. "and / or" is used to indicate that the term can be either "and" or "or", for example "A and / or B" means "A and B", "A or B", "A and", or "A or B".
[0010] Figure 1 is a top view schematic diagram of a piezoelectric micromechanical ultrasonic transducer (PMUT) according to an embodiment of the present application.
[0011] Figure 2 is a cross-sectional view schematic diagram according to an embodiment of the present application along the A-A' cutline in Figure 1 .
[0012] Figure 3 is a schematic diagram after forming a blocking structure on a substrate according to an embodiment of the present application.
[0013] Figure 4 is a cross-sectional view schematic diagram after forming a sacrificial layer on a substrate according to an embodiment of the present application.
[0014] Figure 5FIG. 6 is a cross-sectional schematic view illustrating a formation of a base layer on a barrier structure and a sacrificial layer according to an embodiment of the present application.
[0015] Figure 6 FIG. 7 is a cross-sectional schematic view illustrating a formation of a stack layer on the base layer to form a film layer according to an embodiment of the present application.
[0016] Figure 7 FIG. 8 is a cross-sectional schematic view illustrating a formation of a contact pad according to an embodiment of the present application.
[0017] Figure 8 FIG. 9 is a cross-sectional schematic view illustrating a formation of a truncation in the film layer according to an embodiment of the present application.
[0018] Figure 9 FIG. 10 is a cross-sectional schematic view illustrating a formation of a cavity penetrating the substrate according to an embodiment of the present application.
[0019] Figure 10 FIG. 11 is a flowchart illustrating a method of fabricating a piezoelectric micromechanical ultrasonic transducer according to an embodiment of the present application.
[0020] In the drawings:
[0021] 100 piezoelectric micromechanical ultrasonic transducer
[0022] 102 substrate
[0023] 102s top surface
[0024] 104 barrier structure
[0025] 104s top surface
[0026] 106 film layer
[0027] 108 body portion
[0028] 110 base portion
[0029] 112 truncation
[0030] 114 first contact pad
[0031] 116 second contact pad
[0032] 120 cavity
[0033] 120e edge
[0034] 122 first portion
[0035] 122s top surface
[0036] 124 second portion
[0037] 124s…top surface
[0038] 126…Sacrificial Layer
[0039] 130…grassroots
[0040] 132…Dielectric layer
[0041] 134…bottom conductive layer
[0042] 136…piezoelectric layer
[0043] 138…Top conductive layer
[0044] 140… passivation layer
[0045] 152… cut-off section
[0046] 200…methods
[0047] 202… steps
[0048] 204… steps
[0049] 206… steps
[0050] 208… steps
[0051] 210…steps
[0052] 212…step
[0053] D…distance
[0054] O…opening Detailed Implementation
[0055] This invention provides several different embodiments that can be used to implement different features of the invention. For the sake of simplicity, examples of specific components and arrangements are also described. These embodiments are provided for illustrative purposes only and are not intended to be limiting. For example, the following statement regarding "a first feature forming on or above a second feature" may mean "the first feature and the second feature are in direct contact," or it may mean "there are other features between the first feature and the second feature," such that the first feature and the second feature are not in direct contact. Furthermore, various embodiments of this invention may use repeated reference numerals and / or textual annotations. The use of these repeated reference numerals and annotations is for the purpose of making the description more concise and clear, and is not intended to indicate any correlation between different embodiments and / or configurations.
[0056] In addition, spatially relative terms, such as "under", "below", "lower", "above", "upper", "top", "bottom", and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the semiconductor device in use or operation in addition to the orientations depicted in the figures. The spatially relative terms can be used in the descriptions of the figures to describe the relative position and / or attitude of one element or feature to another element or feature with respect to a plane of symmetry, with respect to one another, and / or with respect to a common frame of reference. The spatially relative terms are intended to encompass different orientations of the semiconductor device in use or operation in addition to the orientations depicted in the figures. The semiconductor device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
[0057] Although the foregoing application has been described in some detail for purposes of clarity and example, it will be appreciated by persons skilled in the relevant art that various modifications, substitutions, and changes can be made without departing from the scope and spirit of the application as it is intended to be protected.
[0058] The terms "about" or "substantially" as used herein with reference to a given value or range of values generally indicate that the given value or range of values is within 20%, preferably within 10%, and more preferably within 5%, or within 3%, or within 2%, or within 1%, or within 0.5% of the given value or range of values. It should be noted that the quantities provided in the specification are approximate quantities, i.e., the meaning of "about" or "substantially" is implied where not specifically stated.
[0059] The particular ordering of steps or blocks in the processes / flowcharts disclosed below should not be construed as a requirement or limitation. Rather, the particular ordering of steps or blocks disclosed in the processes / flowcharts should be considered as an example of a possible ordering. Further, some of the steps or blocks can be combined or omitted without departing from the scope of the disclosure. The method claims should not be construed as being limited to the particular order or sequence of steps or blocks disclosed in the processes / flowcharts.
[0060] While the application has been described by way of example with reference to specific embodiments, it is to be understood that the principles and concepts disclosed can be employed in other embodiments or by applying the principles disclosed in a different manner. Therefore, the scope of the application is not to be understood as being limited to the specific embodiments disclosed but only to the scope of the claims.
[0061] Figure 1 is a top view schematic diagram of a piezoelectric micromachined ultrasonic transducer (PMUT) according to an embodiment of the present application. Referring to Figure 1 , the piezoelectric micromachined ultrasonic transducer 100 comprises at least a substrate 102, a blocking structure 104, a membrane layer 106, a truncation portion 112, a first contact pad 114 and a second contact pad 116. According to an embodiment of the present application, the blocking structure 104 can be an annular structure protruding from the top surface of the substrate 102, such that a portion of the membrane layer 106 can be attached to the blocking structure 104. The shape of the blocking structure 104 is not limited to this, and the blocking structure 104 can be a polygon or an arc shape arranged along the edge of the membrane layer 106. The membrane layer 106 can comprise a main portion 108 arranged above a cavity (not shown) and a base portion 110 arranged around the periphery of the main portion 108. The shape of the main portion 108 can be defined by the shape of the truncation portion 112, and can be any shape, such as a circle, a sector or a polygon. The blocking structure 104 can be arranged along the periphery of the truncation portion 112 and the periphery of the main portion 108. The main portion 108 of the membrane layer 106 can be a multi-layer structure comprising an electrode and a piezoelectric material. The base portion 110 is attached to the blocking structure 104, and can be considered as a portion extending from the main portion 108 of the membrane layer 106. The first contact pad 114 and the second contact pad 116 can be arranged on opposite sides of the membrane layer 106, which can be electrically coupled to the electrode of the membrane layer 106, respectively. In addition, in order to avoid the occurrence of unintended parasitic capacitance between the first contact pad 114 and the second contact pad 116, the size of the first contact pad 114 and the second contact pad 116 can be reduced as much as possible, but is not limited to this. According to an embodiment of the present application, the first contact pad 114 and the second contact pad 116 can be arranged on the same side of the membrane layer 106 or at any position, as long as the first contact pad 114 and the second contact pad 116 can be electrically coupled to the electrode of the membrane layer 106. Conductive traces (not shown) electrically coupled to the first contact pad 114 and the second contact pad 116 can be additionally arranged on the substrate 102, in order to transmit electrical signals to or from the membrane layer 106. During the operation of the piezoelectric micromachined ultrasonic transducer 100, when an acoustic wave exerts acoustic pressure on the membrane layer 106 or an electrical signal is applied to the membrane layer 106, the membrane layer 106, especially the main portion 108 of the membrane layer 106, can vibrate. By using the blocking structure 104, the size and position of the membrane layer 106 can be accurately and independently defined, regardless of the size and position of the cavity below the membrane layer 106. Therefore, the resonance frequency uniformity of each piezoelectric micromachined ultrasonic transducer 100 can be effectively improved.
[0062] Figure 2 is a cross-sectional view schematic diagram according to an embodiment of the present application along the A-A' cut line of Figure 1 . Referring to Figure 2The barrier structure 104 can protrude from the top surface 102s of the substrate 102. The substrate 102 can be a semiconductor substrate, such as a bulk silicon substrate, but is not limited thereto. The substrate 102 and the barrier structure 104 can be composed of the same material, such as single-crystalline silicon, polycrystalline silicon, amorphous silicon, glass, ceramic material, or other suitable material. According to an embodiment of the present application, the substrate 102 can be an SOI substrate. The barrier structure 104 can be disposed on the substrate 102, and the sacrificial layer 126 can surround the barrier structure 104, with the sacrificial layer 126 being composed of a different material than the substrate 102. According to an embodiment of the present application, the sacrificial layer 126 can be a dielectric layer, such as silicon oxide (SiO x ), for example, the silicon oxide (SiO x ) can be silicon dioxide (SiO2) or silicon oxide with x being other values. In addition, the top surface of the sacrificial layer 126 can be substantially aligned with the top surface of the barrier structure 104, such that the layers disposed on the sacrificial layer 126 and the barrier structure 104 can have a planar bottom surface. Referring to Figure 2 , although the width of the barrier structure 104 is much smaller than the width of the sacrificial layer 126, according to another embodiment of the present application, the width of the barrier structure 104 can be designed to be larger than the width of the sacrificial layer 126. In addition, according to another embodiment of the present application, when the width of the barrier structure 104 is large enough, a substantial portion of the sacrificial layer 126 can be replaced by the barrier structure 104. The stack layers can include a base layer 130, a dielectric layer 132, a bottom conductive layer 134, a piezoelectric layer 136, a top conductive layer 138, and a passivation layer 140, which are sequentially disposed on the substrate 102. A portion of the stack layers can be disposed on the cavity 120. The edge 120e of the cavity 120 can be adjacent to the stack layers, and the barrier structure 104 can surround the edge 120e of the cavity 120. Thus, the stack layers disposed on the cavity 120 can constitute the membrane layer 106. In addition, the membrane layer 106 can be penetrated by the cut-off portion 112, thereby releasing the stress in the stack layers. In particular, the base layer 130 of the membrane layer 106 can have the required elasticity, such that the membrane layer 106 can vibrate at a certain frequency when the acoustic wave or the electrical signal acts on the membrane layer 106. The bottom conductive layer 134 and the top conductive layer 138 of the membrane layer 106 can be electrically coupled to the first contact pad 114 and the second contact pad 116, respectively. It is noted that the mechanical behavior of the membrane layer 106 is mainly determined by the base layer 130 of the membrane layer 106, due to the thickness of the stack layers disposed on the base layer 130 being much smaller than the thickness of the base layer 130. For example, the overall thickness of the stack layers composed of the dielectric layer 132, the bottom conductive layer 134, the piezoelectric layer 136, the top conductive layer 138, and the passivation layer 140 can be only 1 / 3 to 1 / 10 of the thickness of the base layer 130 disposed thereunder.
[0063] To enable those having ordinary skill in the art with the technology to implement the present application, a method for fabricating a piezoelectric micromachined ultrasonic transducer will be further described below. Moreover, since the piezoelectric micromachined ultrasonic transducer can be fabricated by a standard CMOS process, related electronic components, such as field effect transistors, amplifiers and integrated circuits, can also be fabricated on the same substrate of the piezoelectric micromachined ultrasonic transducer by the same CMOS process.
[0064] Figure 3 is a schematic diagram showing a cross section of a substrate after forming a barrier structure according to an embodiment of the present application. Figure 10 is a flow chart showing a method for fabricating a piezoelectric micromachined ultrasonic transducer according to an embodiment of the present application. Referring to Figure 3 In step 202 of the method 200, a substrate 102 is provided, which can be selected from a semiconductor substrate or an insulating substrate according to different requirements. According to an embodiment of the present application, the substrate 102 can be a single crystal silicon substrate. Then, in step 204, a barrier structure 104 can be etched from a front surface of the substrate 102, so that the barrier structure 104 protrudes from a top surface 102s of the substrate 102. Specifically, in the process of fabricating the barrier structure 104, a photolithography and etching process can be performed. Since the size of the barrier structure 104 can be precisely defined by the photolithography technology, the distance D between two opposite points of the barrier structure 104 can also be precisely controlled. The distance D can be used to precisely control the size of the barrier structure 104 and the size of the film layer 106.
[0065] Figure 4 is a schematic diagram showing a substrate after forming a sacrificial layer according to an embodiment of the present application. Referring to Figure 4 In step 206, a sacrificial layer including a first portion 122 and a second portion 124 can be formed on the substrate 102, wherein the top surface of the barrier structure 104 is exposed to the sacrificial layer. The first portion 122 of the sacrificial layer can be surrounded by the barrier structure 104, and the second portion 124 of the sacrificial layer can be separated from the first portion 122 by the barrier structure 104. According to an embodiment of the present application, the process of forming the sacrificial layer can include the following steps: (1) depositing a sacrificial material on the substrate 102 (such as chemical vapor deposition or plasma enhanced chemical vapor deposition) so that the sacrificial material covers the top surface 104s of the barrier structure 104; and (2) planarizing the sacrificial material until the top surface 104s of the barrier structure 104 is exposed. Moreover, according to another embodiment of the present application, the process of forming the sacrificial layer can include the following steps: (1) performing a spin coating process to coat a layer of the sacrificial material on the substrate 102; and (2) etching the sacrificial material until the top surface 104s of the barrier structure 104 is exposed. Thus, by any of the above processes of forming the sacrificial layer, the top surfaces 122s and 124s of the separated portions of the sacrificial layer can be aligned with the top surface 104s of the barrier structure 104.
[0066] Then, step 208 is performed to form a film layer on the substrate 120. According to an embodiment of the present invention, step 208 may include, respectively, the following: Figure 5 and Figure 6 The sub-steps shown.
[0067] Figure 5 This is a schematic cross-sectional view illustrating the formation of a base layer on the barrier structure and sacrificial layer according to an embodiment of the present invention. (Refer to...) Figure 5 The substrate 130 can be deposited on the barrier structure 104, on the first portion 122 of the sacrificial layer, and on the second portion 124 of the sacrificial layer. The substrate 130 may comprise a material with suitable elasticity, such as crystalline silicon (c-Si), amorphous silicon (a-Si), or silicon-rich nitride (SiN). x Materials include, but are not limited to, silicon carbide (SiC), etc. Since the barrier structure 104 and sacrificial layers 122, 124 below the substrate 130 include flat top surfaces, the bottom surface of the substrate 130 can also be a flat bottom surface. In addition, to obtain a flat top surface of the substrate 130, a planarization process can be selectively performed to planarize the top surface of the substrate 130.
[0068] Figure 6 This is a schematic cross-sectional view illustrating the formation of a film layer by forming a stacked layer on a substrate, according to an embodiment of the present invention. (Refer to...) Figure 6 A dielectric layer 132, a bottom conductive layer 134, a piezoelectric layer 136, a top conductive layer 138, and a passivation layer 140 can be sequentially deposited on a substrate 130 to form a film layer 150 disposed on the substrate 120. The dielectric layer 132 may be composed of an insulating material, such as SiO2, SiON, AlN, or scandium-doped aluminum nitride (AlScN), to electrically insulate the bottom conductive layer 134 and the top conductive layer 138 from the substrate 130. According to an embodiment of the present invention, the dielectric layer 132 may also serve as a seed layer for subsequent deposition of multiple layers on the dielectric layer 132. Furthermore, the surface structure of the dielectric layer 132 may affect the crystallinity of the multiple layers deposited thereon. The bottom conductive layer 134 and the top conductive layer 138 may be the same or different materials composed of molybdenum (Mo), titanium (Ti), aluminum (Al), or platinum (Pt), but are not limited thereto. The piezoelectric layer 136 may be composed of aluminum nitride (AlN), scandium-doped aluminum nitride (AlScN), lead zirconate titanate (PZT), zinc oxide (ZnO), polyvinylidene fluoride (PVDF), or lead niobate titanate (PMN-PT), but is not limited thereto. The passivation layer 140 may be a selective layer composed of an insulating material, such as SiO2, SiON, or AlN, but is not limited thereto. Furthermore, the material of the piezoelectric layer 136 is different from that of the base layer 130.
[0069] Figure 7is a cross-sectional view of a structure after forming contact pads according to an embodiment of the present application. Referring to Figure 7 A plurality of contact holes can be formed in the membrane layer 150 to expose the bottom conductive layer 134 and the top conductive layer 136, respectively. Then, contact pads, i.e., the first contact pad 114 and the second contact pad 116, can be filled into the contact holes. In this way, the first contact pad 114 can be electrically coupled to the bottom conductive layer 134, and the second contact pad 116 can be electrically coupled to the top conductive layer 136.
[0070] Figure 8 is a cross-sectional view of a structure after forming truncations in the membrane layer according to an embodiment of the present application. Referring to Figure 8 The truncations 112 and 152 can be formed by removing a portion of the membrane layer 150. Thus, the first portion 122 of the sacrificial layer can be exposed from the bottom of the truncation 112, and a portion of the base layer 130 can be exposed from the bottom of the truncation 152. According to an embodiment of the present application, although the truncations 112 and 152 shown in Figure 8 appear to be separately arranged, the truncations 112 and 152 can also be a continuous distribution of apertures, such as an annular aperture, when the structure shown in Figure 8 is viewed from a top-down perspective. In addition, the top view shape of the truncations 112 and 152 is not limited to the shape shown in Figure 1 For example, the truncations 112 and 152 can be polygonal apertures that partially surround the membrane layer 106.
[0071] Figure 9 is a cross-sectional view of a structure after forming a cavity penetrating the substrate according to an embodiment of the present application. Referring to Figure 9 In step 210, a cavity 120 penetrating the substrate 102 can be formed by etching the back side of the substrate 102. Thus, the bottom surface of the first portion 122 of the sacrificial layer can be exposed from the cavity 120. The cavity 120 can include an opening O. The edge 120e of the cavity 120 can be adjacent to the membrane layer disposed on the front side of the substrate 102, and the edge 120e of the cavity 120 can be used to define the opening O.
[0072] The aperture length defined by the opening O can be shorter than the distance D defined by the opposite points of the blocking structure 104. Since the distance D can be used to define the position of the membrane layer in the piezoelectric micromechanical ultrasonic transducer, and the distance D is mainly defined by the blocking structure 104, even if the position or size of the opening O is slightly shifted, the position and size of the membrane layer in the piezoelectric micromechanical ultrasonic transducer will not be changed.
[0073] Afterwards, in step 212, an etching process can be performed to remove the first portion 122 of the sacrificial layer exposed to the cavity 120. When the sacrificial layer is composed of silicon oxide, the etchant can be vapor fluoric acid (VHF). As the etching selectivity ratio of the sacrificial layer to the blocking structure 104 and the base layer 130 is greater than 10, the etchant can only remove the first portion 122 of the sacrificial layer when removing the sacrificial layer exposed to the cavity 120. In addition, as the blocking structure 104 prevents the etchant from reaching the second portion 124 of the sacrificial layer, the second portion 124 of the sacrificial layer is not etched away during the etching process. Thus, a structure as shown in FIG. 1C can be obtained, which includes a released membrane. Figure 2
[0074] According to the above-mentioned embodiments of the present application, as the blocking structure 104 is formed by etching the front surface of the substrate 102, the blocking structure 104 can be closely attached to the substrate 102 without peeling off from the substrate 102 and can have a vertical sidewall. In addition, the size and position of the membrane layer 106 can be precisely defined without being affected by the size and position of the cavity 120 under the membrane layer 106, thereby effectively improving the resonance frequency uniformity between the piezoelectric micromechanical ultrasonic transducers 100 and further improving the reliability and electrical performance of the piezoelectric micromechanical ultrasonic transducers.
[0075] The above-mentioned embodiments are only preferred embodiments of the present application, and any equivalent changes and modifications made according to the claims of the present application shall fall within the scope of the present application.
Claims
1. A piezoelectric micromechanical ultrasonic transducer, characterized in that, include: A substrate, including a cavity penetrating the substrate; A barrier structure, etched from the substrate, protrudes from a top surface of the substrate and surrounds an edge of the cavity; A sacrificial layer is disposed on the top surface of the substrate and surrounds the blocking structure, with the top surface of the sacrificial layer aligned with the top surface of the blocking structure; A membrane layer is disposed on the cavity and attached to the barrier structure; as well as A truncated portion penetrates the membrane layer and surrounds a portion of the membrane layer. The substrate and the barrier structure are made of the same material, including monocrystalline silicon, polycrystalline silicon, amorphous silicon, glass, or ceramic materials, and the barrier structure is disposed along the periphery of the cut-off portion.
2. The piezoelectric micromechanical ultrasonic transducer as described in claim 1, characterized in that, The edge of the cavity is adjacent to the membrane layer.
3. The piezoelectric micromechanical ultrasonic transducer as described in claim 1, characterized in that, The barrier structure is a ring-shaped, polygonal, or arc-shaped structure disposed along one edge of the membrane layer.
4. The piezoelectric micromechanical ultrasonic transducer as described in claim 1, characterized in that, The membrane layer has a multilayer structure.
5. The piezoelectric micromechanical ultrasonic transducer as described in claim 4, characterized in that, The multi-layer structure includes: The first layer of base; A dielectric layer is disposed on the substrate; Two conductive layers are stacked on the base layer; and A piezoelectric layer is disposed between the two conductive layers.
6. The piezoelectric micromechanical ultrasonic transducer as described in claim 5, characterized in that, The composition of the base layer is different from that of the piezoelectric layer.
7. A method for fabricating a piezoelectric micromechanical ultrasonic transducer, characterized in that, include: Provide a base; The substrate is etched to form a barrier structure protruding from the substrate, the material of which includes monocrystalline silicon, polycrystalline silicon, amorphous silicon, glass, or ceramic material; A sacrificial layer is formed on the substrate, wherein the barrier structure is exposed on the sacrificial layer; A film layer is formed on the barrier structure and the sacrificial layer; A cut-off portion is formed, which penetrates the membrane layer and surrounds a portion of the membrane layer, and the blocking structure is disposed along the periphery of the cut-off portion; A cavity is formed that penetrates the substrate to expose a portion of the sacrificial layer; as well as The barrier structure is used as an etching stop structure to remove the portion of the sacrificial layer exposed in the cavity, such that the sacrificial layer surrounds the barrier structure and the top surface of the sacrificial layer is aligned with the top surface of the barrier structure.
8. The method for fabricating a piezoelectric micromechanical ultrasonic transducer as described in claim 7, characterized in that, The barrier structure is a ring-shaped, polygonal, or arc-shaped structure disposed along one edge of the membrane layer.
9. The method for fabricating a piezoelectric micromechanical ultrasonic transducer as described in claim 7, characterized in that, The substrate and the barrier structure are made of the same material.
10. The method for fabricating a piezoelectric micromechanical ultrasonic transducer as described in claim 7, characterized in that, The step of forming the sacrificial layer on the substrate includes: Deposit a sacrificial material onto the substrate and the barrier structure; and The sacrificial material is planarized to expose the barrier structure.
11. The method for fabricating a piezoelectric micromechanical ultrasonic transducer as described in claim 7, characterized in that, The membrane layer has a multilayer structure, and the membrane layer includes: The first layer of base; A dielectric layer is disposed on the substrate; Two conductive layers are stacked on the base layer; and A piezoelectric layer is disposed between the two conductive layers.
12. The method for fabricating a piezoelectric micromechanical ultrasonic transducer as described in claim 7, characterized in that, When the step of forming the sacrificial layer on the substrate is completed, the sacrificial layer comprises: A first part, surrounded by the blocking structure; and A second part is separated from the first part by the blocking structure.
13. The method for fabricating a piezoelectric micromechanical ultrasonic transducer as described in claim 12, characterized in that, When the step of removing the portion of the sacrificial layer exposed to the cavity is completed, the second portion of the sacrificial layer is retained on the substrate.
14. The method for fabricating a piezoelectric micromechanical ultrasonic transducer as described in claim 7, characterized in that, In the step of removing the portion of the sacrificial layer exposed in the cavity, the etch selectivity ratio between the sacrificial layer and the barrier structure is greater than 10.
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