A power supply noise suppression circuit, suppression method and image sensor

Abstract

The present invention relates to a power supply noise suppression circuit and a suppression method, including a pixel circuit, a mirror power supply noise circuit, and a comparator; an image signal superimposed with a first power supply noise signal of a power supply is input to a first input terminal of the comparator in the pixel circuit, and a comparison signal superimposed with a second power supply noise signal of the power supply is input to a second input terminal of the comparator in the mirror power supply noise circuit, and the amplitude of the second power supply noise signal is the same as that of the first power supply noise signal; the mirror power supply noise circuit includes a mirror circuit and a gain amplification circuit, the mirror circuit is used to convert the noise voltage of the power supply into a compensation current, and the gain amplification circuit is used to amplify the compensation current and convert it into a voltage, and output the comparison signal to the second input terminal of the comparator. The present invention suppresses the power supply noise of the source follower transistor in the pixel circuit through the power supply noise of the power supply in the mirror power supply noise circuit, and can effectively resist power supply noise interference, reduce image noise, and improve the quality of the image.

Description

Technical Field

[0001] The present invention relates to the field of electronic circuits of image sensors, and particularly to a power supply noise suppression circuit, a suppression method and an image sensor. Background Art

[0002] Image sensors are commonly used in a variety of electronic devices, such as video surveillance systems, smart phones, digital cameras, and various electronic products such as intelligent AI and face recognition, to capture and identify image information of people or scenes. As an important part of a digital camera, it provides the conversion of an optical image into an electrical signal. Image sensors can be classified into CMOS (Complementary Metaloxide Semiconductor) and CCD (Charge Coupled Device) image sensors according to different components.

[0003] CMOS image sensors have the advantages of high integration, low power consumption, local pixel programmable random access, high speed, and low cost, and can be applied to fields such as digital cameras, PC cameras, and mobile communication products. In addition to being widely used in digital cameras, CCD image sensors are also widely used in scanners and industrial fields. Both CMOS image sensors and CCD image sensors use a photoelectric conversion region, generally using a photodiode (Photodiode or Photodetector) to collect incident light and convert it into photo charges that can be processed for image processing. In existing CMOS image sensors, a pixel array composed of several pixel units often adopts a 3T, 4T or 5T structure. Taking 4T as an example, it consists of a transfer transistor, a reset transistor, a source follower transistor, and a row strobe transistor. The pixel unit performs photoelectric conversion through a photodiode to form photo carriers, generates an analog signal, reads out the analog signal of each column by row strobe of the pixel array, and performs subsequent signal processing processes such as arithmetic gain amplification and analog-to-digital conversion.

[0004] During the actual operation of an image sensor, the noise of the power supply of the source follower transistor (SF transistor) in the pixel circuit is capacitively coupled to the floating diffusion node (FD) of the pixel unit, and then the signal is amplified by the source follower transistor. After being converted by the analog-to-digital conversion module, it is reflected in the output data, affecting the signal-to-noise ratio of the image. The existing processing method is to separately set an LDO (Low Dropout Regulator) for the pixel circuit to reduce the impact of external power supply noise on the image quality. If the output of the LDO is affected, the power supply noise will still be reflected in the image. Therefore, when using an LDO to solve the power supply noise, when the chip interference is large, the stabilization speed of this method is limited. During the stabilization process, the power supply noise will still be reflected in the image, and the LDO also occupies a large layout area, consumes power and limits the use of the power supply by other modules, which may lead to a decline in the performance of the image sensor chip. Summary of the Invention

[0005] In view of this, the present invention provides a power supply noise suppression circuit, a suppression method and an image sensor, which can effectively suppress the power supply noise interference of the source follower transistor of the image sensor, reduce the image noise and improve the image quality.

[0006] To achieve the above object, a first aspect of an embodiment of the present invention provides a power supply noise suppression circuit. As one of the implementation manners, the circuit includes a pixel circuit, a mirror power supply noise circuit and a comparator; an image signal with a first power supply noise signal of the power supply superimposed thereon in the pixel circuit is input to a first input terminal of the comparator, and a comparison signal with a second power supply noise signal of the power supply superimposed thereon in the mirror power supply noise circuit is input to a second input terminal of the comparator. The second power supply noise signal has the same amplitude as the first power supply noise signal to cancel the noise in the pixel circuit.

[0007] Among them, the mirror power supply noise circuit includes a mirror circuit and a gain amplification circuit. The mirror circuit is used to convert the noise voltage of the power supply into a compensation current, and the gain amplification circuit is used to amplify the compensation current and convert it into a voltage to output a comparison signal with the second power supply noise signal of the power supply superimposed thereon to the second input terminal of the comparator.

[0008] As one of the implementation manners, the mirror circuit includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor and a second NMOS transistor.

[0009] The source of the first PMOS transistor and the source of the second PMOS transistor are commonly connected to a first power supply voltage. The gate of the first PMOS transistor is connected to the gate of the second PMOS transistor. The gate of the first PMOS transistor is connected to its drain. The drain of the first transistor is connected to the drain of the first NMOS transistor. The drains of the second PMOS transistor and the second NMOS transistor are connected to the output terminal of the mirror circuit. The gate of the first NMOS transistor is connected to the first input terminal of the mirror circuit through a first capacitor. The gate of the second NMOS transistor is connected to the second input terminal of the mirror circuit through a second capacitor. The source of the first NMOS transistor is grounded through a first resistor and a first current source. The source of the second NMOS transistor is grounded through a second resistor and the first current source.

[0010] Wherein, the first input terminal of the mirror circuit is connected to a DC voltage, and the second input terminal of the mirror circuit is connected to the power supply.

[0011] As one implementation, the mirror circuit further includes a third resistor. The gate of the second NMOS transistor is connected to the second input terminal of the mirror circuit through the second capacitor and the third resistor.

[0012] As one implementation, the first input terminal of the comparator is the inverting input terminal, and the second input terminal of the comparator is the non-inverting input terminal.

[0013] As one implementation, the gain amplification circuit includes a third PMOS transistor, a fourth PMOS transistor, and a variable resistor.

[0014] The sources of the third PMOS transistor and the fourth PMOS transistor are commonly connected to the first power supply voltage. The gates of the third PMOS transistor and the fourth PMOS transistor and the drain of the third PMOS transistor are connected to the output terminal of the mirror circuit. The drain of the third PMOS transistor is further connected to a second current source. The drain of the fourth PMOS transistor is connected to the first end of the variable resistor and the second input terminal of the comparator. The second end of the variable resistor is grounded.

[0015] As one implementation, the gain amplification circuit further includes a fourth resistor. The drain of the third PMOS transistor is connected to the second current source through the fourth resistor.

[0016] As one of the embodiments, the gain amplification circuit further includes a plurality of PMOS transistors and a plurality of switches. The sources of each PMOS transistor are commonly connected to the first power supply voltage. The gates of each PMOS transistor are connected to the output terminal of the mirror circuit. The drains of each PMOS transistor are connected to the drain of the fourth PMOS transistor through a switch.

[0017] As one of the embodiments, the pixel circuit includes a third capacitor and a fourth capacitor connected to the source follower transistor. The third capacitor is the parasitic capacitance between the power supply noise of the power supply and the floating diffusion node. The fourth capacitor is all the parasitic capacitances on the floating diffusion node minus the third capacitor.

[0018] As one of the embodiments, the gain of the comparison signal superimposed with the second power supply noise signal is:

[0019]

[0020] The gain of the comparison signal superimposed with the first power supply noise signal is:

[0021]

[0022] Wherein, vcmp is the comparison signal superimposed with the second power supply noise signal, vsig is the image signal superimposed with the second power supply noise signal, vnoi is the noise voltage, C 1 is the third capacitor, C fd is the fourth capacitor, Z 0 is the resistance value of the third PMOS transistor, Z L is the resistance value of the adjustable resistor, W / L Mi is the aspect ratio (i.e., the resistance value) of the fourth PMOS transistor and the PMOS transistors selected by the plurality of switches, W / L M0 is the aspect ratio of the third PMOS transistor, n is the total number of the fourth PMOS transistor and the PMOS transistors selected by the plurality of switches, gm sf is the transconductance of the source follower transistor, gmb sf is the small-signal body transconductance characterizing the source follower transistor, which is related to the voltage difference between the body terminal and the source terminal. When the body terminal and the source terminal are connected together, gmb sf is equal to 0. By adjusting W / L Mi and Z L to minimize the absolute value of the difference between vcmp / vnoi and vsig / vnoi for noise suppression.

[0023] To achieve the above object, a second aspect of the embodiments of the present invention provides an image sensor, including the image sensor noise suppression circuit according to any of the above embodiments.

[0024] To achieve the above object, a third aspect of the embodiments of the present invention provides an image sensor noise suppression method based on the image sensor noise suppression circuit described in the first aspect of the embodiments of the present invention, including:

[0025] Convert the noise voltage of the power supply into a compensation current, and then convert the compensation current into a voltage after gain amplification to obtain a comparison signal superimposed with the second power supply noise signal, where the second power supply noise signal has the same amplitude as the first power supply noise signal of the power supply in the pixel circuit;

[0026] Input the image signal superimposed with the first power supply noise signal into the first input terminal of the comparator, and input the comparison signal superimposed with the second power supply noise signal into the second input terminal of the comparator to cancel the power supply noise of the pixel circuit.

[0027] In summary, the present invention sets a pixel circuit, a mirror power supply noise circuit and a comparator. The image signal superimposed with the first power supply noise signal of the power supply in the pixel circuit is input into the first input terminal of the comparator, and the comparison signal superimposed with the second power supply noise signal in the mirror power supply noise circuit is input into the second input terminal of the comparator, and the second power supply noise signal has the same amplitude as the first power supply noise signal; wherein, the mirror power supply noise circuit includes a mirror circuit and a gain amplification circuit. The mirror circuit is used to convert the noise voltage of the power supply into a compensation current, and the gain amplification circuit is used to convert the compensation current into a voltage after gain amplification to output a comparison signal superimposed with the second power supply noise signal to the second input terminal of the comparator. Therefore, the present invention uses the power supply noise of the power supply in the mirror power supply noise circuit to suppress the power supply noise of the source follower transistor in the pixel circuit, and can effectively resist power supply noise interference, reduce image noise and improve the quality of the image. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 Shows a block diagram of the structure of an image sensor noise suppression circuit provided by an embodiment of the present invention.

[0029] Figure 2 Shows a schematic diagram of the specific structure of an image sensor noise suppression circuit provided by an embodiment of the present invention.

[0030] Figure 3 Shows a schematic diagram of an image sensor noise suppression method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0031] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Apparently, the described embodiments are some, but not all, of the embodiments of the present invention. They are merely used to explain the present invention and not to limit it. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention. In this patent specification, "one embodiment" or "one implementation manner" means that the specific features, structures or characteristics described in combination with the examples are included in at least one embodiment of the present invention.

[0032] Please refer to Figure 1 , Figure 1 which shows a structural block diagram of an image sensor noise suppression circuit provided by an embodiment of the present invention. As Figure 1 shown, the image sensor noise suppression circuit includes a pixel circuit 11, a mirror power supply noise circuit 12 and a comparator 13. The image signal with the first power supply noise signal of the power supply superimposed thereon output by the pixel circuit 11 is input to the first input terminal of the comparator 13, and the comparison signal with the second power supply noise signal of the power supply superimposed thereon output by the mirror power supply noise circuit 12 is input to the second input terminal of the comparator 13. Among them, the second power supply noise signal has the same amplitude as the first power supply noise signal to cancel the noise in the pixel circuit. Among them, the mirror power supply noise circuit 12 includes a mirror circuit 121 and a gain amplification circuit 122. The mirror circuit 121 is used to convert the noise voltage of the power supply into a compensation current, and the gain amplification circuit 122 is used to amplify the compensation current and then convert it into a voltage to output a comparison signal with the second power supply noise signal superimposed thereon to the second input terminal of the comparator.

[0033] Specifically, the pixel circuit can be a 3T, 4T, 5T or other structure. No matter which structure it is, power supply noise will be generated in the pixel circuit, affecting the signal-to-noise ratio of the image. Taking the pixel circuit with a 4T structure as an example for illustration, please refer to Figure 2 , Figure 2 which shows a specific structural schematic diagram of an image sensor noise suppression circuit provided by an embodiment of the present invention. As Figure 2As shown, the pixel circuit 11 includes a photodiode PD1, a transfer transistor TX, a reset transistor RST, a source follower transistor SF, and a row selection transistor SEL. The photodiode PD1 is connected to the source of the transfer transistor TX. The reset is powered by connecting the common connection of RST and the drain of the source follower transistor SF to the power supply Vnoi. The drain of the transfer transistor TX, the source of the reset transistor RST, and the gate of the source follower transistor SF are connected to the floating diffusion node FD. The source of the source follower transistor SF is connected to the drain of the row selection transistor SEL, and the source of the row selection transistor SEL is grounded through a current source. Among them, the pixel unit further includes a capacitor C1 connected between the power supply Vnoi and the floating diffusion node FD, and a capacitor Cfd connected between the floating diffusion node FD and the ground. The capacitor C1 is the parasitic capacitance between the power supply Vnoi and the floating diffusion node FD, and Cfd is all the parasitic capacitances on the floating diffusion node FD minus the capacitor C1.

[0034] The capacitor C1 couples the power supply noise of the power supply Vnoi to the floating diffusion node FD and outputs it to the first input terminal of the comparator 13 through the source follower transistor SF, that is, the source of the source follower transistor SF is connected to the node visg, and the first input terminal of the comparator 13 is connected to the node vsig. Therefore, the first power supply noise signal of the power supply Vnoi in the pixel circuit is superimposed on the image signal and input to the first input terminal of the comparator 13. Then, the second power supply noise signal of the power supply Vnoi in the mirror power supply noise circuit 12 is superimposed on the comparison signal and input to the second input terminal of the comparator 13, that is, the output terminal of the mirror power supply noise circuit 12 is connected to the node of the ramp signal vcmp and then connected to the second input terminal of the comparator 13. By making the gain of the comparison signal superimposed with the second power supply noise signal at the node vcmp equal to the gain of the image signal superimposed with the first power supply noise signal at the node vsig, the noise is mutually cancelled, and thus the power supply noise of the power supply Vnoi in the pixel circuit is eliminated.

[0035] It is worth mentioning that the situation where the gain of the comparison signal superimposed with the second power supply noise signal at the node vcmp is equal to the gain of the image signal superimposed with the first power supply noise signal at the node vsig is the optimal case.

[0036] In an embodiment, the first input terminal of the comparator 13 is an inverting input terminal, and the second input terminal of the comparator 13 is a non-inverting input terminal.

[0037] For the specific circuit diagrams of the mirror circuit 121 and the gain amplifier circuit 122 in the mirror power supply noise circuit 12, please refer to Figure 2 ,such as Figure 2As shown, in one embodiment, the mirror circuit 121 includes a first PMOS transistor Mp1, a second PMOS transistor Mp2, a first NMOS transistor Mn1, and a second NMOS transistor Mn2. The sources of the first PMOS transistor Mp1 and the second PMOS transistor Mp2 are commonly connected to a first power supply voltage VDD. The gates of the first PMOS transistor Mp1 and the second PMOS transistor Mp2 are connected. The gate and the drain of the first PMOS transistor Mp1 are connected. The drain of the first PMOS transistor Mp1 is connected to the drain of the first NMOS transistor Mn1. The drains of the second PMOS transistor Mp2 and the second NMOS transistor Mn2 are connected to the output terminal of the mirror circuit. The gate of the first NMOS transistor Mn1 is connected to the first input terminal of the mirror circuit through a first capacitor Cd1. The gate of the second NMOS transistor Mn2 is connected to the second input terminal of the mirror circuit through a second capacitor Cd2. The source of the first NMOS transistor Mn1 is grounded through a first resistor R1 and a current source. The source of the second NMOS transistor Mn2 is grounded through a second resistor R2 and a current source. Wherein, the first input terminal of the mirror circuit 121 is connected to a DC voltage VDC, and the second input terminal of the mirror circuit 121 is connected to a power supply Vnoi. Therefore, the mirror circuit 121 provides a varying current generated by the noise voltage of the power supply Vnoi, creating a variable related to the power supply noise.

[0038] In one embodiment, the mirror circuit 121 further includes a third resistor R3 ( Figure 2 not shown in the figure), and the gate of the second NMOS transistor Mn2 is connected to the second input terminal of the mirror circuit through the second capacitor Cd2 and the third resistor R3.

[0039] Please continue to refer to Figure 2 , as Figure 2 shown, in one embodiment, the gain amplifier circuit 122 includes a third PMOS transistor M0, a fourth PMOS transistor M1, and a variable resistor RL. The sources of the third PMOS transistor M0 and the fourth PMOS transistor M1 are commonly connected to a first power supply voltage VDD. The gates of the third PMOS transistor M0, the fourth PMOS transistor M1, and the drain of the third PMOS transistor M0 are connected to the output terminal of the mirror circuit 121. The drain of the third PMOS transistor M0 is further connected to a second current source, and the second current source provides a bias current for the third PMOS transistor M0. The drain of the fourth PMOS transistor M1 is connected to the first end of the variable resistor RL and the second input terminal of the comparator 13, and the second end of the variable resistor RL is grounded.

[0040] Specifically, in the gain amplification circuit 122, the third PMOS transistor M0 converts the current output by the mirror circuit 121 into a voltage, and then the fourth PMOS transistor M1 converts the voltage into an amplified current. The adjustable resistor RL converts the current back into a voltage and outputs it to the second input terminal of the comparator 13.

[0041] In one embodiment, the gain amplification circuit 122 further includes a fourth resistor. The drain of the third PMOS transistor M0 is connected to the second current source through the fourth resistor.

[0042] In one embodiment, the gain amplification circuit 122 further includes a plurality of PMOS transistors and a plurality of switches. The sources of each PMOS transistor are commonly connected to the first power supply voltage VDD. The gates of each PMOS transistor are connected to the output terminal of the mirror circuit 121. The drains of each PMOS transistor are connected to the drain of the fourth PMOS transistor M1 through a switch.

[0043] Specifically, please refer to Figure 2 , in this embodiment, the third PMOS transistor M0 converts the compensation current output by the mirror circuit 121 into a voltage, and then the fourth PMOS transistor M1 and the plurality of PMOS transistors M2-Mn convert the voltage into an amplified current. The adjustable resistor RL converts the current back into a voltage and outputs it to the second input terminal of the comparator 13, where the PMOS transistors M2-Mn are gated through switches. That is, by adjusting the adjustable resistor and the PMOS transistors M1-Mn, the gain of the comparison signal superimposed with the second power supply noise signal is made the same as the gain of the image signal superimposed with the first power supply noise signal. In this embodiment, the gain of the comparison signal superimposed with the second power supply noise signal at the node vcmp is:

[0044]

[0045] The gain of the image signal superimposed with the first power supply noise signal at the node vsig is:

[0046]

[0047] Wherein, in the formula, vcmp represents the comparison signal superimposed with the second power supply noise signal, vsig represents the image signal superimposed with the second power supply noise signal, vnoi is the noise voltage, C 1 is the third capacitor, C fd is the fourth capacitor, Z 0 is the resistance value of the third PMOS transistor, Z L is the resistance value of the adjustable resistor, W / L Mi is the aspect ratio (i.e., the resistance value) of the fourth PMOS transistor and the PMOS transistors selected by the plurality of switches, W / L M0is the aspect ratio of the third PMOS transistor, n is the total number of PMOS transistors selected by the fourth PMOS transistor and multiple switches, gm sf is the transconductance of the source follower transistor, gmb sf is a small-signal body transconductance characterizing the source follower transistor, which is related to the voltage difference between the body terminal and the source terminal. When the body terminal and the source terminal are connected together, gmb sf equals 0. By adjusting W / L Mi and Z L minimize the absolute value of the difference between vcmp / vnoi and vsig / vnoi for noise suppression. The best case is when the difference between the two gains is 0. When the two gains are the same, the power supply noise of the power supply reaches the two input terminals of the comparator respectively, that is, the image signal superimposed with the first power supply noise signal and the comparison signal superimposed with the second power supply noise signal are respectively input to the two input terminals of the comparator. Because their amplitudes are the same and the signs are the same, they cancel each other out through the comparator, achieving the purpose of suppressing the power supply noise of the pixel unit power supply.

[0048] Therefore, the image sensor noise suppression circuit provided by the embodiment of the present invention inputs the image signal superimposed with the first power supply noise signal of the power supply in the pixel circuit to the first input terminal of the comparator by setting a pixel circuit, a mirror power supply noise circuit and a comparator, and inputs the comparison signal superimposed with the second power supply noise signal of the power supply in the mirror power supply noise circuit to the second input terminal of the comparator. And the second power supply noise signal has the same amplitude as the first power supply noise signal. Among them, the mirror power supply noise circuit includes a mirror circuit and a gain amplification circuit. The mirror circuit is used to convert the noise voltage of the power supply into a compensation current, and the gain amplification circuit is used to amplify the compensation current by gain and then convert it into a voltage to output a comparison signal superimposed with the second power supply noise signal of the power supply to the second input terminal of the comparator. Therefore, the present invention uses the power supply noise of the power supply in the mirror power supply noise circuit to suppress the power supply noise of the source follower transistor in the pixel circuit, which can effectively resist power supply noise interference, reduce image noise and improve image quality.

[0049] This application also provides an image sensor, which includes the image sensor noise suppression circuit in any of the above embodiments.

[0050] Based on Figure 1 - Figure 2 the above-mentioned image sensor noise suppression circuit, this application also provides an image sensor noise suppression method. Please refer to Figure 3 , Figure 3 which shows a schematic diagram of the image sensor noise suppression method provided by an embodiment of the present invention. As Figure 3 shown, the method includes:

[0051] Step S1: Convert the noise voltage of the power supply into a compensation current, then amplify the compensation current and convert it into a voltage to obtain a comparison signal superimposed with a second power supply noise signal, such that the amplitude of the second power supply noise signal is the same as that of the first power supply noise signal of the power supply in the pixel circuit;

[0052] Step S2: Input the image signal superimposed with the first power supply noise signal into the first input terminal of the comparator, and input the comparison signal superimposed with the second power supply noise signal into the second input terminal of the comparator to cancel out the power supply noise of the pixel circuit.

[0053] The image sensor noise suppression method provided by the embodiments of the present invention obtains a second power supply noise signal with the same amplitude as the first power supply noise signal of the power supply in the pixel circuit through a mirror power supply noise circuit. The image signal superimposed with the first power supply noise signal is input into the first input terminal of the comparator, and the comparison signal superimposed with the second power supply noise signal is input into the second input terminal of the comparator to cancel out the power supply noise of the pixel circuit. Among them, the mirror power supply noise circuit includes a mirror circuit and a gain amplification circuit. The mirror circuit is used to convert the noise voltage of the power supply into a compensation current, and the gain amplification circuit is used to amplify the compensation current and convert it into a voltage to output a comparison signal superimposed with the second power supply noise signal of the power supply to the second input terminal of the comparator. Therefore, the present invention uses the power supply noise of the power supply in the mirror power supply noise circuit to suppress the power supply noise of the source follower transistor in the pixel circuit, which can effectively resist power supply noise interference, reduce image noise, and improve the quality of the image.

[0054] The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the specific details in the above embodiments. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solutions of the present invention, and these simple modifications all fall within the protection scope of the present invention. Among the various specific technical features described in the above specific embodiments, they can be combined in any suitable manner without conflict. To avoid unnecessary repetition, the present invention will not separately describe various possible combination methods.

Claims

1. An image sensor noise suppression circuit, characterized in that, the circuit includes a pixel circuit, a mirror power supply noise circuit and a comparator; the pixel circuit outputs an image signal superimposed with a first power supply noise signal of a power supply to a first input end of the comparator, and the mirror power supply noise circuit outputs a comparison signal superimposed with a second power supply noise signal of the power supply to a second input end of the comparator. The second power supply noise signal has the same amplitude as the first power supply noise signal to cancel the noise in the pixel circuit; wherein, the mirror power supply noise circuit includes a mirror circuit and a gain amplification circuit. The mirror circuit is used to convert the noise voltage of the power supply into a compensation current, and the gain amplification circuit is used to amplify the compensation current in gain and then convert it into a voltage to output a comparison signal superimposed with the second power supply noise signal of the power supply to the second input end of the comparator; the mirror circuit includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor and a second NMOS transistor. The source electrodes of the first PMOS transistor and the second PMOS transistor are commonly connected to a first power supply voltage. The gate electrodes of the first PMOS transistor and the second PMOS transistor are connected. The gate electrode of the first PMOS transistor is connected to its drain electrode. The drain electrode of the first PMOS transistor is connected to the drain electrode of the first NMOS transistor. The drain electrodes of the second PMOS transistor and the second NMOS transistor are connected to the output end of the mirror circuit. The gate electrode of the first NMOS transistor is connected to the first input end of the mirror circuit through a first capacitor. The gate electrode of the second NMOS transistor is connected to the second input end of the mirror circuit through a second capacitor. The source electrode of the first NMOS transistor is grounded through a first resistor and a first current source. The source electrode of the second NMOS transistor is grounded through a second resistor and the first current source; the gain amplification circuit includes a third PMOS transistor, a fourth PMOS transistor and a variable resistor. The source electrodes of the third PMOS transistor and the fourth PMOS transistor are commonly connected to the first power supply voltage. The gate electrodes of the third PMOS transistor and the fourth PMOS transistor and the drain electrode of the third PMOS transistor are connected to the output end of the mirror circuit. The drain electrode of the third PMOS transistor is further connected to a second current source. The drain electrode of the fourth PMOS transistor is connected to the first end of the variable resistor and the second input end of the comparator. The second end of the variable resistor is grounded.

2. The image sensor noise suppression circuit according to claim 1, characterized in that, the first input end of the mirror circuit is connected to a DC voltage, and the second input end of the mirror circuit is connected to the power supply.

3. The image sensor noise suppression circuit according to claim 2, characterized in that, The mirror circuit further includes a third resistor, and the gate of the second NMOS transistor is connected to the second input end of the mirror circuit through a second capacitor and the third resistor.

4. The image sensor noise suppression circuit according to claim 1, wherein, the first input end of the comparator is an inverting input end, and the second input end of the comparator is a non-inverting input end.

5. The image sensor noise suppression circuit according to claim 1, wherein, the gain amplification circuit further includes a fourth resistor, and the drain of the third PMOS transistor is connected to a second current source through the fourth resistor.

6. The image sensor noise suppression circuit according to claim 1, wherein, the gain amplification circuit further includes a plurality of PMOS transistors and a plurality of switches. The sources of each PMOS transistor are commonly connected to the first power supply voltage, the gates of each PMOS transistor are connected to the output end of the mirror circuit, and the drains of each PMOS transistor are connected to the drain of the fourth PMOS transistor through a switch.

7. The image sensor noise suppression circuit according to claim 6, wherein, the pixel circuit includes a third capacitor and a fourth capacitor connected to the source follower transistor. The third capacitor is the parasitic capacitance between the power supply noise of the power supply and the floating diffusion node, and the fourth capacitor is all the parasitic capacitances on the floating diffusion node minus the third capacitor.

8. The image sensor noise suppression circuit according to claim 7, wherein, the gain of the comparison signal superimposed with the second power supply noise signal is: the gain of the comparison signal superimposed with the first power supply noise signal is: Among them, vcmp is the comparison signal superimposed with the second power supply noise signal, vsig is the image signal superimposed with the second power supply noise signal, vnoi is the noise voltage, C 1 is the third capacitor, C fd is the fourth capacitor, Z 0 is the resistance value of the third PMOS transistor, Z L is the resistance value of the adjustable resistor, W / L Mi is the aspect ratio (i.e., the resistance value) of the fourth PMOS transistor and the PMOS transistors selected by multiple switches, W / L M0 is the aspect ratio of the third PMOS transistor, n is the total number of the fourth PMOS transistor and the PMOS transistors selected by multiple switches, gm sf is the transconductance of the source follower transistor, gmb sf is the small-signal body transconductance characterizing the source follower transistor, which is related to the voltage difference between the body terminal and the source terminal. When the body terminal and the source terminal are connected together, gmb sf is equal to 0. By adjusting W / L Mi and Z L the absolute value of the difference between vcmp / vnoi and vsig / vnoi is minimized for noise suppression.

9. An image sensor, wherein, it includes the image sensor noise suppression circuit according to any one of claims 1-8.

10. An image sensor noise suppression method based on the image sensor noise suppression circuit according to any one of claims 1-8, wherein, it includes: converting the noise voltage of the power supply into a compensation current, and then converting the compensation current into a voltage after gain amplification to obtain a comparison signal superimposed with the second power supply noise signal, where the second power supply noise signal has the same amplitude as the first power supply noise signal of the power supply in the pixel circuit; inputting the image signal superimposed with the first power supply noise signal into the first input end of the comparator, and inputting the comparison signal superimposed with the second power supply noise signal into the second input end of the comparator to cancel the power supply noise of the pixel circuit.

Images