Embedded Component Structure and Its Manufacturing Method

Abstract

The present invention provides an embedded component structure, including a circuit board, a chip, and a heat dissipation member. The chip is embedded in the circuit board. The heat dissipation member surrounds the chip. The chip, the circuit board, and the heat dissipation member are electrically connected. The heat dissipation member includes a first part, a second part, and a third part located between the first part and the second part. The first part is in direct contact with the side wall of the chip. The second part is a ground terminal. Another manufacturing method of the embedded component structure is also provided.

Description

Technical Field

[0001] The present invention relates to an electronic component and a manufacturing method thereof, and particularly to an embedded component structure and a manufacturing method thereof. Background Art

[0002] In recent years, in electronic products, embedded chips are usually used to reduce the loading area on a circuit board. However, since the materials around the embedded chips are usually poor in thermal conductivity (such as resin), it is often impossible to effectively discharge the waste heat properly. In addition, with the improvement of chip performance, the power consumption of the chips also increases, making the problem of waste heat accumulation in the chips more obvious.

[0003] Furthermore, when the chips are operating, a large amount of heat is easily generated. If this heat is not discharged properly, it is easy to cause the chips to have a shortened lifespan or even be damaged due to high temperature. Therefore, how to effectively discharge the waste heat to reduce the problem of shortened lifespan or even damage of the chips due to overheating has become a major challenge for researchers in this field. Summary of the Invention

[0004] The present invention is directed to an embedded component structure and a manufacturing method thereof, which can effectively discharge the waste heat to reduce the problem of shortened lifespan or even damage of the chips due to overheating.

[0005] According to an embodiment of the present invention, an embedded component structure includes a circuit board, a chip, and a heat dissipation member. The chip is embedded in the circuit board. The heat dissipation member surrounds the chip. The chip, the circuit board, and the heat dissipation member are electrically connected. The heat dissipation member includes a first part, a second part, and a third part located between the first part and the second part. The first part is in direct contact with the sidewall of the chip. The second part is a ground terminal.

[0006] In an embodiment of the present invention, the above heat dissipation member penetrates through the circuit board.

[0007] In an embodiment of the present invention, the above first part and the third part form a groove, and the chip is disposed in the groove.

[0008] In an embodiment of the present invention, the above chip has an active surface and a back surface opposite to the active surface, and the active surface is disposed upward in the groove.

[0009] In an embodiment of the present invention, the back surface of the above chip faces the third part.

[0010] In an embodiment of the present invention, the above third part is a part of the circuit board.

[0011] In an embodiment of the present invention, the materials of the above first part and the second part are substantially the same.

[0012] In an embodiment of the present invention, the thermal conductivity of the above material is between 200 W / (m*K) and 500 W / (m*K).

[0013] In an embodiment of the present invention, the above material is copper.

[0014] In an embodiment of the present invention, when viewed from above, the above heat dissipation member is a closed ring.

[0015] According to an embodiment of the present invention, a manufacturing method of an embedded component structure at least includes the following steps. Provide a circuit board having a through groove. The circuit board has opposite first and second surfaces. The circuit board includes a heat dissipation layer, wherein the heat dissipation layer has opposite upper and lower surfaces. The through groove exposes the upper surface of the heat dissipation layer. Dispose a chip in the through groove. Form a dielectric layer on the first and second surfaces to seal the chip and cover the lower surface of the heat dissipation layer. Remove a first part of the dielectric layer to form a first opening exposing the upper surface of the heat dissipation layer and a second opening exposing the lower surface of the heat dissipation layer. Form a thermal conductive material layer in the first and second openings to constitute a heat dissipation member surrounding the chip, wherein the chip, the circuit board, and the heat dissipation member are electrically connected.

[0016] In an embodiment of the present invention, the above heat dissipation member includes a first part, a second part, and a third part located between the first part and the second part. The thermal conductive material layer in the first opening is the first part. The thermal conductive material layer in the second opening is the second part. The heat dissipation layer is the third part.

[0017] In an embodiment of the present invention, the above chip is disposed in the through groove with an adhesive layer.

[0018] In an embodiment of the present invention, the above first opening exposes the sidewall and the active surface of the chip.

[0019] In an embodiment of the present invention, the step of the above first opening exposing the sidewall and the active surface of the chip includes, after removing the first part of the dielectric layer, removing the second part of the dielectric layer to expand the first opening to expose the sidewall and the active surface of a part of the chip.

[0020] In an embodiment of the present invention, the sidewall and the active surface of the chip are not exposed after removing the first part of the dielectric layer.

[0021] In an embodiment of the present invention, the above second part of the dielectric layer is removed by performing a plasma process and a desmear process.

[0022] In an embodiment of the present invention, removing the first part of the dielectric layer further includes forming a plurality of vias exposing pads on the active surface of the chip, and forming a thermal conductive material layer in the plurality of vias to constitute a plurality of conductive terminals, wherein the plurality of conductive terminals are electrically connected to the circuit board.

[0023] In an embodiment of the present invention, when viewed from above, the plurality of conductive terminals are columnar structures.

[0024] In an embodiment of the present invention, the plurality of conductive terminals further include extending portions extending towards the chip edge.

[0025] Based on the above, the embedded component structure of the present invention can effectively discharge waste heat through the design of the heat dissipation member, so as to reduce the problem that the chip has a shortened lifespan or even is damaged due to overheating. Further, the heat dissipation member surrounds the chip and its first part is in direct contact with the side wall of the chip, enabling the chip to directly contact the heat dissipation member with better thermal conductivity. Therefore, the heat dissipation path of the chip can be shortened to effectively discharge waste heat and reduce the problem that the chip has a shortened lifespan or even is damaged due to overheating. In addition, since the heat dissipation member surrounds the chip and the second part of the heat dissipation member is a grounding terminal, the embedded component structure of the present invention can further have an electromagnetic shielding effect, improve the phenomenon of signal attenuation caused by electromagnetic interference, and have better signal integrity.

[0026] To make the above features and advantages of the present invention more obvious and understandable, specific embodiments are hereinafter given and described in detail in conjunction with the accompanying drawings as follows. Description of the Drawings

[0027] Figures 1A to 1F is a partial cross-sectional schematic view of a partial manufacturing method of an embedded component structure according to an embodiment of the present invention.

[0028] Figure 1G is Figure 1D a top view schematic diagram of area A of

[0029] Figure 1H is Figure 1E a top view schematic diagram of area B of

[0030] Figure 1I is Figure 1F a top view schematic diagram of area C of

[0031] Figures 2A to 2C is Figure 1A a partial cross-sectional schematic view of a manufacturing method of a circuit board of

[0032] Figure 3 is a top view schematic diagram of an embedded component structure according to another embodiment of the present invention.

[0033] Figure 4 is a partial cross-sectional schematic view of an embedded component structure according to still another embodiment of the present invention. Detailed Description of the Embodiments

[0034] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same component symbols are used in the drawings and the description to represent the same or similar parts.

[0035] The foregoing and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of each embodiment with reference to the accompanying drawings. Directional terms mentioned in the following embodiments, such as "upper", "lower", "front", "rear", "left", "right", etc., are only with reference to the directions in the accompanying drawings. Therefore, the directional terms used are for illustration and not for limiting the present invention.

[0036] In the detailed description of each embodiment, terms such as "first", "second", "third", etc. may be used to describe different elements. These terms are only used to distinguish the elements from each other, but in the structure, these elements should not be limited by these terms. For example, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element without departing from the protection scope of the inventive concept. Additionally, in the manufacturing method, except for specific process flows, the formation order of these components or members should not be limited by these terms either. For example, the first element may be formed before the second element. Or, the first element may be formed after the second element. Or, the first element and the second element may be formed in the same process or step.

[0037] Moreover, the thickness of the layers and regions in the drawings is enlarged for clarity. The same or similar reference numerals represent the same or similar components, and will not be repeated in the following paragraphs.

[0038] Figures 1A to 1F is a partial cross-sectional view of a partial manufacturing method of an embedded component structure according to an embodiment of the present invention. Figure 1G is Figure 1D a top view of region A of Figure 1H is Figure 1E a top view of region B of Figure 1I is Figure 1F a top view of region C of . In this embodiment, the manufacturing process of the embedded component structure 100 may include the following steps.

[0039] Please refer to Figure 1A, a circuit board 110 with a through hole 110t is provided, where the circuit board 110 has opposite first surface 110a and second surface 110b. For example, the circuit board 110 can be stacked by a plurality of patterned conductive material layers 1111 and a plurality of dielectric material layers 1112, and the patterned conductive material layers 1111 can be electrically connected by a plurality of buried vias 114. Among them, the first surface 110a can be composed of the surfaces of the uppermost patterned conductive material layer 1111 and dielectric material layer 1112, and the second surface 110b can be composed of the surfaces of the lowermost patterned conductive material layer 1111 and dielectric material layer 1112, but the present invention is not limited thereto.

[0040] In this embodiment, the circuit board 110 includes a heat dissipation layer 1113, where the heat dissipation layer 1113 has opposite upper surface 1113a and lower surface 1113b. In other words, the heat dissipation layer 1113 can be a part of the circuit board 110. For example, when the material of the patterned conductive material layer 1111 has better thermal conductivity, such as the thermal conductivity coefficient of the material of the patterned conductive material layer 1111 is between 200 watts / (meter * absolute temperature) (W / (m*K)) and 500 W / (m*K), the heat dissipation layer 1113 can be a part of the patterned conductive material layer 1111, but the present invention is not limited thereto.

[0041] On the other hand, the through hole 110t can penetrate through part of the circuit board 110 and expose the upper surface 1113a of the heat dissipation layer 1113, and the lower surface 1113b of the heat dissipation layer 1113 can be completely exposed. The through hole 110t is formed, for example, by laser, sandblasting or plasma process, but the present invention is not limited thereto.

[0042] Please refer to Figure 1B , a chip 120 is disposed in the through hole 110t. Therefore, the chip 120 can be embedded in the circuit board 110. For example, the chip 120 can be disposed on the upper surface 1113a of the heat dissipation layer 1113. In this embodiment, the chip 120 has an active surface 120a, a back surface 120b opposite to the active surface 120a, and pads 122 on the active surface 120a, and the chip 120 can be disposed in the through hole 110t with the active surface 120a facing up. In other words, the back surface 120b of the chip 120 can face the heat dissipation layer 1113.

[0043] In an embodiment, the chip 120 can be attached to the inside of the through hole 110t through an adhesive layer (not shown). The adhesive layer can be a die attach film (DAF) or other suitable materials, but the present invention is not limited thereto. The type of the chip 120 can also be determined according to the actual design requirements.

[0044] In one embodiment, there may be a gap G between the plurality of chips 120 and the sidewalls of the vias 110t. In other words, the chips 120 may not be in direct contact with the sidewalls of the vias 110t, but the present invention is not limited thereto.

[0045] Please refer to Figure 1C , a dielectric layer 130 is formed on the first surface 110a and the second surface 110b to seal the chips 120 and cover the lower surface 1113b of the heat dissipation layer 1113. For example, the dielectric layer 130 may be filled into the vias 110t and fill the gap G between the electronic components 120 and the circuit board 110 (as Figure 1B shown) and is formed comprehensively on the second surface 110b.

[0046] In some embodiments, the dielectric layer 130 may be formed, for example, by laminating a resin (such as epoxy resin or other similar thermosetting cross-linked resins), silanes (such as hexamethyldisiloxane (HMDSN), tetraethoxysilane (TEOS), bis(dimethylamino)dimethylsilane (BDMADMS)) or other suitable dielectric materials, but the present invention is not limited thereto.

[0047] Please refer to Figure 1D , a first portion of the dielectric layer 130 is removed to form a first opening OP1 that exposes the upper surface 1113a of the heat dissipation layer 1113 and a second opening OP2 that exposes the lower surface 1113b of the heat dissipation layer 1113. Further, for example, a laser drill process, a plasma process or a sandblasting process is used to remove the first portion of the dielectric layer 130.

[0048] In the present embodiment, when removing the first portion of the dielectric layer 130, the first opening OP1 may not expose the active surface 120a and the sidewalls 120s of the chips 120. In other words, at this stage, the dielectric layer 130 may completely cover the chips 120. In addition, the orthographic projection of the first opening OP1 on the heat dissipation layer 1113 may be located within the orthographic projection of the second opening OP2 on the heat dissipation layer 1113. In other words, the edge of the orthographic projection of the first opening OP1 on the heat dissipation layer 1113 may be recessed within the edge of the orthographic projection of the second opening OP2 on the heat dissipation layer 1113, but the present invention is not limited thereto.

[0049] In this embodiment, removing the first part of the dielectric layer 130 may further include forming a plurality of vias 130t that expose the pads 122 on the active surface 120a of the chip 120 for subsequent electrical connection between the chip 120 and the circuit board 110 or other components. On the other hand, based on the circuit layout requirements, part of the dielectric layer 130 located on the second surface 110b of the circuit board 110 may be selectively further removed to form vias 130t1, as Figure 1D shown, but the present invention is not limited thereto.

[0050] In one embodiment, as Figure 1G shown, when viewed from above, the shape of the first opening OP1 may be a closed ring shape so that the subsequently formed heat-conducting material layer can indeed surround the chip 120. However, the present invention is not limited thereto. In other embodiments, the first opening OP1 may have other suitable shapes.

[0051] Please refer to Figures 1D to 1E and Figures 1G to 1H simultaneously. After removing the first part of the dielectric layer 130, the second part of the dielectric layer 130 may be removed to expand the first opening OP1 to expose the sidewall 120s and the active surface 120a of part of the chip. However, the present invention is not limited thereto. In other embodiments, the sidewall 120s and the active surface 120a of the chip 120 may be directly exposed when removing the first part of the dielectric layer 130.

[0052] Please refer to Figure 1F and Figure 1I simultaneously. A heat-conducting material layer is formed in the first opening OP1 and the second opening OP2 to form a heat dissipation member 140 surrounding the chip 120, wherein the chip 120, the circuit board 110, and the heat dissipation member 140 are electrically connected. For example, the heat dissipation member 140 may include a first part 1401, a second part 1402, and a third part 1403 located between the first part 1401 and the second part 1402. The first part 1401 is in direct contact with the sidewall 120s of the chip 120, and the second part 1402 is a ground terminal.

[0053] In this embodiment, the embedded component structure 100 can effectively discharge waste heat through the design of the heat dissipation component 140, so as to reduce the problem that the chip 120 has a shortened lifespan or even damage due to overheating. Further, the heat dissipation component 140 surrounds the chip 120 and its first part 1401 is in direct contact with the side wall of the chip 120, enabling the chip 120 to directly contact the heat dissipation component 140 with better thermal conductivity. Therefore, the heat dissipation path of the chip can be shortened to effectively discharge waste heat and reduce the problem that the chip 120 has a shortened lifespan or even damage due to overheating. In addition, since the heat dissipation component 140 surrounds the chip 120 and the second part 1402 of the heat dissipation component 140 is a grounding terminal, the embedded component structure 100 of the present invention can further have an electromagnetic shielding effect, improve the phenomenon of signal attenuation caused by electromagnetic interference, and have better signal integrity.

[0054] In one embodiment, the heat dissipation component 140 can penetrate the circuit board 110, the heat-conducting material layer in the first opening OP1 can be the first part 1401, the heat-conducting material layer in the second opening can be the second part 1402, and the heat dissipation layer 1113 can be the third part 1403. Therefore, the third part 1403 can be a part of the circuit board 110.

[0055] In one embodiment, the first part 1401 and the third part 1403 can form a groove, and the chip 120 can be arranged upward in the groove. For example, the active surface 120a of the chip 120 can be arranged upward in the groove. In other words, the back surface 120b of the chip 120 can face the third part 1403, but the present invention is not limited thereto.

[0056] In some embodiments, the conductive material layer can be filled into the first opening OP1 and the second opening OP2 in the same process. Therefore, the materials of the first part 1401 and the second part 1402 can be substantially the same. For example, the materials of the first part 1401 and the second part 1402 have a thermal conductivity between 200 W / (m·K) and 500 W / (m·K) to more effectively discharge waste heat. In one embodiment, the materials of the first part 1401 and the second part 1402 can be copper. Copper has better thermal conductivity and can also enable the embedded component structure 100 to have better signal integrity, but the present invention is not limited thereto.

[0057] It should be noted that the present invention does not limit the materials of the first part 1401 and the second part 1402. In other embodiments, the conductive material layer can be filled into the first opening OP1 and the second opening OP2 in different processes. Therefore, the materials of the first part 1401 and the second part 1402 can also be different.

[0058] In addition, when viewed from above, the first opening OP1 can be annularly closed. Therefore, the heat dissipation member 140 formed within the first opening OP1 can also be annularly closed when viewed from above, but the present invention is not limited thereto.

[0059] In this embodiment, a heat-conductive material layer can also be formed within the plurality of via holes 130t to constitute a plurality of conductive terminals 150, wherein the plurality of conductive terminals 150 are electrically connected to the circuit board 110. In addition, when viewed from above, the plurality of conductive terminals 150 can be columnar structures (not shown), but the present invention is not limited thereto. Subsequently, an additional layer circuit 160 can be formed on the dielectric layer 130.

[0060] After the above processes, the fabrication of the embedded component structure 100 of this embodiment can be generally completed. The embedded component structure 100 of this embodiment includes a circuit board 110, a chip 120, and a heat dissipation member 140. The chip 120 is embedded within the circuit board 110. The heat dissipation member 140 surrounds the chip 120. The chip 120, the circuit board 110, and the heat dissipation member 140 are electrically connected. The heat dissipation member 140 includes a first portion 1401, a second portion 1402, and a third portion 1403 located between the first portion 1401 and the second portion 1402. The first portion 1401 is in direct contact with the side wall 120s of the chip 120. The second portion 1402 is a ground terminal.

[0061] Figures 2A to 2C Yes Figure 1A Partial cross-sectional schematic view of a manufacturing method of a circuit board.

[0062] Please refer to Figures 2A to 2C simultaneously. In one embodiment, for example, the circuit board 110 in Figure 1A is formed through the following steps.

[0063] First, as Figure 2A shown, a substrate 1 is provided, wherein the substrate 1 can include a core layer 11, a release layer 12, and a conductive material layer 13, wherein the release layer 12 can be formed on the core layer 11, and the conductive material layer 13 can be formed on the release layer 12. For example, the release layer 12 and the conductive material layer 13 can be simultaneously formed on the upper and lower surfaces of the core layer 11.

[0064] In some embodiments, the core layer 11 can include a polymer glass fiber composite substrate, a glass substrate, a ceramic substrate, an insulating silicon substrate, or a polyimide (PI) glass fiber composite substrate. However, the present invention is not limited thereto, as long as in subsequent processes, the core layer 11 can be suitable for carrying film layers formed thereon or components disposed thereon. On the other hand, the release layer 12 and the conductive material layer 13 can be any suitable release and conductive materials.

[0065] Next, as Figure 2B shown in Figure 2C , a plurality of patterned conductive material layers 1111 and a plurality of dielectric material layers 1112 are formed on the conductive materials 13 on both sides. Then, the core layer 11 and the release layer 12 are removed to form two circuit boards (only one is schematically shown in the figure), wherein a plurality of buried vias 114 are formed between the plurality of patterned conductive material layers 1112 so that the plurality of patterned conductive material layers 1111 can be electrically connected. Here, the patterned conductive material layer 1111, the dielectric material layer 1112, and the buried via 114 can be formed by suitable materials and methods, and the present invention is not limited thereto.

[0066] In this embodiment, the patterned conductive material layer 1111 includes a heat dissipation layer 1113 that can be used for the third part of the subsequent heat dissipation component 140. Then, a through groove 110t can be formed in the dielectric material layer 1111 to form a circuit board 110 as Figure 1A shown. In one embodiment, for example, the core layer 11, the remaining release layer 12, and the conductive material layer 13 are removed by an etching process, but the present invention is not limited thereto.

[0067] It should be noted that the present invention does not limit the formation of the circuit board 110 in the foregoing manner, as long as the circuit board 110 has a through groove 110t, it falls within the protection scope of the present invention.

[0068] Figure 3 is a top view schematic diagram of an embedded component structure according to another embodiment of the present invention. The plurality of conductive terminals 250 of the embedded component structure 200 in this embodiment are Figure 1I similar to the conductive terminals 150 of the embedded structure 100, the difference being that the plurality of conductive terminals 250 may further include an extension portion 2501 extending toward the edge of the chip 120 to further increase the flexibility of the embedded component structure 200 in application, but the present invention is not limited thereto, and the conductive terminals of the embedded structure can be determined according to the actual circuit design requirements.

[0069] Figure 4 is a partial cross-sectional schematic diagram of an embedded component structure according to still another embodiment of the present invention.

[0070] Please refer to Figure 4 , similar to Figure 1F , the difference being that the embedded component structure 300 in this embodiment further forms an additional layer circuit 350 on the first side 100a of the embedded component structure 100, and further forms an additional layer circuit 360 on the second side 100b opposite to the first side 100a, so that the embedded component structure 300 can be further electrically connected subsequently.

[0071] In summary, the embedded component structure of the present invention can effectively discharge waste heat through the design of the heat dissipation component, so as to reduce the problem that the chip has a shortened lifespan or even is damaged due to overheating. Further, the heat dissipation component surrounds the chip and its first part is in direct contact with the side wall of the chip, enabling the chip to directly contact the heat dissipation component with better thermal conductivity. Therefore, the heat dissipation path of the chip can be shortened to effectively discharge waste heat and reduce the problem that the chip has a shortened lifespan or even is damaged due to overheating. In addition, since the heat dissipation component surrounds the chip and the second part of the heat dissipation component is a grounding terminal, the embedded component structure of the present invention can further have an electromagnetic shielding effect, improve the phenomenon of signal attenuation caused by electromagnetic interference, and have better signal integrity.

[0072] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An embedded component structure, characterized in that, comprising: a circuit board; a chip, embedded in the circuit board; and a heat dissipation member, surrounding the chip and penetrating the circuit board, wherein: the chip, the circuit board and the heat dissipation member are electrically connected; the heat dissipation member includes a first part, a second part and a third part located between the first part and the second part; the first part is in direct contact with the side wall of the chip; the second part is a ground terminal.

2. The embedded component structure according to claim 1, characterized in that, the first part and the third part form a groove, and the chip is disposed in the groove.

3. The embedded component structure according to claim 2, characterized in that, the chip has an active surface and a back surface opposite to the active surface, and the active surface is disposed upward in the groove.

4. The embedded component structure according to claim 3, characterized in that, the back surface of the chip faces the third part.

5. The embedded component structure according to claim 1, characterized in that, the third part is a part of the circuit board.

6. The embedded component structure according to claim 1, characterized in that, the materials of the first part and the second part are substantially the same.

7. The embedded component structure according to claim 6, characterized in that, the thermal conductivity of the material is between 200 watts / (meter * absolute temperature) and 500 watts / (meter * absolute temperature).

8. The embedded component structure according to claim 7, characterized in that, the material is copper.

9. The embedded component structure according to claim 1, characterized in that, viewed from above, the heat dissipation member is a closed ring.

10. A manufacturing method of an embedded component structure, characterized in that, comprising: providing a circuit board having a through groove, wherein: the circuit board has opposite first and second surfaces; the circuit board includes a heat dissipation layer, wherein the heat dissipation layer has opposite upper and lower surfaces; and the through groove exposes the upper surface of the heat dissipation layer; disposing a chip in the through groove; forming a dielectric layer on the first and second surfaces to seal the chip and cover the lower surface of the heat dissipation layer; removing a first part of the dielectric layer to form a first opening exposing the upper surface of the heat dissipation layer, the side wall and the active surface of the chip, and a second opening exposing the lower surface of the heat dissipation layer; forming a thermal conductive material layer in the first and second openings to form a heat dissipation member surrounding the chip, wherein the chip, the circuit board and the heat dissipation member are electrically connected.

11. The manufacturing method of the embedded component structure according to claim 10, characterized in that, the heat dissipation member includes a first part, a second part and a third part located between the first part and the second part; the thermal conductive material layer in the first opening is the first part; the thermal conductive material layer in the second opening is the second part; the heat dissipation layer is the third part.

12. The manufacturing method of the embedded component structure according to claim 10, characterized in that, the chip is disposed in the through groove with an adhesive layer.

13. The manufacturing method of the embedded component structure according to claim 10, characterized in that, the steps of the first opening exposing the sidewall and the active surface of the chip include: after removing the first part of the dielectric layer, removing the second part of the dielectric layer to expand the first opening to expose the sidewall and the active surface of a part of the chip.

14. The manufacturing method of the embedded component structure according to claim 13, characterized in that, the sidewall and the active surface of the chip are not exposed after removing the first part of the dielectric layer.

15. The manufacturing method of the embedded component structure according to claim 13, characterized in that, a plasma process and a desmear process are performed to remove the second part of the dielectric layer.

16. The manufacturing method of the embedded component structure according to claim 10, characterized in that, removing the first part of the dielectric layer further includes: forming a plurality of vias exposing pads on the active surface of the chip, and forming the heat conductive material layer in the plurality of vias to constitute a plurality of conductive terminals, wherein the plurality of conductive terminals are electrically connected to the circuit board.

17. The manufacturing method of the embedded component structure according to claim 16, characterized in that, viewed from above, the plurality of conductive terminals are columnar structures.

18. The manufacturing method of the embedded component structure according to claim 16, characterized in that, the plurality of conductive terminals further include extending portions extending towards the edge of the chip.

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