A method of manufacturing a semiconductor device

Abstract

The embodiment of the present application provides a manufacturing method of a semiconductor device, a photoetching coating is formed on a structure to be led out, the photoetching coating comprises a first film layer, a photoetching film layer and a second film layer, the refractive indexes of the first film layer and the second film layer are both less than 1, so that the photoetching coating forms an optical structure with a relatively high reflection coefficient, the photoetching coating is exposed by using light with a first wavelength, the structure to be led out is reflected by the photoetching coating, the structure to be led out is imaged to a first region of the photoetching film layer as a mask, the photoetching coating is exposed by using light with a second wavelength and the mask, a pattern of the mask is imaged to a second region of the photoetching film layer, an overlapping region of the first region and the second region is a leading-out region, the leading-out region corresponds to the structure to be led out, the self-alignment of a layer of the structure to be led out and a layer where a contact hole is located is realized, only twice exposure in the overlapping region imaged in the photoetching film layer can correspond to the structure to be led out, the alignment precision between different layers can be improved, and the alignment error can be reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor devices, and in particular to a method for manufacturing a semiconductor device. Background Technology

[0002] In semiconductor manufacturing, ensuring alignment between different layers is crucial. Significant alignment errors between layers can prevent electrical connections, ultimately leading to performance degradation in the manufactured semiconductor devices. Self-alignment is an important technique for achieving alignment between different layers, and it is frequently used to align metal layers and interconnect layers.

[0003] However, due to the limitations of self-alignment technology, the error of self-alignment technology is relatively large when manufacturing semiconductor devices, such as in the process of forming contact holes, resulting in low yield of the manufactured semiconductor devices.

[0004] Therefore, there is an urgent need for a semiconductor device manufacturing method that can improve the alignment accuracy between different layers and reduce alignment errors. Summary of the Invention

[0005] In view of this, the purpose of this application is to provide a method for manufacturing a semiconductor device to improve the alignment accuracy between different layers and reduce alignment errors.

[0006] To achieve the above objectives, this application provides the following technical solution:

[0007] This application provides a method for manufacturing a semiconductor device, the semiconductor device including a substrate and a structure to be led out located on one side of the substrate, the method including:

[0008] A photolithographic coating is formed on the structure to be extracted. The photolithographic coating includes a first film layer, a photolithographic film layer, and a second film layer stacked sequentially. The refractive indices of the first film layer and the second film layer are less than 1.

[0009] The photolithographic coating is exposed using light of a first wavelength to image the structure to be extracted onto a first region of the photolithographic film layer;

[0010] The photolithographic coating is exposed using light of a second wavelength and a mask to image the pattern of the mask onto a second region of the photolithographic film layer; the region where the first region and the second region overlap is the lead-out region, which corresponds to the structure to be led out.

[0011] Optionally, the thickness of the photolithographic coating is determined based on the light intensity in the photolithographic film layer when the photolithographic coating is exposed to light of the first wavelength.

[0012] Optionally, before forming a photolithographic coating on the structure to be extracted, the method further includes:

[0013] A dielectric layer is formed on the structure to be brought out, the dielectric layer being located between the structure to be brought out and the photolithographic coating;

[0014] After exposing the photolithographic coating using light of a second wavelength and a mask, the method further includes:

[0015] Using the photolithography layer, the dielectric layer corresponding to the lead-out area is etched to obtain a contact hole that penetrates the dielectric layer, and the contact hole exposes the structure to be led out.

[0016] Optionally, before etching the dielectric layer corresponding to the lead-out region using the photolithographic film layer, the method further includes:

[0017] Remove the second film layer.

[0018] Optionally, after etching the dielectric layer corresponding to the lead-out region using the photolithographic film to obtain a contact hole penetrating the dielectric layer, the method further includes:

[0019] Metal is filled into the contact hole to form a metal contact, which is connected to the structure to be led out.

[0020] Optionally, the photolithography film layer is made of photoresist, and the first film layer and the second film layer are made of metal.

[0021] Optionally, the first wavelength of light is visible light or ultraviolet light, and the second wavelength of light is ultraviolet light.

[0022] Optionally, the first wavelength is 633 nm, 532 nm, or 365 nm, and the second wavelength is 365 nm, 248 nm, or 193 nm.

[0023] Optionally, the structure to be brought out is at least one of a gate structure, a source structure, and a drain structure.

[0024] Optionally, the feature size of the mask pattern is larger than the feature size of the structure to be extracted.

[0025] This application provides a method for manufacturing a semiconductor device. The semiconductor device includes a substrate and a structure to be led out located on one side of the substrate. A photolithographic coating is formed on the structure to be led out. The photolithographic coating includes a first film layer, a photolithographic film layer, and a second film layer stacked sequentially. The refractive indices of the first film layer and the second film layer are both less than 1, so that the photolithographic coating forms an optical structure with a high reflectivity. Then, the photolithographic coating is exposed using light of a first wavelength. At this time, the structure to be led out is reflected by the photolithographic coating, and the structure to be led out is used as a mask to image onto the first region of the photolithographic film layer. Then, the photolithographic coating is exposed again using light of a second wavelength and the mask. At this time, the pattern of the mask is imaged onto the second region of the photolithographic film layer. The area where the first region and the second region overlap is the lead-out region, and the lead-out region corresponds to the structure to be led out. In other words, after exposure with the first wavelength of light, the position of the structure to be extracted is imaged onto the first region of the photolithography layer. After exposure with the second wavelength of light, the mask pattern is also imaged onto the second region of the photolithography layer. The overlapping area of ​​the first and second regions corresponds to the structure to be extracted, thus achieving self-alignment between the layer of the structure to be extracted and the layer where the contact hole is located. Therefore, only the overlapping area of ​​the two exposures on the photolithography layer will correspond to the structure to be extracted, which can improve the alignment accuracy between different layers and reduce alignment errors. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 A flowchart illustrating a method for manufacturing a semiconductor device according to an embodiment of this application is shown;

[0028] Figure 2 A top view of the semiconductor device provided in an embodiment of this application is shown;

[0029] Figure 3 It shows Figure 2 A cross-sectional view of the provided semiconductor device along the AA direction;

[0030] Figures 4-5 A schematic diagram of the structure of a semiconductor device manufactured by the semiconductor device manufacturing method provided in this application embodiment is shown;

[0031] Figure 6 A schematic diagram showing the correspondence between the thickness of the photolithographic film layer and the light intensity provided in the embodiments of this application is shown;

[0032] Figure 7A schematic diagram of the structure of a semiconductor device manufactured by the semiconductor device manufacturing method provided in this application embodiment is shown;

[0033] Figure 8 A top view schematic diagram of the semiconductor device and mask provided in an embodiment of this application is shown;

[0034] Figure 9-11 A schematic diagram of the structure of a semiconductor device manufactured by the semiconductor device manufacturing method provided in this application embodiment is shown. Detailed Implementation

[0035] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0036] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0037] Secondly, this application provides a detailed description in conjunction with schematic diagrams. When detailing the embodiments of this application, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this application. In addition, actual fabrication should include three-dimensional spatial dimensions of length, width, and depth.

[0038] Currently, self-alignment technology is an important technical means to achieve alignment between different layers. It is often used to achieve alignment between metal layers and interconnect layers.

[0039] However, there is a lack of effective self-alignment technology for the contact hole process after the source, drain, or gate of a semiconductor device is formed, which is used to bring out the source, drain, or gate. This technology can achieve precise alignment between the contact hole and the source, drain, or gate.

[0040] Based on the above technical problems, this application provides a method for manufacturing a semiconductor device. The semiconductor device includes a substrate and a structure to be led out located on one side of the substrate. A photolithographic coating is formed on the structure to be led out. The photolithographic coating includes a first film layer, a photolithographic film layer, and a second film layer stacked sequentially. The refractive indices of the first film layer and the second film layer are both less than 1, so that the photolithographic coating forms an optical structure with a high reflectivity. Then, the photolithographic coating is exposed using light of a first wavelength. At this time, the structure to be led out is reflected by the photolithographic coating, and the structure to be led out is used as a mask to image onto the first region of the photolithographic film layer. Then, the photolithographic coating is exposed again using light of a second wavelength and the mask. At this time, the pattern of the mask is imaged onto the second region of the photolithographic film layer. The area where the first region and the second region overlap is the lead-out region, and the lead-out region corresponds to the structure to be led out. In other words, after exposure with the first wavelength of light, the position of the structure to be extracted is imaged onto the first region of the photolithography layer. After exposure with the second wavelength of light, the mask pattern is also imaged onto the second region of the photolithography layer. The overlapping area of ​​the first and second regions corresponds to the structure to be extracted, thus achieving self-alignment between the layer of the structure to be extracted and the layer where the contact hole is located. Therefore, only the overlapping area of ​​the two exposures on the photolithography layer will correspond to the structure to be extracted, which can improve the alignment accuracy between different layers and reduce alignment errors.

[0041] To better understand the technical solution and effects of this application, the specific embodiments will be described in detail below with reference to the accompanying drawings.

[0042] refer to Figure 1 The diagram shown is a flowchart of a semiconductor device manufacturing method according to an embodiment of this application. The semiconductor device 100 provided in this embodiment includes a substrate 110 and a lead-out structure 120 located on one side of the substrate 110. (Refer to...) Figure 2 and Figure 3 As shown, Figure 2 This is a top view of the semiconductor device 100 provided in an embodiment of this application. Figure 3 for Figure 2 A cross-sectional view of the semiconductor device along the AA direction is provided. In the embodiments of this application, the structure to be led out 120 can be at least one of a gate structure, a source structure, and a drain structure. The material of the structure to be led out 120 can be a metal material with good conductivity. In other embodiments, the structure to be led out can be the structure of a layer to be aligned.

[0043] In the embodiments of this application, the substrate 110 is a semiconductor substrate, such as a Si substrate, a Ge substrate, a SiGe substrate, SOI (Silicon On Insulator), or GOI (Germanium On Insulator). In other embodiments, the semiconductor substrate may also be a substrate including other elemental semiconductors or compound semiconductors, such as quartz, GaAs, InP, or SiC, and may also be a stacked structure, such as Si / SiGe, or other epitaxial structures, such as SGOI (Silicon Germanium On Insulator). In this embodiment, the substrate 110 is a silicon substrate.

[0044] In practical applications, other films can be formed between the substrate 110 and the structure to be led out 120 to form a variety of semiconductor devices.

[0045] As an example, a stacked layer and a channel structure through the stacked layer are formed between the substrate 110 and the structure to be brought out 120, in which case the semiconductor device can be a three-dimensional memory device.

[0046] As another example, a doped layer or other dielectric film is formed between the substrate 110 and the structure to be led out 120, in which case the semiconductor device can be a logic device, such as a transistor.

[0047] The method includes the following steps:

[0048] S101, a photolithographic coating 130 is formed on the structure to be led out 120, with reference to... Figure 4 As shown.

[0049] In the embodiments of this application, a photolithographic coating 130 is formed on the structure to be led out 120, and the photolithographic coating 130 is patterned so as to form metal contacts using the patterned photolithographic coating 130, and the structure to be led out 130 is electrically led out.

[0050] In practical applications, before forming the photolithographic coating 130 on the structure to be led out 120, a dielectric layer 140 is first formed on the structure to be led out 130. That is, the dielectric layer 140 is located between the structure to be led out 120 and the photolithographic coating 130. (Refer to...) Figure 4 As shown. The dielectric layer 140 can be made of a material with good insulating properties, such as silicon oxide. The dielectric material can be deposited using a deposition process to form the dielectric layer 140. When depositing the dielectric material on the structure to be led out 120, the formed dielectric layer 140 will conform to the structure to be led out 120, making the morphology of the dielectric layer 140 similar to that of the structure to be led out 120. At this time, a chemical mechanical polishing device can be used to polish the dielectric layer 140, and finally a dielectric layer 140 with high flatness is obtained, which is beneficial for the subsequent formation of the photolithographic coating 130 on the relatively flat dielectric layer 140.

[0051] In the embodiments of this application, the photolithographic coating 130 includes a first film layer 131, a photolithographic film layer 132, and a second film layer 133 stacked sequentially, wherein the refractive index of the first film layer 131 and the second film layer 132 is less than 1. The photolithographic coating 130 forms a sandwich-like optical structure from the first film layer 131, the photolithographic film layer 132, and the second film layer 133, with both sides being film layers with a refractive index less than 1. After light is incident, a reflection oscillation can be formed in the photolithographic coating 130, that is, the intensity of the incident light can be enhanced by utilizing this reflection oscillation.

[0052] In this design, the photolithography layer 132 is made of photoresist, while the first layer 131 and the second layer 133 can be made of metallic materials or metamaterials. Metallic materials, such as gold, silver, or copper, have a refractive index less than 1 under deep ultraviolet, visible, or infrared light. Metamaterials can be combinations of certain compound materials and other materials, and can be artificially synthesized materials designed to achieve a refractive index less than 1 under certain wavelengths of light.

[0053] In practical applications, a first film layer 131, a photolithographic film layer 132, and a second film layer 133 can be sequentially stacked using spin coating, deposition, or ion sputtering processes. Then, chemical mechanical polishing equipment can be used to polish the first film layer 131, the photolithographic film layer 132, and the second film layer 133 to further control their flatness and thickness.

[0054] S102, the photolithographic coating 130 is exposed using light of the first wavelength, reference. Figure 5 As shown.

[0055] In the embodiments of this application, after the photolithographic coating 130 is formed on the structure to be led out 120, the photolithographic coating 130 can be exposed using a photolithography process.

[0056] First, the photolithographic coating 130 is exposed using light of a first wavelength. During exposure, no mask is used; parallel light is directly used to illuminate the photolithographic coating 130. The photolithographic coating 130 has a high reflectivity to light of the first wavelength, enabling the structure of the structure to be extracted 120 under the photolithographic coating 130 to be imaged onto the first region 132-1 of the photolithographic film layer 132. (Refer to...) Figure 5 As shown. In other words, when the photolithographic coating 130 is exposed using light of the first wavelength, the structure to be extracted 120 is equivalent to a mask, and the light of the first wavelength undergoes a photochemical reaction in the first region 132-1 to image the structure to be extracted 120 onto the photolithographic film layer 132.

[0057] In the embodiments of this application, simulation software can be used to simulate the thicknesses of the first film layer 131, the photolithographic film layer 132, and the second film layer 133 in the photolithographic coating 130. Typically, the thickness of the photolithographic film layer 132 is greater than the thicknesses of the first film layer 131 and the second film layer 133. Variations in the thickness of the photolithographic film layer 132 can affect the change in light intensity within the photolithographic film layer 132 when light of the first wavelength is exposed. (Reference) Figure 6 The diagram illustrates the relationship between the thickness of the photolithography layer and the light intensity in an embodiment of this application. As can be seen, when the thickness of the photolithography layer 132 changes, the light intensity of the first wavelength in the photolithography layer 132 also changes accordingly. In this embodiment, the thickness of the photolithography layer 132 corresponding to the point where the light intensity of the first wavelength in the photolithography layer 132 is maximum is typically selected, so that the structure to be extracted 120 can be imaged onto the photolithography layer 132 with maximum efficiency.

[0058] S103, the photolithographic coating 130 is exposed using light of the second wavelength and mask 150, reference. Figure 7 As shown.

[0059] In the embodiments of this application, after exposing the photolithographic coating 130 with light of the first wavelength, the photolithographic coating 130 can be further exposed with light of the second wavelength and the mask 150. After the light of the second wavelength is incident on the photolithographic coating 130, the structure to be extracted 120 will not be reflected to the photolithographic film layer 132 by the light of the second wavelength, that is, the light of the second wavelength will not image the structure to be extracted 120 onto the photolithographic film layer 132.

[0060] In other words, the second wavelength of light can only image the pattern of mask 150 onto the second region 132-2 of photolithography layer 132, while the structure to be extracted 120 will not be imaged onto photolithography layer 132. The second wavelength of light undergoes a photochemical reaction in the second region 132-2 to image the pattern of mask 150 onto photolithography layer 132.

[0061] In the embodiments of this application, the photolithography layer 132 is optically responsive to both a first wavelength of light and a second wavelength of light. When the first wavelength of light is exposed for the first time, the first region 132-1 of the photolithography layer 132 undergoes a photochemical reaction to determine the location of the structure to be led out 120. When the second wavelength of light is exposed for the second time, the second region 132-2 of the photolithography layer 132 continues to undergo a photochemical reaction to determine the location of the contact hole. The overlapping area of ​​the first region 132-1 and the second region 132-2 is the area where photochemical reactions occur twice, which is the lead-out area. This lead-out area corresponds to the structure to be led out 120.

[0062] In other words, only the overlapping area of ​​the photolithography layer formed by two exposures corresponds to the structure to be extracted, and only the photolithography layer of the extraction area will be developed in the subsequent development process. Other areas that only undergo one photochemical reaction or do not undergo a photochemical reaction will not be developed. This achieves self-alignment between the layer containing the structure to be extracted and the layer containing the contact hole, thus improving the alignment accuracy between different layers and reducing alignment errors.

[0063] In the embodiments of this application, light of a first wavelength can image the structure to be extracted 120 onto the photolithography layer 132, and light of a second wavelength can image the pattern of the mask 150 onto the photolithography layer 132. For example, the first wavelength can be visible light or ultraviolet light, and the second wavelength can also be ultraviolet light or visible light. When the wavelength of the second wavelength is smaller than that of the first wavelength, the image resolution of the mask pattern is higher, the position of the contact hole is determined more accurately, which is beneficial for the self-alignment of the layer of the structure to be extracted and the layer where the contact hole is located. When the wavelength of the first wavelength is smaller than that of the second wavelength, the fine structure of the structure to be extracted can be reflected in the photolithography layer with high precision, which is beneficial for increasing mask alignment and overlay deviation and reducing mask error factor.

[0064] As an example, the first wavelength is 633 nanometers or 532 nanometers, and the second wavelength is 365 nanometers, 248 nanometers, or 193 nanometers.

[0065] As another example, the first wavelength is 365nm, 248nm, or 193nm, and the second wavelength is 532nm or 633nm.

[0066] In the embodiments of this application, reference is made to 8. Figure 8 This is a top view schematic diagram of the semiconductor device and mask provided in the embodiments of this application. Figure 7 for Figure 8 In the cross-sectional view along the BB direction, the exposed position of the pattern of mask 150 is located in the first region 132-1 of the photolithographic film layer 132, and the feature size of the pattern of mask 150 is larger than the feature size of the structure to be exposed 120, as shown in the reference. Figure 8 As shown, the pattern exposure size of the mask 150 is S, and the feature size of the structure to be pulled out 120 is M. S is greater than M. In this way, even if the pattern of the mask 150 deviates from the center point of the structure to be pulled out 120, the pattern of the mask 150 and the structure to be pulled out 120 can still have the maximum overlap area, thus achieving self-alignment.

[0067] like Figure 8 As shown, the mask pattern can be a hole shape to facilitate the subsequent formation of contact holes. The mask can be a binary mask or an attenuation dependent mask. The mask substrate can be made of quartz or other transparent materials. The material of the opaque areas in the mask can be a metallic material, such as chromium.

[0068] In the embodiments of this application, when the second wavelength light is imaged in the photolithography layer 130 through the mask 150, by controlling the photochemical reaction or development process, only the area where the second wavelength light and the first wavelength light interact in the photolithography layer 130 undergoes a second photochemical reaction, and is subsequently developed. This area is the extraction area 1001.

[0069] In the embodiments of this application, laser heating and curing technology can also be used to modify the photolithography film layer 132 in a specific area, so that the specific area is not conducive to imaging with the second wavelength of light. The specific area can be an area other than the first area 132-1.

[0070] In the embodiments of this application, after the photolithographic coating 130 is exposed a second time, the second film layer 133 can be removed so that the photolithographic film layer 132 can be developed to form a patterned photolithographic film layer 160. (Refer to...) Figure 9 As shown, after the development process, the photolithography layer 132 corresponding to the extraction region 1001 is removed.

[0071] Then, the patterned photolithography layer 160 can be used to etch the dielectric layer 140 corresponding to the lead-out region 1001 to obtain a contact hole 170 penetrating the dielectric layer 140. The contact hole 170 exposes the structure to be led out 120. (Refer to...) Figure 10 As shown. When etching using the patterned photolithography layer 160, the first film layer 131 is also etched. After obtaining the contact hole 170 that penetrates the dielectric layer 140, the remaining photolithography layer 160 and the first film layer 131 can be removed, leaving only the dielectric layer 140 including the contact hole 170.

[0072] After forming a contact hole 170 at the position corresponding to the structure to be led out 120, metal material can be filled into the contact hole 170 to form a metal contact 180. The metal contact 180 is connected to the structure to be led out 120, thus forming an electrical lead-out of the structure to be led out 120. (Refer to...) Figure 11 As shown.

[0073] In the embodiments of this application, the photolithography process for forming the metal contact can be extreme ultraviolet lithography, deep ultraviolet lithography, nanoimprint lithography, super diffraction lithography, or other processes that apply optical imaging.

[0074] Therefore, the embodiments of this application provide a method for manufacturing a semiconductor device. The semiconductor device includes a substrate and a structure to be led out located on one side of the substrate. A photolithographic coating is formed on the structure to be led out. The photolithographic coating includes a first film layer, a photolithographic film layer, and a second film layer stacked sequentially. The refractive indices of the first film layer and the second film layer are both less than 1, so that the photolithographic coating forms an optical structure with a high reflectivity. Then, the photolithographic coating is exposed using light of a first wavelength. At this time, the structure to be led out is reflected by the photolithographic coating. The structure to be led out is used as a mask to image onto the first region of the photolithographic film layer. Then, the photolithographic coating is exposed again using light of a second wavelength and the mask. At this time, the pattern of the mask is imaged onto the second region of the photolithographic film layer. The area where the first region and the second region overlap is the lead-out region, and the lead-out region corresponds to the structure to be led out. In other words, after exposure with the first wavelength of light, the position of the structure to be extracted is imaged onto the first region of the photolithography layer. After exposure with the second wavelength of light, the mask pattern is also imaged onto the second region of the photolithography layer. The overlapping area of ​​the first and second regions corresponds to the structure to be extracted, thus achieving self-alignment between the layer of the structure to be extracted and the layer where the contact hole is located. Therefore, only the overlapping area of ​​the two exposures on the photolithography layer will correspond to the structure to be extracted, which can improve the alignment accuracy between different layers and reduce alignment errors.

[0075] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the apparatus embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0076] The above description is merely a preferred embodiment of this application. Although this application has disclosed preferred embodiments above, it is not intended to limit this application. Any person skilled in the art can make many possible variations and modifications to the technical solutions of this application using the methods and techniques disclosed above, or modify them into equivalent embodiments with equivalent changes, without departing from the scope of the technical solutions of this application. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of this application without departing from the content of the technical solutions of this application shall still fall within the protection scope of the technical solutions of this application.

Claims

1. A method for manufacturing a semiconductor device, characterized in that, The semiconductor device includes a substrate and a structure to be brought out located on one side of the substrate, and the method includes: A photolithographic coating is formed on the structure to be extracted. The photolithographic coating includes a first film layer, a photolithographic film layer, and a second film layer stacked sequentially. The refractive indices of the first film layer and the second film layer are less than 1. The photolithographic coating is exposed using light of a first wavelength to image the structure to be extracted onto the first region of the photolithographic film layer. No mask is used when exposing the structure with light of the first wavelength. The structure to be extracted is reflected by the photolithographic coating, and the structure to be extracted is used as a mask to image the first region of the photolithographic film layer. The photolithographic coating is exposed using light of a second wavelength and a mask to image the pattern of the mask onto a second region of the photolithographic film layer; the region where the first region and the second region overlap is the lead-out region, which corresponds to the structure to be led out.

2. The manufacturing method according to claim 1, characterized in that, The thickness of the photolithographic coating is determined based on the light intensity in the photolithographic film layer when the photolithographic coating is exposed to light of the first wavelength.

3. The manufacturing method according to claim 1, characterized in that, Before forming a photolithographic coating on the structure to be extracted, the method further includes: A dielectric layer is formed on the structure to be brought out, the dielectric layer being located between the structure to be brought out and the photolithographic coating; After exposing the photolithographic coating using light of a second wavelength and a mask, the method further includes: Using the photolithography layer, the dielectric layer corresponding to the lead-out area is etched to obtain a contact hole that penetrates the dielectric layer, and the contact hole exposes the structure to be led out.

4. The manufacturing method according to claim 3, characterized in that, Before etching the dielectric layer corresponding to the lead-out region using the photolithographic film layer, the method further includes: Remove the second film layer.

5. The manufacturing method according to claim 3, characterized in that, After etching the dielectric layer corresponding to the lead-out region using the photolithographic film layer to obtain a contact hole penetrating the dielectric layer, the method further includes: Metal is filled into the contact hole to form a metal contact, which is connected to the structure to be led out.

6. The manufacturing method according to any one of claims 1-5, characterized in that, The photolithography film is made of photoresist, and the first and second films are made of metal.

7. The manufacturing method according to any one of claims 1-5, characterized in that, The first wavelength of light is visible light or ultraviolet light, and the second wavelength of light is ultraviolet light.

8. The manufacturing method according to claim 7, characterized in that, The first wavelength is 633 nm, 532 nm, or 365 nm, and the second wavelength is 365 nm, 248 nm, or 193 nm.

9. The manufacturing method according to any one of claims 1-5, characterized in that, The structure to be extracted is at least one of a gate structure, a source structure, and a drain structure.

10. The manufacturing method according to any one of claims 1-5, characterized in that, The feature size of the mask pattern is larger than the feature size of the structure to be extracted.

Images