A TP disassembly method, system and memory for a layout

Abstract

The present invention provides a layout TP decomposition method, system, and memory. The method comprises: step S1: generating a vectorless graph based on an original layout; step S2: back-coloring the nodes in the generated vectorless graph using a four-color method to obtain each coloring scheme, and selecting the coloring scheme with the least number of universal color nodes as the optimal coloring scheme; wherein, in the four-color method, each node is colored using three different fixed colors and a universal color that can be regarded as any color; except for the node containing the universal color, the color of each node cannot be the same as the color of its adjacent nodes; when coloring a node, it is determined whether it can be colored with one of the three fixed colors; if so, it is directly colored; otherwise, it is directly colored with the universal color. The technical solution of the present invention can improve the efficiency of layout TP decomposition.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and in particular to a TP disassembly method, system and memory for a layout. Background Art

[0002] Due to numerous limitations in lithography technology (new light sources, lithography lenses, and photoresists), the minimum feature size achievable on a single layout has reached its limit. In line with Moore's Law, to meet the demands of ever-smaller chip feature sizes and improved performance, triple patterning technology is expected to be the most practical lithography process for a long time to come. As designs continue to grow in size and complexity, the demands on EDA tools to complete layout splitting with speed and accuracy are becoming increasingly stringent, necessitating the development of more efficient algorithms.

[0003] Triple Pattern (TP) lithography involves first distributing a single pattern onto three masks before performing photolithography. This process of distributing a single pattern onto three masks is called TP unpacking. To ensure unpacking quality, an optimal solution for TP unpacking is required. The optimal solution for TP unpacking is to distribute as many of the patterns to be unpacked as possible onto the three masks while complying with design rules. At the same time, the number of patterns distributed across the three masks must be balanced, meaning the difference in number must be small. An imbalanced distribution of patterns across the three masks will result in more pattern distortion and deformation during photolithography. Balanced unpacking allows for more room for adjustments during OPC (optical proximity correction), resulting in better photolithography quality.

[0004] Finding the optimal solution to TP decomposition is an NP-hard problem. Currently, few solutions exist, both domestically and internationally, that directly address the optimal solution to TP decomposition from the perspective of the layout. A common approach to this problem is to first identify the layout to be decomposed, then map it into nodes in a vectorless graph. The relationships between conflicting layouts (i.e., layouts that do not conform to design rules) are then mapped into edges in the vectorless graph. The vectorless graph is then decomposed using graph theory to obtain the optimal solution. Finally, the optimal solution to the vectorless graph is mapped back into the layout, yielding the optimal solution to TP decomposition. Popular methods for decomposing TP vectorless graph models include heuristic algorithms and backtracking.

[0005] Among the heuristic algorithms, the most commonly used one is the ILP (Integer Linear Programming) algorithm. First, the ILP formula is established based on the Triple Pattern vectorless graph model, namely

[0006] min∑cij (eij∈CE) ,

[0007] stcij = (xi == xj ),

[0008] ∀eij ∈ CE,

[0009] xi∈{0,1,2} ∀i∈ V

[0010] When xi is the three-color variable of a node, i is a vectorless graph node, V is the set of vectorless graph nodes, cij is the binary variable for conflicting edges, eij is the conflicting edge between nodes j and j in the vectorless graph, and CE is the set of conflicting edges. The above model implies that for nodes connected by eij, if i and j are assigned to the same color variable, then cij is 1; otherwise, it is 0. Solving the optimal solution for TP decomposition becomes a matter of finding min∑cij. However, the above model does not consider color balancing. Furthermore, when there are many nodes, using the ILP algorithm to find the optimal solution for Triple Pattern decomposition is time-consuming. This model does not identify nodes that cannot be colored, and cannot map layouts that are difficult to TP decomposition, making it difficult for back-end physical designers to modify and adjust.

[0011] Another common algorithm for finding the optimal solution to TP decomposition is the m-color graph coloring method based on backtracking. The mathematical definition of graph coloring using m-color is: given a vectorless graph G = (V, E), where V is the vertex set and E is the edge set, the graph coloring problem is to partition V into m color groups, each forming an independent set with no adjacent vertices. The optimized version aims to minimize the value of m. Finding the optimal solution to TP decomposition is similar to the m-color graph coloring method. It aims to distribute as many patterns as possible across the three reticles while ensuring a balanced number of patterns across the three reticles, i.e., a small difference in the number of patterns. Therefore, when using backtracking coloring, only three colors can be used to color the vectorless graph. When the number of nodes is small, three colors can be used to color the nodes of the vectorless graph. However, when the vectorless graph has many nodes, three colors are not enough to color every node, so additional colors must be used. When using more colors for coloring, only nodes colored with three of these colors are counted, and the patterns mapped by these three colors are assigned to three masks. Nodes colored with the remaining (m-3) colors are grouped together, and the layout mapped by these nodes is manually retouched by back-end physical designers. To select the optimal backtracking scheme—one that maximizes the number of nodes colored with the three colors while ensuring a small difference in the number of nodes in each of the three color groups—a selection must be made from all backtracked coloring schemes. However, when there are many nodes, many colors are required. In this case, the number of coloring schemes increases dramatically, and so does the time required for backtracking. Summary of the Invention

[0012] The purpose of the present invention is to address the defects of the above-mentioned prior art and provide a TP disassembly method, system and storage device with high disassembly efficiency.

[0013] In an embodiment of the present invention, a method for disassembling a TP of a layout is proposed, which includes:

[0014] Step S1: Generate a vectorless graph based on the original layout;

[0015] Step S2: Use the four-color method to back-color the nodes in the generated vectorless graph, obtain each coloring scheme, and take the coloring scheme with the least number of universal color nodes as the optimal coloring scheme;

[0016] Among them, in the four-color method, three different fixed colors and a universal color that can be regarded as any color are used to color each node. Except for the node where the universal color is located, the color of each node cannot be the same as the color of its adjacent nodes. When coloring a node, it is determined whether it can be colored with one of the three fixed colors. If so, it is directly colored, otherwise it is directly colored with the universal color.

[0017] In the embodiment of the present invention, the edges of the vectorless graph are stored in the form of an adjacency matrix, and the nodes of the edges of the vectorless graph are stored in a one-dimensional vector.

[0018] In an embodiment of the present invention, in step S2, if there are multiple coloring schemes with the same and least number of universal color nodes, the difference in the number of nodes of three different fixed colors in each coloring scheme is compared, and the coloring scheme with the least difference is selected as the optimal coloring scheme.

[0019] In the embodiment of the present invention, step S2 specifically includes:

[0020] Set the coloring scheme obtained by the first backtracking as the optimal coloring scheme;

[0021] Compare the universal color nodes of the coloring scheme obtained by the current backtracking with the optimal coloring scheme obtained after the previous backtracking. If the universal color nodes in the coloring scheme obtained by the current backtracking are fewer, the coloring scheme obtained by the current backtracking is set as the optimal coloring scheme.

[0022] In an embodiment of the present invention, in step S2, if the number of universal color nodes in the current backtracking coloring scheme is the same as the previous one, the difference in the number of nodes of three different fixed colors in the two coloring schemes is compared, and the coloring scheme with the least difference is selected as the optimal coloring scheme.

[0023] In an embodiment of the present invention, a TP disassembly system for a layout is further provided, which adopts the above-mentioned TP disassembly method for a layout when disassembling a TPT layout.

[0024] In an embodiment of the present invention, a memory is further provided, wherein a computer program is stored in the memory. When the computer program is executed by a processor, the above-mentioned TP disassembly method of the layout is executed.

[0025] Compared with the prior art, the TP disassembly method of the layout of the present invention is improved on the basis of the m-color coloring method when solving the optimal solution of TP disassembly. Universal colors are used to participate in coloring to reduce coloring time consumption, coloring balance is set according to the engineering characteristics of TP disassembly, and the optimal solution of TP disassembly is obtained from the backtracking solution space using the sorting idea; according to the number of undyable nodes, the maximum color difference of coloring, and the running time, the TP disassembly method of the layout of the present invention can obtain the optimal solution of TP disassembly in a short time, is highly efficient, and can also effectively improve the quality of TP disassembly. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a flow chart of the TP disassembly method of the layout provided by an embodiment of the present invention.

[0027] Figure 2 This is a flowchart of TP disassembly of a vectorless graph provided by an embodiment of the present invention.

[0028] Figure 3 The diagram is a schematic diagram of coloring and grouping vectorless graph nodes using the method of the present invention.

[0029] Figure 4 The diagram is a schematic diagram showing the number of nodes that cannot be dyed with the required three colors when the method of the present invention and the m-color graph dyeing method are used to dye the same vectorless graph.

[0030] Figure 5 The diagram is a schematic diagram of the maximum difference in the number of nodes dyed with different colors when the same vectorless graph is dyed using the method of the present invention and the m-color graph dyeing method.

[0031] Figure 6 It is a schematic diagram of the time spent on finding the optimal solution of TP decomposition when the method of the present invention and the m-color coloring method are used to color the same vectorless graph. DETAILED DESCRIPTION

[0032] like Figure 1 As shown, in an embodiment of the present invention, a method for disassembling TP of a layout is proposed, which includes steps S1 and S2, which are described below respectively.

[0033] Step S1: Generate a vectorless graph based on the original layout.

[0034] It should be noted that before TP decomposition of the integrated circuit layout, the original layout needs to be converted into a vectorless graph. In the embodiment of the present invention, the edges of the vectorless graph are stored in the form of an adjacency matrix, and the nodes of the edges of the vectorless graph are stored in a one-dimensional vector.

[0035] Step S2: Use the four-color method to back-color the nodes in the generated vectorless graph to obtain each coloring scheme, and take the coloring scheme with the least number of universal color nodes as the optimal coloring scheme.

[0036] It should be noted that the coloring method of the present invention is based on the m-color coloring method. Considering that it is too time-consuming to try to color with multiple colors, and that only three colors are actually needed, the present invention adopts a "four-color method". Among them, in the four-color method, three different fixed colors and a universal color that can be regarded as any color are used to color each node. Except for the node where the universal color is located, the color of each node cannot be the same as the color of its adjacent node. When coloring a certain node, it is determined whether it can be dyed with one of the three fixed colors. If it can, it is directly dyed, otherwise it is directly dyed with the universal color. Since the universal color can be regarded as any color as needed, it will not conflict with any node.

[0037] During backtracking coloring, nodes that cannot be colored with the three required colors are directly colored with the "universal color." This allows all nodes in the vectorless graph to be colored with these four colors. Nodes colored with the "universal color" can also be mapped to the layout, making it easier for back-end physical designers to modify and adjust as needed. Furthermore, considering that in actual engineering, the requirement to distribute as many disassembled patterns as possible across three masks takes precedence over the requirement to balance the number of patterns distributed across the three masks, when disassembling the TP vectorless graph model, we first use the backtracking method to try each solution and obtain each coloring solution. Then, using the sorting principle, we sort all the coloring solutions and select the one with the fewest universal color nodes as the optimal coloring solution. If multiple coloring solutions exist with the same and least number of universal color nodes, we compare the difference in the number of nodes with the three different fixed colors in each coloring solution and select the one with the smallest difference as the optimal coloring solution.

[0038] like Figure 2 As shown, the specific implementation process of step S2 includes:

[0039] The four-color method is used to perform multiple backtracking on the vectorless graph;

[0040] Compare the coloring scheme obtained by the current backtracking with the optimal coloring scheme obtained after the previous backtracking, and set the better coloring scheme as the current optimal coloring scheme;

[0041] Repeat the above process until all coloring schemes are traced back, and the optimal coloring scheme finally obtained is the final TP decomposition coloring scheme of the layout.

[0042] Specifically, the coloring scheme obtained by the current backtracking is compared with the optimal coloring scheme obtained after the previous backtracking, and the better coloring scheme is set as the current optimal coloring scheme, including:

[0043] Compare the universal color node of the coloring scheme obtained by the current backtracking with the optimal coloring scheme obtained after the last backtracking.

[0044] If the coloring scheme currently backtracked contains fewer universal color nodes, then the coloring scheme currently backtracked is set as the optimal coloring scheme;

[0045] If the number of universal color nodes in the current backtracking coloring scheme is the same as the previous one, compare the difference in the number of nodes of three different fixed colors in the two coloring schemes, and select the coloring scheme with the least difference as the optimal coloring scheme.

[0046] like Figure 3 As shown in FIG, the method of the present invention can be used to correctly color and group the vectorless graph nodes. Among them, red, yellow, and green are the required colors, and blue is a universal color. Figure 3 As can be seen, after using this algorithm, the nodes colored red, yellow, and green have no connections to each other, and the number of nodes colored "universal" is the smallest. Furthermore, the difference in the number of nodes colored red, yellow, and green is very small.

[0047] Figure 4 The number of nodes that cannot be dyed with the required three colors when the method of the present invention and the m-coloring graph method are used to dye the same vectorless graph. The horizontal axis represents the vectorless graph (number of nodes, number of edges), and the vertical axis represents the number of nodes that cannot be dyed with the required three colors. The m-coloring graph method uses 12 colors for testing and only produces a single backtracking result, not an optimal solution. Figure 3 It can be seen that when TP decomposition is performed on the same vectorless graph model, the algorithm proposed in the present invention has better results: the number of nodes that cannot be colored is smaller, so it can be proved that the method of the present invention can achieve the purpose of distributing as many patterns to be decomposed as possible onto three masks.

[0048] Figure 5 The maximum difference in the number of nodes dyed with different colors (the three colors required) when dyeing the same vectorless graph using the method of the present invention and the m-color graph coloring method. The horizontal axis represents the vectorless graph (number of nodes, number of edges), and the vertical axis represents the maximum difference in the number of nodes dyed with different colors (the three colors required). The m-color graph coloring method uses 12 colors for testing and only produces a single backtracking result, not an optimal solution. Figure 4It can be seen that in most cases, when TP decomposition is performed on the same vectorless graph model, the method of the present invention has better results: the maximum difference in the number of nodes dyed with different colors (the three colors required) is smaller. Analysis shows that the maximum difference in the number of nodes dyed with different colors (the three colors required) of the algorithm proposed in this patent is larger than that of the m-color coloring method. Figure 4 , it can be seen that this situation occurs to ensure that as many of the patterns to be disassembled as possible are distributed across the three reticles. In actual engineering, distributing as many of the patterns to be disassembled as possible across the three reticles takes precedence over ensuring a balanced number of patterns across the three reticles. Therefore, overall, the method of the present invention can achieve the goal of balancing the number of patterns distributed across the three reticles.

[0049] Figure 6 The time taken to find the optimal solution for TP decomposition of a vectorless graph using the method of the present invention and the m-coloring graph method is shown in Figure 1. The horizontal axis represents the vectorless graph (number of nodes, number of edges), and the numbers in parentheses represent the minimum number of colors required for back-coloring using the m-coloring graph method. The vertical axis represents the time taken to find the optimal solution for TP decomposition of the vectorless graph. As can be seen from the figure, when using the first four colors to color the vectorless graph model, there is little difference between the two methods. However, when using five or more colors to color the vectorless graph, the time taken to find the optimal solution for TP decomposition of the vectorless graph using the m-coloring graph method increases significantly.

[0050] In an embodiment of the present invention, a TP disassembly system for a layout is further provided, which adopts the above-mentioned TP disassembly method for a layout when disassembling a TPT layout.

[0051] In an embodiment of the present invention, a memory is further provided, wherein a computer program is stored in the memory. When the computer program is executed by a processor, the above-mentioned TP disassembly method of the layout is executed.

[0052] In summary, the TP disassembly method of the layout of the present invention is improved on the basis of the m-color coloring method when solving the optimal solution of TP disassembly. Universal colors are used to participate in coloring to reduce the coloring time consumption. Coloring balance is set according to the engineering characteristics of TP disassembly. The optimal solution of TP disassembly is obtained from the backtracking solution space using the sorting idea. According to the number of undyable nodes, the maximum color difference of coloring and the running time, the TP disassembly method of the layout of the present invention can obtain the optimal solution of TP disassembly in a short time, with high efficiency, and can also effectively improve the quality of TP disassembly.

[0053] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A TP disassembly method for a layout, characterized in that: include: Step S1: Generate a vectorless graph based on the original layout; Step S2: Use the four-color method to back-color the nodes in the generated vectorless graph, obtain each coloring scheme, and take the coloring scheme with the least number of universal color nodes as the optimal coloring scheme; Among them, in the four-color method, three different fixed colors and a universal color that can be regarded as any color are used to color each node. Except for the node where the universal color is located, the color of each node cannot be the same as the color of its adjacent nodes. When coloring a node, it is determined whether it can be colored with one of the three fixed colors. If so, it is directly colored, otherwise it is directly colored with the universal color.

2. The TP disassembly method of the layout according to claim 1, characterized in that: The edges of the vectorless graph are stored in the form of an adjacency matrix, and the nodes of the vectorless graph are stored in a one-dimensional vector.

3. The TP disassembly method of a layout according to claim 1, wherein: Step S2 specifically includes: Set the coloring scheme obtained by the first backtracking as the optimal coloring scheme; Compare the universal color nodes of the coloring scheme obtained by the current backtracking with the optimal coloring scheme obtained after the previous backtracking. If the universal color nodes in the coloring scheme obtained by the current backtracking are less than the universal color nodes in the optimal coloring scheme obtained after the previous backtracking, then set the coloring scheme obtained by the current backtracking as the optimal coloring scheme.

4. The TP disassembly method of a layout as claimed in claim 3, wherein: In step S2, if the number of universal color nodes in the current backtracking coloring scheme is the same as the previous one, the difference in the number of nodes of three different fixed colors in the two coloring schemes is compared, and the coloring scheme with the least difference is selected as the optimal coloring scheme.

5. A TP disassembly system for a layout, characterized in that: When disassembling the TPT layout, the TP disassembly method of the layout according to any one of claims 1 to 4 is adopted.

6. A memory, characterized in that: The memory stores a computer program, and when the computer program is executed by the processor, the TP disassembly method of the layout according to any one of claims 1 to 4 is executed.

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