Single-phase phase-locked loop eliminating influence of double-frequency component

Abstract

The application discloses a single-phase phase-locked loop capable of eliminating the influence of double frequency, which comprises a double frequency elimination frequency discrimination module and a phase angle estimation module. The double frequency elimination frequency discrimination module generates a frequency discrimination signal without the influence of double frequency through mathematical processing, and then inputs the frequency discrimination signal into the phase angle estimation module with PI control and integrator, so that the real-time phase angle of the phase-locked loop is estimated by the phase angle estimation module. The phase-locked loop of the application is designed with the frequency discrimination module and the phase angle estimation module, so that the influence of the double frequency component on the phase-locked result in the steady state of the phase-locked loop is eliminated, and meanwhile, the dynamic response performance of the phase-locked loop is ensured. The application is used for online accurate estimation under non-ideal power grid conditions.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of electrical engineering and power electronics, and relates to a self-adaptive grid-connected converter single-phase soft phase-locked loop, in particular to a grid voltage soft phase-locked loop based on orthogonal signal generation. BACKGROUND

[0002] Due to the explosive growth of power electronic interfaces in the power grid, harmonics and DC offsets in the power grid will more easily interfere with synchronization during power conversion. Therefore, it is of great engineering value to accurately obtain synchronization information under non-ideal grid conditions. Among them, the phase-locked loop technology is one of the technologies for obtaining grid synchronization information.

[0003] In the prior art, the use of a hardware single-phase phase-locked loop will increase the cost and cause misjudgment at the zero-crossing point of the power grid. The software-implemented phase-locked loop is relatively easy to implement, and among them, the phase-locked loop technology based on a second-order generalized integral and the generation of a quadrature signal based on a delay module to assist frequency discrimination is relatively easy to implement. However, the phase-locked loop based on the second-order generalized integral has a large amount of calculation, and when the signal frequency deviates, the phase-locked loop has a large secondary fluctuation after entering the steady state of phase locking, which is not conducive to the detection of synchronization information. SUMMARY

[0004] The purpose of the present application is to overcome the shortcomings of the prior art and provide a single-phase phase-locked loop that eliminates the influence of double-frequency components. The influence of double-frequency components on the grid voltage phase-locked loop result in the steady state of the traditional delay signal-based phase-locked loop is improved, and the rapidity of the dynamic response of the phase-locked loop is improved.

[0005] The single-phase phase-locked loop provided by the present application comprises a double-frequency-eliminating frequency discrimination module. After the input signal enters the double-frequency-eliminating frequency discrimination module, a frequency discrimination signal without the influence of double-frequency components can be output. A phase angle estimation module is designed. The signal processed by the integrator in the PI control module and the output signal of the entire phase angle estimation module are input into the double-frequency-eliminating frequency discrimination module. The single-phase phase-locked loop implementation method comprises the following steps:

[0006] Step 1, according to the engineering conditions, determine the damping coefficient ζ of the phase-locked loop, which is the working bandwidth ω of the phase-locked loop. n , the working parameters of the proportional integrator are determined by substituting the formula. Specifically, the k p , k i parameters are determined by the following mathematical formula.

[0007]

[0008] Step 2, the single-phase grid voltage obtained by sampling is normalized, and the normalized result is sent to the double-frequency-eliminating frequency discrimination module 1 for calculation.

[0009] Step 3, the output signal v pq The input signal v

[0010] Step 4, the output value Δω o The phase angle estimation value θ o is fed back into the frequency discrimination module 1 to eliminate the second harmonic component.

[0011] The specific structure and principle of the present application are as follows:

[0012] A single-phase phase-locked loop to eliminate the influence of the second harmonic component includes two modules: a frequency discrimination module 1 to eliminate the second harmonic component and a phase angle estimation module 2. The frequency discrimination module 1 to eliminate the second harmonic component is responsible for outputting a frequency discrimination signal without the influence of the second harmonic component after the input signal is input into the frequency discrimination module 1 to eliminate the second harmonic component. The phase angle estimation module 2 is responsible for inputting the signal processed by the integrator in the PI control module and the output signal of the entire phase angle estimation module into the frequency discrimination module to eliminate the second harmonic component.

[0013] In use, the input signal v i (t) of the system is input into the frequency discrimination module 1 to eliminate the second harmonic component. The signal v dq (t) obtained and output after being processed by the frequency discrimination module 1 to eliminate the second harmonic component does not contain the second harmonic component at any frequency.

[0014] The calculation value Δω o output by the integral element in the proportional-integral controller in the phase angle estimation module 2 is used to estimate the change of the input frequency, and the value is fed back to the frequency discrimination module 1 to eliminate the second harmonic component.

[0015] Further, the frequency discrimination module 1 to eliminate the second harmonic component generates a frequency discrimination signal without the influence of the second harmonic component. Then the frequency discrimination signal is input into the phase angle estimation module containing the PI control and the integrator, and the function of estimating the real-time phase angle of the phase-locked loop is realized through the calculation of the phase angle estimation module 2.

[0016] Subsequently, the output signal of the phase angle estimation module 2 and the output value of the integrator in the phase angle estimation module are used as feedback signals and input into the frequency discrimination module 1 to eliminate the second harmonic component.

[0017] Further, the single-phase phase-locked loop further includes a quadrature signal generation module and a processing module. The quadrature signal generation module and the processing module are responsible for eliminating the influence of the second harmonic component on the phase-locked result when the phase-locked loop is in a steady state, and ensuring the performance of the dynamic response of the phase-locked loop.

[0018] Further, the use environment of the single-phase phase-locked loop is under a non-ideal power grid environment, and the single-phase phase-locked loop is responsible for online accurate estimation under non-ideal power grid conditions.

[0019] Further, the single-phase phase-locked loop further comprises a set of frequency discrimination signals without the influence of the double-frequency component, referred to as specific signals. The "specific signals", i.e. the frequency discrimination signals without the influence of the double-frequency component, are frequency discrimination signals that do not contain the double-frequency component at any frequency. The method for obtaining the "specific signals" is as follows: using the output quantity in the phase angle estimation module and the output quantity of the integrator in the module as feedback, a frequency discrimination unit is formed, and the construction is carried out according to the following process: using a delay signal link to generate two signals used for auxiliary frequency discrimination, which are denoted as v p (t) and v q (t) in turn, and then adding the two signals to obtain the v pq (t) signal without the double-frequency component, as the output signal of the frequency discrimination module.

[0020] Further, the expressions of the auxiliary frequency discrimination signals v p (t) and v q (t) are as follows:

[0021]

[0022] wherein v is the input grid voltage signal, the phase of the input grid voltage signal is V i is the voltage amplitude, ω i is the signal angular frequency, is the initial phase angle. ω n is the grid frequency in the rated state, Δω i = ω i - ω n is the difference between the input frequency and the normal grid frequency, θ i is the signal phase, and T is the period of the signal at the rated frequency.v β (t) is the input grid voltage signal v i (t) delayed by periods to obtain a signal, v c (t) is a signal orthogonal to the input signal.

[0023] Further, the phase angle estimation module 2 contains proportional-integral controller parameters k p and k i . Among them, the parameters k p and k i are the parameters of the proportional-integral controller in the phase angle estimation module 2. k p is the gain parameter of the proportional amplification link, which is used to realize the proportional amplification function of the input signal. k i is the gain parameter of the integral link, which is used to realize the proportional amplification function of the input signal after integration. k pand k i The selection of parameters will affect the performance of the proportional-integral controller. In order to adapt to different engineering requirements, the parameters k p and k i need to be selected. Specifically as follows:

[0024] The k p , k i parameters of the phase-locked loop are selected using the following formula:

[0025]

[0026] Wherein, ζ is the selected damping coefficient, ω n is the working bandwidth of the phase-locked loop. According to the engineering requirements, the damping coefficient ζ and the working bandwidth ω n of the phase-locked loop are selected, and the appropriate k p , k i parameters in the proportional-integral controller are given.

[0027] Further, the specific structure of the frequency discrimination module 1 for eliminating the second harmonic is as follows:

[0028] The frequency discrimination module 1 for eliminating the second harmonic is composed of the following sub-modules: delay signal link 1.01, multiplier one 1.02, adder one 1.03, divider 1.04, trigonometric function module one 1.05, trigonometric function module two 1.06, gain module 1.07, multiplier two 1.08, adder two 1.09, trigonometric function module three 1.10, trigonometric function module four 1.11, multiplier three 1.12, multiplier four 1.13 and adder three 1.14.

[0029] Wherein, the input ends of the multiplier one 1.02, the delay signal link 1.01 and the multiplier three 1.12 are connected together to form the input end of the frequency discrimination module for eliminating the second harmonic. The output ends of the multiplier three 1.12 and the multiplier four 1.13 are connected together with the input end of the adder three 1.14. The output end of the adder three 1.14 is the frequency discrimination signal v pqThe outputs of delay signal circuit 1.01 and multiplier 1.02 are connected to the input of adder 1.03. The output of adder 1.03 is connected to the output of trigonometric function module 1.05. The output of trigonometric function module 2.06 is connected to the inputs of multiplier 1.02 and multiplier 2.08. The output of trigonometric function module 4.11 is connected to the inputs of multiplier 3.12 and multiplier 2.08. The outputs of trigonometric function module 3.10 and multiplier 2.08 are both connected to the input of adder 2.09. The outputs of adder 2.09 and divider 1.04 are both connected to the input of multiplier 4.13. The input of gain module 1.07 receives the angular frequency estimate Δω. o The signal is the original input calculated by the integrator module 2.02 of the proportional-integral controller in phase angle estimation module 2. The output of gain module 1.07 is connected to the inputs of trigonometric function module one 1.05 and trigonometric function module two 1.06, respectively. The output of trigonometric function module one 1.05 is connected to the inputs of multiplier three 1.12 and divider 1.04, respectively. The input of trigonometric function module three 1.10 is connected to the input of trigonometric function module four 1.11, and the received signal is the phase estimate θ. o The signal. The phase estimate θ of this signal. o It is the original input signal calculated by phase angle estimation module 2.05.

[0030] In other words, 1.01 is the delay signal element, which delays the input signal. The following are the functions of the modules: 1.02, 1.08, 1.12, and 1.13 are multipliers. 1.03, 1.09, and 1.14 are adders. 1.04 is a divider. 1.05, 1.06, 1.10, and 1.11 are trigonometric function modules, outputting trigonometric function values ​​corresponding to the inputs. 1.07 is a gain module with a gain of T\4.

[0031] Input signal v i The signal angular frequency estimate Δω calculated in phase angle estimation module 2 o Delay is generated by 1.01 signal v β v β Signals are generated through adder 1.03, multiplier 1.02, divider 1.04, trigonometric function modules 1.05 and 1.06, and gain module 1.07.

[0032] in For the input grid voltage signal, the input grid voltage signal phase is V i is the voltage amplitude, ω i is the signal angular frequency, t is the time, is the initial phase angle. ω n is the grid frequency in the rated state, Δω o = ω o - ω n is the difference between the input angular frequency estimate and the normal grid angular frequency, T is the period of the signal at the rated frequency.v β (t) is the input grid voltage signal v i (t) delayed by one period, v c (t) is the signal orthogonal to the input signal.

[0033] The signal v c is multiplied by the multiplier 1.08, 1.13, the adder 1.09, the trigonometric function module 1.10 generates an auxiliary frequency discriminator signal v p (t) = v c (t) [cos(θ0) - sin(Δω o T / 4) sin(θ0)],

[0034] where is the input grid voltage signal phase estimate, ω o is the input signal angular frequency estimate, t is the time, is the input signal phase angle estimate, ω n is the grid frequency in the rated state, Δω o = ω o - ω n is the difference between the input angular frequency estimate and the grid rated angular frequency, T is the period of the signal at the rated frequency, v c (t) is the signal orthogonal to the input signal, output by the gain module 1.07.

[0035] At the same time, the signal v a is multiplied by the multiplier 1.12, the trigonometric functions 1.05, 1.11, the gain module 1.07 generates another auxiliary frequency discriminator signal v q (t) = v α (t) cos(Δω o T / 4) sin(θ0), then the two frequency discriminator signals pass through the adder 1.14 to generate a signal v pq (t) = v p (t) + v q (t) = V i [sin(θ i - θ o) + sin(θ i - Δω i T / 4 - θ o )].

[0036] wherein is the input grid voltage signal, v c (t) is a signal orthogonal to the input signal, v p (t) and v q (t) are auxiliary frequency discriminator signals outputted by the trigonometric function module 1.10 and the gain module 1.07, respectively, the phase of the input grid voltage signal is V i is the voltage amplitude, ω i is the angular frequency of the signal, t is time, is the initial phase angle. is the phase estimation value of the input grid voltage signal, ω o is the estimation value of the angular frequency of the input signal, ω n is the grid frequency in the rated state, Δω o = ω o - ω n is the difference between the estimation value of the input angular frequency and the normal grid angular frequency, T is the period of the signal at the rated frequency.

[0037] Further, the phase angle estimation module 2 is composed of the proportional amplification module 2.01 of the proportional-integral controller, the integral module 2.02 of the proportional-integral controller, the adder four 2.03, the adder five 2.04 and the integral module two 2.05. The gain value of the proportional amplification module 2.01 of the proportional-integral controller is k p , the gain of the integral module 2.02 of the proportional-integral controller is k i , and the gain of the adder four 2.03 and the integral module two 2.05 is 1.

[0038] The frequency discriminator signal without double frequency v pq obtained by the frequency discriminator module 1 without double frequency is connected to the input ends of the proportional amplification module 2.01 of the proportional-integral controller and the integral module 2.02 of the proportional-integral controller. The output end of the proportional amplification module 2.01 of the proportional-integral controller and the output end of the adder four 2.03 serve as the input end of the adder five 2.04. The output end of the integral module 2.02 of the proportional-integral controller outputs Δω o to the input end of the module 1.07 in the frequency discriminator module 1 without double frequency, and the output end of the module is connected to ω NF as the two input ends of the adder four 2.03. The output end of the adder five 2.04 serves as the input end of the integral module 2.05 with a gain of 1. The output end of 2.05 outputs the phase angle estimation value θ oIt is then sent to frequency discrimination module 1 (which does not contain a second harmonic) and connected to trigonometric function module 3 (1.10) and trigonometric function module 4 (1.11).

[0039] Signal v without second harmonic components pq The estimated angular frequency deviation Δω is generated using the integrator module 2.02. o This is then output as feedback to the frequency discrimination module 1, which eliminates the second harmonic. Adder 4.03 converts the power frequency ω... NF The output of adder 2.02 is added to the output of adder 4 2.03, and then the output of adder 4 2.03 is multiplied by v. pq The signals generated by the proportional amplifier module 2.01 are added together by adder 2.04. The output of adder 2.04 is then processed by the integrator module 2.05 to obtain the estimated phase angle θ of the input signal. o .

[0040] Furthermore, the input signal v i The output signal θ in phase angle estimation module 2 o and feedback signal Δω o The frequency discrimination module 1, which eliminates the second harmonic, performs calculations to obtain the output frequency discrimination signal v that does not contain the second harmonic component. pq Among them, the input voltage signal terminal v i The output phase angle estimate θ is obtained by connecting the input terminals of delay signal circuit 1.01, multiplier 1.02, and multiplier 3 1.12 to the output terminal of integrator 2.05. o The signal is sent to frequency discrimination module 1 (without double harmonics) and connected to trigonometric function module 3 (1.10) and trigonometric function module 4 (1.11) within it. The output of the integral module 2.02 of the proportional-integral controller outputs Δω. o The input terminal 1.07 of the frequency discrimination module 1 (without double harmonics) is connected to the frequency discriminator module 1. The output value v of the quadrature signal generation module and the processing module is... pq Connected to the input of phase angle estimation module 2, the corresponding output value θ is calculated. o and feedback value Δω o .

[0041] Beneficial effects of the present invention

[0042] The single-phase soft phase-locked loop proposed in this invention improves the frequency discrimination module of the phase-locked loop, achieving complete elimination of the influence of the second harmonic component on the steady-state phase-locking result in steady state, while also ensuring the fastness of phase-locking. A comparison between the phase-locked loop using this invention and a traditional single-phase phase-locked loop in a synchronous coordinate system is as follows. Figures 7-10 As shown: From Figure 8 As can be seen from this, the time for the phase-locked loop proposed in this paper to enter the steady state from time 0 is significantly improved. Figure 9It can be known from the description that the phase-locked loop proposed in the present application has a significantly shortened time to enter a steady state after phase change compared with a conventional phase-locked loop. Figure 10 It can be known from the description that the phase-locked loop proposed in the present application has a more smooth waveform at the time to enter a steady state after frequency change compared with a conventional phase-locked loop, and a significantly shortened time to enter a steady state. BRIEF DESCRIPTION OF DRAWINGS

[0043] Figure 1 It is a flow chart of a conventional phase-locked loop structure.

[0044] Figure 2 It is a flow chart of a phase-locked loop (TD-PLL) structure containing a delay module.

[0045] Figure 3 It is a flow chart of a phase-locked loop (Proposed-PLL) structure of the present application, and two parts in the figure are a frequency discrimination module 1 for eliminating double frequency and a phase angle estimation module 2.

[0046] Figure 4 It is a flow chart of a specific implementation of the phase-locked loop of the present application.

[0047] Figure 5 It is a flow chart of a specific implementation of the phase-locked loop of the present application. Figure 4 It is a flow chart of a specific implementation of the phase-locked loop of the present application.

[0048] Figure 6 It is a flow chart of a specific implementation of the phase-locked loop of the present application. Figure 4 It is a flow chart of a specific implementation of the phase-locked loop of the present application.

[0049] Figure 7 It is a performance comparison chart of the phase-locked loop (Proposed-PLL) of the present application and the phase-locked loop (TD-PLL) containing a delay module. The k i = 15791, the k p = 177.7, the k i = 15791, the k p = 177.7.

[0050] Figure 8 It is an enlarged schematic diagram at the time of 0-0.11s,

[0051] Figure 9 It is an enlarged schematic diagram at the time of 0.18s-0.32s,

[0052] Figure 10 It is an enlarged schematic diagram at the time of 0.38s-0.54s.

[0053] Figure 8 、 9 , 10 is an enlarged Figure 7 . From the enlarged schematic Figure 8It can be known that the time when the phase-locked loop proposed in the present application enters a steady state from 0 time is significantly improved, Figure 9 It can be known that the time when the phase-locked loop proposed in the present application enters a steady state from 0 time is significantly improved, Figure 10 It can be known that the time when the phase-locked loop proposed in the present application enters a steady state from 0 time is significantly improved, DETAILED DESCRIPTION

[0054] The present application will be further described in detail below in combination with the drawings:

[0055] Referring to Figures 3 to 6 To solve the problems in the prior art, the present application proposes a single-phase phase-locked loop for eliminating the influence of a double-frequency component. Specifically, as shown in Figure 3 The phase-locked loop includes a double-frequency-eliminating frequency discrimination module 1 and a phase angle estimation operation module 2. The flowchart of the double-frequency-eliminating frequency discrimination module 1 is shown in Figure 5 The double-frequency-eliminating frequency discrimination module is composed of the following sub-modules: a delay signal link 1.01, a multiplier 1.02, an adder 1.03, a divider 1.04, a trigonometric function module 1.05, a trigonometric function module 2.06, a gain module 1.07, a multiplier 2.08, an adder 2.09, a trigonometric function module 3.10, a trigonometric function module 4.11, a multiplier 3.12, a multiplier 4.13, and an adder 3.14.

[0056] Referring to Figure 5 The double-frequency-eliminating frequency discrimination module 1 can generate a frequency discrimination signal without the influence of a double-frequency component, and then the output signal of the module 1 is input into the phase angle estimation module 2. The flowchart of the phase angle estimation module 2 is shown in FIG. 6, and the phase angle estimation module 2 is composed of the following sub-modules: a proportional amplification module 2.01 of a proportional-integral controller, an integral module 2.02 of the proportional-integral controller, an adder 4.03, an adder 5.04, and an integral module 2.05.

[0057] Referring to Figure 6 The input signal of the phase angle estimation module 2 is the output signal of the double-frequency-eliminating frequency discrimination module 1, and the signal output by the integrator in the phase angle estimation module 2 and the output signal of the entire phase angle output module are sent into the double-frequency-eliminating frequency discrimination module 1 as feedback signals.

[0058] The present application is compared with a conventional single-phase phase-locked loop based on a delay unit for simulation verification, and the performance comparison diagram is shown in FIG. 7- Figure 10As shown, it can be seen that the phase-locked loop of the application eliminates the influence of the double frequency component on the steady-state result of the phase-locked loop when the frequency changes, and the phase-locked loop of the application has a faster dynamic response time.

[0059] The specific embodiments of the application are as follows:

[0060] The input voltage is sampled and normalized.

[0061] The normalized result is divided into two paths and input into the double frequency elimination frequency discrimination module 1, one of which generates the auxiliary frequency discrimination signal v p (t), and the other generates the auxiliary frequency discrimination signal v q (t). Specifically, the expressions of this group of signals are respectively:

[0062]

[0063] The Δω0 obtained by the integration module in the phase angle estimation module 2 and the output value θ o of the phase angle estimation module 2 are used as feedback quantities and input into the frequency discrimination module 1, and then v p (t), v q (t) are obtained by mathematical processing.

[0064] The obtained v p (t), v q (t) are added to obtain v pq (t).

[0065] Specifically, the expression of v pq (t) is:

[0066] v pq (t) = v p (t) + v q (t) = V i [sin(θ i -θ o ) + sin(θ i -Δω i T / 4-θ o )]

[0067] The specific method for obtaining v pq (t) is as follows:

[0068] The input power grid voltage signal is expressed as:

[0069]

[0070] Where V i is the voltage amplitude, ω i is the signal angular frequency, and θ is the initial phase angle, Let T be the signal phase, and T be the signal period at the rated frequency.

[0071] Input signal v i (t) and the estimated signal angular frequency Δω0 calculated in phase angle estimation module 2 are used to generate a delay of 1.01. Signal processing and delay After one cycle, the signal v is obtained. β (t), specifically:

[0072] v β (t)=V i cos(θ i -ω i T / 4)

[0073] =V i cos(θ i cos(ω) i T / 4)+V i sin(θ i sin(ω) i T / 4)

[0074] v β (t) The signal v is generated through adder 1.03, multiplier 1.02, divider 1.04, trigonometric function modules 1.05 and 1.06, and gain module 1.07. c (t)

[0075] Specifically,

[0076] The Δω0 obtained by the integration module and the output value θ of the phase angle estimation module 2 are used together. o With v i (t), v β (t), v c (t) undergoes mathematical processing. The signal v is processed mathematically. c The multipliers 1.08 and 1.13, the adder 1.09, and the trigonometric function module 1.10 generate an auxiliary frequency discrimination signal. Specifically, this auxiliary frequency discrimination signal v p (t)=v c (t)[cos(θ0)-sin(Δω i [T / 4)sin(θ0)]

[0077] Simultaneously signal v a Together with multiplier 1.12, trigonometric functions 1.05 and 1.11, and gain module 1.07, another auxiliary frequency discrimination signal is generated. Specifically, this auxiliary frequency discrimination signal v q (t)=v α (t)cos(Δω i T / 4)sin(θ0)

[0078] Then, the two auxiliary frequency discriminator signals are passed through adder 1.14 to generate a signal v that does not contain a second harmonic component. pq (t), specifically, v pq (t)=v p (t)+v q (t)=V i [sin(θ i -θ o )+sin(θ i -Δω i T / 4-θ o )).

[0079] The frequency discrimination signal v without the second harmonic is... pq (t) is input into phase angle estimation module 2. The specific implementation of phase angle estimation module 2 is as follows:

[0080] Signal v without second harmonic components pq The integral module 2.02 generates an estimated angular frequency deviation value Δω0, which is then output as feedback to module 1. The power frequency ω... NF Add it to the output of 2.02, and then add it to v. pq The signal generated by the proportional amplifier module 2.01 is processed by the adder 2.04 and the integrator 2.05 to obtain the estimated phase angle θ of the input signal. o .

[0081] ω NF With Δω o Integrating the sum yields the output phase estimate θ. o Then Δω o The output phase estimate θ0 is sent as a feedback signal to the frequency discrimination module 1 for eliminating the second harmonic.

[0082] To enable the phase angle estimation module to operate under different engineering requirements, it is necessary to select an appropriate k. p k i The parameters ensure that the proportional-integral control loop in phase angle estimation module 2 functions correctly. The parameters are selected by establishing a small-signal model of the phase-locked loop using a small-signal modeling method. Specifically, the parameter selection process is as follows:

[0083] Let θ i =ω Nf t+Δθ i θ0=ω Nf t+Δθ0 and substitute v pq (t), thus obtaining

[0084] v pq (t)=V i [sin(θi -θ0)+sin(θ i -Δω i T / 4-θ0)]

[0085] =V i (Δθ i +Δθ i -Δω i T / 4-2Δθ0)

[0086] For v dq Performing a Laplace transform on (t), we get:

[0087] v pq (s)=V i ((1+e -sT / 4 )Δθ i (s)-2Δθ0(s))

[0088] The closed-loop transfer function of the system can now be written as:

[0089]

[0090] make

[0091] Where ζ is the damping coefficient, ω n The operating bandwidth of the phase-locked loop is determined according to different engineering requirements.

[0092] by ω n Taking 2π*20rad / s as an example, the k of the phase-locked loop can be obtained. p k i The parameters are: k i =15791, k p =177.7.

[0093] Figure 7 This is a performance comparison chart between the proposed phase-locked loop (PLL) and the TD-PLL with a delay module. The k-value of the TD-PLL with the delay module is shown in the chart. i =15791, k p =177.7, k of the proposed phase-locked loop (PLL) i =15791, k p =177.7.

[0094] Figure 8 , 9 And 10 are respectively Figure 7 Enlarged schematic diagrams of the time intervals 0-0.11s, 0.18s-0.32s, and 0.38s-0.54s. (From the enlarged schematic diagram...) Figure 8It can be known that the time for the phase-locked loop proposed in the present application to enter a steady state from 0 time is significantly improved, Figure 9 It can be known that the time for the phase-locked loop proposed in the present application to enter a steady state after phase change is significantly shortened compared with a conventional phase-locked loop, Figure 10 It can be known that the waveform for the phase-locked loop proposed in the present application to enter a steady state after frequency change is more smooth, and the time for the phase-locked loop to enter a steady state is significantly shortened compared with a conventional phase-locked loop.

[0095] The above is only a preferred embodiment of the present application, and does not limit the present application in any form. Although the present application has been disclosed as above with a preferred embodiment, it is not intended to limit the present application. Any person skilled in the art can make some changes or modifications to the above disclosed methods and technical contents to make equivalent embodiments with equivalent changes, without departing from the technical solution of the present application. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application still belongs to the scope of the technical solution of the present application.

Claims

1. A single-phase phase-locked loop for eliminating the influence of double-frequency components, comprising two modules: a double-frequency-eliminating frequency-discriminating module (1) and a phase angle estimation module (2); The double-frequency-eliminating frequency-discriminating module (1) is responsible for outputting a frequency-discriminating signal without the influence of double-frequency components after the input signal enters the double-frequency-eliminating frequency-discriminating module; The phase angle estimation module (2) is responsible for inputting the signal processed by the integrator in the PI control module and the output signal of the entire phase angle estimation module into the double-frequency-eliminating frequency-discriminating module; In use, the input signal v i (t) is passed to a frequency discriminator (1) which removes the second harmonic; the signal v dq (t) obtained after processing by the frequency discriminator (1) which removes the second harmonic is passed to a phase angle estimation module (2); The calculation amount Δω of the integral element output in the proportional-integral controller in the phase angle estimation module (2) o for estimating the change of input frequency o The numerical value of the calculation amount Δω is fed back to the frequency discrimination module (1) for eliminating the double frequency; characterized in that: The single-phase phase-locked loop further comprises a group of frequency-discriminating signals without the influence of double-frequency components, referred to as "specific signals"; The "specific signals", i.e. the frequency-discriminating signals without the influence of double-frequency components, are frequency-discriminating signals that do not contain double-frequency components at any frequency; the "specific signals" are obtained by using the output of the phase angle estimation module and the output of the integrator in the module as feedback to form a frequency-discriminating unit, and constructing the unit according to the following process: Two signals used to assist frequency discrimination are generated using a delay signal link, denoted as: v p (t), v q (t), and then the two signals are added to obtain a signal without a double frequency component v pq (t) as the output signal of the frequency discrimination module.

2. A single phase phase-locked loop which eliminates the influence of the second harmonic component according to claim 1, characterized in that, The double-frequency-eliminating frequency-discriminating module (1) generates a frequency-discriminating signal without the influence of double-frequency components; then the frequency-discriminating signal is input into the phase angle estimation module containing PI control and integrator, and the function of estimating the real-time phase angle of the phase-locked loop is realized through the calculation of the phase angle estimation module (2); Subsequently, the output signal of the phase angle estimation module (2) and the output of the integrator in the phase angle estimation module are used as feedback signals and sent into the double-frequency-eliminating frequency-discriminating module (1) respectively.

3. A single phase phase-locked loop that eliminates the effects of the second harmonic component according to claim 1, characterized in that, The single-phase phase-locked loop further comprises a quadrature signal generation module and processing module; the quadrature signal generation module and processing module are responsible for eliminating the influence of double-frequency components on the phase-locked result in the steady state of the phase-locked loop, while ensuring the performance of the dynamic response of the phase-locked loop.

4. A single phase phase-locked loop that eliminates the effects of the second harmonic component according to claim 1, characterized in that, The use environment of the single-phase phase-locked loop is under non-ideal power grid environment, and it is responsible for online accurate estimation under non-ideal power grid conditions.

5. A single phase phase-locked loop that eliminates the effects of the second harmonic component according to claim 1, characterized in that, The signal for assisting frequency discrimination: v p (t) and v q The expressions of (t) and v (t) are respectively wherein is the input grid voltage signal, the input grid voltage signal phase is V i is the voltage amplitude, ω i is the signal angular frequency, is the initial phase angle; ω n is the grid frequency in the rated state, Δω i = ω i - ω n is the difference between the input frequency and the normal grid frequency, θ i is the signal phase, θ o is the phase angle estimate, T is the period of the signal at the rated frequency; v β (t) is the input grid voltage signal v i (t) delayed by one period, v c (t) is the signal orthogonal to the input signal.

6. The single-phase phase-locked loop that eliminates the influence of the second harmonic component according to claim 1, characterized in that, The phase angle estimation module (2) contains proportional integral controller parameters k p and k i ; wherein, the parameters k p and k i are the parameters of the proportional integral controller in the phase angle estimation module (2); k p is the gain parameter of the proportional amplification link, which is used to realize the proportional amplification function of the input signal; k i is the gain parameter of the integral link, which is used to realize the proportional amplification function of the input signal after integration; k p and k i The selection of the parameters will affect the performance of the proportional integral controller. In order to adapt to different engineering requirements, the parameters k p and k i need to be selected; as follows: The k p , k i parameters of the phase-locked loop are selected using the following equations: Wherein, ζ is the selection damping coefficient, ω n is the working bandwidth of the phase-locked loop; according to the engineering requirements, the damping coefficient ζ and the working bandwidth ω of the phase-locked loop are selected n , and the appropriate k p , k i parameters in the proportional integrator are given.

7. The single-phase phase-locked loop that eliminates the influence of the second harmonic component according to claim 1, characterized in that, The double-frequency-eliminating frequency-discriminating module (1) is composed of the following sub-modules: a delay signal link (1.01), a multiplier one (1.02), an adder one (1.03), a divider (1.04), a trigonometric function module one (1.05), a trigonometric function module two (1.06), a gain module (1.07), a multiplier two (1.08), an adder two (1.09), a trigonometric function module three (1.10), a trigonometric function module four (1.11), a multiplier three (1.12), a multiplier four (1.13), and an adder three (1.14); Among them, the input ends of the multiplier one (1.02), the delay signal link (1.01), and the multiplier three (1.12) are connected together to form the input end of the double-frequency-eliminating frequency-discriminating module; The output end of the multiplier three (1.12) and the output end of the multiplier four (1.13) are connected to the input end of the adder three (1.14); The output of adder three (1.14) is the frequency discriminator signal v pq ; The output end of the delay signal link (1.01) and the output end of the multiplier one (1.02) are connected to the input end of the adder one (1.03); The output end of the adder one (1.03) and the output end of the trigonometric function module one (1.05) are connected together; The output end of the trigonometric function module two (1.06) is connected with the input end of the multiplier one (1.02) and the input end of the multiplier two (1.08) respectively; The output end of the trigonometric function module four (1.11) is connected with the input end of the multiplier three (1.12) and the input end of the multiplier two (1.08) respectively; The output end of the trigonometric function module three (1.10) and the output end of the multiplier two (1.08) are connected with the input end of the adder two (1.09) together; The output end of the adder two (1.09) and the output end of the divider (1.04) are connected with the input end of the multiplier four (1.13) together; The input of the gain module (1.07) receives a signal of the angular frequency estimation value Δω o The output of the gain module (1.07) is connected with the input of the trigonometric function module one (1.05) and the input of the trigonometric function module two (1.06) respectively. The output end of the trigonometric function module one (1.05) is connected with the input end of the multiplier three (1.12) and the input end of the divider (1.04) respectively; The input terminal of the trigonometric function module three (1.10) is connected with the input terminal of the trigonometric function module four (1.11) together, and the accepted signal is: phase estimation value θ o signal.

8. The single-phase phase-locked loop that eliminates the influence of the second harmonic component according to claim 1, characterized in that, The phase angle estimation module (2) is composed of the proportional amplification module (2.01) of the proportional-integral controller, the integral module (2.02) of the proportional-integral controller, the adder four (2.03), the adder five (2.04) and the integral module two (2.05); The gain value of the proportional amplification module (2.01) of the proportional integral controller is k p The gain of the integral module (2.02) of the proportional integral controller is k i The gain of the adder four (2.03), the integral module two (2.05) is 1; The output of the proportional amplification module (2.01) of the proportional-integral controller is connected to the output of the adder four (2.03) as the input of the adder five (2.04); the output of the integral module (2.02) of the proportional-integral controller is connected to ω NF as two inputs of the adder four (2.03) NF is the power frequency; the output of the adder five (2.04) is the input of the integral module (2.05); the output of the integral module (2.05) outputs the phase angle estimation value θ o ; which is sent to the frequency discriminator module (1) without the double frequency and connected to the trigonometric function module three (1.10) and the trigonometric function module four (1.11); signal v without the second harmonic component pq The angular frequency deviation estimate Δω is generated by the integral module (2.02) o and output as a feedback quantity to the second harmonic elimination frequency discriminator (1); the power frequency ω NF is added to the output of the integral module (2.02) of the proportional-integral controller to generate the output of the adder four (2.03), which is then added to v pq The signal generated by the proportional amplification module (2.01) is added by the adder five (2.04), and the output quantity of the adder five (2.04) is calculated by the integral module (2.05) to obtain the phase angle estimate θ o of the input signal.

9. A single-phase phase-locked loop which eliminates the influence of a second harmonic component according to any one of claims 7 or 8, characterized in that, The input signal v i , the output signal θ o and the feedback signal Δω o are inputted into the frequency discrimination module (1) for calculation, so as to obtain the output frequency discrimination signal v pq without the second harmonic component; wherein the input voltage signal end v i is connected with the input end of the delay signal link (1.01), the multiplier one (1.02) and the multiplier three (1.12), the output phase angle estimation value θ o obtained from the output end of the integrator (2.05) is sent to the frequency discrimination module (1) without the second harmonic component and is connected with the trigonometric function module three (1.10) and the trigonometric function module four (1.11) therein, the output Δω o of the integral module (2.02) of the proportional-integral controller is outputted to the input end of the gain module (1.07) in the frequency discrimination module (1) without the second harmonic component; the output value v pq of the quadrature signal generation module and the processing module is connected with the input end of the phase angle estimation module (2), and the corresponding output value θ o and the feedback value Δω o are obtained after calculation.

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