Method for protecting front side circuit in wet etching substrate silicon and micro-electromechanical device

Abstract

The present invention relates to the field of micro-electromechanical system design and processing technology, and specifically to a method for protecting a front circuit in wet etching of substrate silicon and a micro-electromechanical device, comprising the following steps: growing a hard mask on the back of substrate silicon; patterning the back of substrate silicon; forming a pattern on the hard mask; applying SU-8 glue on the front of the substrate silicon for protection; etching the back of the substrate silicon with tetramethylammonium hydroxide; and removing the SU-8 glue applied on the front of the substrate silicon. The front circuit of the substrate silicon is not corroded during the TMAH etching process, and the front circuit of the substrate silicon is not damaged during the coating process, which can effectively protect MEMS devices and bring broader application prospects for the development of MEMS.

Description

Technical Field

[0001] The invention relates to the technical field of micro-electromechanical system design and processing, and in particular to a method for protecting the front side of substrate silicon during wet etching and a micro-electromechanical device. Background Art

[0002] Micro-electromechanical systems (MEMS) are a high-tech that has developed rapidly in recent years. When manufacturing MEMS devices, tetramethylammonium hydroxide (TMAH) or other alkaline solutions are often used to anisotropically etch the MEMS devices after completing all integrated circuit processes. However, these alkaline etching solutions generally have a corrosive effect on materials such as Al and piezoelectric materials ZnO on the front circuit of the MEMS device. Therefore, it is necessary to develop a method that can effectively protect the easily corroded front circuit of MEMS devices in alkaline etching solutions.

[0003] This problem is the bottleneck of micro-mechanical technology research and development, and many people in China are studying this problem. At present, several protection methods have been developed, but they all have problems to varying degrees.

[0004] The traditional protection method is to apply black wax on the front of the silicon wafer, but this method is not ideal. There is a report in domestic literature that uses a colloid made of epoxy resin and polyamide to protect the front structure of the silicon wafer, but this method will cause large corrosion pits during the corrosion process, causing damage to the device.

[0005] In addition, general photoresist is used to protect the front circuit, but since general photoresist is soluble in TMAH, the front circuit cannot be effectively protected. Summary of the invention

[0006] In order to overcome the above technical problems, the present invention provides a method for protecting the front side circuit in wet etching substrate silicon and a micro-electromechanical device, so that the front side circuit of the substrate silicon can be protected.

[0007] In order to achieve the above object, the present invention provides a method for protecting a front side circuit in a wet etching substrate silicon, comprising the following steps:

[0008] growing a hard mask on the back side of the substrate silicon;

[0009] Patterning the back side of the silicon substrate;

[0010] forming a pattern on the hard mask;

[0011] Applying SU-8 glue on the front side of the silicon substrate for protection;

[0012] Etching the back side of the silicon substrate using tetramethylammonium hydroxide;

[0013] The SU-8 glue coated on the front side of the silicon substrate is removed.

[0014] The present invention also provides a micro-electromechanical device prepared by the above method. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0016] Figure 1 is a SEM image of the silicon substrate after treatment in an embodiment of the present invention;

[0017] Figure 2 for Figure 1 A partial enlarged view of point A;

[0018] Figure 3 This is the lateral etching of the hard mask during the etching of substrate silicon by tetramethylammonium hydroxide in an embodiment of the present invention. DETAILED DESCRIPTION

[0019] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.

[0020] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may further design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0021] In the context of the present disclosure, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element or an intervening layer / element may exist therebetween. In addition, if a layer / element is "on" another layer / element in one orientation, the layer / element may be "below" the other layer / element when the orientation is reversed.

[0022] An embodiment of the present invention relates to a method for protecting a front side circuit in wet etching of substrate silicon, comprising the following steps:

[0023] S1. Grow SiO2 or silicon nitride on the back of the oxidized silicon substrate as a hard mask; this step uses PE-CVD (plasma enhanced chemical vapor deposition) to grow silicon oxide as a masking layer for substrate silicon corrosion. The reason why LP-CVD (low pressure chemical vapor deposition) is not used for growth is mainly because the devices on the front of the silicon wafer have been completed and cannot withstand excessively high temperatures; and through experiments, it has been found that the quality of the film grown by PE-CVD can meet the needs, and there will be no problems such as too low selectivity and pinholes. The growth source uses TEOS (tetraethyl orthosilicate), and the specific reaction is as follows:

[0024] Si(OC2H5)4+O2→SiO2+byproducts

[0025] The thickness of silicon oxide can be between 200nm and 500nm. If it is too thin, it may not be completely masked during the etching process; if it is too thick, the etching process of the hard mask is too long, and the photoresist may peel off. S2. Pattern the back side of the substrate silicon; this step requires the use of double-sided photolithography technology to complete the alignment of the back and front graphics, and the alignment accuracy needs to be less than 1um. The alignment method can adopt infrared penetration. When the back is exposed, infrared rays are used to directly penetrate the silicon wafer to find the alignment mark on the front. Specifically, this step requires surface pretreatment, glue coating, exposure, and development. And because wet etching is required later, in order to improve the adhesion of the photoresist to the underlying hard mask, it is necessary to perform oven baking after development, and the baking temperature is 140 degrees for 40 minutes. This step can prevent the photoresist from peeling off during wet etching.

[0026] Secondly, because wet etching is required later, the front side of the silicon wafer needs to be coated with glue for protection after photolithography is completed. This protection only needs to prevent BOE corrosion, so conventional photoresist is used.

[0027] S3. Using a buffered etchant (BOE) to wet etch a pattern on the hard mask;

[0028] First, wet etching is used in this step to facilitate the subsequent TMAH etching of silicon. Since polymers will be produced during dry etching, if the polymers cannot be completely removed, the subsequent substrate silicon will not be able to be corroded. The use of wet etching has two main advantages: 1. No polymers will be produced, and there is no need to clean the polymers, and there is no risk of polymers being unable to be removed; 2. Subsequent degumming will be easier, and dry degumming is not required.

[0029] Secondly, BOE is used in the etching process, with a specific temperature of 23 degrees and a etching time of 5 minutes. BOE is used in this step to reduce the etching of the photoresist by the etching liquid during the etching process, so DHF cannot be used for etching; and the temperature needs to be 23 degrees to ensure the stability of the process; the etching time is 5 minutes to prevent some areas from being completely etched.

[0030] S4. The substrate silicon is stripped. This step is to remove the photoresist on the front and back sides of the substrate silicon. A wet stripping process is used. N-methylpyrrolidone (NMP) is used for soaking stripping at 90 degrees. This method can remove the photoresist on the front and back sides at the same time without damaging the pattern of the front device.

[0031] S5. Apply SU-8 glue to the area on the front of the substrate silicon that needs to be protected for protection; it is worth mentioning that SU-8 glue is an epoxy-type, near-ultraviolet photoresist. Since there are 8 epoxy groups in an average molecule, -8 is included in the name. Specifically, SU8 is spin-coated on the entire silicon wafer by spin coating. In this step, first, in order to increase the adhesion between SU8 and substrate silicon, HMDS is used to hydrophobize the substrate silicon, and then spin coating is performed, the coating speed is 3000rpm, and the rotation time is 60s. During the coating process, SU8 needs to be dripped in a spiral shape at the center of the substrate silicon, which can improve the coating condition of the substrate silicon edge. In addition, the rotation speed also needs to be reasonably controlled. Too high a rotation speed will cause uneven coating of the substrate silicon edge and form wind patterns; if the rotation speed is too low, SU8 will not be able to cover the entire substrate silicon, which is mainly due to the high viscosity of SU8. The rotation time is 60s. If the rotation time is too short, the photoresist will not be completely dried.

[0032] S6. Dry the substrate silicon coated with SU-8 glue on the front side; bake it after coating, the baking temperature is 90 degrees, and the time is 40 minutes. The baking temperature in this step cannot be too high, otherwise it will cause the performance of SU8 to change, and it will not be able to block well during the corrosion process, and SU8 cannot be photosensitive, otherwise it will be difficult to remove after cross-linking.

[0033] S7. Adjust the temperature to 70-90℃ and use tetramethylammonium hydroxide (TMAH) to etch the back of the substrate silicon; in this step, the etching temperature needs to be strictly controlled. If the etching temperature is less than 70 degrees, the etching rate of TMAH on silicon will become very low, and the entire process time will take several days or even longer. If the etching temperature is too high, SU8 will be dissolved in TMAH during the etching process and will not be able to play a blocking role.

[0034] S8. Adjust the temperature to 90-110°C, and use an organic degumming liquid to remove the SU-8 glue coated on the front side of the substrate silicon. The organic degumming liquid can be selected from NMP or acetone. In this step, the process temperature is 90 degrees to 110 degrees. In order to completely dissolve SU8, a process temperature of more than 90 degrees is required.

[0035] S9. After the SU-8 glue coated on the front side of the substrate silicon is dissolved, clean the substrate silicon with IPA and then blow dry with nitrogen. Do not wash it directly with water after NMP cleaning, otherwise the silicon will be corroded. And because the back side has been corroded by TMAH to form a cavity, the spin drying method cannot be used.

[0036] like Figure 1-3 As shown, the etching depth of the back side of the silicon substrate after the above treatment reaches 350um, and the hard mask is intact.

[0037] The substrate silicon processed by the above method can be used in MEMS devices such as infrared thermometers and filters (FBAR).

[0038] It is worth mentioning that SU-8 glue is not corroded by TMAH at 90 degrees, so that the front circuit of the substrate silicon is not corroded during the TMAH corrosion process. At the same time, it can also ensure that the front circuit of the substrate silicon is not damaged during the coating process, which can effectively protect the MEMS device.

[0039] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A method for protecting a front side circuit in a wet etching substrate silicon, characterized in that: The following steps are involved: growing a hard mask on the back side of the substrate silicon; The back and front patterns are aligned by infrared penetration, with an alignment accuracy of less than 1μm. The back of the silicon substrate is patterned, and the front of the silicon substrate is protected by glue coating. wet etching the hard mask using a buffered etchant to form a pattern; The substrate silicon is debonded using a wet debonding process; The substrate silicon was hydrophobized by HMDS, and SU-8 glue was applied on the front of the substrate silicon for protection by spin coating, with a rotation speed of 3000 rpm and a rotation time of 60 s, and the SU-8 glue was dripped in a spiral shape on the center of the substrate silicon; The substrate silicon coated with SU-8 glue on the front side is dried, and is not exposed after drying to avoid cross-linking of SU-8 glue; Etching the back side of the silicon substrate using tetramethylammonium hydroxide; Use an organic degumming liquid to remove the SU-8 glue coated on the front side of the substrate silicon at a temperature of 90-110° C. After the SU-8 glue coated on the front side of the substrate silicon is completely dissolved, clean the substrate silicon with IPA and then blow dry with nitrogen.

2. The method for protecting the front side circuit in wet etching of substrate silicon according to claim 1, characterized in that: The organic degumming solution is selected from N-methylpyrrolidone or acetone.

3. The method for protecting the front side circuit in wet etching of substrate silicon according to claim 1 or 2, characterized in that: The temperature of etching the back side of the substrate silicon using tetramethylammonium hydroxide is 70-90°C.

4. A micro-electromechanical device, characterized in that: It is prepared by the method according to claim 1 or 2.

5. The micro-electromechanical device according to claim 4, characterized in that: The micro-electromechanical device is selected from an infrared thermometer and a filter.

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